From: Paolo Bonzini <pbonzini@redhat.com>
To: qemu-devel@nongnu.org
Cc: Alistair Francis <alistair.francis@wdc.com>
Subject: [PATCH 6/7] target/riscv: remove supported from RISCVSATPMap
Date: Tue, 18 Feb 2025 17:57:56 +0100 [thread overview]
Message-ID: <20250218165757.554178-7-pbonzini@redhat.com> (raw)
In-Reply-To: <20250218165757.554178-1-pbonzini@redhat.com>
"supported" can be computed on the fly based on the max_satp_mode.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
target/riscv/cpu_cfg.h | 4 +---
target/riscv/cpu.c | 34 ++++++++++++++++++++++++----------
2 files changed, 25 insertions(+), 13 deletions(-)
diff --git a/target/riscv/cpu_cfg.h b/target/riscv/cpu_cfg.h
index 28d8de978fa..1d7fff8decd 100644
--- a/target/riscv/cpu_cfg.h
+++ b/target/riscv/cpu_cfg.h
@@ -29,11 +29,9 @@
*
* init is a 16-bit bitmap used to make sure the user selected a correct
* configuration as per the specification.
- *
- * supported is a 16-bit bitmap used to reflect the hw capabilities.
*/
typedef struct {
- uint16_t map, init, supported;
+ uint16_t map, init;
} RISCVSATPMap;
struct RISCVCPUConfig {
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index ce71ee95a52..86a048b62c5 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -437,14 +437,27 @@ static void set_satp_mode_max_supported(RISCVCPU *cpu,
bool rv32 = riscv_cpu_mxl(&cpu->env) == MXL_RV32;
const bool *valid_vm = rv32 ? valid_vm_1_10_32 : valid_vm_1_10_64;
- for (int i = 0; i <= satp_mode; ++i) {
- if (valid_vm[i]) {
- cpu->cfg.satp_mode.supported |= (1 << i);
- }
+ assert(valid_vm[satp_mode]);
+ cpu->cfg.max_satp_mode = satp_mode;
+}
+
+static bool get_satp_mode_supported(RISCVCPU *cpu, uint16_t *supported)
+{
+ bool rv32 = riscv_cpu_is_32bit(cpu);
+ const bool *valid_vm = rv32 ? valid_vm_1_10_32 : valid_vm_1_10_64;
+ int satp_mode = cpu->cfg.max_satp_mode;
+
+ if (satp_mode == -1) {
+ return false;
}
- assert(cpu->cfg.satp_mode.supported & (1 << satp_mode));
- cpu->cfg.max_satp_mode = satp_mode;
+ *supported = 0;
+ for (int i = 0; i <= satp_mode; ++i) {
+ if (valid_vm[i]) {
+ *supported |= (1 << i);
+ }
+ }
+ return true;
}
/* Set the satp mode to the max supported */
@@ -1176,9 +1189,10 @@ static void riscv_cpu_disas_set_info(CPUState *s, disassemble_info *info)
static void riscv_cpu_satp_mode_finalize(RISCVCPU *cpu, Error **errp)
{
bool rv32 = riscv_cpu_is_32bit(cpu);
+ uint16_t supported;
uint8_t satp_mode_map_max;
- if (cpu->cfg.max_satp_mode == -1) {
+ if (!get_satp_mode_supported(cpu, &supported)) {
/* The CPU wants the hypervisor to decide which satp mode to allow */
return;
}
@@ -1195,9 +1209,9 @@ static void riscv_cpu_satp_mode_finalize(RISCVCPU *cpu, Error **errp)
*/
for (int i = 1; i < 16; ++i) {
if ((cpu->cfg.satp_mode.init & (1 << i)) &&
- (cpu->cfg.satp_mode.supported & (1 << i))) {
+ supported & (1 << i)) {
for (int j = i - 1; j >= 0; --j) {
- if (cpu->cfg.satp_mode.supported & (1 << j)) {
+ if (supported & (1 << j)) {
cpu->cfg.max_satp_mode = j;
return;
}
@@ -1226,7 +1240,7 @@ static void riscv_cpu_satp_mode_finalize(RISCVCPU *cpu, Error **errp)
for (int i = satp_mode_map_max - 1; i >= 0; --i) {
if (!(cpu->cfg.satp_mode.map & (1 << i)) &&
(cpu->cfg.satp_mode.init & (1 << i)) &&
- (cpu->cfg.satp_mode.supported & (1 << i))) {
+ (supported & (1 << i))) {
error_setg(errp, "cannot disable %s satp mode if %s "
"is enabled", satp_mode_str(i, false),
satp_mode_str(satp_mode_map_max, false));
--
2.48.1
next prev parent reply other threads:[~2025-02-18 16:59 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-18 16:57 [PATCH 0/7] target/riscv: store max SATP mode as a single integer in RISCVCPUConfig Paolo Bonzini
2025-02-18 16:57 ` [PATCH 1/7] hw/riscv: acpi: only create RHCT MMU entry for supported types Paolo Bonzini
2025-03-06 1:13 ` Alistair Francis
2025-03-06 12:11 ` Paolo Bonzini
2025-02-18 16:57 ` [PATCH 2/7] target/riscv: env->misa_mxl is a constant Paolo Bonzini
2025-03-06 1:16 ` Alistair Francis
2025-03-06 13:00 ` Paolo Bonzini
2025-03-07 0:44 ` Alistair Francis
2025-03-10 17:34 ` Paolo Bonzini
2025-03-10 22:18 ` Alistair Francis
2025-03-11 6:17 ` Paolo Bonzini
2025-03-19 1:35 ` Alistair Francis
2025-02-18 16:57 ` [PATCH 3/7] target/riscv: assert argument to set_satp_mode_max_supported is valid Paolo Bonzini
2025-03-06 1:23 ` Alistair Francis
2025-02-18 16:57 ` [PATCH 4/7] target/riscv: cpu: store max SATP mode as a single integer Paolo Bonzini
2025-03-06 1:30 ` Alistair Francis
2025-03-06 2:57 ` Alistair Francis
2025-02-18 16:57 ` [PATCH 5/7] target/riscv: update max_satp_mode based on QOM properties Paolo Bonzini
2025-03-06 1:41 ` Alistair Francis
2025-02-18 16:57 ` Paolo Bonzini [this message]
2025-03-06 2:39 ` [PATCH 6/7] target/riscv: remove supported from RISCVSATPMap Alistair Francis
2025-02-18 16:57 ` [PATCH 7/7] target/riscv: move satp_mode.{map,init} out of CPUConfig Paolo Bonzini
2025-03-06 2:42 ` [PATCH 7/7] target/riscv: move satp_mode.{map, init} " Alistair Francis
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20250218165757.554178-7-pbonzini@redhat.com \
--to=pbonzini@redhat.com \
--cc=alistair.francis@wdc.com \
--cc=qemu-devel@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).