From: CLEMENT MATHIEU--DRIF <clement.mathieu--drif@eviden.com>
To: "qemu-devel@nongnu.org" <qemu-devel@nongnu.org>
Cc: "jasowang@redhat.com" <jasowang@redhat.com>,
"zhenzhong.duan@intel.com" <zhenzhong.duan@intel.com>,
"kevin.tian@intel.com" <kevin.tian@intel.com>,
"yi.l.liu@intel.com" <yi.l.liu@intel.com>,
"joao.m.martins@oracle.com" <joao.m.martins@oracle.com>,
"peterx@redhat.com" <peterx@redhat.com>,
"mst@redhat.com" <mst@redhat.com>,
"tjeznach@rivosinc.com" <tjeznach@rivosinc.com>,
"minwoo.im@samsung.com" <minwoo.im@samsung.com>,
CLEMENT MATHIEU--DRIF <clement.mathieu--drif@eviden.com>
Subject: [PATCH v3 12/19] pci: Add a pci-level initialization function for iommu notifiers
Date: Fri, 21 Feb 2025 08:07:39 +0000 [thread overview]
Message-ID: <20250221080331.186285-13-clement.mathieu--drif@eviden.com> (raw)
In-Reply-To: <20250221080331.186285-1-clement.mathieu--drif@eviden.com>
From: Clement Mathieu--Drif <clement.mathieu--drif@eviden.com>
We add a convenient way to initialize an device-iotlb notifier.
This is meant to be used by ATS-capable devices.
pci_device_iommu_memory_region_pasid is introduces in this commit and
will be used in several other SVM-related functions exposed in
the PCI API.
Signed-off-by: Clement Mathieu--Drif <clement.mathieu--drif@eviden.com>
---
hw/pci/pci.c | 40 ++++++++++++++++++++++++++++++++++++++++
include/hw/pci/pci.h | 15 +++++++++++++++
2 files changed, 55 insertions(+)
diff --git a/hw/pci/pci.c b/hw/pci/pci.c
index 164bb22e05..be29c0375f 100644
--- a/hw/pci/pci.c
+++ b/hw/pci/pci.c
@@ -2825,6 +2825,46 @@ AddressSpace *pci_device_iommu_address_space(PCIDevice *dev)
return &address_space_memory;
}
+static IOMMUMemoryRegion *pci_device_iommu_memory_region_pasid(PCIDevice *dev,
+ uint32_t pasid)
+{
+ PCIBus *bus;
+ PCIBus *iommu_bus;
+ int devfn;
+
+ /*
+ * This function is for internal use in the module,
+ * we can call it with PCI_NO_PASID
+ */
+ if (!dev->is_master ||
+ ((pasid != PCI_NO_PASID) && !pcie_pasid_enabled(dev))) {
+ return NULL;
+ }
+
+ pci_device_get_iommu_bus_devfn(dev, &bus, &iommu_bus, &devfn);
+ if (iommu_bus && iommu_bus->iommu_ops->get_memory_region_pasid) {
+ return iommu_bus->iommu_ops->get_memory_region_pasid(bus,
+ iommu_bus->iommu_opaque, devfn, pasid);
+ }
+ return NULL;
+}
+
+bool pci_iommu_init_iotlb_notifier(PCIDevice *dev, uint32_t pasid,
+ IOMMUNotifier *n, IOMMUNotify fn,
+ void *opaque)
+{
+ IOMMUMemoryRegion *iommu_mr = pci_device_iommu_memory_region_pasid(dev,
+ pasid);
+ if (!iommu_mr) {
+ return false;
+ }
+ iommu_notifier_init(n, fn, IOMMU_NOTIFIER_DEVIOTLB_EVENTS, 0, HWADDR_MAX,
+ memory_region_iommu_attrs_to_index(iommu_mr,
+ MEMTXATTRS_UNSPECIFIED));
+ n->opaque = opaque;
+ return true;
+}
+
bool pci_device_set_iommu_device(PCIDevice *dev, HostIOMMUDevice *hiod,
Error **errp)
{
diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h
index 644551550b..a11366e08d 100644
--- a/include/hw/pci/pci.h
+++ b/include/hw/pci/pci.h
@@ -446,6 +446,21 @@ bool pci_device_set_iommu_device(PCIDevice *dev, HostIOMMUDevice *hiod,
Error **errp);
void pci_device_unset_iommu_device(PCIDevice *dev);
+/**
+ * pci_iommu_init_iotlb_notifier: initialize an IOMMU notifier
+ *
+ * This function is used by devices before registering an IOTLB notifier
+ *
+ * @dev: the device
+ * @pasid: the pasid of the address space to watch
+ * @n: the notifier to initialize
+ * @fn: the callback to be installed
+ * @opaque: user pointer that can be used to store a state
+ */
+bool pci_iommu_init_iotlb_notifier(PCIDevice *dev, uint32_t pasid,
+ IOMMUNotifier *n, IOMMUNotify fn,
+ void *opaque);
+
/**
* pci_setup_iommu: Initialize specific IOMMU handlers for a PCIBus
*
--
2.48.1
next prev parent reply other threads:[~2025-02-21 8:10 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-21 8:07 [PATCH v3 00/19] intel_iommu: Add ATS support CLEMENT MATHIEU--DRIF
2025-02-21 8:07 ` [PATCH v3 01/19] memory: Add permissions in IOMMUAccessFlags CLEMENT MATHIEU--DRIF
2025-02-21 8:07 ` [PATCH v3 02/19] intel_iommu: Declare supported PASID size CLEMENT MATHIEU--DRIF
2025-02-21 8:07 ` [PATCH v3 03/19] memory: Allow to store the PASID in IOMMUTLBEntry CLEMENT MATHIEU--DRIF
2025-02-21 8:07 ` [PATCH v3 04/19] intel_iommu: Fill the PASID field when creating an IOMMUTLBEntry CLEMENT MATHIEU--DRIF
2025-02-21 8:07 ` [PATCH v3 05/19] pcie: Add helper to declare PASID capability for a pcie device CLEMENT MATHIEU--DRIF
2025-02-21 8:07 ` [PATCH v3 06/19] pcie: Helper functions to check if PASID is enabled CLEMENT MATHIEU--DRIF
2025-02-21 8:07 ` [PATCH v3 07/19] pcie: Helper function to check if ATS " CLEMENT MATHIEU--DRIF
2025-02-21 8:07 ` [PATCH v3 08/19] pci: Cache the bus mastering status in the device CLEMENT MATHIEU--DRIF
2025-02-21 8:07 ` [PATCH v3 09/19] pci: Add IOMMU operations to get memory regions with PASID CLEMENT MATHIEU--DRIF
2025-02-21 8:07 ` [PATCH v3 10/19] intel_iommu: Implement the get_memory_region_pasid iommu operation CLEMENT MATHIEU--DRIF
2025-02-21 8:07 ` [PATCH v3 11/19] memory: Store user data pointer in the IOMMU notifiers CLEMENT MATHIEU--DRIF
2025-02-21 8:07 ` [PATCH v3 13/19] atc: Generic ATC that can be used by PCIe devices that support SVM CLEMENT MATHIEU--DRIF
2025-02-21 8:07 ` CLEMENT MATHIEU--DRIF [this message]
2025-02-21 8:07 ` [PATCH v3 14/19] atc: Add unit tests CLEMENT MATHIEU--DRIF
2025-02-21 8:07 ` [PATCH v3 15/19] memory: Add an API for ATS support CLEMENT MATHIEU--DRIF
2025-02-21 8:07 ` [PATCH v3 17/19] intel_iommu: Set address mask when a translation fails and adjust W permission CLEMENT MATHIEU--DRIF
2025-02-21 8:07 ` [PATCH v3 16/19] pci: Add a pci-level API for ATS CLEMENT MATHIEU--DRIF
2025-02-21 8:07 ` [PATCH v3 18/19] intel_iommu: Return page walk level even when the translation fails CLEMENT MATHIEU--DRIF
2025-02-21 8:07 ` [PATCH v3 19/19] intel_iommu: Add support for ATS CLEMENT MATHIEU--DRIF
2025-02-21 10:57 ` [PATCH v3 00/19] intel_iommu: Add ATS support Michael S. Tsirkin
2025-02-21 12:33 ` CLEMENT MATHIEU--DRIF
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20250221080331.186285-13-clement.mathieu--drif@eviden.com \
--to=clement.mathieu--drif@eviden.com \
--cc=jasowang@redhat.com \
--cc=joao.m.martins@oracle.com \
--cc=kevin.tian@intel.com \
--cc=minwoo.im@samsung.com \
--cc=mst@redhat.com \
--cc=peterx@redhat.com \
--cc=qemu-devel@nongnu.org \
--cc=tjeznach@rivosinc.com \
--cc=yi.l.liu@intel.com \
--cc=zhenzhong.duan@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).