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From: Bernhard Beschow <shentey@gmail.com>
To: qemu-devel@nongnu.org
Cc: "Paolo Bonzini" <pbonzini@redhat.com>,
	"Jean-Christophe Dubois" <jcd@tribudubois.net>,
	qemu-arm@nongnu.org, "Peter Maydell" <peter.maydell@linaro.org>,
	"Marc-André Lureau" <marcandre.lureau@redhat.com>,
	"Laurent Vivier" <lvivier@redhat.com>,
	"Andrey Smirnov" <andrew.smirnov@gmail.com>,
	"Bernhard Beschow" <shentey@gmail.com>,
	"Fabiano Rosas" <farosas@suse.de>,
	"Alistair Francis" <alistair@alistair23.me>,
	"Edgar E. Iglesias" <edgar.iglesias@gmail.com>,
	"Philippe Mathieu-Daudé" <philmd@linaro.org>
Subject: [PATCH v2 15/18] hw/arm/fsl-imx8mp: Add USB support
Date: Sun, 23 Feb 2025 12:47:05 +0100	[thread overview]
Message-ID: <20250223114708.1780-16-shentey@gmail.com> (raw)
In-Reply-To: <20250223114708.1780-1-shentey@gmail.com>

Split the USB MMIO regions to better keep track of the implemented vs.
unimplemented regions.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
---
 docs/system/arm/imx8mp-evk.rst |  1 +
 include/hw/arm/fsl-imx8mp.h    | 12 +++++++++++
 hw/arm/fsl-imx8mp.c            | 37 ++++++++++++++++++++++++++++++++--
 hw/arm/Kconfig                 |  1 +
 4 files changed, 49 insertions(+), 2 deletions(-)

diff --git a/docs/system/arm/imx8mp-evk.rst b/docs/system/arm/imx8mp-evk.rst
index 917c1d5176..00527b0cbe 100644
--- a/docs/system/arm/imx8mp-evk.rst
+++ b/docs/system/arm/imx8mp-evk.rst
@@ -15,6 +15,7 @@ The ``imx8mp-evk`` machine implements the following devices:
  * 3 USDHC Storage Controllers
  * 1 Designware PCI Express Controller
  * 1 Ethernet Controller
+ * 2 Designware USB 3 Controllers
  * 5 GPIO Controllers
  * 6 I2C Controllers
  * 3 SPI Controllers
diff --git a/include/hw/arm/fsl-imx8mp.h b/include/hw/arm/fsl-imx8mp.h
index e292c31a3d..5247e972b8 100644
--- a/include/hw/arm/fsl-imx8mp.h
+++ b/include/hw/arm/fsl-imx8mp.h
@@ -24,6 +24,7 @@
 #include "hw/sd/sdhci.h"
 #include "hw/ssi/imx_spi.h"
 #include "hw/timer/imx_gpt.h"
+#include "hw/usb/hcd-dwc3.h"
 #include "hw/watchdog/wdt_imx2.h"
 #include "qom/object.h"
 #include "qemu/units.h"
@@ -42,6 +43,7 @@ enum FslImx8mpConfiguration {
     FSL_IMX8MP_NUM_I2CS         = 6,
     FSL_IMX8MP_NUM_IRQS         = 160,
     FSL_IMX8MP_NUM_UARTS        = 4,
+    FSL_IMX8MP_NUM_USBS         = 2,
     FSL_IMX8MP_NUM_USDHCS       = 3,
     FSL_IMX8MP_NUM_WDTS         = 3,
 };
@@ -62,6 +64,7 @@ struct FslImx8mpState {
     IMXFECState        enet;
     SDHCIState         usdhc[FSL_IMX8MP_NUM_USDHCS];
     IMX2WdtState       wdt[FSL_IMX8MP_NUM_WDTS];
+    USBDWC3            usb[FSL_IMX8MP_NUM_USBS];
     DesignwarePCIEHost pcie;
     FslImx8mPciePhyState   pcie_phy;
     OrIRQState         gpt5_gpt6_irq;
@@ -199,6 +202,12 @@ enum FslImx8mpMemoryRegions {
     FSL_IMX8MP_UART4,
     FSL_IMX8MP_USB1,
     FSL_IMX8MP_USB2,
+    FSL_IMX8MP_USB1_DEV,
+    FSL_IMX8MP_USB2_DEV,
+    FSL_IMX8MP_USB1_OTG,
+    FSL_IMX8MP_USB2_OTG,
+    FSL_IMX8MP_USB1_GLUE,
+    FSL_IMX8MP_USB2_GLUE,
     FSL_IMX8MP_USDHC1,
     FSL_IMX8MP_USDHC2,
     FSL_IMX8MP_USDHC3,
@@ -234,6 +243,9 @@ enum FslImx8mpIrqs {
     FSL_IMX8MP_I2C3_IRQ     = 37,
     FSL_IMX8MP_I2C4_IRQ     = 38,
 
+    FSL_IMX8MP_USB1_IRQ     = 40,
+    FSL_IMX8MP_USB2_IRQ     = 41,
+
     FSL_IMX8MP_GPT1_IRQ      = 55,
     FSL_IMX8MP_GPT2_IRQ      = 54,
     FSL_IMX8MP_GPT3_IRQ      = 53,
diff --git a/hw/arm/fsl-imx8mp.c b/hw/arm/fsl-imx8mp.c
index 935279ee68..f0d5980300 100644
--- a/hw/arm/fsl-imx8mp.c
+++ b/hw/arm/fsl-imx8mp.c
@@ -40,8 +40,14 @@ static const struct {
     [FSL_IMX8MP_VPU_VC8000E_ENCODER] = { 0x38320000, 2 * MiB, "vpu_vc8000e_encoder" },
     [FSL_IMX8MP_VPU_G2_DECODER] = { 0x38310000, 2 * MiB, "vpu_g2_decoder" },
     [FSL_IMX8MP_VPU_G1_DECODER] = { 0x38300000, 2 * MiB, "vpu_g1_decoder" },
-    [FSL_IMX8MP_USB2] = { 0x38200000, 1 * MiB, "usb2" },
-    [FSL_IMX8MP_USB1] = { 0x38100000, 1 * MiB, "usb1" },
+    [FSL_IMX8MP_USB2_GLUE] = { 0x382f0000, 0x100, "usb2_glue" },
+    [FSL_IMX8MP_USB2_OTG] = { 0x3820cc00, 0x100, "usb2_otg" },
+    [FSL_IMX8MP_USB2_DEV] = { 0x3820c700, 0x500, "usb2_dev" },
+    [FSL_IMX8MP_USB2] = { 0x38200000, 0xc700, "usb2" },
+    [FSL_IMX8MP_USB1_GLUE] = { 0x381f0000, 0x100, "usb1_glue" },
+    [FSL_IMX8MP_USB1_OTG] = { 0x3810cc00, 0x100, "usb1_otg" },
+    [FSL_IMX8MP_USB1_DEV] = { 0x3810c700, 0x500, "usb1_dev" },
+    [FSL_IMX8MP_USB1] = { 0x38100000, 0xc700, "usb1" },
     [FSL_IMX8MP_GPU2D] = { 0x38008000, 32 * KiB, "gpu2d" },
     [FSL_IMX8MP_GPU3D] = { 0x38000000, 32 * KiB, "gpu3d" },
     [FSL_IMX8MP_QSPI1_RX_BUFFER] = { 0x34000000, 32 * MiB, "qspi1_rx_buffer" },
@@ -230,6 +236,11 @@ static void fsl_imx8mp_init(Object *obj)
         object_initialize_child(obj, name, &s->usdhc[i], TYPE_IMX_USDHC);
     }
 
+    for (i = 0; i < FSL_IMX8MP_NUM_USBS; i++) {
+        g_autofree char *name = g_strdup_printf("usb%d", i);
+        object_initialize_child(obj, name, &s->usb[i], TYPE_USB_DWC3);
+    }
+
     for (i = 0; i < FSL_IMX8MP_NUM_ECSPIS; i++) {
         g_autofree char *name = g_strdup_printf("spi%d", i + 1);
         object_initialize_child(obj, name, &s->spi[i], TYPE_IMX_SPI);
@@ -524,6 +535,27 @@ static void fsl_imx8mp_realize(DeviceState *dev, Error **errp)
                            qdev_get_gpio_in(gicdev, usdhc_table[i].irq));
     }
 
+    /* USBs */
+    for (i = 0; i < FSL_IMX8MP_NUM_USBS; i++) {
+        static const struct {
+            hwaddr addr;
+            unsigned int irq;
+        } usb_table[FSL_IMX8MP_NUM_USBS] = {
+            { fsl_imx8mp_memmap[FSL_IMX8MP_USB1].addr, FSL_IMX8MP_USB1_IRQ },
+            { fsl_imx8mp_memmap[FSL_IMX8MP_USB2].addr, FSL_IMX8MP_USB2_IRQ },
+        };
+
+        qdev_prop_set_uint32(DEVICE(&s->usb[i].sysbus_xhci), "p2", 1);
+        qdev_prop_set_uint32(DEVICE(&s->usb[i].sysbus_xhci), "p3", 1);
+        qdev_prop_set_uint32(DEVICE(&s->usb[i].sysbus_xhci), "slots", 2);
+        if (!sysbus_realize(SYS_BUS_DEVICE(&s->usb[i]), errp)) {
+            return;
+        }
+        sysbus_mmio_map(SYS_BUS_DEVICE(&s->usb[i]), 0, usb_table[i].addr);
+        sysbus_connect_irq(SYS_BUS_DEVICE(&s->usb[i].sysbus_xhci), 0,
+                           qdev_get_gpio_in(gicdev, usb_table[i].irq));
+    }
+
     /* ECSPIs */
     for (i = 0; i < FSL_IMX8MP_NUM_ECSPIS; i++) {
         static const struct {
@@ -628,6 +660,7 @@ static void fsl_imx8mp_realize(DeviceState *dev, Error **errp)
         case FSL_IMX8MP_RAM:
         case FSL_IMX8MP_SNVS_HP:
         case FSL_IMX8MP_UART1 ... FSL_IMX8MP_UART4:
+        case FSL_IMX8MP_USB1 ... FSL_IMX8MP_USB2:
         case FSL_IMX8MP_USDHC1 ... FSL_IMX8MP_USDHC3:
         case FSL_IMX8MP_WDOG1 ... FSL_IMX8MP_WDOG3:
             /* device implemented and treated above */
diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
index 4d642db970..faa00d1db3 100644
--- a/hw/arm/Kconfig
+++ b/hw/arm/Kconfig
@@ -608,6 +608,7 @@ config FSL_IMX8MP
     select PCI_EXPRESS_FSL_IMX8M_PHY
     select SDHCI
     select UNIMP
+    select USB_DWC3
     select WDT_IMX2
 
 config FSL_IMX8MP_EVK
-- 
2.48.1



  parent reply	other threads:[~2025-02-23 11:51 UTC|newest]

Thread overview: 41+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-02-23 11:46 [PATCH v2 00/18] Add i.MX 8M Plus EVK machine Bernhard Beschow
2025-02-23 11:46 ` [PATCH v2 01/18] hw/usb/hcd-dwc3: Align global registers size with Linux Bernhard Beschow
2025-02-23 11:46 ` [PATCH v2 02/18] hw/pci-host/designware: Prevent device attachment on internal PCIe root bus Bernhard Beschow
2025-02-23 11:46 ` [PATCH v2 03/18] hw/gpio/pca955*: Move Kconfig switches next to implementations Bernhard Beschow
2025-02-25 14:15   ` Peter Maydell
2025-02-23 11:46 ` [PATCH v2 04/18] hw/arm: Add i.MX 8M Plus EVK board Bernhard Beschow
2025-02-25 14:19   ` Peter Maydell
2025-02-25 15:42   ` Peter Maydell
2025-02-25 17:00     ` Peter Maydell
2025-02-26  6:36       ` Bernhard Beschow
2025-02-26 11:53         ` Peter Maydell
2025-02-26  6:55       ` Bernhard Beschow
2025-02-23 11:46 ` [PATCH v2 05/18] hw/arm/fsl-imx8mp: Implement clock tree Bernhard Beschow
2025-02-25 14:21   ` Peter Maydell
2025-02-23 11:46 ` [PATCH v2 06/18] hw/arm/fsl-imx8mp: Add SNVS Bernhard Beschow
2025-02-23 11:46 ` [PATCH v2 07/18] hw/arm/fsl-imx8mp: Add USDHC storage controllers Bernhard Beschow
2025-02-23 11:46 ` [PATCH v2 08/18] hw/arm/fsl-imx8mp: Add PCIe support Bernhard Beschow
2025-02-25 14:22   ` Peter Maydell
2025-02-23 11:46 ` [PATCH v2 09/18] hw/arm/fsl-imx8mp: Add GPIO controllers Bernhard Beschow
2025-02-23 11:47 ` [PATCH v2 10/18] hw/arm/fsl-imx8mp: Add I2C controllers Bernhard Beschow
2025-02-23 11:47 ` [PATCH v2 11/18] hw/arm/fsl-imx8mp: Add SPI controllers Bernhard Beschow
2025-02-23 11:47 ` [PATCH v2 12/18] hw/arm/fsl-imx8mp: Add watchdog support Bernhard Beschow
2025-02-23 11:47 ` [PATCH v2 13/18] hw/arm/fsl-imx8mp: Implement general purpose timers Bernhard Beschow
2025-02-23 11:47 ` [PATCH v2 14/18] hw/arm/fsl-imx8mp: Add Ethernet controller Bernhard Beschow
2025-02-23 11:47 ` Bernhard Beschow [this message]
2025-02-23 11:47 ` [PATCH v2 16/18] hw/arm/fsl-imx8mp: Add boot ROM Bernhard Beschow
2025-02-25 14:29   ` Peter Maydell
2025-02-25 18:48     ` Bernhard Beschow
2025-02-23 11:47 ` [PATCH v2 17/18] hw/arm/fsl-imx8mp: Add on-chip RAM Bernhard Beschow
2025-02-23 11:47 ` [PATCH v2 18/18] hw/rtc: Add Ricoh RS5C372 RTC emulation Bernhard Beschow
2025-03-04 18:53   ` Bernhard Beschow
2025-03-07 19:18     ` Bernhard Beschow
2025-03-11  7:34       ` Bernhard Beschow
2025-03-11  9:20         ` Philippe Mathieu-Daudé
2025-03-11 15:49           ` Corey Minyard
2025-03-11 16:01             ` Philippe Mathieu-Daudé
2025-03-11 12:18   ` Fabiano Rosas
2025-02-25 14:43 ` [PATCH v2 00/18] Add i.MX 8M Plus EVK machine Peter Maydell
2025-02-25 19:00   ` Bernhard Beschow
  -- strict thread matches above, loose matches on Subject: below --
2025-02-04  9:20 Bernhard Beschow
2025-02-04  9:21 ` [PATCH v2 15/18] hw/arm/fsl-imx8mp: Add USB support Bernhard Beschow
2025-02-06 17:31   ` Peter Maydell

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