From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 02/43] hw/arm/virt: Support larger highmem MMIO regions
Date: Tue, 25 Feb 2025 18:04:28 +0000 [thread overview]
Message-ID: <20250225180510.1318207-3-peter.maydell@linaro.org> (raw)
In-Reply-To: <20250225180510.1318207-1-peter.maydell@linaro.org>
From: "Matthew R. Ochs" <mochs@nvidia.com>
The MMIO region size required to support virtualized environments with
large PCI BAR regions can exceed the hardcoded limit configured in QEMU.
For example, a VM with multiple NVIDIA Grace-Hopper GPUs passed through
requires more MMIO memory than the amount provided by VIRT_HIGH_PCIE_MMIO
(currently 512GB). Instead of updating VIRT_HIGH_PCIE_MMIO, introduce a
new parameter, highmem-mmio-size, that specifies the MMIO size required
to support the VM configuration.
Example usage with 1TB MMIO region size:
-machine virt,gic-version=3,highmem-mmio-size=1T
Signed-off-by: Matthew R. Ochs <mochs@nvidia.com>
Reviewed-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Shameer Kolothum <shameerali.kolothum.thodi@huawei.com>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Nicolin Chen <nicolinc@nvidia.com>
Message-id: 20250221145419.1281890-1-mochs@nvidia.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
docs/system/arm/virt.rst | 4 ++++
hw/arm/virt.c | 52 +++++++++++++++++++++++++++++++++++++++-
2 files changed, 55 insertions(+), 1 deletion(-)
diff --git a/docs/system/arm/virt.rst b/docs/system/arm/virt.rst
index 0c9c2ce0351..adf446c0a29 100644
--- a/docs/system/arm/virt.rst
+++ b/docs/system/arm/virt.rst
@@ -144,6 +144,10 @@ highmem-mmio
Set ``on``/``off`` to enable/disable the high memory region for PCI MMIO.
The default is ``on``.
+highmem-mmio-size
+ Set the high memory region size for PCI MMIO. Must be a power of 2 and
+ greater than or equal to the default size (512G).
+
gic-version
Specify the version of the Generic Interrupt Controller (GIC) to provide.
Valid values are:
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 4a5a9666e91..ee69081ef42 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -53,6 +53,7 @@
#include "hw/loader.h"
#include "qapi/error.h"
#include "qemu/bitops.h"
+#include "qemu/cutils.h"
#include "qemu/error-report.h"
#include "qemu/module.h"
#include "hw/pci-host/gpex.h"
@@ -192,6 +193,10 @@ static const MemMapEntry base_memmap[] = {
[VIRT_MEM] = { GiB, LEGACY_RAMLIMIT_BYTES },
};
+/* Update the docs for highmem-mmio-size when changing this default */
+#define DEFAULT_HIGH_PCIE_MMIO_SIZE_GB 512
+#define DEFAULT_HIGH_PCIE_MMIO_SIZE (DEFAULT_HIGH_PCIE_MMIO_SIZE_GB * GiB)
+
/*
* Highmem IO Regions: This memory map is floating, located after the RAM.
* Each MemMapEntry base (GPA) will be dynamically computed, depending on the
@@ -207,13 +212,16 @@ static const MemMapEntry base_memmap[] = {
* PA space for one specific region is always reserved, even if the region
* has been disabled or doesn't fit into the PA space. However, the PA space
* for the region won't be reserved in these circumstances with compact layout.
+ *
+ * Note that the highmem-mmio-size property will update the high PCIE MMIO size
+ * field in this array.
*/
static MemMapEntry extended_memmap[] = {
/* Additional 64 MB redist region (can contain up to 512 redistributors) */
[VIRT_HIGH_GIC_REDIST2] = { 0x0, 64 * MiB },
[VIRT_HIGH_PCIE_ECAM] = { 0x0, 256 * MiB },
/* Second PCIe window */
- [VIRT_HIGH_PCIE_MMIO] = { 0x0, 512 * GiB },
+ [VIRT_HIGH_PCIE_MMIO] = { 0x0, DEFAULT_HIGH_PCIE_MMIO_SIZE },
};
static const int a15irqmap[] = {
@@ -2550,6 +2558,40 @@ static void virt_set_highmem_mmio(Object *obj, bool value, Error **errp)
vms->highmem_mmio = value;
}
+static void virt_get_highmem_mmio_size(Object *obj, Visitor *v,
+ const char *name, void *opaque,
+ Error **errp)
+{
+ uint64_t size = extended_memmap[VIRT_HIGH_PCIE_MMIO].size;
+
+ visit_type_size(v, name, &size, errp);
+}
+
+static void virt_set_highmem_mmio_size(Object *obj, Visitor *v,
+ const char *name, void *opaque,
+ Error **errp)
+{
+ uint64_t size;
+
+ if (!visit_type_size(v, name, &size, errp)) {
+ return;
+ }
+
+ if (!is_power_of_2(size)) {
+ error_setg(errp, "highmem-mmio-size is not a power of 2");
+ return;
+ }
+
+ if (size < DEFAULT_HIGH_PCIE_MMIO_SIZE) {
+ char *sz = size_to_str(DEFAULT_HIGH_PCIE_MMIO_SIZE);
+ error_setg(errp, "highmem-mmio-size cannot be set to a lower value "
+ "than the default (%s)", sz);
+ g_free(sz);
+ return;
+ }
+
+ extended_memmap[VIRT_HIGH_PCIE_MMIO].size = size;
+}
static bool virt_get_its(Object *obj, Error **errp)
{
@@ -3207,6 +3249,14 @@ static void virt_machine_class_init(ObjectClass *oc, void *data)
"Set on/off to enable/disable high "
"memory region for PCI MMIO");
+ object_class_property_add(oc, "highmem-mmio-size", "size",
+ virt_get_highmem_mmio_size,
+ virt_set_highmem_mmio_size,
+ NULL, NULL);
+ object_class_property_set_description(oc, "highmem-mmio-size",
+ "Set the high memory region size "
+ "for PCI MMIO");
+
object_class_property_add_str(oc, "gic-version", virt_get_gic_version,
virt_set_gic_version);
object_class_property_set_description(oc, "gic-version",
--
2.43.0
next prev parent reply other threads:[~2025-02-25 18:06 UTC|newest]
Thread overview: 52+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-25 18:04 [PULL 00/43] target-arm queue Peter Maydell
2025-02-25 18:04 ` [PULL 01/43] hw/arm/smmuv3: Fill u.f_cd_fetch.addr for SMMU_EVT_F_CD_FETCH Peter Maydell
2025-02-25 18:04 ` Peter Maydell [this message]
2025-02-25 18:04 ` [PULL 03/43] monitor/hmp-cmds.c: Clean up hmp_dumpdtb printf Peter Maydell
2025-02-25 18:04 ` [PULL 04/43] hw/openrisc: Support monitor dumpdtb command Peter Maydell
2025-02-25 18:04 ` [PULL 05/43] hw/mips/boston: Check for error return from boston_fdt_filter() Peter Maydell
2025-02-25 18:04 ` [PULL 06/43] hw/mips/boston: Support dumpdtb monitor commands Peter Maydell
2025-02-25 18:04 ` [PULL 07/43] hw: Centralize handling of -machine dumpdtb option Peter Maydell
2025-02-25 18:04 ` [PULL 08/43] hw/core/machine.c: Make -machine dumpdtb=file.dtb with no DTB an error Peter Maydell
2025-02-25 18:04 ` [PULL 09/43] fpu: Make targets specify floatx80 default Inf at runtime Peter Maydell
2025-02-25 18:04 ` [PULL 10/43] target/m68k: Avoid using floatx80_infinity global const Peter Maydell
2025-02-25 18:04 ` [PULL 11/43] target/i386: " Peter Maydell
2025-02-25 18:04 ` [PULL 12/43] fpu: Pass float_status to floatx80_is_infinity() Peter Maydell
2025-02-25 18:04 ` [PULL 13/43] fpu: Make targets specify whether floatx80 Inf can have Int bit clear Peter Maydell
2025-02-25 18:04 ` [PULL 14/43] fpu: Pass float_status to floatx80_invalid_encoding() Peter Maydell
2025-02-25 18:04 ` [PULL 15/43] fpu: Make floatx80 invalid encoding settable at runtime Peter Maydell
2025-02-25 18:04 ` [PULL 16/43] fpu: Move m68k_denormal fmt flag into floatx80_behaviour Peter Maydell
2025-02-25 18:04 ` [PULL 17/43] fpu: Always decide no_signaling_nans() at runtime Peter Maydell
2025-02-25 18:04 ` [PULL 18/43] fpu: Always decide snan_bit_is_one() " Peter Maydell
2025-02-25 18:04 ` [PULL 19/43] fpu: Don't compile-time disable hardfloat for PPC targets Peter Maydell
2025-02-25 18:04 ` [PULL 20/43] fpu: Build only once Peter Maydell
2025-02-25 18:04 ` [PULL 21/43] target/arm: Move TCG-only VFP code into tcg/ subdir Peter Maydell
2025-02-25 18:04 ` [PULL 22/43] target/arm: Move FPSCR get/set helpers to tcg/vfp_helper.c Peter Maydell
2025-02-25 18:04 ` [PULL 23/43] target/arm: Move softfloat specific FPCR/FPSR handling to tcg/ Peter Maydell
2025-02-25 18:04 ` [PULL 24/43] target/arm: Rename vfp_helper.c to vfp_fpscr.c Peter Maydell
2025-02-25 18:04 ` [PULL 25/43] target/arm/hvf: Disable SME feature Peter Maydell
2025-02-25 18:04 ` [PULL 26/43] target/arm/hvf: sign extend the data for a load operation when SSE=1 Peter Maydell
2025-02-25 18:04 ` [PULL 27/43] hw/misc/npcm_clk: fix buffer-overflow Peter Maydell
2025-02-25 18:04 ` [PULL 28/43] hw/usb/hcd-dwc3: Align global registers size with Linux Peter Maydell
2025-02-25 18:04 ` [PULL 29/43] hw/pci-host/designware: Prevent device attachment on internal PCIe root bus Peter Maydell
2025-02-25 18:04 ` [PULL 30/43] hw/gpio/pca955*: Move Kconfig switches next to implementations Peter Maydell
2025-02-25 18:04 ` [PULL 31/43] hw/arm: Add i.MX 8M Plus EVK board Peter Maydell
2025-03-12 9:40 ` Thomas Huth
2025-03-12 10:05 ` Philippe Mathieu-Daudé
2025-03-12 10:20 ` Peter Maydell
2025-03-12 10:27 ` Philippe Mathieu-Daudé
2025-03-12 10:44 ` Cédric Le Goater
2025-03-12 11:13 ` Peter Maydell
2025-03-12 16:33 ` Bernhard Beschow
2025-02-25 18:04 ` [PULL 32/43] hw/arm/fsl-imx8mp: Implement clock tree Peter Maydell
2025-02-25 18:04 ` [PULL 33/43] hw/arm/fsl-imx8mp: Add SNVS Peter Maydell
2025-02-25 18:05 ` [PULL 34/43] hw/arm/fsl-imx8mp: Add USDHC storage controllers Peter Maydell
2025-02-25 18:05 ` [PULL 35/43] hw/arm/fsl-imx8mp: Add PCIe support Peter Maydell
2025-02-25 18:05 ` [PULL 36/43] hw/arm/fsl-imx8mp: Add GPIO controllers Peter Maydell
2025-02-25 18:05 ` [PULL 37/43] hw/arm/fsl-imx8mp: Add I2C controllers Peter Maydell
2025-02-25 18:05 ` [PULL 38/43] hw/arm/fsl-imx8mp: Add SPI controllers Peter Maydell
2025-02-25 18:05 ` [PULL 39/43] hw/arm/fsl-imx8mp: Add watchdog support Peter Maydell
2025-02-25 18:05 ` [PULL 40/43] hw/arm/fsl-imx8mp: Implement general purpose timers Peter Maydell
2025-02-25 18:05 ` [PULL 41/43] hw/arm/fsl-imx8mp: Add Ethernet controller Peter Maydell
2025-02-25 18:05 ` [PULL 42/43] hw/arm/fsl-imx8mp: Add USB support Peter Maydell
2025-02-25 18:05 ` [PULL 43/43] hw/arm/fsl-imx8mp: Add on-chip RAM Peter Maydell
2025-03-03 12:13 ` [PULL 00/43] target-arm queue Stefan Hajnoczi
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