From: Igor Mammedov <imammedo@redhat.com>
To: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Cc: "Michael S . Tsirkin" <mst@redhat.com>,
Jonathan Cameron <Jonathan.Cameron@huawei.com>,
Shiju Jose <shiju.jose@huawei.com>,
qemu-arm@nongnu.org, qemu-devel@nongnu.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v5 17/21] tests/acpi: virt: update HEST table to accept two sources
Date: Thu, 27 Feb 2025 14:16:03 +0100 [thread overview]
Message-ID: <20250227141603.3957e78b@imammedo.users.ipa.redhat.com> (raw)
In-Reply-To: <20250227141038.28501d73@imammedo.users.ipa.redhat.com>
On Thu, 27 Feb 2025 14:10:38 +0100
Igor Mammedov <imammedo@redhat.com> wrote:
> On Thu, 27 Feb 2025 12:03:47 +0100
> Mauro Carvalho Chehab <mchehab+huawei@kernel.org> wrote:
>
> squash this patch into the next one
>
> Also at this point there is no visible HEST changes yet, so a soon as you remove
> white-list without enabling new HEST, the tests should start failing.
>
> I suggest to move 20/21 before this patch,
> as result one would see dsdt and hest diffs when running tests
> and then you can use rebuild-expected-aml.sh to generate updated
> tables and update them in one patch (that's what we typically do,
> we don't split updates in increments).
on top of that,
it seems the patch doesn't apply for some reason.
>
>
> > --- /tmp/asl-38PE22.dsl 2025-02-26 16:25:32.362148388 +0100
> > +++ /tmp/asl-HSPE22.dsl 2025-02-26 16:25:32.361148402 +0100
> > @@ -1,39 +1,39 @@
> > /*
> > * Intel ACPI Component Architecture
> > * AML/ASL+ Disassembler version 20240322 (64-bit version)
> > * Copyright (c) 2000 - 2023 Intel Corporation
> > *
> > - * Disassembly of tests/data/acpi/aarch64/virt/HEST
> > + * Disassembly of /tmp/aml-DMPE22
> > *
> > * ACPI Data Table [HEST]
> > *
> > * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue (in hex)
> > */
> >
> > [000h 0000 004h] Signature : "HEST" [Hardware Error Source Table]
> > -[004h 0004 004h] Table Length : 00000084
> > +[004h 0004 004h] Table Length : 000000E0
> > [008h 0008 001h] Revision : 01
> > -[009h 0009 001h] Checksum : E2
> > +[009h 0009 001h] Checksum : 6C
> > [00Ah 0010 006h] Oem ID : "BOCHS "
> > [010h 0016 008h] Oem Table ID : "BXPC "
> > [018h 0024 004h] Oem Revision : 00000001
> > [01Ch 0028 004h] Asl Compiler ID : "BXPC"
> > [020h 0032 004h] Asl Compiler Revision : 00000001
> >
> > -[024h 0036 004h] Error Source Count : 00000001
> > +[024h 0036 004h] Error Source Count : 00000002
> >
> > [028h 0040 002h] Subtable Type : 000A [Generic Hardware Error Source V2]
> > [02Ah 0042 002h] Source Id : 0000
> > [02Ch 0044 002h] Related Source Id : FFFF
> > [02Eh 0046 001h] Reserved : 00
> > [02Fh 0047 001h] Enabled : 01
> > [030h 0048 004h] Records To Preallocate : 00000001
> > [034h 0052 004h] Max Sections Per Record : 00000001
> > [038h 0056 004h] Max Raw Data Length : 00000400
> >
> > [03Ch 0060 00Ch] Error Status Address : [Generic Address Structure]
> > [03Ch 0060 001h] Space ID : 00 [SystemMemory]
> > [03Dh 0061 001h] Bit Width : 40
> > [03Eh 0062 001h] Bit Offset : 00
> > [03Fh 0063 001h] Encoded Access Width : 04 [QWord Access:64]
> > [040h 0064 008h] Address : 0000000043DA0000
> > @@ -42,32 +42,75 @@
> > [048h 0072 001h] Notify Type : 08 [SEA]
> > [049h 0073 001h] Notify Length : 1C
> > [04Ah 0074 002h] Configuration Write Enable : 0000
> > [04Ch 0076 004h] PollInterval : 00000000
> > [050h 0080 004h] Vector : 00000000
> > [054h 0084 004h] Polling Threshold Value : 00000000
> > [058h 0088 004h] Polling Threshold Window : 00000000
> > [05Ch 0092 004h] Error Threshold Value : 00000000
> > [060h 0096 004h] Error Threshold Window : 00000000
> >
> > [064h 0100 004h] Error Status Block Length : 00000400
> > [068h 0104 00Ch] Read Ack Register : [Generic Address Structure]
> > [068h 0104 001h] Space ID : 00 [SystemMemory]
> > [069h 0105 001h] Bit Width : 40
> > [06Ah 0106 001h] Bit Offset : 00
> > [06Bh 0107 001h] Encoded Access Width : 04 [QWord Access:64]
> > -[06Ch 0108 008h] Address : 0000000043DA0008
> > +[06Ch 0108 008h] Address : 0000000043DA0010
> >
> > [074h 0116 008h] Read Ack Preserve : FFFFFFFFFFFFFFFE
> > [07Ch 0124 008h] Read Ack Write : 0000000000000001
> >
> > -Raw Table Data: Length 132 (0x84)
> > +[084h 0132 002h] Subtable Type : 000A [Generic Hardware Error Source V2]
> > +[086h 0134 002h] Source Id : 0001
> > +[088h 0136 002h] Related Source Id : FFFF
> > +[08Ah 0138 001h] Reserved : 00
> > +[08Bh 0139 001h] Enabled : 01
> > +[08Ch 0140 004h] Records To Preallocate : 00000001
> > +[090h 0144 004h] Max Sections Per Record : 00000001
> > +[094h 0148 004h] Max Raw Data Length : 00000400
> > +
> > +[098h 0152 00Ch] Error Status Address : [Generic Address Structure]
> > +[098h 0152 001h] Space ID : 00 [SystemMemory]
> > +[099h 0153 001h] Bit Width : 40
> > +[09Ah 0154 001h] Bit Offset : 00
> > +[09Bh 0155 001h] Encoded Access Width : 04 [QWord Access:64]
> > +[09Ch 0156 008h] Address : 0000000043DA0008
> > +
> > +[0A4h 0164 01Ch] Notify : [Hardware Error Notification Structure]
> > +[0A4h 0164 001h] Notify Type : 07 [GPIO]
> > +[0A5h 0165 001h] Notify Length : 1C
> > +[0A6h 0166 002h] Configuration Write Enable : 0000
> > +[0A8h 0168 004h] PollInterval : 00000000
> > +[0ACh 0172 004h] Vector : 00000000
> > +[0B0h 0176 004h] Polling Threshold Value : 00000000
> > +[0B4h 0180 004h] Polling Threshold Window : 00000000
> > +[0B8h 0184 004h] Error Threshold Value : 00000000
> > +[0BCh 0188 004h] Error Threshold Window : 00000000
> > +
> > +[0C0h 0192 004h] Error Status Block Length : 00000400
> > +[0C4h 0196 00Ch] Read Ack Register : [Generic Address Structure]
> > +[0C4h 0196 001h] Space ID : 00 [SystemMemory]
> > +[0C5h 0197 001h] Bit Width : 40
> > +[0C6h 0198 001h] Bit Offset : 00
> > +[0C7h 0199 001h] Encoded Access Width : 04 [QWord Access:64]
> > +[0C8h 0200 008h] Address : 0000000043DA0018
> >
> > - 0000: 48 45 53 54 84 00 00 00 01 E2 42 4F 43 48 53 20 // HEST......BOCHS
> > +[0D0h 0208 008h] Read Ack Preserve : FFFFFFFFFFFFFFFE
> > +[0D8h 0216 008h] Read Ack Write : 0000000000000001
> > +
> > +Raw Table Data: Length 224 (0xE0)
> > +
> >
> > Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
> > ---
> > tests/data/acpi/aarch64/virt/HEST | Bin 132 -> 224 bytes
> > 1 file changed, 0 insertions(+), 0 deletions(-)
> >
> > diff --git a/tests/data/acpi/aarch64/virt/HEST b/tests/data/acpi/aarch64/virt/HEST
> > index 4c5d8c5b5da5b3241f93cd0839e94272bf6b1486..674272922db7d48f7821aa7c83ec76bb3b556d2a 100644
> > GIT binary patch
> > delta 68
> > zcmZo+e89-%;TjzBfPsO5F=rx|6eH6_Rd+^#iMisuTnvm1|Nk>EGJ@nLCJHmL%S;Ru
> > WnV7)J#lXPAz`)?Zz#=g*R~!HcF%5eF
> >
> > delta 29
> > lcmaFB*uu!=;Tjy$!oa}5_-G=R6eHtARriT=I3|_|004Ge2nqlI
> >
>
next prev parent reply other threads:[~2025-02-27 13:17 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-27 11:03 [PATCH v5 00/21]Change ghes to use HEST-based offsets and add support for error inject Mauro Carvalho Chehab
2025-02-27 11:03 ` [PATCH v5 01/21] tests/acpi: virt: add an empty HEST file Mauro Carvalho Chehab
2025-02-27 12:02 ` Igor Mammedov
2025-02-27 11:03 ` [PATCH v5 02/21] tests/qtest/bios-tables-test: extend to also check HEST table Mauro Carvalho Chehab
2025-02-27 12:03 ` Igor Mammedov
2025-02-27 11:03 ` [PATCH v5 03/21] tests/acpi: virt: update HEST file with its current data Mauro Carvalho Chehab
2025-02-27 12:03 ` Igor Mammedov
2025-02-27 11:03 ` [PATCH v5 04/21] acpi/ghes: Cleanup the code which gets ghes ged state Mauro Carvalho Chehab
2025-02-27 11:03 ` [PATCH v5 05/21] acpi/ghes: prepare to change the way HEST offsets are calculated Mauro Carvalho Chehab
2025-02-27 13:25 ` Igor Mammedov
2025-02-27 11:03 ` [PATCH v5 06/21] acpi/ghes: add a firmware file with HEST address Mauro Carvalho Chehab
2025-02-27 13:23 ` Igor Mammedov
2025-02-27 11:03 ` [PATCH v5 07/21] acpi/ghes: Use HEST table offsets when preparing GHES records Mauro Carvalho Chehab
2025-02-27 13:27 ` Igor Mammedov
2025-02-27 11:03 ` [PATCH v5 08/21] acpi/ghes: don't hard-code the number of sources for HEST table Mauro Carvalho Chehab
2025-02-27 11:03 ` [PATCH v5 09/21] acpi/ghes: add a notifier to notify when error data is ready Mauro Carvalho Chehab
2025-02-27 11:03 ` [PATCH v5 10/21] acpi/ghes: create an ancillary acpi_ghes_get_state() function Mauro Carvalho Chehab
2025-02-27 11:31 ` Mauro Carvalho Chehab
2025-02-27 11:03 ` [PATCH v5 11/21] acpi/generic_event_device: Update GHES migration to cover hest addr Mauro Carvalho Chehab
2025-02-27 11:03 ` [PATCH v5 12/21] acpi/generic_event_device: add logic to detect if HEST addr is available Mauro Carvalho Chehab
2025-02-27 13:33 ` Igor Mammedov
2025-02-27 11:03 ` [PATCH v5 13/21] acpi/generic_event_device: add an APEI error device Mauro Carvalho Chehab
2025-02-27 11:03 ` [PATCH v5 14/21] tests/acpi: virt: allow acpi table changes at DSDT and HEST tables Mauro Carvalho Chehab
2025-02-27 13:34 ` Igor Mammedov
2025-02-27 11:03 ` [PATCH v5 15/21] arm/virt: Wire up a GED error device for ACPI / GHES Mauro Carvalho Chehab
2025-02-27 11:03 ` [PATCH v5 16/21] qapi/acpi-hest: add an interface to do generic CPER error injection Mauro Carvalho Chehab
2025-02-27 11:03 ` [PATCH v5 17/21] tests/acpi: virt: update HEST table to accept two sources Mauro Carvalho Chehab
2025-02-27 13:10 ` Igor Mammedov
2025-02-27 13:16 ` Igor Mammedov [this message]
2025-02-27 15:51 ` Mauro Carvalho Chehab
2025-02-27 15:56 ` Mauro Carvalho Chehab
2025-02-27 11:03 ` [PATCH v5 18/21] tests/acpi: virt: and update DSDT table to add the new GED device Mauro Carvalho Chehab
2025-02-27 11:03 ` [PATCH v5 19/21] docs: hest: add new "etc/acpi_table_hest_addr" and update workflow Mauro Carvalho Chehab
2025-02-27 13:21 ` Igor Mammedov
2025-02-27 11:03 ` [PATCH v5 20/21] acpi/generic_event_device.c: enable use_hest_addr for QEMU 10.x Mauro Carvalho Chehab
2025-02-27 11:03 ` [PATCH v5 21/21] scripts/ghes_inject: add a script to generate GHES error inject Mauro Carvalho Chehab
2025-02-27 13:30 ` [PATCH v5 00/21]Change ghes to use HEST-based offsets and add support for " Igor Mammedov
2025-02-27 15:13 ` Mauro Carvalho Chehab
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20250227141603.3957e78b@imammedo.users.ipa.redhat.com \
--to=imammedo@redhat.com \
--cc=Jonathan.Cameron@huawei.com \
--cc=linux-kernel@vger.kernel.org \
--cc=mchehab+huawei@kernel.org \
--cc=mst@redhat.com \
--cc=qemu-arm@nongnu.org \
--cc=qemu-devel@nongnu.org \
--cc=shiju.jose@huawei.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).