From: Brian Cain <brian.cain@oss.qualcomm.com>
To: qemu-devel@nongnu.org
Cc: brian.cain@oss.qualcomm.com, richard.henderson@linaro.org,
philmd@linaro.org, quic_mathbern@quicinc.com, ale@rev.ng,
anjo@rev.ng, quic_mliebel@quicinc.com, ltaylorsimpson@gmail.com,
alex.bennee@linaro.org, quic_mburton@quicinc.com,
sidneym@quicinc.com, Brian Cain <bcain@quicinc.com>
Subject: [PATCH 04/38] target/hexagon: Make gen_exception_end_tb non-static
Date: Fri, 28 Feb 2025 21:25:54 -0800 [thread overview]
Message-ID: <20250301052628.1011210-5-brian.cain@oss.qualcomm.com> (raw)
In-Reply-To: <20250301052628.1011210-1-brian.cain@oss.qualcomm.com>
From: Brian Cain <bcain@quicinc.com>
Signed-off-by: Brian Cain <brian.cain@oss.qualcomm.com>
---
target/hexagon/translate.h | 2 ++
target/hexagon/translate.c | 9 ++++-----
2 files changed, 6 insertions(+), 5 deletions(-)
diff --git a/target/hexagon/translate.h b/target/hexagon/translate.h
index d251e2233f..2bd125297a 100644
--- a/target/hexagon/translate.h
+++ b/target/hexagon/translate.h
@@ -281,6 +281,8 @@ extern TCGv hex_vstore_addr[VSTORES_MAX];
extern TCGv hex_vstore_size[VSTORES_MAX];
extern TCGv hex_vstore_pending[VSTORES_MAX];
+void hex_gen_exception_end_tb(DisasContext *ctx, int excp);
+
void process_store(DisasContext *ctx, int slot_num);
FIELD(PROBE_PKT_SCALAR_STORE_S0, MMU_IDX, 0, 2)
diff --git a/target/hexagon/translate.c b/target/hexagon/translate.c
index fe7858703c..2e9a934fc6 100644
--- a/target/hexagon/translate.c
+++ b/target/hexagon/translate.c
@@ -185,13 +185,12 @@ static void gen_end_tb(DisasContext *ctx)
ctx->base.is_jmp = DISAS_NORETURN;
}
-static void gen_exception_end_tb(DisasContext *ctx, int excp)
+void hex_gen_exception_end_tb(DisasContext *ctx, int excp)
{
gen_exec_counters(ctx);
tcg_gen_movi_tl(hex_gpr[HEX_REG_PC], ctx->next_PC);
gen_exception_raw(excp);
ctx->base.is_jmp = DISAS_NORETURN;
-
}
static int read_packet_words(CPUHexagonState *env, DisasContext *ctx,
@@ -558,7 +557,7 @@ static void gen_insn(DisasContext *ctx)
ctx->insn->generate(ctx);
mark_store_width(ctx);
} else {
- gen_exception_end_tb(ctx, HEX_CAUSE_INVALID_OPCODE);
+ hex_gen_exception_end_tb(ctx, HEX_CAUSE_INVALID_OPCODE);
}
}
@@ -912,7 +911,7 @@ static void decode_and_translate_packet(CPUHexagonState *env, DisasContext *ctx)
nwords = read_packet_words(env, ctx, words);
if (!nwords) {
- gen_exception_end_tb(ctx, HEX_CAUSE_INVALID_PACKET);
+ hex_gen_exception_end_tb(ctx, HEX_CAUSE_INVALID_PACKET);
return;
}
@@ -927,7 +926,7 @@ static void decode_and_translate_packet(CPUHexagonState *env, DisasContext *ctx)
gen_commit_packet(ctx);
ctx->base.pc_next += pkt.encod_pkt_size_in_bytes;
} else {
- gen_exception_end_tb(ctx, HEX_CAUSE_INVALID_PACKET);
+ hex_gen_exception_end_tb(ctx, HEX_CAUSE_INVALID_PACKET);
}
}
--
2.34.1
next prev parent reply other threads:[~2025-03-01 5:28 UTC|newest]
Thread overview: 120+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-01 5:25 [PATCH 00/38] hexagon system emu, part 1/3 Brian Cain
2025-03-01 5:25 ` [PATCH 01/38] docs: Add hexagon sysemu docs Brian Cain
2025-03-05 19:29 ` ltaylorsimpson
2025-03-01 5:25 ` [PATCH 02/38] docs/system: Add hexagon CPU emulation Brian Cain
2025-03-05 19:36 ` ltaylorsimpson
2025-03-05 20:12 ` Brian Cain
2025-03-05 21:21 ` ltaylorsimpson
2025-03-05 21:28 ` Brian Cain
2025-03-01 5:25 ` [PATCH 03/38] target/hexagon: Add System/Guest register definitions Brian Cain
2025-03-06 20:54 ` ltaylorsimpson
2025-04-16 17:54 ` ltaylorsimpson
2025-04-16 19:43 ` Brian Cain
2025-04-16 22:02 ` ltaylorsimpson
2025-09-02 0:17 ` Brian Cain
2025-03-01 5:25 ` Brian Cain [this message]
2025-03-06 20:55 ` [PATCH 04/38] target/hexagon: Make gen_exception_end_tb non-static ltaylorsimpson
2025-03-01 5:25 ` [PATCH 05/38] target/hexagon: Switch to tag_ignore(), generate via get_{user, sys}_tags() Brian Cain via
2025-03-06 21:07 ` ltaylorsimpson
2025-03-01 5:25 ` [PATCH 06/38] target/hexagon: Add privilege check, use tag_ignore() Brian Cain
2025-03-06 21:11 ` ltaylorsimpson
2025-03-06 22:01 ` Richard Henderson
2025-09-02 0:24 ` Brian Cain
2025-03-01 5:25 ` [PATCH 07/38] target/hexagon: Add a placeholder fp exception Brian Cain
2025-03-06 21:22 ` ltaylorsimpson
2025-03-01 5:25 ` [PATCH 08/38] target/hexagon: Add guest, system reg number defs Brian Cain
2025-03-06 21:30 ` ltaylorsimpson
2025-03-08 0:35 ` Sid Manning
2025-09-02 0:25 ` Brian Cain
2025-03-01 5:25 ` [PATCH 09/38] target/hexagon: Add guest, system reg number state Brian Cain
2025-03-06 21:32 ` ltaylorsimpson
2025-03-12 19:15 ` Philippe Mathieu-Daudé
2025-09-02 0:27 ` Brian Cain
2025-03-01 5:26 ` [PATCH 10/38] target/hexagon: Add TCG values for sreg, greg Brian Cain
2025-03-06 21:38 ` ltaylorsimpson
2025-09-02 0:28 ` Brian Cain
2025-03-01 5:26 ` [PATCH 11/38] target/hexagon: Add guest/sys reg writes to DisasContext Brian Cain
2025-03-06 21:40 ` ltaylorsimpson
2025-03-01 5:26 ` [PATCH 12/38] target/hexagon: Add imported macro, attr defs for sysemu Brian Cain
2025-03-07 19:01 ` ltaylorsimpson
2025-09-02 0:36 ` Brian Cain
2025-03-01 5:26 ` [PATCH 13/38] target/hexagon: Define DCache states Brian Cain
2025-03-07 19:03 ` ltaylorsimpson
2025-03-01 5:26 ` [PATCH 14/38] target/hexagon: Add new macro definitions for sysemu Brian Cain
2025-03-07 19:35 ` ltaylorsimpson
2025-09-02 0:38 ` Brian Cain
2025-03-01 5:26 ` [PATCH 15/38] target/hexagon: Add handlers for guest/sysreg r/w Brian Cain
2025-03-07 19:46 ` ltaylorsimpson
2025-09-02 0:40 ` Brian Cain
2025-03-01 5:26 ` [PATCH 16/38] target/hexagon: Add placeholder greg/sreg r/w helpers Brian Cain
2025-03-07 20:45 ` ltaylorsimpson
2025-03-01 5:26 ` [PATCH 17/38] target/hexagon: Add vmstate representation Brian Cain
2025-03-07 21:19 ` ltaylorsimpson
2025-03-01 5:26 ` [PATCH 18/38] target/hexagon: Make A_PRIV, "J2_trap*" insts need_env() Brian Cain
2025-03-07 21:20 ` ltaylorsimpson
2025-03-01 5:26 ` [PATCH 19/38] target/hexagon: Define register fields for system regs Brian Cain
2025-03-07 21:21 ` ltaylorsimpson
2025-03-01 5:26 ` [PATCH 20/38] target/hexagon: Implement do_raise_exception() Brian Cain
2025-03-07 21:28 ` ltaylorsimpson
2025-09-02 0:41 ` Brian Cain
2025-03-01 5:26 ` [PATCH 21/38] target/hexagon: Add system reg insns Brian Cain
2025-03-08 1:32 ` ltaylorsimpson
2025-09-02 0:44 ` Brian Cain
2025-03-01 5:26 ` [PATCH 22/38] target/hexagon: Add sysemu TCG overrides Brian Cain
2025-03-08 1:43 ` ltaylorsimpson
2025-09-02 0:46 ` Brian Cain
2025-03-01 5:26 ` [PATCH 23/38] target/hexagon: Add implicit attributes to sysemu macros Brian Cain
2025-03-11 22:30 ` ltaylorsimpson
2025-09-02 0:47 ` Brian Cain
2025-03-01 5:26 ` [PATCH 24/38] target/hexagon: Add TCG overrides for int handler insts Brian Cain
2025-03-08 1:46 ` ltaylorsimpson
2025-03-01 5:26 ` [PATCH 25/38] target/hexagon: Add TCG overrides for thread ctl Brian Cain
2025-03-08 1:47 ` ltaylorsimpson
2025-03-01 5:26 ` [PATCH 26/38] target/hexagon: Add TCG overrides for rte, nmi Brian Cain
2025-03-11 22:33 ` ltaylorsimpson
2025-03-01 5:26 ` [PATCH 27/38] target/hexagon: Add sreg_{read,write} helpers Brian Cain
2025-03-11 23:22 ` ltaylorsimpson
2025-09-02 0:53 ` Brian Cain
2025-03-01 5:26 ` [PATCH 28/38] target/hexagon: Initialize htid, modectl regs Brian Cain
2025-03-11 23:26 ` ltaylorsimpson
2025-03-12 14:02 ` Sid Manning
2025-03-12 19:19 ` Philippe Mathieu-Daudé
2025-03-12 23:10 ` Brian Cain
2025-03-12 23:40 ` Philippe Mathieu-Daudé
2025-03-13 18:47 ` ltaylorsimpson
2025-03-13 19:06 ` Richard Henderson
2025-03-19 16:08 ` Sid Manning
2025-03-20 15:34 ` Richard Henderson
2025-03-20 17:38 ` Sid Manning
2025-09-02 0:56 ` Brian Cain
2025-03-01 5:26 ` [PATCH 29/38] target/hexagon: Add locks, id, next_PC to state Brian Cain
2025-03-11 23:33 ` ltaylorsimpson
2025-03-01 5:26 ` [PATCH 30/38] target/hexagon: Add a TLB count property Brian Cain
2025-03-11 23:41 ` ltaylorsimpson
2025-03-12 14:01 ` Sid Manning
2025-03-01 5:26 ` [PATCH 31/38] target/hexagon: Add {TLB, k0}lock, cause code, wait_next_pc Brian Cain via
2025-03-11 23:44 ` ltaylorsimpson
2025-03-12 16:58 ` [PATCH 31/38] target/hexagon: Add {TLB,k0}lock, " Sid Manning
2025-03-01 5:26 ` [PATCH 32/38] target/hexagon: Add stubs for modify_ssr/get_exe_mode Brian Cain
2025-03-11 23:43 ` ltaylorsimpson
2025-03-01 5:26 ` [PATCH 33/38] target/hexagon: Add gdb support for sys regs Brian Cain
2025-03-12 16:27 ` ltaylorsimpson
2025-03-12 19:10 ` Sid Manning
2025-03-12 19:27 ` Sid Manning
2025-03-12 19:46 ` Matheus Tavares Bernardino
2025-09-02 1:15 ` Brian Cain
2025-03-01 5:26 ` [PATCH 34/38] target/hexagon: Add initial MMU model Brian Cain
2025-03-12 17:04 ` ltaylorsimpson
2025-09-02 1:20 ` Brian Cain
2025-03-12 19:20 ` Philippe Mathieu-Daudé
2025-03-12 21:15 ` Sid Manning
2025-03-12 23:32 ` Philippe Mathieu-Daudé
2025-03-01 5:26 ` [PATCH 35/38] target/hexagon: Add IRQ events Brian Cain
2025-03-12 17:06 ` ltaylorsimpson
2025-03-01 5:26 ` [PATCH 36/38] target/hexagon: Add clear_wait_mode() definition Brian Cain
2025-03-12 17:08 ` ltaylorsimpson
2025-03-01 5:26 ` [PATCH 37/38] target/hexagon: Define f{S,G}ET_FIELD macros Brian Cain
2025-03-12 17:11 ` ltaylorsimpson
2025-03-01 5:26 ` [PATCH 38/38] target/hexagon: Add hex_interrupts support Brian Cain
2025-03-12 17:32 ` ltaylorsimpson
2025-09-02 1:22 ` Brian Cain
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