From: Jamin Lin via <qemu-devel@nongnu.org>
To: "Cédric Le Goater" <clg@kaod.org>,
"Peter Maydell" <peter.maydell@linaro.org>,
"Steven Lee" <steven_lee@aspeedtech.com>,
"Troy Lee" <leetroy@gmail.com>,
"Andrew Jeffery" <andrew@codeconstruct.com.au>,
"Joel Stanley" <joel@jms.id.au>,
"open list:ASPEED BMCs" <qemu-arm@nongnu.org>,
"open list:All patches CC here" <qemu-devel@nongnu.org>
Cc: jamin_lin@aspeedtech.com, troy_lee@aspeedtech.com,
"Cédric Le Goater" <clg@redhat.com>
Subject: [PATCH v5 4/6] hw/misc/aspeed_scu: Fix the hw-strap1 cannot be set in the SOC layer for AST2700
Date: Tue, 4 Mar 2025 14:47:06 +0800 [thread overview]
Message-ID: <20250304064710.2128993-5-jamin_lin@aspeedtech.com> (raw)
In-Reply-To: <20250304064710.2128993-1-jamin_lin@aspeedtech.com>
There is one hw_strap1 register in the SCU (CPU DIE) and another hw_strap1
register in the SCUIO (IO DIE).
In the "ast2700_a0_resets" function, the hardcoded value "0x00000800" is set in
SCU hw-strap1 (CPU DIE), and in "ast2700_a0_resets_io" the hardcoded value
"0x00000504" is set in SCUIO hw-strap1 (IO DIE). Both values cannot be set via
the SOC layer.
The value of "s->hw_strap1" is set by the SOC layer via the "hw-strap1" property.
Update the "aspeed_ast2700_scu_reset" function to set the value of "s->hw_strap1"
in both the SCU and SCUIO hw-strap1 registers.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
---
hw/misc/aspeed_scu.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/hw/misc/aspeed_scu.c b/hw/misc/aspeed_scu.c
index 545d004749..0581c744f1 100644
--- a/hw/misc/aspeed_scu.c
+++ b/hw/misc/aspeed_scu.c
@@ -910,7 +910,6 @@ static const MemoryRegionOps aspeed_ast2700_scu_ops = {
};
static const uint32_t ast2700_a0_resets[ASPEED_AST2700_SCU_NR_REGS] = {
- [AST2700_HW_STRAP1] = 0x00000800,
[AST2700_HW_STRAP1_CLR] = 0xFFF0FFF0,
[AST2700_HW_STRAP1_LOCK] = 0x00000FFF,
[AST2700_HW_STRAP1_SEC1] = 0x000000FF,
@@ -940,6 +939,7 @@ static void aspeed_ast2700_scu_reset(DeviceState *dev)
memcpy(s->regs, asc->resets, asc->nr_regs * 4);
s->regs[AST2700_SILICON_REV] = s->silicon_rev;
+ s->regs[AST2700_HW_STRAP1] = s->hw_strap1;
}
static void aspeed_2700_scu_class_init(ObjectClass *klass, void *data)
@@ -1032,7 +1032,6 @@ static const MemoryRegionOps aspeed_ast2700_scuio_ops = {
};
static const uint32_t ast2700_a0_resets_io[ASPEED_AST2700_SCU_NR_REGS] = {
- [AST2700_HW_STRAP1] = 0x00000504,
[AST2700_HW_STRAP1_CLR] = 0xFFF0FFF0,
[AST2700_HW_STRAP1_LOCK] = 0x00000FFF,
[AST2700_HW_STRAP1_SEC1] = 0x000000FF,
--
2.34.1
next prev parent reply other threads:[~2025-03-04 6:48 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-04 6:47 [PATCH v5 0/6] Fix hw-strap for AST2700 Jamin Lin via
2025-03-04 6:47 ` [PATCH v5 1/6] hw/misc/aspeed_scu: Skipping dram_init in u-boot Jamin Lin via
2025-03-06 0:04 ` [v5,1/6] " Nabih Estefan
2025-03-06 8:05 ` Cédric Le Goater
2025-03-06 18:05 ` Nabih Estefan
2025-03-07 7:40 ` Cédric Le Goater
2025-03-04 6:47 ` [PATCH v5 2/6] hw/misc/aspeed_scu: Fix the revision ID cannot be set in the SOC layer for AST2700 Jamin Lin via
2025-03-04 7:28 ` Cédric Le Goater
2025-03-06 0:05 ` [v5, " Nabih Estefan via
2025-03-04 6:47 ` [PATCH v5 3/6] hw/arm/aspeed Update HW Strap Default Values " Jamin Lin via
2025-03-06 0:06 ` [v5, " Nabih Estefan via
2025-03-04 6:47 ` Jamin Lin via [this message]
2025-03-06 0:07 ` [v5,4/6] hw/misc/aspeed_scu: Fix the hw-strap1 cannot be set in the SOC layer " Nabih Estefan
2025-03-04 6:47 ` [PATCH v5 5/6] hw/arm/aspeed_ast27x0.c Separate HW Strap Registers for SCU and SCUIO Jamin Lin via
2025-03-04 7:26 ` Cédric Le Goater
2025-03-06 0:07 ` [v5, " Nabih Estefan via
2025-03-04 6:47 ` [PATCH v5 6/6] hw/arm/aspeed_ast27x0.c Fix boot issue for AST2700 Jamin Lin via
2025-03-06 0:08 ` [v5,6/6] " Nabih Estefan
2025-03-04 7:32 ` [PATCH v5 0/6] Fix hw-strap " Cédric Le Goater
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