qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Philippe Mathieu-Daudé" <philmd@linaro.org>,
	"Alex Bennée" <alex.bennee@linaro.org>,
	"Luc Michel" <luc.michel@amd.com>,
	"Richard Henderson" <richard.henderson@linaro.org>
Subject: [PULL 21/41] hw/char/pl011: Improve RX flow tracing events
Date: Wed,  5 Mar 2025 02:21:36 +0100	[thread overview]
Message-ID: <20250305012157.96463-22-philmd@linaro.org> (raw)
In-Reply-To: <20250305012157.96463-1-philmd@linaro.org>

Log FIFO use (availability and depth).

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Luc Michel <luc.michel@amd.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20250220092903.3726-4-philmd@linaro.org>
---
 hw/char/pl011.c      | 10 ++++++----
 hw/char/trace-events |  7 ++++---
 2 files changed, 10 insertions(+), 7 deletions(-)

diff --git a/hw/char/pl011.c b/hw/char/pl011.c
index 5bb83c54216..f7485e7c541 100644
--- a/hw/char/pl011.c
+++ b/hw/char/pl011.c
@@ -185,7 +185,7 @@ static void pl011_fifo_rx_put(void *opaque, uint32_t value)
     s->read_fifo[slot] = value;
     s->read_count++;
     s->flags &= ~PL011_FLAG_RXFE;
-    trace_pl011_fifo_rx_put(value, s->read_count);
+    trace_pl011_fifo_rx_put(value, s->read_count, pipe_depth);
     if (s->read_count == pipe_depth) {
         trace_pl011_fifo_rx_full();
         s->flags |= PL011_FLAG_RXFF;
@@ -248,12 +248,13 @@ static void pl011_write_txdata(PL011State *s, uint8_t data)
 static uint32_t pl011_read_rxdata(PL011State *s)
 {
     uint32_t c;
+    unsigned fifo_depth = pl011_get_fifo_depth(s);
 
     s->flags &= ~PL011_FLAG_RXFF;
     c = s->read_fifo[s->read_pos];
     if (s->read_count > 0) {
         s->read_count--;
-        s->read_pos = (s->read_pos + 1) & (pl011_get_fifo_depth(s) - 1);
+        s->read_pos = (s->read_pos + 1) & (fifo_depth - 1);
     }
     if (s->read_count == 0) {
         s->flags |= PL011_FLAG_RXFE;
@@ -261,7 +262,7 @@ static uint32_t pl011_read_rxdata(PL011State *s)
     if (s->read_count == s->read_trigger - 1) {
         s->int_level &= ~INT_RX;
     }
-    trace_pl011_read_fifo(s->read_count);
+    trace_pl011_read_fifo(s->read_count, fifo_depth);
     s->rsr = c >> 8;
     pl011_update(s);
     qemu_chr_fe_accept_input(&s->chr);
@@ -498,12 +499,13 @@ static int pl011_can_receive(void *opaque)
         qemu_log_mask(LOG_GUEST_ERROR,
                       "PL011 receiving data on disabled RX UART\n");
     }
-    trace_pl011_can_receive(s->lcr, s->read_count, r);
+    trace_pl011_can_receive(s->lcr, s->read_count, fifo_depth, fifo_available);
     return r;
 }
 
 static void pl011_receive(void *opaque, const uint8_t *buf, int size)
 {
+    trace_pl011_receive(size);
     /*
      * In loopback mode, the RX input signal is internally disconnected
      * from the entire receiving logics; thus, all inputs are ignored,
diff --git a/hw/char/trace-events b/hw/char/trace-events
index b2e3d25ae34..05a33036c12 100644
--- a/hw/char/trace-events
+++ b/hw/char/trace-events
@@ -60,12 +60,13 @@ imx_serial_put_data(const char *chrname, uint32_t value) "%s: 0x%" PRIx32
 # pl011.c
 pl011_irq_state(int level) "irq state %d"
 pl011_read(uint32_t addr, uint32_t value, const char *regname) "addr 0x%03x value 0x%08x reg %s"
-pl011_read_fifo(int read_count) "FIFO read, read_count now %d"
+pl011_read_fifo(unsigned rx_fifo_used, size_t rx_fifo_depth) "RX FIFO read, used %u/%zu"
 pl011_write(uint32_t addr, uint32_t value, const char *regname) "addr 0x%03x value 0x%08x reg %s"
-pl011_can_receive(uint32_t lcr, int read_count, int r) "LCR 0x%08x read_count %d returning %d"
-pl011_fifo_rx_put(uint32_t c, int read_count) "new char 0x%02x read_count now %d"
+pl011_can_receive(uint32_t lcr, unsigned rx_fifo_used, size_t rx_fifo_depth, unsigned rx_fifo_available) "LCR 0x%02x, RX FIFO used %u/%zu, can_receive %u chars"
+pl011_fifo_rx_put(uint32_t c, unsigned read_count, size_t rx_fifo_depth) "RX FIFO push char [0x%02x] %d/%zu depth used"
 pl011_fifo_rx_full(void) "RX FIFO now full, RXFF set"
 pl011_baudrate_change(unsigned int baudrate, uint64_t clock, uint32_t ibrd, uint32_t fbrd) "new baudrate %u (clk: %" PRIu64 "hz, ibrd: %" PRIu32 ", fbrd: %" PRIu32 ")"
+pl011_receive(int size) "recv %d chars"
 
 # cmsdk-apb-uart.c
 cmsdk_apb_uart_read(uint64_t offset, uint64_t data, unsigned size) "CMSDK APB UART read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
-- 
2.47.1



  parent reply	other threads:[~2025-03-05  1:30 UTC|newest]

Thread overview: 45+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-03-05  1:21 [PULL 00/41] Misc HW patches for 2025-03-05 Philippe Mathieu-Daudé
2025-03-05  1:21 ` [PULL 01/41] hw/intc: Remove TCG dependency on ARM_GICV3 Philippe Mathieu-Daudé
2025-03-05  1:21 ` [PULL 02/41] hw/misc/pvpanic: Add MMIO interface Philippe Mathieu-Daudé
2025-03-05  1:21 ` [PULL 03/41] hw: Add vmapple subdir Philippe Mathieu-Daudé
2025-03-05  1:21 ` [PULL 04/41] hw/vmapple/aes: Introduce aes engine Philippe Mathieu-Daudé
2025-03-05  1:21 ` [PULL 05/41] hw/vmapple/bdif: Introduce vmapple backdoor interface Philippe Mathieu-Daudé
2025-03-05  1:21 ` [PULL 06/41] hw/vmapple/cfg: Introduce vmapple cfg region Philippe Mathieu-Daudé
2025-03-05  1:21 ` [PULL 07/41] hw/vmapple/virtio-blk: Add support for apple virtio-blk Philippe Mathieu-Daudé
2025-03-05  1:21 ` [PULL 08/41] hw/usb/hcd-xhci-pci: Adds property for disabling mapping in IRQ mode Philippe Mathieu-Daudé
2025-03-05  1:21 ` [PULL 09/41] hw/vmapple/vmapple: Add vmapple machine type Philippe Mathieu-Daudé
2025-03-10  1:22   ` Philippe Mathieu-Daudé
2025-03-05  1:21 ` [PULL 10/41] hw/ppc/spapr: Restrict part of PAGE_INIT hypercall to TCG Philippe Mathieu-Daudé
2025-03-05  1:21 ` [PULL 11/41] hw/acpi/ghes: Make ghes_record_cper_errors() static Philippe Mathieu-Daudé
2025-03-06 22:36   ` Mauro Carvalho Chehab
2025-03-07 12:41     ` Philippe Mathieu-Daudé
2025-03-05  1:21 ` [PULL 12/41] hw/arm: Do not expose the virt machine on Xen-only binary Philippe Mathieu-Daudé
2025-03-05  1:21 ` [PULL 13/41] hw/xen: Link XenPVH with GPEX PCIe bridge Philippe Mathieu-Daudé
2025-03-05  1:21 ` [PULL 14/41] hw/xen/xen-pvh: Reduce included headers Philippe Mathieu-Daudé
2025-03-05  1:21 ` [PULL 15/41] hw/xen/xen-hvm: " Philippe Mathieu-Daudé
2025-03-05  1:21 ` [PULL 16/41] hw/xen/xen-bus: " Philippe Mathieu-Daudé
2025-03-05  1:21 ` [PULL 17/41] hw/xen/xen-legacy-backend: Remove unused 'net/net.h' header Philippe Mathieu-Daudé
2025-03-05  1:21 ` [PULL 18/41] hw/net/fsl_etsec: Set eTSEC device description and category Philippe Mathieu-Daudé
2025-03-05  1:21 ` [PULL 19/41] hw/char/pl011: Warn when using disabled receiver Philippe Mathieu-Daudé
2025-03-05  1:21 ` [PULL 20/41] hw/char/pl011: Simplify a bit pl011_can_receive() Philippe Mathieu-Daudé
2025-03-05  1:21 ` Philippe Mathieu-Daudé [this message]
2025-03-05  1:21 ` [PULL 22/41] hw/char/pl011: Really use RX FIFO depth Philippe Mathieu-Daudé
2025-03-05  1:21 ` [PULL 23/41] hw/char/bcm2835_aux: " Philippe Mathieu-Daudé
2025-03-05  1:21 ` [PULL 24/41] hw/char/imx_serial: " Philippe Mathieu-Daudé
2025-03-05  1:21 ` [PULL 25/41] hw/char/mcf_uart: Use FIFO_DEPTH definition instead of magic values Philippe Mathieu-Daudé
2025-03-05  1:21 ` [PULL 26/41] hw/char/mcf_uart: Really use RX FIFO depth Philippe Mathieu-Daudé
2025-03-05  1:21 ` [PULL 27/41] hw/char/sh_serial: Return correct number of empty RX FIFO elements Philippe Mathieu-Daudé
2025-03-05  1:21 ` [PULL 28/41] hw/char/sifive_uart: Free fifo on unrealize Philippe Mathieu-Daudé
2025-03-05  1:21 ` [PULL 29/41] hw/misc/macio: Improve trace logs Philippe Mathieu-Daudé
2025-03-05  1:21 ` [PULL 30/41] hw/misc/macio/gpio: Add constants for register bits Philippe Mathieu-Daudé
2025-03-05  1:21 ` [PULL 31/41] hw/ufs: Add temperature event notification support Philippe Mathieu-Daudé
2025-03-05  1:21 ` [PULL 32/41] tests/qtest/ufs-test: Add test code for the temperature feature Philippe Mathieu-Daudé
2025-03-05  1:21 ` [PULL 33/41] hw/arm/omap1: Convert raw printfs to qemu_log_mask() Philippe Mathieu-Daudé
2025-03-05  1:21 ` [PULL 34/41] hw/arm/omap1: Drop ALMDEBUG ifdeffed out code Philippe Mathieu-Daudé
2025-03-05  1:21 ` [PULL 35/41] hw/arm/omap1: Convert information printfs to tracepoints Philippe Mathieu-Daudé
2025-03-05  1:21 ` [PULL 36/41] hw/arm/omap_sx1: Remove ifdeffed out debug printf Philippe Mathieu-Daudé
2025-03-05  1:21 ` [PULL 37/41] hw/arm/versatilepb: Convert printfs to LOG_GUEST_ERROR Philippe Mathieu-Daudé
2025-03-05  1:21 ` [PULL 38/41] hw/nvram/eeprom_at24c: Use OBJECT_DECLARE_SIMPLE_TYPE Philippe Mathieu-Daudé
2025-03-05  1:21 ` [PULL 39/41] hw/nvram/eeprom_at24c: Remove ERR macro that calls fprintf to stderr Philippe Mathieu-Daudé
2025-03-05  1:21 ` [PULL 40/41] hw/nvram/eeprom_at24c: Remove memset after g_malloc0 Philippe Mathieu-Daudé
2025-03-05  1:21 ` [PULL 41/41] hw/nvram/eeprom_at24c: Reorganise init to avoid overwriting values Philippe Mathieu-Daudé

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20250305012157.96463-22-philmd@linaro.org \
    --to=philmd@linaro.org \
    --cc=alex.bennee@linaro.org \
    --cc=luc.michel@amd.com \
    --cc=qemu-devel@nongnu.org \
    --cc=richard.henderson@linaro.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).