From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 12/54] accel: Rename 'hw/core/accel-cpu.h' -> 'accel/accel-cpu-target.h'
Date: Thu, 6 Mar 2025 16:46:54 +0100 [thread overview]
Message-ID: <20250306154737.70886-13-philmd@linaro.org> (raw)
In-Reply-To: <20250306154737.70886-1-philmd@linaro.org>
AccelCPUClass is for accelerator to initialize target specific
features of a vCPU. Not really related to hardware emulation,
rename "hw/core/accel-cpu.h" as "accel/accel-cpu-target.h"
(using the explicit -target suffix).
More importantly, target specific header often access the
target specific definitions which are in each target/FOO/cpu.h
header, usually included generically as "cpu.h" relative to
target/FOO/. However, there is already a "cpu.h" in hw/core/
which takes precedence. This change allows "accel-cpu-target.h"
to include a target "cpu.h".
Mechanical change doing:
$ git mv include/hw/core/accel-cpu.h \
include/accel/accel-cpu-target.h
$ sed -i -e 's,hw/core/accel-cpu.h,accel/accel-cpu-target.h,' \
$(git grep -l hw/core/accel-cpu.h)
and renaming header guard 'ACCEL_CPU_TARGET_H'.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20250123234415.59850-12-philmd@linaro.org>
---
MAINTAINERS | 2 +-
include/{hw/core/accel-cpu.h => accel/accel-cpu-target.h} | 4 ++--
accel/accel-target.c | 2 +-
cpu-target.c | 2 +-
target/i386/hvf/hvf-cpu.c | 2 +-
target/i386/kvm/kvm-cpu.c | 2 +-
target/i386/tcg/tcg-cpu.c | 2 +-
target/ppc/kvm.c | 2 +-
target/riscv/kvm/kvm-cpu.c | 2 +-
target/riscv/tcg/tcg-cpu.c | 2 +-
10 files changed, 11 insertions(+), 11 deletions(-)
rename include/{hw/core/accel-cpu.h => accel/accel-cpu-target.h} (95%)
diff --git a/MAINTAINERS b/MAINTAINERS
index 2d9ba810851..a0e462d03ca 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -499,7 +499,7 @@ R: Paolo Bonzini <pbonzini@redhat.com>
S: Maintained
F: include/qemu/accel.h
F: include/system/accel-*.h
-F: include/hw/core/accel-cpu.h
+F: include/accel/accel-cpu-target.h
F: accel/accel-*.c
F: accel/Makefile.objs
F: accel/stubs/Makefile.objs
diff --git a/include/hw/core/accel-cpu.h b/include/accel/accel-cpu-target.h
similarity index 95%
rename from include/hw/core/accel-cpu.h
rename to include/accel/accel-cpu-target.h
index 24dad45ab9e..0a8e518600d 100644
--- a/include/hw/core/accel-cpu.h
+++ b/include/accel/accel-cpu-target.h
@@ -8,8 +8,8 @@
* See the COPYING file in the top-level directory.
*/
-#ifndef ACCEL_CPU_H
-#define ACCEL_CPU_H
+#ifndef ACCEL_CPU_TARGET_H
+#define ACCEL_CPU_TARGET_H
/*
* This header is used to define new accelerator-specific target-specific
diff --git a/accel/accel-target.c b/accel/accel-target.c
index 3236d6335b1..83587274626 100644
--- a/accel/accel-target.c
+++ b/accel/accel-target.c
@@ -27,7 +27,7 @@
#include "qemu/accel.h"
#include "cpu.h"
-#include "hw/core/accel-cpu.h"
+#include "accel/accel-cpu-target.h"
#ifndef CONFIG_USER_ONLY
#include "accel-system.h"
diff --git a/cpu-target.c b/cpu-target.c
index 75501a909df..f97f3a14751 100644
--- a/cpu-target.c
+++ b/cpu-target.c
@@ -44,7 +44,7 @@
#include "exec/tb-flush.h"
#include "exec/translation-block.h"
#include "exec/log.h"
-#include "hw/core/accel-cpu.h"
+#include "accel/accel-cpu-target.h"
#include "trace/trace-root.h"
#include "qemu/accel.h"
diff --git a/target/i386/hvf/hvf-cpu.c b/target/i386/hvf/hvf-cpu.c
index 560b5a05940..b5f4c80028f 100644
--- a/target/i386/hvf/hvf-cpu.c
+++ b/target/i386/hvf/hvf-cpu.c
@@ -14,7 +14,7 @@
#include "system/system.h"
#include "hw/boards.h"
#include "system/hvf.h"
-#include "hw/core/accel-cpu.h"
+#include "accel/accel-cpu-target.h"
#include "hvf-i386.h"
static void hvf_cpu_max_instance_init(X86CPU *cpu)
diff --git a/target/i386/kvm/kvm-cpu.c b/target/i386/kvm/kvm-cpu.c
index 1bda403f88b..6269fa80452 100644
--- a/target/i386/kvm/kvm-cpu.c
+++ b/target/i386/kvm/kvm-cpu.c
@@ -15,7 +15,7 @@
#include "hw/boards.h"
#include "kvm_i386.h"
-#include "hw/core/accel-cpu.h"
+#include "accel/accel-cpu-target.h"
static void kvm_set_guest_phys_bits(CPUState *cs)
{
diff --git a/target/i386/tcg/tcg-cpu.c b/target/i386/tcg/tcg-cpu.c
index f09ee813ac9..b8aff825eec 100644
--- a/target/i386/tcg/tcg-cpu.c
+++ b/target/i386/tcg/tcg-cpu.c
@@ -21,7 +21,7 @@
#include "cpu.h"
#include "helper-tcg.h"
#include "qemu/accel.h"
-#include "hw/core/accel-cpu.h"
+#include "accel/accel-cpu-target.h"
#include "exec/translation-block.h"
#include "tcg-cpu.h"
diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c
index 966c2c65723..216638dee40 100644
--- a/target/ppc/kvm.c
+++ b/target/ppc/kvm.c
@@ -49,7 +49,7 @@
#include "elf.h"
#include "system/kvm_int.h"
#include "system/kvm.h"
-#include "hw/core/accel-cpu.h"
+#include "accel/accel-cpu-target.h"
#include CONFIG_DEVICES
diff --git a/target/riscv/kvm/kvm-cpu.c b/target/riscv/kvm/kvm-cpu.c
index 7f3b59cb72c..4ffeeaa1c95 100644
--- a/target/riscv/kvm/kvm-cpu.c
+++ b/target/riscv/kvm/kvm-cpu.c
@@ -32,7 +32,7 @@
#include "system/kvm_int.h"
#include "cpu.h"
#include "trace.h"
-#include "hw/core/accel-cpu.h"
+#include "accel/accel-cpu-target.h"
#include "hw/pci/pci.h"
#include "exec/memattrs.h"
#include "exec/address-spaces.h"
diff --git a/target/riscv/tcg/tcg-cpu.c b/target/riscv/tcg/tcg-cpu.c
index 70f4c7984aa..5aef9eef366 100644
--- a/target/riscv/tcg/tcg-cpu.c
+++ b/target/riscv/tcg/tcg-cpu.c
@@ -30,7 +30,7 @@
#include "qemu/accel.h"
#include "qemu/error-report.h"
#include "qemu/log.h"
-#include "hw/core/accel-cpu.h"
+#include "accel/accel-cpu-target.h"
#include "accel/tcg/cpu-ops.h"
#include "tcg/tcg.h"
#ifndef CONFIG_USER_ONLY
--
2.47.1
next prev parent reply other threads:[~2025-03-06 16:06 UTC|newest]
Thread overview: 56+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-06 15:46 [PULL 00/54] Accelerators & CPU patches Philippe Mathieu-Daudé
2025-03-06 15:46 ` [PULL 01/54] qemu/compiler: Absorb 'clang-tsa.h' Philippe Mathieu-Daudé
2025-03-06 15:46 ` [PULL 02/54] gdbstub: Clarify no more than @gdb_num_core_regs can be accessed Philippe Mathieu-Daudé
2025-03-06 15:46 ` [PULL 03/54] gdbstub: Check for TCG before calling tb_flush() Philippe Mathieu-Daudé
2025-03-06 15:46 ` [PULL 04/54] cpus: Cache CPUClass early in instance_init() handler Philippe Mathieu-Daudé
2025-03-06 15:46 ` [PULL 05/54] cpus: Keep default fields initialization in cpu_common_initfn() Philippe Mathieu-Daudé
2025-03-06 15:46 ` [PULL 06/54] accel/accel: Make TYPE_ACCEL abstract Philippe Mathieu-Daudé
2025-03-06 15:46 ` [PULL 07/54] accel/tcg: Remove pointless initialization of cflags_next_tb Philippe Mathieu-Daudé
2025-03-06 15:46 ` [PULL 08/54] accel/tcg: Build tcg_flags helpers as common code Philippe Mathieu-Daudé
2025-03-06 15:46 ` [PULL 09/54] accel/tcg: Restrict tlb_init() / destroy() to TCG Philippe Mathieu-Daudé
2025-03-06 15:46 ` [PULL 10/54] accel/tcg: Restrict 'icount_align_option' global " Philippe Mathieu-Daudé
2025-03-06 15:46 ` [PULL 11/54] accel/tcg: Rename 'hw/core/tcg-cpu-ops.h' -> 'accel/tcg/cpu-ops.h' Philippe Mathieu-Daudé
2025-03-06 15:46 ` Philippe Mathieu-Daudé [this message]
2025-03-06 15:46 ` [PULL 13/54] accel: Forward-declare AccelOpsClass in 'qemu/typedefs.h' Philippe Mathieu-Daudé
2025-03-06 15:46 ` [PULL 14/54] accel/accel-cpu-target.h: Include missing 'cpu.h' header Philippe Mathieu-Daudé
2025-03-06 15:46 ` [PULL 15/54] accel/tcg: Include missing bswap headers in user-exec.c Philippe Mathieu-Daudé
2025-03-06 15:46 ` [PULL 16/54] accel/tcg: Take mmap lock in the whole cpu_memory_rw_debug() function Philippe Mathieu-Daudé
2025-03-06 15:46 ` [PULL 17/54] accel/tcg: Avoid using lock_user() in cpu_memory_rw_debug() Philippe Mathieu-Daudé
2025-03-06 15:47 ` [PULL 18/54] accel/tcg: Move cpu_memory_rw_debug() user implementation to user-exec.c Philippe Mathieu-Daudé
2025-03-06 15:47 ` [PULL 19/54] accel/kvm: Remove unused 'system/cpus.h' header in kvm-cpus.h Philippe Mathieu-Daudé
2025-03-06 15:47 ` [PULL 20/54] cpus: Fix style in cpu-target.c Philippe Mathieu-Daudé
2025-03-06 15:47 ` [PULL 21/54] cpus: Restrict cpu_common_post_load() code to TCG Philippe Mathieu-Daudé
2025-03-06 15:47 ` [PULL 22/54] cpus: Have cpu_class_init_props() per user / system emulation Philippe Mathieu-Daudé
2025-03-06 15:47 ` [PULL 23/54] cpus: Have cpu_exec_initfn() " Philippe Mathieu-Daudé
2025-03-06 15:47 ` [PULL 24/54] cpus: Restrict cpu_get_memory_mapping() to " Philippe Mathieu-Daudé
2025-03-06 15:47 ` [PULL 25/54] hw/core/generic-loader: Do not open-code cpu_set_pc() Philippe Mathieu-Daudé
2025-03-06 15:47 ` [PULL 26/54] target/microblaze: Explode MO_TExx -> MO_TE | MO_xx Philippe Mathieu-Daudé
2025-03-06 15:47 ` [PULL 27/54] target/microblaze: Set MO_TE once in do_load() / do_store() Philippe Mathieu-Daudé
2025-03-06 15:47 ` [PULL 28/54] target/microblaze: Introduce mo_endian() helper Philippe Mathieu-Daudé
2025-03-06 15:47 ` [PULL 29/54] target/microblaze: Consider endianness while translating code Philippe Mathieu-Daudé
2025-03-06 15:47 ` [PULL 30/54] target/i386/hvf: Variable type fixup in decoder Philippe Mathieu-Daudé
2025-03-06 15:47 ` [PULL 31/54] target/openrisc: Call cpu_openrisc_clock_init() in cpu_realize() Philippe Mathieu-Daudé
2025-03-06 15:47 ` [PULL 32/54] target/hexagon: Ensure not being build on system emulation Philippe Mathieu-Daudé
2025-03-06 15:47 ` [PULL 33/54] target/rx: Ensure not being build on user emulation Philippe Mathieu-Daudé
2025-03-06 15:47 ` [PULL 34/54] target/tricore: " Philippe Mathieu-Daudé
2025-03-06 15:47 ` [PULL 35/54] target/mips: Fix possible MSA int overflow Philippe Mathieu-Daudé
2025-03-06 15:47 ` [PULL 36/54] target: Set disassemble_info::endian value for little-endian targets Philippe Mathieu-Daudé
2025-03-06 15:47 ` [PULL 37/54] target: Set disassemble_info::endian value for big-endian targets Philippe Mathieu-Daudé
2025-03-06 15:47 ` [PULL 38/54] target/arm: Set disassemble_info::endian value in disas_set_info() Philippe Mathieu-Daudé
2025-03-06 15:47 ` [PULL 39/54] target/microblaze: Set disassemble_info::endian value in disas_set_info Philippe Mathieu-Daudé
2025-03-06 15:47 ` [PULL 40/54] target/mips: Set disassemble_info::endian value in disas_set_info() Philippe Mathieu-Daudé
2025-03-06 15:47 ` [PULL 41/54] target/ppc: " Philippe Mathieu-Daudé
2025-03-06 15:47 ` [PULL 42/54] target/riscv: " Philippe Mathieu-Daudé
2025-03-06 15:47 ` [PULL 43/54] target/sh4: " Philippe Mathieu-Daudé
2025-03-06 15:47 ` [PULL 44/54] target/xtensa: " Philippe Mathieu-Daudé
2025-03-06 15:47 ` [PULL 45/54] disas: Remove target_words_bigendian() call in initialize_debug_target() Philippe Mathieu-Daudé
2025-03-06 15:47 ` [PULL 46/54] target/i386: Constify X86CPUModel uses Philippe Mathieu-Daudé
2025-03-06 15:47 ` [PULL 47/54] target/sparc: Constify SPARCCPUClass::cpu_def Philippe Mathieu-Daudé
2025-03-06 15:47 ` [PULL 48/54] target/xtensa: Finalize config in xtensa_register_core() Philippe Mathieu-Daudé
2025-03-06 15:47 ` [PULL 49/54] target/riscv: Declare RISCVCPUClass::misa_mxl_max as RISCVMXL Philippe Mathieu-Daudé
2025-03-06 15:47 ` [PULL 50/54] target/riscv: Convert misa_mxl_max using GLib macros Philippe Mathieu-Daudé
2025-03-06 15:47 ` [PULL 51/54] target/alpha: Do not mix exception flags and FPCR bits Philippe Mathieu-Daudé
2025-03-06 15:47 ` [PULL 52/54] target/i386: Mark WHPX APIC region as little-endian Philippe Mathieu-Daudé
2025-03-06 15:47 ` [PULL 53/54] system: Open-code qemu_init_arch_modules() using target_name() Philippe Mathieu-Daudé
2025-03-06 15:47 ` [PULL 54/54] include: Poison TARGET_PHYS_ADDR_SPACE_BITS definition Philippe Mathieu-Daudé
2025-03-07 7:18 ` [PULL 00/54] Accelerators & CPU patches Stefan Hajnoczi
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