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From: Jamin Lin via <qemu-devel@nongnu.org>
To: "Cédric Le Goater" <clg@kaod.org>,
	"Peter Maydell" <peter.maydell@linaro.org>,
	"Steven Lee" <steven_lee@aspeedtech.com>,
	"Troy Lee" <leetroy@gmail.com>,
	"Andrew Jeffery" <andrew@codeconstruct.com.au>,
	"Joel Stanley" <joel@jms.id.au>,
	"open list:All patches CC here" <qemu-devel@nongnu.org>,
	"open list:ASPEED BMCs" <qemu-arm@nongnu.org>
Cc: jamin_lin@aspeedtech.com, troy_lee@aspeedtech.com,
	"Cédric Le Goater" <clg@redhat.com>
Subject: [PATCH v6 09/29] hw/arm/aspeed_ast27x0: Sort the IRQ table by IRQ number
Date: Fri, 7 Mar 2025 11:59:18 +0800	[thread overview]
Message-ID: <20250307035945.3698802-10-jamin_lin@aspeedtech.com> (raw)
In-Reply-To: <20250307035945.3698802-1-jamin_lin@aspeedtech.com>

To improve readability, sort the IRQ table by IRQ number.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
---
 hw/arm/aspeed_ast27x0.c | 50 ++++++++++++++++++++---------------------
 1 file changed, 25 insertions(+), 25 deletions(-)

diff --git a/hw/arm/aspeed_ast27x0.c b/hw/arm/aspeed_ast27x0.c
index de79724446..abd1f6b741 100644
--- a/hw/arm/aspeed_ast27x0.c
+++ b/hw/arm/aspeed_ast27x0.c
@@ -74,27 +74,13 @@ static const hwaddr aspeed_soc_ast2700_memmap[] = {
 
 /* Shared Peripheral Interrupt values below are offset by -32 from datasheet */
 static const int aspeed_soc_ast2700a0_irqmap[] = {
-    [ASPEED_DEV_UART0]     = 132,
-    [ASPEED_DEV_UART1]     = 132,
-    [ASPEED_DEV_UART2]     = 132,
-    [ASPEED_DEV_UART3]     = 132,
-    [ASPEED_DEV_UART4]     = 8,
-    [ASPEED_DEV_UART5]     = 132,
-    [ASPEED_DEV_UART6]     = 132,
-    [ASPEED_DEV_UART7]     = 132,
-    [ASPEED_DEV_UART8]     = 132,
-    [ASPEED_DEV_UART9]     = 132,
-    [ASPEED_DEV_UART10]    = 132,
-    [ASPEED_DEV_UART11]    = 132,
-    [ASPEED_DEV_UART12]    = 132,
-    [ASPEED_DEV_FMC]       = 131,
     [ASPEED_DEV_SDMC]      = 0,
-    [ASPEED_DEV_SCU]       = 12,
-    [ASPEED_DEV_ADC]       = 130,
+    [ASPEED_DEV_HACE]      = 4,
     [ASPEED_DEV_XDMA]      = 5,
-    [ASPEED_DEV_EMMC]      = 15,
-    [ASPEED_DEV_GPIO]      = 130,
+    [ASPEED_DEV_UART4]     = 8,
+    [ASPEED_DEV_SCU]       = 12,
     [ASPEED_DEV_RTC]       = 13,
+    [ASPEED_DEV_EMMC]      = 15,
     [ASPEED_DEV_TIMER1]    = 16,
     [ASPEED_DEV_TIMER2]    = 17,
     [ASPEED_DEV_TIMER3]    = 18,
@@ -103,19 +89,33 @@ static const int aspeed_soc_ast2700a0_irqmap[] = {
     [ASPEED_DEV_TIMER6]    = 21,
     [ASPEED_DEV_TIMER7]    = 22,
     [ASPEED_DEV_TIMER8]    = 23,
-    [ASPEED_DEV_WDT]       = 131,
-    [ASPEED_DEV_PWM]       = 131,
+    [ASPEED_DEV_DP]        = 28,
     [ASPEED_DEV_LPC]       = 128,
     [ASPEED_DEV_IBT]       = 128,
+    [ASPEED_DEV_KCS]       = 128,
+    [ASPEED_DEV_ADC]       = 130,
+    [ASPEED_DEV_GPIO]      = 130,
     [ASPEED_DEV_I2C]       = 130,
-    [ASPEED_DEV_PECI]      = 133,
+    [ASPEED_DEV_FMC]       = 131,
+    [ASPEED_DEV_WDT]       = 131,
+    [ASPEED_DEV_PWM]       = 131,
+    [ASPEED_DEV_I3C]       = 131,
+    [ASPEED_DEV_UART0]     = 132,
+    [ASPEED_DEV_UART1]     = 132,
+    [ASPEED_DEV_UART2]     = 132,
+    [ASPEED_DEV_UART3]     = 132,
+    [ASPEED_DEV_UART5]     = 132,
+    [ASPEED_DEV_UART6]     = 132,
+    [ASPEED_DEV_UART7]     = 132,
+    [ASPEED_DEV_UART8]     = 132,
+    [ASPEED_DEV_UART9]     = 132,
+    [ASPEED_DEV_UART10]    = 132,
+    [ASPEED_DEV_UART11]    = 132,
+    [ASPEED_DEV_UART12]    = 132,
     [ASPEED_DEV_ETH1]      = 132,
     [ASPEED_DEV_ETH2]      = 132,
     [ASPEED_DEV_ETH3]      = 132,
-    [ASPEED_DEV_HACE]      = 4,
-    [ASPEED_DEV_KCS]       = 128,
-    [ASPEED_DEV_DP]        = 28,
-    [ASPEED_DEV_I3C]       = 131,
+    [ASPEED_DEV_PECI]      = 133,
     [ASPEED_DEV_SDHCI]     = 133,
 };
 
-- 
2.43.0



  parent reply	other threads:[~2025-03-07  4:00 UTC|newest]

Thread overview: 39+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-03-07  3:59 [PATCH v6 00/29] Support AST2700 A1 Jamin Lin via
2025-03-07  3:59 ` [PATCH v6 01/29] hw/intc/aspeed: Support setting different memory size Jamin Lin via
2025-03-07  3:59 ` [PATCH v6 02/29] hw/intc/aspeed: Rename status_addr and addr to status_reg and reg for clarity Jamin Lin via
2025-03-07  3:59 ` [PATCH v6 03/29] hw/intc/aspeed: Introduce dynamic allocation for regs array Jamin Lin via
2025-03-07  7:23   ` Cédric Le Goater
2025-03-07  3:59 ` [PATCH v6 04/29] hw/intc/aspeed: Support setting different register size Jamin Lin via
2025-03-07  7:23   ` Cédric Le Goater
2025-03-07  3:59 ` [PATCH v6 05/29] hw/intc/aspeed: Reduce regs array size by adding a register sub-region Jamin Lin via
2025-03-07  7:22   ` Cédric Le Goater
2025-03-07  3:59 ` [PATCH v6 06/29] hw/intc/aspeed: Introduce helper functions for enable and status registers Jamin Lin via
2025-03-07  3:59 ` [PATCH v6 07/29] hw/intc/aspeed: Add object type name to trace events for better debugging Jamin Lin via
2025-03-07  3:59 ` [PATCH v6 08/29] hw/arm/aspeed: Rename IRQ table and machine name for AST2700 A0 Jamin Lin via
2025-03-07  3:59 ` Jamin Lin via [this message]
2025-03-07  3:59 ` [PATCH v6 10/29] hw/intc/aspeed: Support different memory region ops Jamin Lin via
2025-03-07  3:59 ` [PATCH v6 11/29] hw/intc/aspeed: Rename num_ints to num_inpins for clarity Jamin Lin via
2025-03-07  3:59 ` [PATCH v6 12/29] hw/intc/aspeed: Add support for multiple output pins in INTC Jamin Lin via
2025-03-07  3:59 ` [PATCH v6 13/29] hw/intc/aspeed: Refactor INTC to support separate input and output pin indices Jamin Lin via
2025-03-07  3:59 ` [PATCH v6 14/29] hw/intc/aspeed: Introduce AspeedINTCIRQ structure to save the irq index and register address Jamin Lin via
2025-03-07  3:59 ` [PATCH v6 15/29] hw/intc/aspeed: Introduce IRQ handler function to reduce code duplication Jamin Lin via
2025-03-07  3:59 ` [PATCH v6 16/29] hw/intc/aspeed: Add Support for Multi-Output IRQ Handling Jamin Lin via
2025-03-07  3:59 ` [PATCH v6 17/29] hw/intc/aspeed: Add Support for AST2700 INTCIO Controller Jamin Lin via
2025-03-07  3:59 ` [PATCH v6 18/29] hw/misc/aspeed_scu: Add Support for AST2700/AST2750 A1 Silicon Revisions Jamin Lin via
2025-03-07  3:59 ` [PATCH v6 19/29] hw/arm/aspeed_ast27x0.c Support AST2700 A1 GIC Interrupt Mapping Jamin Lin via
2025-03-07  3:59 ` [PATCH v6 20/29] hw/arm/aspeed_ast27x0: Define an Array of AspeedINTCState with Two Instances Jamin Lin via
2025-03-07  3:59 ` [PATCH v6 21/29] hw/arm/aspeed_ast27x0: Support two levels of INTC controllers for AST2700 A1 Jamin Lin via
2025-03-07  3:59 ` [PATCH v6 22/29] hw/arm/aspeed_ast27x0: Add SoC Support " Jamin Lin via
2025-03-07  3:59 ` [PATCH v6 23/29] hw/arm/aspeed: Add Machine " Jamin Lin via
2025-03-07  3:59 ` [PATCH v6 24/29] hw/arm/aspeed_ast27x0: Sort the memmap table by mapping address Jamin Lin via
2025-03-07  3:59 ` [PATCH v6 25/29] tests/functional/aspeed: Introduce start_ast2700_test API Jamin Lin via
2025-03-07  3:59 ` [PATCH v6 26/29] tests/functional/aspeed: Update temperature hwmon path Jamin Lin via
2025-03-07  3:59 ` [PATCH v6 27/29] tests/functional/aspeed: Update test ASPEED SDK v09.05 Jamin Lin via
2025-03-07  3:59 ` [PATCH v6 28/29] tests/functional/aspeed: Add test case for AST2700 A1 Jamin Lin via
2025-03-07  3:59 ` [PATCH v6 29/29] docs/specs: Add aspeed-intc Jamin Lin via
2025-03-07  7:33 ` [PATCH v6 00/29] Support AST2700 A1 Cédric Le Goater
2025-03-07  7:36   ` Jamin Lin
2025-03-07  7:44     ` Cédric Le Goater
2025-03-07  7:56       ` Steven Lee
2025-03-07  8:08         ` Cédric Le Goater
2025-03-07 17:47   ` Nabih Estefan

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