From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 01/21] hw/arm/smmu-common: Remove the repeated ttb field
Date: Fri, 7 Mar 2025 15:06:48 +0000 [thread overview]
Message-ID: <20250307150708.3222813-2-peter.maydell@linaro.org> (raw)
In-Reply-To: <20250307150708.3222813-1-peter.maydell@linaro.org>
From: JianChunfu <jansef.jian@hj-micro.com>
SMMUTransCfg->ttb is never used in QEMU, TT base address
can be accessed by SMMUTransCfg->tt[i]->ttb.
Signed-off-by: JianChunfu <jansef.jian@hj-micro.com>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Message-id: 20250221031034.69822-1-jansef.jian@hj-micro.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
include/hw/arm/smmu-common.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/include/hw/arm/smmu-common.h b/include/hw/arm/smmu-common.h
index d1a4a64551d..e5ad55bbae7 100644
--- a/include/hw/arm/smmu-common.h
+++ b/include/hw/arm/smmu-common.h
@@ -110,7 +110,6 @@ typedef struct SMMUTransCfg {
/* Used by stage-1 only. */
bool aa64; /* arch64 or aarch32 translation table */
bool record_faults; /* record fault events */
- uint64_t ttb; /* TT base address */
uint8_t oas; /* output address width */
uint8_t tbi; /* Top Byte Ignore */
int asid;
--
2.43.0
next prev parent reply other threads:[~2025-03-07 15:10 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-07 15:06 [PULL 00/21] target-arm queue Peter Maydell
2025-03-07 15:06 ` Peter Maydell [this message]
2025-03-07 15:06 ` [PULL 02/21] hw/gpio: npcm7xx: fixup out-of-bounds access Peter Maydell
2025-03-07 15:06 ` [PULL 03/21] tests/functional/test_arm_sx1: Check whether the serial console is working Peter Maydell
2025-03-07 15:06 ` [PULL 04/21] target/arm: Apply correct timer offset when calculating deadlines Peter Maydell
2025-03-07 15:06 ` [PULL 05/21] target/arm: Don't apply CNTVOFF_EL2 for EL2_VIRT timer Peter Maydell
2025-03-07 15:06 ` [PULL 06/21] target/arm: Make CNTPS_* UNDEF from Secure EL1 when Secure EL2 is enabled Peter Maydell
2025-03-07 15:06 ` [PULL 07/21] target/arm: Always apply CNTVOFF_EL2 for CNTV_TVAL_EL02 accesses Peter Maydell
2025-03-07 15:06 ` [PULL 08/21] target/arm: Refactor handling of timer offset for direct register accesses Peter Maydell
2025-03-07 15:06 ` [PULL 09/21] target/arm: Implement SEL2 physical and virtual timers Peter Maydell
2025-03-07 15:06 ` [PULL 10/21] target/arm: Document the architectural names of our GTIMERs Peter Maydell
2025-03-07 15:06 ` [PULL 11/21] hw/arm: enable secure EL2 timers for virt machine Peter Maydell
2025-03-07 15:06 ` [PULL 12/21] hw/arm: enable secure EL2 timers for sbsa machine Peter Maydell
2025-03-07 15:07 ` [PULL 13/21] target/arm: Correct LDRD atomicity and fault behaviour Peter Maydell
2025-03-07 15:07 ` [PULL 14/21] target/arm: Correct STRD atomicity Peter Maydell
2025-03-07 15:07 ` [PULL 15/21] target/arm: Drop unused address_offset from op_addr_{rr, ri}_post() Peter Maydell
2025-03-07 15:07 ` [PULL 16/21] target/arm: Make dummy debug registers RAZ, not NOP Peter Maydell
2025-03-07 15:07 ` [PULL 17/21] util/qemu-timer.c: Don't warp timer from timerlist_rearm() Peter Maydell
2025-03-07 15:07 ` [PULL 18/21] include/exec/memop.h: Expand comment for MO_ATOM_SUBALIGN Peter Maydell
2025-03-07 15:07 ` [PULL 19/21] hw/arm/smmu: Introduce smmu_configs_inv_sid_range() helper Peter Maydell
2025-03-07 15:07 ` [PULL 20/21] target/rx: Set exception vector base to 0xffffff80 Peter Maydell
2025-03-07 15:07 ` [PULL 21/21] target/rx: Remove TCG_CALL_NO_WG from helpers which write env Peter Maydell
2025-03-09 0:41 ` [PULL 00/21] target-arm queue Stefan Hajnoczi
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