From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: BALATON Zoltan <balaton@eik.bme.hu>, qemu-devel@nongnu.org
Cc: "Bernhard Beschow" <shentey@gmail.com>,
"Peter Maydell" <peter.maydell@linaro.org>,
qemu-ppc@nongnu.org, "Andrey Smirnov" <andrew.smirnov@gmail.com>,
"Jean-Christophe Dubois" <jcd@tribudubois.net>,
"Bin Meng" <bmeng.cn@gmail.com>,
qemu-arm@nongnu.org, qemu-block@nongnu.org,
"Guenter Roeck" <linux@roeck-us.net>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>
Subject: [PATCH v3 03/12] hw/sd/sdhci: Make quirks a class property
Date: Sat, 8 Mar 2025 20:02:21 +0100 [thread overview]
Message-ID: <20250308190230.7508-4-philmd@linaro.org> (raw)
In-Reply-To: <20250308190230.7508-1-philmd@linaro.org>
All TYPE_IMX_USDHC instances use the quirk:
move it to the class layer.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
include/hw/sd/sdhci.h | 3 ++-
hw/sd/sdhci.c | 15 +++++++++++++--
2 files changed, 15 insertions(+), 3 deletions(-)
diff --git a/include/hw/sd/sdhci.h b/include/hw/sd/sdhci.h
index c4b20db3877..0616ce3aa59 100644
--- a/include/hw/sd/sdhci.h
+++ b/include/hw/sd/sdhci.h
@@ -95,7 +95,6 @@ struct SDHCIState {
/* Configurable properties */
bool pending_insert_quirk; /* Quirk for Raspberry Pi card insert int */
- uint32_t quirks;
uint8_t endianness;
uint8_t sd_spec_version;
uint8_t uhs_mode;
@@ -112,6 +111,8 @@ typedef struct SDHCIClass {
PCIDeviceClass pci_parent_class;
SysBusDeviceClass sbd_parent_class;
};
+
+ uint32_t quirks;
} SDHCIClass;
/*
diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c
index 4917a9b3632..2b7eb11a14a 100644
--- a/hw/sd/sdhci.c
+++ b/hw/sd/sdhci.c
@@ -345,6 +345,8 @@ static void sdhci_send_command(SDHCIState *s)
rlen = sdbus_do_command(&s->sdbus, &request, response);
if (s->cmdreg & SDHC_CMD_RESPONSE) {
+ SDHCIClass *sc = SYSBUS_SDHCI_GET_CLASS(s);
+
if (rlen == 4) {
s->rspreg[0] = ldl_be_p(response);
s->rspreg[1] = s->rspreg[2] = s->rspreg[3] = 0;
@@ -366,7 +368,7 @@ static void sdhci_send_command(SDHCIState *s)
}
}
- if (!(s->quirks & SDHCI_QUIRK_NO_BUSY_IRQ) &&
+ if (!(sc->quirks & SDHCI_QUIRK_NO_BUSY_IRQ) &&
(s->norintstsen & SDHC_NISEN_TRSCMP) &&
(s->cmdreg & SDHC_CMD_RESPONSE) == SDHC_CMD_RSP_WITH_BUSY) {
s->norintsts |= SDHC_NIS_TRSCMP;
@@ -1886,7 +1888,15 @@ static void imx_usdhc_init(Object *obj)
SDHCIState *s = SYSBUS_SDHCI(obj);
s->io_ops = &usdhc_mmio_ops;
- s->quirks = SDHCI_QUIRK_NO_BUSY_IRQ;
+}
+
+static void imx_usdhc_class_init(ObjectClass *oc, void *data)
+{
+ SDHCIClass *sc = SYSBUS_SDHCI_CLASS(oc);
+
+ sc->quirks = SDHCI_QUIRK_NO_BUSY_IRQ;
+
+ sdhci_common_class_init(oc, data);
}
/* --- qdev Samsung s3c --- */
@@ -1967,6 +1977,7 @@ static const TypeInfo sdhci_types[] = {
.name = TYPE_IMX_USDHC,
.parent = TYPE_SYSBUS_SDHCI,
.instance_init = imx_usdhc_init,
+ .class_init = imx_usdhc_class_init,
},
{
.name = TYPE_S3C_SDHCI,
--
2.47.1
next prev parent reply other threads:[~2025-03-08 19:04 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-08 19:02 [PATCH v3 00/12] hw/sd/sdhci: Set reset value of interrupt registers Philippe Mathieu-Daudé
2025-03-08 19:02 ` [PATCH v3 01/12] hw/sd/sdhci: Remove need for SDHCIState::vendor field Philippe Mathieu-Daudé
2025-03-08 19:02 ` [PATCH v3 02/12] hw/sd/sdhci: Introduce SDHCIClass stub Philippe Mathieu-Daudé
2025-03-08 19:02 ` Philippe Mathieu-Daudé [this message]
2025-03-08 19:02 ` [PATCH v3 04/12] hw/sd/sdhci: Make I/O region size a class property Philippe Mathieu-Daudé
2025-03-08 19:02 ` [PATCH v3 05/12] hw/sd/sdhci: Enforce little endianness on PCI devices Philippe Mathieu-Daudé
2025-03-08 19:02 ` [PATCH v3 06/12] hw/sd/sdhci: Allow SDHCI classes to register their own MemoryRegionOps Philippe Mathieu-Daudé
2025-03-08 19:02 ` [PATCH v3 07/12] hw/sd/sdhci: Simplify MemoryRegionOps endianness check Philippe Mathieu-Daudé
2025-03-08 19:02 ` [PATCH v3 08/12] hw/sd/sdhci: Unify default MemoryRegionOps Philippe Mathieu-Daudé
2025-03-08 19:02 ` [PATCH v3 09/12] hw/sd/sdhci: Add SDHCIClass::ro::capareg field Philippe Mathieu-Daudé
2025-03-08 19:02 ` [PATCH v3 10/12] hw/sd/sdhci: Allow SDHCI classes to have different register reset values Philippe Mathieu-Daudé
2025-03-08 19:02 ` [PATCH v3 11/12] hw/sd/sdhci: Implement Freescale eSDHC as TYPE_FSL_ESDHC Philippe Mathieu-Daudé
2025-03-08 19:02 ` [PATCH v3 12/12] hw/ppc/e500: Replace generic SDHCI by Freescale eSDHC Philippe Mathieu-Daudé
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20250308190230.7508-4-philmd@linaro.org \
--to=philmd@linaro.org \
--cc=andrew.smirnov@gmail.com \
--cc=balaton@eik.bme.hu \
--cc=bmeng.cn@gmail.com \
--cc=jcd@tribudubois.net \
--cc=linux@roeck-us.net \
--cc=peter.maydell@linaro.org \
--cc=qemu-arm@nongnu.org \
--cc=qemu-block@nongnu.org \
--cc=qemu-devel@nongnu.org \
--cc=qemu-ppc@nongnu.org \
--cc=shentey@gmail.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).