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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3912bee262esm9903118f8f.0.2025.03.08.13.37.34 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Sat, 08 Mar 2025 13:37:35 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, BALATON Zoltan Cc: =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= , Eduardo Habkost , Peter Maydell , qemu-ppc@nongnu.org, Paolo Bonzini , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Andrey Smirnov , Bernhard Beschow , Jean-Christophe Dubois , Guenter Roeck , qemu-block@nongnu.org, Bin Meng , qemu-arm@nongnu.org Subject: [PATCH v4 10/14] hw/sd/sdhci: Convert SDHCIState::endianness to EndianMode Date: Sat, 8 Mar 2025 22:36:36 +0100 Message-ID: <20250308213640.13138-11-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250308213640.13138-1-philmd@linaro.org> References: <20250308213640.13138-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::32a; envelope-from=philmd@linaro.org; helo=mail-wm1-x32a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org EndianMode enum is preferred over DEVICE_BIG/LITTLE_ENDIAN values because it is a QAPI type. Signed-off-by: Philippe Mathieu-Daudé --- hw/sd/sdhci-internal.h | 3 ++- include/hw/sd/sdhci.h | 3 ++- hw/ppc/e500.c | 2 +- hw/sd/sdhci-pci.c | 2 +- hw/sd/sdhci.c | 7 ++++++- 5 files changed, 12 insertions(+), 5 deletions(-) diff --git a/hw/sd/sdhci-internal.h b/hw/sd/sdhci-internal.h index 9072b06bdde..c459279f3f3 100644 --- a/hw/sd/sdhci-internal.h +++ b/hw/sd/sdhci-internal.h @@ -24,6 +24,7 @@ #ifndef SDHCI_INTERNAL_H #define SDHCI_INTERNAL_H +#include "hw/qdev-properties-system.h" #include "hw/registerfields.h" /* R/W SDMA System Address register 0x0 */ @@ -308,7 +309,7 @@ extern const VMStateDescription sdhci_vmstate; #define SDHC_CAPAB_REG_DEFAULT 0x057834b4 #define DEFINE_SDHCI_COMMON_PROPERTIES(_state) \ - DEFINE_PROP_UINT8("endianness", _state, endianness, DEVICE_LITTLE_ENDIAN), \ + DEFINE_PROP_ENDIAN("endianness", _state, endianness, ENDIAN_MODE_LITTLE), \ DEFINE_PROP_UINT8("sd-spec-version", _state, sd_spec_version, 2), \ DEFINE_PROP_UINT8("uhs", _state, uhs_mode, UHS_NOT_SUPPORTED), \ \ diff --git a/include/hw/sd/sdhci.h b/include/hw/sd/sdhci.h index 60a0442c805..a91cda16cbe 100644 --- a/include/hw/sd/sdhci.h +++ b/include/hw/sd/sdhci.h @@ -25,6 +25,7 @@ #ifndef SDHCI_H #define SDHCI_H +#include "qapi/qapi-types-common.h" #include "hw/pci/pci_device.h" #include "hw/sysbus.h" #include "hw/sd/sd.h" @@ -95,7 +96,7 @@ struct SDHCIState { /* Configurable properties */ bool pending_insert_quirk; /* Quirk for Raspberry Pi card insert int */ - uint8_t endianness; + EndianMode endianness; uint8_t sd_spec_version; uint8_t uhs_mode; /* diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c index fe8b9f79621..e85e000f054 100644 --- a/hw/ppc/e500.c +++ b/hw/ppc/e500.c @@ -1042,7 +1042,7 @@ void ppce500_init(MachineState *machine) */ dev = qdev_new(TYPE_SYSBUS_SDHCI); qdev_prop_set_uint8(dev, "sd-spec-version", 2); - qdev_prop_set_uint8(dev, "endianness", DEVICE_BIG_ENDIAN); + qdev_prop_set_enum(dev, "endianness", ENDIAN_MODE_BIG); s = SYS_BUS_DEVICE(dev); sysbus_realize_and_unref(s, &error_fatal); sysbus_connect_irq(s, 0, qdev_get_gpio_in(mpicdev, MPC85XX_ESDHC_IRQ)); diff --git a/hw/sd/sdhci-pci.c b/hw/sd/sdhci-pci.c index 5f82178a76f..49c4f0478b4 100644 --- a/hw/sd/sdhci-pci.c +++ b/hw/sd/sdhci-pci.c @@ -32,7 +32,7 @@ static void sdhci_pci_realize(PCIDevice *dev, Error **errp) SDHCIState *s = PCI_SDHCI(dev); sdhci_initfn(s); - qdev_prop_set_uint8(DEVICE(dev), "endianness", DEVICE_LITTLE_ENDIAN); + qdev_prop_set_enum(DEVICE(dev), "endianness", ENDIAN_MODE_LITTLE); sdhci_common_realize(s, errp); if (*errp) { return; diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c index 23af3958a1d..f2bb612c665 100644 --- a/hw/sd/sdhci.c +++ b/hw/sd/sdhci.c @@ -1437,7 +1437,12 @@ void sdhci_common_realize(SDHCIState *s, Error **errp) const char *class_name = object_get_typename(OBJECT(s)); unsigned ops_index; - ops_index = s->endianness == DEVICE_BIG_ENDIAN ? 1 : 0; + if (s->endianness == ENDIAN_MODE_UNSPECIFIED) { + error_setg(errp, "%s property 'endianness'" + " must be set to 'big' or 'little'", class_name); + return; + } + ops_index = s->endianness == ENDIAN_MODE_BIG ? 1 : 0; s->io_ops = sc->io_ops ?: &sdhci_mmio_ops[ops_index]; if (s->io_ops->endianness != sdhci_mmio_ops[ops_index].endianness) { -- 2.47.1