qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org, BALATON Zoltan <balaton@eik.bme.hu>
Cc: "Daniel P. Berrangé" <berrange@redhat.com>,
	"Eduardo Habkost" <eduardo@habkost.net>,
	"Peter Maydell" <peter.maydell@linaro.org>,
	qemu-ppc@nongnu.org, "Paolo Bonzini" <pbonzini@redhat.com>,
	"Philippe Mathieu-Daudé" <philmd@linaro.org>,
	"Andrey Smirnov" <andrew.smirnov@gmail.com>,
	"Bernhard Beschow" <shentey@gmail.com>,
	"Jean-Christophe Dubois" <jcd@tribudubois.net>,
	"Guenter Roeck" <linux@roeck-us.net>,
	qemu-block@nongnu.org, "Bin Meng" <bmeng.cn@gmail.com>,
	qemu-arm@nongnu.org
Subject: [PATCH v4 07/14] hw/sd/sdhci: Allow SDHCI classes to register their own MemoryRegionOps
Date: Sat,  8 Mar 2025 22:36:33 +0100	[thread overview]
Message-ID: <20250308213640.13138-8-philmd@linaro.org> (raw)
In-Reply-To: <20250308213640.13138-1-philmd@linaro.org>

Add MemoryRegionOps as a class property. For now it is only
used by TYPE_IMX_USDHC.
Otherwise the default remains in little endian.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 include/hw/sd/sdhci.h |  1 +
 hw/sd/sdhci.c         | 22 ++++++++--------------
 2 files changed, 9 insertions(+), 14 deletions(-)

diff --git a/include/hw/sd/sdhci.h b/include/hw/sd/sdhci.h
index 2709a7a69d5..60a0442c805 100644
--- a/include/hw/sd/sdhci.h
+++ b/include/hw/sd/sdhci.h
@@ -112,6 +112,7 @@ typedef struct SDHCIClass {
         SysBusDeviceClass sbd_parent_class;
     };
 
+    const MemoryRegionOps *io_ops;
     uint32_t quirks;
     uint64_t iomem_size;
 } SDHCIClass;
diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c
index 637067fef50..ae485f90dfe 100644
--- a/hw/sd/sdhci.c
+++ b/hw/sd/sdhci.c
@@ -1427,8 +1427,6 @@ void sdhci_initfn(SDHCIState *s)
                                    sdhci_raise_insertion_irq, s);
     s->transfer_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL,
                                      sdhci_data_transfer, s);
-
-    s->io_ops = &sdhci_mmio_le_ops;
 }
 
 void sdhci_uninitfn(SDHCIState *s)
@@ -1446,6 +1444,7 @@ void sdhci_common_realize(SDHCIState *s, Error **errp)
     SDHCIClass *sc = SYSBUS_SDHCI_GET_CLASS(s);
     const char *class_name = object_get_typename(OBJECT(s));
 
+    s->io_ops = sc->io_ops ?: &sdhci_mmio_le_ops;
     switch (s->endianness) {
     case DEVICE_LITTLE_ENDIAN:
         /* s->io_ops is little endian by default */
@@ -1889,17 +1888,11 @@ static const MemoryRegionOps usdhc_mmio_ops = {
     .endianness = DEVICE_LITTLE_ENDIAN,
 };
 
-static void imx_usdhc_init(Object *obj)
-{
-    SDHCIState *s = SYSBUS_SDHCI(obj);
-
-    s->io_ops = &usdhc_mmio_ops;
-}
-
 static void imx_usdhc_class_init(ObjectClass *oc, void *data)
 {
     SDHCIClass *sc = SYSBUS_SDHCI_CLASS(oc);
 
+    sc->io_ops = &usdhc_mmio_ops;
     sc->quirks = SDHCI_QUIRK_NO_BUSY_IRQ;
 
     sdhci_common_class_init(oc, data);
@@ -1956,11 +1949,13 @@ static const MemoryRegionOps sdhci_s3c_mmio_ops = {
     .endianness = DEVICE_LITTLE_ENDIAN,
 };
 
-static void sdhci_s3c_init(Object *obj)
+static void sdhci_s3c_class_init(ObjectClass *oc, void *data)
 {
-    SDHCIState *s = SYSBUS_SDHCI(obj);
+    SDHCIClass *sc = SYSBUS_SDHCI_CLASS(oc);
 
-    s->io_ops = &sdhci_s3c_mmio_ops;
+    sc->io_ops = &sdhci_s3c_mmio_ops;
+
+    sdhci_common_class_init(oc, data);
 }
 
 static const TypeInfo sdhci_types[] = {
@@ -1982,13 +1977,12 @@ static const TypeInfo sdhci_types[] = {
     {
         .name = TYPE_IMX_USDHC,
         .parent = TYPE_SYSBUS_SDHCI,
-        .instance_init = imx_usdhc_init,
         .class_init = imx_usdhc_class_init,
     },
     {
         .name = TYPE_S3C_SDHCI,
         .parent = TYPE_SYSBUS_SDHCI,
-        .instance_init = sdhci_s3c_init,
+        .class_init = sdhci_s3c_class_init,
     },
 };
 
-- 
2.47.1



  parent reply	other threads:[~2025-03-08 21:40 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-03-08 21:36 [PATCH v4 00/14] hw/sd/sdhci: Set reset value of interrupt registers Philippe Mathieu-Daudé
2025-03-08 21:36 ` [PATCH v4 01/14] hw/qdev-properties-system: Include missing 'qapi/qapi-types-common.h' Philippe Mathieu-Daudé
2025-03-08 21:36 ` [PATCH v4 02/14] hw/sd/sdhci: Remove need for SDHCIState::vendor field Philippe Mathieu-Daudé
2025-03-09 11:20   ` BALATON Zoltan
2025-03-09 13:57   ` Bernhard Beschow
2025-03-08 21:36 ` [PATCH v4 03/14] hw/sd/sdhci: Introduce SDHCIClass stub Philippe Mathieu-Daudé
2025-03-08 22:34   ` BALATON Zoltan
2025-03-08 23:16     ` Philippe Mathieu-Daudé
2025-03-09  0:08       ` BALATON Zoltan
2025-03-09 14:20         ` Philippe Mathieu-Daudé
2025-03-08 21:36 ` [PATCH v4 04/14] hw/sd/sdhci: Make quirks a class property Philippe Mathieu-Daudé
2025-03-09 11:43   ` BALATON Zoltan
2025-03-09 12:19     ` Philippe Mathieu-Daudé
2025-03-09 12:43       ` BALATON Zoltan
2025-03-08 21:36 ` [PATCH v4 05/14] hw/sd/sdhci: Make I/O region size " Philippe Mathieu-Daudé
2025-03-09 11:09   ` BALATON Zoltan
2025-03-08 21:36 ` [PATCH v4 06/14] hw/sd/sdhci: Enforce little endianness on PCI devices Philippe Mathieu-Daudé
2025-03-08 21:36 ` Philippe Mathieu-Daudé [this message]
2025-03-08 21:36 ` [PATCH v4 08/14] hw/sd/sdhci: Simplify MemoryRegionOps endianness check Philippe Mathieu-Daudé
2025-03-08 22:39   ` BALATON Zoltan
2025-03-08 21:36 ` [PATCH v4 09/14] hw/sd/sdhci: Unify default MemoryRegionOps Philippe Mathieu-Daudé
2025-03-09  9:27   ` Bernhard Beschow
2025-03-09 22:50     ` Philippe Mathieu-Daudé
2025-03-08 21:36 ` [PATCH v4 10/14] hw/sd/sdhci: Convert SDHCIState::endianness to EndianMode Philippe Mathieu-Daudé
2025-03-08 21:36 ` [PATCH v4 11/14] hw/sd/sdhci: Add SDHCIClass::ro::capareg field Philippe Mathieu-Daudé
2025-03-08 21:36 ` [PATCH v4 12/14] hw/sd/sdhci: Allow SDHCI classes to have different register reset values Philippe Mathieu-Daudé
2025-03-09 11:34   ` BALATON Zoltan
2025-03-08 21:36 ` [PATCH v4 13/14] hw/sd/sdhci: Implement Freescale eSDHC as TYPE_FSL_ESDHC Philippe Mathieu-Daudé
2025-03-09 11:04   ` BALATON Zoltan
2025-03-09 12:16     ` Philippe Mathieu-Daudé
2025-03-08 21:36 ` [PATCH v4 14/14] hw/ppc/e500: Replace generic SDHCI by Freescale eSDHC Philippe Mathieu-Daudé
2025-03-09  8:31   ` Bernhard Beschow
2025-03-09 13:59     ` Philippe Mathieu-Daudé

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20250308213640.13138-8-philmd@linaro.org \
    --to=philmd@linaro.org \
    --cc=andrew.smirnov@gmail.com \
    --cc=balaton@eik.bme.hu \
    --cc=berrange@redhat.com \
    --cc=bmeng.cn@gmail.com \
    --cc=eduardo@habkost.net \
    --cc=jcd@tribudubois.net \
    --cc=linux@roeck-us.net \
    --cc=pbonzini@redhat.com \
    --cc=peter.maydell@linaro.org \
    --cc=qemu-arm@nongnu.org \
    --cc=qemu-block@nongnu.org \
    --cc=qemu-devel@nongnu.org \
    --cc=qemu-ppc@nongnu.org \
    --cc=shentey@gmail.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).