From: "Cédric Le Goater" <clg@redhat.com>
To: qemu-arm@nongnu.org, qemu-devel@nongnu.org
Cc: "Jamin Lin" <jamin_lin@aspeedtech.com>,
"Cédric Le Goater" <clg@redhat.com>
Subject: [PULL 18/46] hw/intc/aspeed: Support setting different memory size
Date: Sun, 9 Mar 2025 14:51:02 +0100 [thread overview]
Message-ID: <20250309135130.545764-19-clg@redhat.com> (raw)
In-Reply-To: <20250309135130.545764-1-clg@redhat.com>
From: Jamin Lin <jamin_lin@aspeedtech.com>
According to the AST2700 datasheet, the INTC(CPU DIE) controller has 16KB
(0x4000) of register space, and the INTCIO (I/O DIE) controller has 1KB (0x400)
of register space.
Introduced a new class attribute "mem_size" to set different memory sizes for
the INTC models in AST2700.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20250307035945.3698802-2-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
---
include/hw/intc/aspeed_intc.h | 3 +++
hw/intc/aspeed_intc.c | 9 ++++++++-
2 files changed, 11 insertions(+), 1 deletion(-)
diff --git a/include/hw/intc/aspeed_intc.h b/include/hw/intc/aspeed_intc.h
index 18cb43476cd7..03324f05ab58 100644
--- a/include/hw/intc/aspeed_intc.h
+++ b/include/hw/intc/aspeed_intc.h
@@ -25,6 +25,8 @@ struct AspeedINTCState {
/*< public >*/
MemoryRegion iomem;
+ MemoryRegion iomem_container;
+
uint32_t regs[ASPEED_INTC_NR_REGS];
OrIRQState orgates[ASPEED_INTC_NR_INTS];
qemu_irq output_pins[ASPEED_INTC_NR_INTS];
@@ -39,6 +41,7 @@ struct AspeedINTCClass {
uint32_t num_lines;
uint32_t num_ints;
+ uint64_t mem_size;
};
#endif /* ASPEED_INTC_H */
diff --git a/hw/intc/aspeed_intc.c b/hw/intc/aspeed_intc.c
index 126b711b9430..033b574c1e24 100644
--- a/hw/intc/aspeed_intc.c
+++ b/hw/intc/aspeed_intc.c
@@ -302,10 +302,16 @@ static void aspeed_intc_realize(DeviceState *dev, Error **errp)
AspeedINTCClass *aic = ASPEED_INTC_GET_CLASS(s);
int i;
+ memory_region_init(&s->iomem_container, OBJECT(s),
+ TYPE_ASPEED_INTC ".container", aic->mem_size);
+
+ sysbus_init_mmio(sbd, &s->iomem_container);
+
memory_region_init_io(&s->iomem, OBJECT(s), &aspeed_intc_ops, s,
TYPE_ASPEED_INTC ".regs", ASPEED_INTC_NR_REGS << 2);
- sysbus_init_mmio(sbd, &s->iomem);
+ memory_region_add_subregion(&s->iomem_container, 0x0, &s->iomem);
+
qdev_init_gpio_in(dev, aspeed_intc_set_irq, aic->num_ints);
for (i = 0; i < aic->num_ints; i++) {
@@ -344,6 +350,7 @@ static void aspeed_2700_intc_class_init(ObjectClass *klass, void *data)
dc->desc = "ASPEED 2700 INTC Controller";
aic->num_lines = 32;
aic->num_ints = 9;
+ aic->mem_size = 0x4000;
}
static const TypeInfo aspeed_2700_intc_info = {
--
2.48.1
next prev parent reply other threads:[~2025-03-09 13:53 UTC|newest]
Thread overview: 54+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-09 13:50 [PULL 00/46] aspeed queue Cédric Le Goater
2025-03-09 13:50 ` [PULL 01/46] tests/functional: Introduce a new test routine for OpenBMC images Cédric Le Goater
2025-03-09 13:50 ` [PULL 02/46] tests/functional: Update OpenBMC image of palmetto machine Cédric Le Goater
2025-03-09 13:50 ` [PULL 03/46] tests/functional: Update OpenBMC image of romulus machine Cédric Le Goater
2025-03-09 13:50 ` [PULL 04/46] tests/functional: Introduce a witherspoon machine test Cédric Le Goater
2025-03-09 13:50 ` [PULL 05/46] tests/functional: Introduce a bletchley " Cédric Le Goater
2025-03-09 13:50 ` [PULL 06/46] aspeed/soc: Support Non-maskable Interrupt for AST2700 Cédric Le Goater
2025-03-09 13:50 ` [PULL 07/46] aspeed: Remove duplicate typename in AspeedSoCClass Cédric Le Goater
2025-03-09 13:50 ` [PULL 08/46] hw/misc/aspeed_hace: Fix coding style Cédric Le Goater
2025-03-09 13:50 ` [PULL 09/46] hw/misc/aspeed_hace: Add AST2700 support Cédric Le Goater
2025-03-09 13:50 ` [PULL 10/46] hw/arm/aspeed_ast27x0: Add HACE support for AST2700 Cédric Le Goater
2025-03-09 13:50 ` [PULL 11/46] hw/misc/aspeed_hace: Fix boot issue in the Crypto Manager Self Test Cédric Le Goater
2025-03-09 13:50 ` [PULL 12/46] hw/misc/aspeed_scu: Skipping dram_init in u-boot Cédric Le Goater
2025-03-09 13:50 ` [PULL 13/46] hw/misc/aspeed_scu: Fix the revision ID cannot be set in the SOC layer for AST2700 Cédric Le Goater
2025-03-09 13:50 ` [PULL 14/46] hw/arm/aspeed Update HW Strap Default Values " Cédric Le Goater
2025-03-09 13:50 ` [PULL 15/46] hw/misc/aspeed_scu: Fix the hw-strap1 cannot be set in the SOC layer " Cédric Le Goater
2025-03-09 13:51 ` [PULL 16/46] hw/arm/aspeed_ast27x0.c Separate HW Strap Registers for SCU and SCUIO Cédric Le Goater
2025-03-09 13:51 ` [PULL 17/46] hw/arm/aspeed_ast27x0.c Fix boot issue for AST2700 Cédric Le Goater
2025-03-09 13:51 ` Cédric Le Goater [this message]
2025-03-09 13:51 ` [PULL 19/46] hw/intc/aspeed: Rename status_addr and addr to status_reg and reg for clarity Cédric Le Goater
2025-03-09 13:51 ` [PULL 20/46] hw/intc/aspeed: Introduce dynamic allocation for regs array Cédric Le Goater
2025-03-09 13:51 ` [PULL 21/46] hw/intc/aspeed: Support setting different register size Cédric Le Goater
2025-03-09 13:51 ` [PULL 22/46] hw/intc/aspeed: Reduce regs array size by adding a register sub-region Cédric Le Goater
2025-03-09 13:51 ` [PULL 23/46] hw/intc/aspeed: Introduce helper functions for enable and status registers Cédric Le Goater
2025-03-09 13:51 ` [PULL 24/46] hw/intc/aspeed: Add object type name to trace events for better debugging Cédric Le Goater
2025-03-09 13:51 ` [PULL 25/46] hw/arm/aspeed: Rename IRQ table and machine name for AST2700 A0 Cédric Le Goater
2025-03-09 13:51 ` [PULL 26/46] hw/arm/aspeed_ast27x0: Sort the IRQ table by IRQ number Cédric Le Goater
2025-03-09 13:51 ` [PULL 27/46] hw/intc/aspeed: Support different memory region ops Cédric Le Goater
2025-03-09 13:51 ` [PULL 28/46] hw/intc/aspeed: Rename num_ints to num_inpins for clarity Cédric Le Goater
2025-03-09 13:51 ` [PULL 29/46] hw/intc/aspeed: Add support for multiple output pins in INTC Cédric Le Goater
2025-03-09 13:51 ` [PULL 30/46] hw/intc/aspeed: Refactor INTC to support separate input and output pin indices Cédric Le Goater
2025-03-09 13:51 ` [PULL 31/46] hw/intc/aspeed: Introduce AspeedINTCIRQ structure to save the irq index and register address Cédric Le Goater
2025-03-09 13:51 ` [PULL 32/46] hw/intc/aspeed: Introduce IRQ handler function to reduce code duplication Cédric Le Goater
2025-03-09 13:51 ` [PULL 33/46] hw/intc/aspeed: Add Support for Multi-Output IRQ Handling Cédric Le Goater
2025-03-09 13:51 ` [PULL 34/46] hw/intc/aspeed: Add Support for AST2700 INTCIO Controller Cédric Le Goater
2025-05-16 11:50 ` Philippe Mathieu-Daudé
2025-05-19 1:43 ` Jamin Lin
2025-03-09 13:51 ` [PULL 35/46] hw/misc/aspeed_scu: Add Support for AST2700/AST2750 A1 Silicon Revisions Cédric Le Goater
2025-03-09 13:51 ` [PULL 36/46] hw/arm/aspeed_ast27x0.c Support AST2700 A1 GIC Interrupt Mapping Cédric Le Goater
2025-03-09 13:51 ` [PULL 37/46] hw/arm/aspeed_ast27x0: Define an Array of AspeedINTCState with Two Instances Cédric Le Goater
2025-03-09 13:51 ` [PULL 38/46] hw/arm/aspeed_ast27x0: Support two levels of INTC controllers for AST2700 A1 Cédric Le Goater
2025-03-09 13:51 ` [PULL 39/46] hw/arm/aspeed_ast27x0: Add SoC Support " Cédric Le Goater
2025-03-09 13:51 ` [PULL 40/46] hw/arm/aspeed: Add Machine " Cédric Le Goater
2025-03-09 13:51 ` [PULL 41/46] hw/arm/aspeed_ast27x0: Sort the memmap table by mapping address Cédric Le Goater
2025-03-09 13:51 ` [PULL 42/46] tests/functional/aspeed: Introduce start_ast2700_test API Cédric Le Goater
2025-03-09 13:51 ` [PULL 43/46] tests/functional/aspeed: Update temperature hwmon path Cédric Le Goater
2025-03-09 13:51 ` [PULL 44/46] tests/functional/aspeed: Update test ASPEED SDK v09.05 Cédric Le Goater
2025-03-09 13:51 ` [PULL 45/46] tests/functional/aspeed: Add test case for AST2700 A1 Cédric Le Goater
2025-05-15 12:39 ` Cédric Le Goater
2025-05-16 2:59 ` Jamin Lin
2025-05-16 9:20 ` Cédric Le Goater
2025-05-19 1:52 ` Jamin Lin
2025-05-19 8:34 ` Cédric Le Goater
2025-03-09 13:51 ` [PULL 46/46] docs/specs: Add aspeed-intc Cédric Le Goater
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