From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 26/38] target/mips: Move has_work() from CPUClass to SysemuCPUOps
Date: Sun, 9 Mar 2025 18:51:55 +0100 [thread overview]
Message-ID: <20250309175207.43828-27-philmd@linaro.org> (raw)
In-Reply-To: <20250309175207.43828-1-philmd@linaro.org>
Move has_work() from CPUClass to SysemuCPUOps and
cpu_mips_hw_interrupts_enabled() to system.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20250125170125.32855-14-philmd@linaro.org>
---
target/mips/internal.h | 4 ++--
target/mips/cpu.c | 4 +++-
2 files changed, 5 insertions(+), 3 deletions(-)
diff --git a/target/mips/internal.h b/target/mips/internal.h
index 91c786cff8a..28eb28936ba 100644
--- a/target/mips/internal.h
+++ b/target/mips/internal.h
@@ -162,8 +162,6 @@ void cpu_mips_store_cause(CPUMIPSState *env, target_ulong val);
extern const VMStateDescription vmstate_mips_cpu;
-#endif /* !CONFIG_USER_ONLY */
-
static inline bool cpu_mips_hw_interrupts_enabled(CPUMIPSState *env)
{
return (env->CP0_Status & (1 << CP0St_IE)) &&
@@ -206,6 +204,8 @@ static inline bool cpu_mips_hw_interrupts_pending(CPUMIPSState *env)
return r;
}
+#endif /* !CONFIG_USER_ONLY */
+
void msa_reset(CPUMIPSState *env);
/* cp0_timer.c */
diff --git a/target/mips/cpu.c b/target/mips/cpu.c
index e76298699ab..b207106dd79 100644
--- a/target/mips/cpu.c
+++ b/target/mips/cpu.c
@@ -132,6 +132,7 @@ static vaddr mips_cpu_get_pc(CPUState *cs)
return cpu->env.active_tc.PC;
}
+#if !defined(CONFIG_USER_ONLY)
static bool mips_cpu_has_work(CPUState *cs)
{
CPUMIPSState *env = cpu_env(cs);
@@ -177,6 +178,7 @@ static bool mips_cpu_has_work(CPUState *cs)
}
return has_work;
}
+#endif /* !CONFIG_USER_ONLY */
static int mips_cpu_mmu_index(CPUState *cs, bool ifunc)
{
@@ -534,6 +536,7 @@ static ObjectClass *mips_cpu_class_by_name(const char *cpu_model)
#include "hw/core/sysemu-cpu-ops.h"
static const struct SysemuCPUOps mips_sysemu_ops = {
+ .has_work = mips_cpu_has_work,
.get_phys_page_debug = mips_cpu_get_phys_page_debug,
.legacy_vmsd = &vmstate_mips_cpu,
};
@@ -577,7 +580,6 @@ static void mips_cpu_class_init(ObjectClass *c, void *data)
&mcc->parent_phases);
cc->class_by_name = mips_cpu_class_by_name;
- cc->has_work = mips_cpu_has_work;
cc->mmu_index = mips_cpu_mmu_index;
cc->dump_state = mips_cpu_dump_state;
cc->set_pc = mips_cpu_set_pc;
--
2.47.1
next prev parent reply other threads:[~2025-03-09 17:58 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-09 17:51 [PULL 00/38] Accelerators & CPU patches for 2025-03-09 Philippe Mathieu-Daudé
2025-03-09 17:51 ` [PULL 01/38] linux-user: Only include 'exec/tb-flush.h' header when necessary Philippe Mathieu-Daudé
2025-03-09 17:51 ` [PULL 02/38] bsd-user: Always use mmap_find_vma_aligned() in target_mmap() Philippe Mathieu-Daudé
2025-03-09 17:51 ` [PULL 03/38] bsd-user: Propagate alignment argument to mmap_find_vma() Philippe Mathieu-Daudé
2025-03-09 17:51 ` [PULL 04/38] user: Extract common MMAP API to 'user/mmap.h' Philippe Mathieu-Daudé
2025-03-09 17:51 ` [PULL 05/38] cpus: Register VMState per user / system emulation Philippe Mathieu-Daudé
2025-03-09 17:51 ` [PULL 06/38] cpus: Build cpu_exec_[un]realizefn() methods once Philippe Mathieu-Daudé
2025-03-09 17:51 ` [PULL 07/38] cpus: Prefer cached CpuClass over CPU_GET_CLASS() macro Philippe Mathieu-Daudé
2025-03-09 17:51 ` [PULL 08/38] accel: " Philippe Mathieu-Daudé
2025-03-09 17:51 ` [PULL 09/38] user: " Philippe Mathieu-Daudé
2025-03-09 17:51 ` [PULL 10/38] disas: " Philippe Mathieu-Daudé
2025-03-09 17:51 ` [PULL 11/38] gdbstub: " Philippe Mathieu-Daudé
2025-03-09 17:51 ` [PULL 12/38] hw/acpi: " Philippe Mathieu-Daudé
2025-03-09 17:51 ` [PULL 13/38] target/arm: " Philippe Mathieu-Daudé
2025-03-09 17:51 ` [PULL 14/38] cpus: Restrict cpu_has_work() to system emulation Philippe Mathieu-Daudé
2025-03-09 17:51 ` [PULL 15/38] cpus: Un-inline cpu_has_work() Philippe Mathieu-Daudé
2025-03-09 17:51 ` [PULL 16/38] cpus: Introduce SysemuCPUOps::has_work() handler Philippe Mathieu-Daudé
2025-03-09 17:51 ` [PULL 17/38] target/alpha: Move has_work() from CPUClass to SysemuCPUOps Philippe Mathieu-Daudé
2025-03-09 17:51 ` [PULL 18/38] target/arm: " Philippe Mathieu-Daudé
2025-03-09 17:51 ` [PULL 19/38] target/avr: " Philippe Mathieu-Daudé
2025-03-09 17:51 ` [PULL 20/38] target/hexagon: Remove CPUClass:has_work() handler Philippe Mathieu-Daudé
2025-03-09 17:51 ` [PULL 21/38] target/hppa: Move has_work() from CPUClass to SysemuCPUOps Philippe Mathieu-Daudé
2025-03-09 17:51 ` [PULL 22/38] target/i386: " Philippe Mathieu-Daudé
2025-03-09 17:51 ` [PULL 23/38] target/loongarch: " Philippe Mathieu-Daudé
2025-03-09 17:51 ` [PULL 24/38] target/m68k: " Philippe Mathieu-Daudé
2025-03-09 17:51 ` [PULL 25/38] target/microblaze: " Philippe Mathieu-Daudé
2025-03-09 17:51 ` Philippe Mathieu-Daudé [this message]
2025-03-09 17:51 ` [PULL 27/38] target/openrisc: " Philippe Mathieu-Daudé
2025-03-09 17:51 ` [PULL 28/38] target/ppc: " Philippe Mathieu-Daudé
2025-03-09 17:51 ` [PULL 29/38] target/riscv: " Philippe Mathieu-Daudé
2025-03-09 17:51 ` [PULL 30/38] target/rx: " Philippe Mathieu-Daudé
2025-03-09 17:52 ` [PULL 31/38] target/s390x: Restrict I/O handler installers to system emulation Philippe Mathieu-Daudé
2025-03-09 17:52 ` [PULL 32/38] target/s390x: Move has_work() from CPUClass to SysemuCPUOps Philippe Mathieu-Daudé
2025-03-09 17:52 ` [PULL 33/38] target/sh4: " Philippe Mathieu-Daudé
2025-03-09 17:52 ` [PULL 34/38] target/sparc: " Philippe Mathieu-Daudé
2025-03-09 17:52 ` [PULL 35/38] target/tricore: " Philippe Mathieu-Daudé
2025-03-09 17:52 ` [PULL 36/38] target/xtensa: " Philippe Mathieu-Daudé
2025-03-09 17:52 ` [PULL 37/38] cpus: Remove CPUClass::has_work() handler Philippe Mathieu-Daudé
2025-03-09 17:52 ` [PULL 38/38] MAINTAINERS: Consolidate core exec/vCPU handling section Philippe Mathieu-Daudé
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