From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: BALATON Zoltan <balaton@eik.bme.hu>, qemu-devel@nongnu.org
Cc: "Steven Lee" <steven_lee@aspeedtech.com>,
"Joel Stanley" <joel@jms.id.au>,
"Bernhard Beschow" <shentey@gmail.com>,
"Peter Maydell" <peter.maydell@linaro.org>,
qemu-arm@nongnu.org, "Andrey Smirnov" <andrew.smirnov@gmail.com>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Bin Meng" <bmeng.cn@gmail.com>,
"Cédric Le Goater" <clg@kaod.org>,
"Eduardo Habkost" <eduardo@habkost.net>,
qemu-ppc@nongnu.org, "Daniel P. Berrangé" <berrange@redhat.com>,
"Guenter Roeck" <linux@roeck-us.net>,
"Andrew Jeffery" <andrew@codeconstruct.com.au>,
"Troy Lee" <leetroy@gmail.com>,
"Jean-Christophe Dubois" <jcd@tribudubois.net>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>,
qemu-block@nongnu.org, "Jamin Lin" <jamin_lin@aspeedtech.com>
Subject: [PATCH v5 14/14] hw/sd/sdhci: Remove unnecessary 'endianness' property
Date: Mon, 10 Mar 2025 01:06:20 +0100 [thread overview]
Message-ID: <20250310000620.70120-15-philmd@linaro.org> (raw)
In-Reply-To: <20250310000620.70120-1-philmd@linaro.org>
The previous commit removed the single use of instance
setting the "endianness" property.
Since classes can register their io_ops with correct
endianness, no need to support different ones.
Remove the code related to SDHCIState::endianess field.
Remove the now unused SDHCIState::io_ops field, since we
directly use the class one.
Suggested-by: Bernhard Beschow <shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
hw/sd/sdhci-internal.h | 1 -
include/hw/sd/sdhci.h | 2 --
hw/sd/sdhci.c | 33 +++------------------------------
3 files changed, 3 insertions(+), 33 deletions(-)
diff --git a/hw/sd/sdhci-internal.h b/hw/sd/sdhci-internal.h
index d99a8493db2..e4da6c831d1 100644
--- a/hw/sd/sdhci-internal.h
+++ b/hw/sd/sdhci-internal.h
@@ -308,7 +308,6 @@ extern const VMStateDescription sdhci_vmstate;
#define SDHC_CAPAB_REG_DEFAULT 0x057834b4
#define DEFINE_SDHCI_COMMON_PROPERTIES(_state) \
- DEFINE_PROP_UINT8("endianness", _state, endianness, DEVICE_LITTLE_ENDIAN), \
DEFINE_PROP_UINT8("sd-spec-version", _state, sd_spec_version, 2), \
DEFINE_PROP_UINT8("uhs", _state, uhs_mode, UHS_NOT_SUPPORTED), \
\
diff --git a/include/hw/sd/sdhci.h b/include/hw/sd/sdhci.h
index e8fced5eedc..1016a5b5b77 100644
--- a/include/hw/sd/sdhci.h
+++ b/include/hw/sd/sdhci.h
@@ -54,7 +54,6 @@ struct SDHCIState {
AddressSpace sysbus_dma_as;
AddressSpace *dma_as;
MemoryRegion *dma_mr;
- const MemoryRegionOps *io_ops;
QEMUTimer *insert_timer; /* timer for 'changing' sd card. */
QEMUTimer *transfer_timer;
@@ -105,7 +104,6 @@ struct SDHCIState {
/* Configurable properties */
uint32_t quirks;
- uint8_t endianness;
uint8_t sd_spec_version;
uint8_t uhs_mode;
};
diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c
index 47e4bd1a610..cbb9f4ae8c0 100644
--- a/hw/sd/sdhci.c
+++ b/hw/sd/sdhci.c
@@ -1391,17 +1391,6 @@ sdhci_write(void *opaque, hwaddr offset, uint64_t val, unsigned size)
}
static const MemoryRegionOps sdhci_mmio_le_ops = {
- .read = sdhci_read,
- .write = sdhci_write,
- .valid = {
- .min_access_size = 1,
- .max_access_size = 4,
- .unaligned = false
- },
- .endianness = DEVICE_LITTLE_ENDIAN,
-};
-
-static const MemoryRegionOps sdhci_mmio_be_ops = {
.read = sdhci_read,
.write = sdhci_write,
.impl = {
@@ -1413,7 +1402,7 @@ static const MemoryRegionOps sdhci_mmio_be_ops = {
.max_access_size = 4,
.unaligned = false
},
- .endianness = DEVICE_BIG_ENDIAN,
+ .endianness = DEVICE_LITTLE_ENDIAN,
};
static void sdhci_init_readonly_registers(SDHCIState *s, Error **errp)
@@ -1467,23 +1456,6 @@ void sdhci_common_realize(SDHCIState *s, Error **errp)
SDHCIClass *sc = s->sc;
const char *class_name = object_get_typename(OBJECT(s));
- s->io_ops = sc->io_ops ?: &sdhci_mmio_le_ops;
- switch (s->endianness) {
- case DEVICE_LITTLE_ENDIAN:
- /* s->io_ops is little endian by default */
- break;
- case DEVICE_BIG_ENDIAN:
- if (s->io_ops != &sdhci_mmio_le_ops) {
- error_setg(errp, "SD controller doesn't support big endianness");
- return;
- }
- s->io_ops = &sdhci_mmio_be_ops;
- break;
- default:
- error_setg(errp, "Incorrect endianness");
- return;
- }
-
sdhci_init_readonly_registers(s, errp);
if (*errp) {
return;
@@ -1493,7 +1465,7 @@ void sdhci_common_realize(SDHCIState *s, Error **errp)
s->fifo_buffer = g_malloc0(s->buf_maxsz);
assert(sc->iomem_size >= SDHC_REGISTERS_MAP_SIZE);
- memory_region_init_io(&s->iomem, OBJECT(s), s->io_ops, s, class_name,
+ memory_region_init_io(&s->iomem, OBJECT(s), sc->io_ops, s, class_name,
sc->iomem_size);
}
@@ -1578,6 +1550,7 @@ void sdhci_common_class_init(ObjectClass *klass, const void *data)
dc->vmsd = &sdhci_vmstate;
device_class_set_legacy_reset(dc, sdhci_poweron_reset);
+ sc->io_ops = &sdhci_mmio_le_ops;
sc->iomem_size = SDHC_REGISTERS_MAP_SIZE;
}
--
2.47.1
next prev parent reply other threads:[~2025-03-10 0:12 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-10 0:06 [PATCH v5 00/14] hw/sd/sdhci: Set reset value of interrupt registers Philippe Mathieu-Daudé
2025-03-10 0:06 ` [PATCH v5 01/14] hw/qdev-properties-system: Include missing 'qapi/qapi-types-common.h' Philippe Mathieu-Daudé
2025-03-11 10:56 ` Philippe Mathieu-Daudé
2025-03-10 0:06 ` [PATCH v5 02/14] hw/sd/sdhci: Remove need for SDHCIState::vendor field Philippe Mathieu-Daudé
2025-03-10 0:06 ` [PATCH v5 03/14] hw/sd/sdhci: Redefine SDHCI_QUIRK_NO_BUSY_IRQ bitmask as bit Philippe Mathieu-Daudé
2025-03-10 13:31 ` BALATON Zoltan
2025-03-10 0:06 ` [PATCH v5 04/14] hw/sd/sdhci: Include 'wp-inverted' property in quirk bitmask Philippe Mathieu-Daudé
2025-03-10 13:36 ` BALATON Zoltan
2025-03-10 0:06 ` [PATCH v5 05/14] hw/sd/sdhci: Include 'pending-insert-quirk' " Philippe Mathieu-Daudé
2025-03-10 13:39 ` BALATON Zoltan
2025-03-10 0:06 ` [PATCH v5 06/14] hw/sd/sdhci: Introduce SDHCIClass stub Philippe Mathieu-Daudé
2025-03-10 0:06 ` [PATCH v5 07/14] hw/sd/sdhci: Make quirks a class property Philippe Mathieu-Daudé
2025-03-10 0:06 ` [PATCH v5 08/14] hw/sd/sdhci: Make I/O region size " Philippe Mathieu-Daudé
2025-03-10 0:06 ` [PATCH v5 09/14] hw/sd/sdhci: Allow SDHCI classes to register their own MemoryRegionOps Philippe Mathieu-Daudé
2025-03-10 13:50 ` BALATON Zoltan
2025-03-10 0:06 ` [PATCH v5 10/14] hw/sd/sdhci: Allow SDHCI classes to register their own read-only regs Philippe Mathieu-Daudé
2025-03-10 0:06 ` [PATCH v5 11/14] hw/sd/sdhci: Allow SDHCI classes to have different register reset values Philippe Mathieu-Daudé
2025-03-10 0:06 ` [PATCH v5 12/14] hw/sd/sdhci: Implement Freescale eSDHC as TYPE_FSL_ESDHC Philippe Mathieu-Daudé
2025-03-10 0:06 ` [PATCH v5 13/14] hw/ppc/e500: Replace generic SDHCI by Freescale eSDHC Philippe Mathieu-Daudé
2025-03-10 0:06 ` Philippe Mathieu-Daudé [this message]
2025-03-10 14:09 ` [PATCH v5 14/14] hw/sd/sdhci: Remove unnecessary 'endianness' property BALATON Zoltan
2025-03-10 15:27 ` Philippe Mathieu-Daudé
2025-03-10 15:56 ` Guenter Roeck
2025-03-10 17:31 ` Philippe Mathieu-Daudé
2025-03-10 17:38 ` Bernhard Beschow
2025-03-10 18:24 ` Cédric Le Goater
2025-03-10 18:34 ` Philippe Mathieu-Daudé
2025-03-10 22:30 ` Guenter Roeck
2025-03-11 7:31 ` Bernhard Beschow
2025-03-11 7:59 ` Philippe Mathieu-Daudé
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