From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: BALATON Zoltan <balaton@eik.bme.hu>, qemu-devel@nongnu.org
Cc: "Steven Lee" <steven_lee@aspeedtech.com>,
"Joel Stanley" <joel@jms.id.au>,
"Bernhard Beschow" <shentey@gmail.com>,
"Peter Maydell" <peter.maydell@linaro.org>,
qemu-arm@nongnu.org, "Andrey Smirnov" <andrew.smirnov@gmail.com>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Bin Meng" <bmeng.cn@gmail.com>,
"Cédric Le Goater" <clg@kaod.org>,
"Eduardo Habkost" <eduardo@habkost.net>,
qemu-ppc@nongnu.org, "Daniel P. Berrangé" <berrange@redhat.com>,
"Guenter Roeck" <linux@roeck-us.net>,
"Andrew Jeffery" <andrew@codeconstruct.com.au>,
"Troy Lee" <leetroy@gmail.com>,
"Jean-Christophe Dubois" <jcd@tribudubois.net>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>,
qemu-block@nongnu.org, "Jamin Lin" <jamin_lin@aspeedtech.com>
Subject: [PATCH v5 03/14] hw/sd/sdhci: Redefine SDHCI_QUIRK_NO_BUSY_IRQ bitmask as bit
Date: Mon, 10 Mar 2025 01:06:09 +0100 [thread overview]
Message-ID: <20250310000620.70120-4-philmd@linaro.org> (raw)
In-Reply-To: <20250310000620.70120-1-philmd@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
include/hw/sd/sdhci.h | 8 ++++----
hw/sd/sdhci.c | 4 ++--
2 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/include/hw/sd/sdhci.h b/include/hw/sd/sdhci.h
index 48247e9a20f..096d607f4b7 100644
--- a/include/hw/sd/sdhci.h
+++ b/include/hw/sd/sdhci.h
@@ -108,13 +108,13 @@ struct SDHCIState {
typedef struct SDHCIState SDHCIState;
/*
- * Controller does not provide transfer-complete interrupt when not
- * busy.
- *
* NOTE: This definition is taken out of Linux kernel and so the
* original bit number is preserved
*/
-#define SDHCI_QUIRK_NO_BUSY_IRQ BIT(14)
+enum {
+ /* Controller does not provide transfer-complete interrupt when not busy. */
+ SDHCI_QUIRK_NO_BUSY_IRQ = 14,
+};
#define TYPE_PCI_SDHCI "sdhci-pci"
DECLARE_INSTANCE_CHECKER(SDHCIState, PCI_SDHCI,
diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c
index 149b748cbee..1dc942a0e06 100644
--- a/hw/sd/sdhci.c
+++ b/hw/sd/sdhci.c
@@ -366,7 +366,7 @@ static void sdhci_send_command(SDHCIState *s)
}
}
- if (!(s->quirks & SDHCI_QUIRK_NO_BUSY_IRQ) &&
+ if (!(s->quirks & BIT(SDHCI_QUIRK_NO_BUSY_IRQ)) &&
(s->norintstsen & SDHC_NISEN_TRSCMP) &&
(s->cmdreg & SDHC_CMD_RESPONSE) == SDHC_CMD_RSP_WITH_BUSY) {
s->norintsts |= SDHC_NIS_TRSCMP;
@@ -1886,7 +1886,7 @@ static void imx_usdhc_init(Object *obj)
SDHCIState *s = SYSBUS_SDHCI(obj);
s->io_ops = &usdhc_mmio_ops;
- s->quirks = SDHCI_QUIRK_NO_BUSY_IRQ;
+ s->quirks = BIT(SDHCI_QUIRK_NO_BUSY_IRQ);
}
/* --- qdev Samsung s3c --- */
--
2.47.1
next prev parent reply other threads:[~2025-03-10 0:10 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-10 0:06 [PATCH v5 00/14] hw/sd/sdhci: Set reset value of interrupt registers Philippe Mathieu-Daudé
2025-03-10 0:06 ` [PATCH v5 01/14] hw/qdev-properties-system: Include missing 'qapi/qapi-types-common.h' Philippe Mathieu-Daudé
2025-03-11 10:56 ` Philippe Mathieu-Daudé
2025-03-10 0:06 ` [PATCH v5 02/14] hw/sd/sdhci: Remove need for SDHCIState::vendor field Philippe Mathieu-Daudé
2025-03-10 0:06 ` Philippe Mathieu-Daudé [this message]
2025-03-10 13:31 ` [PATCH v5 03/14] hw/sd/sdhci: Redefine SDHCI_QUIRK_NO_BUSY_IRQ bitmask as bit BALATON Zoltan
2025-03-10 0:06 ` [PATCH v5 04/14] hw/sd/sdhci: Include 'wp-inverted' property in quirk bitmask Philippe Mathieu-Daudé
2025-03-10 13:36 ` BALATON Zoltan
2025-03-10 0:06 ` [PATCH v5 05/14] hw/sd/sdhci: Include 'pending-insert-quirk' " Philippe Mathieu-Daudé
2025-03-10 13:39 ` BALATON Zoltan
2025-03-10 0:06 ` [PATCH v5 06/14] hw/sd/sdhci: Introduce SDHCIClass stub Philippe Mathieu-Daudé
2025-03-10 0:06 ` [PATCH v5 07/14] hw/sd/sdhci: Make quirks a class property Philippe Mathieu-Daudé
2025-03-10 0:06 ` [PATCH v5 08/14] hw/sd/sdhci: Make I/O region size " Philippe Mathieu-Daudé
2025-03-10 0:06 ` [PATCH v5 09/14] hw/sd/sdhci: Allow SDHCI classes to register their own MemoryRegionOps Philippe Mathieu-Daudé
2025-03-10 13:50 ` BALATON Zoltan
2025-03-10 0:06 ` [PATCH v5 10/14] hw/sd/sdhci: Allow SDHCI classes to register their own read-only regs Philippe Mathieu-Daudé
2025-03-10 0:06 ` [PATCH v5 11/14] hw/sd/sdhci: Allow SDHCI classes to have different register reset values Philippe Mathieu-Daudé
2025-03-10 0:06 ` [PATCH v5 12/14] hw/sd/sdhci: Implement Freescale eSDHC as TYPE_FSL_ESDHC Philippe Mathieu-Daudé
2025-03-10 0:06 ` [PATCH v5 13/14] hw/ppc/e500: Replace generic SDHCI by Freescale eSDHC Philippe Mathieu-Daudé
2025-03-10 0:06 ` [PATCH v5 14/14] hw/sd/sdhci: Remove unnecessary 'endianness' property Philippe Mathieu-Daudé
2025-03-10 14:09 ` BALATON Zoltan
2025-03-10 15:27 ` Philippe Mathieu-Daudé
2025-03-10 15:56 ` Guenter Roeck
2025-03-10 17:31 ` Philippe Mathieu-Daudé
2025-03-10 17:38 ` Bernhard Beschow
2025-03-10 18:24 ` Cédric Le Goater
2025-03-10 18:34 ` Philippe Mathieu-Daudé
2025-03-10 22:30 ` Guenter Roeck
2025-03-11 7:31 ` Bernhard Beschow
2025-03-11 7:59 ` Philippe Mathieu-Daudé
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