* [PATCH v2 00/42] accel/tcg, codebase: Build once patches
@ 2025-03-18 21:31 Richard Henderson
2025-03-18 21:31 ` [PATCH v2 01/42] accel/tcg: Build user-exec-stub.c once Richard Henderson
` (41 more replies)
0 siblings, 42 replies; 90+ messages in thread
From: Richard Henderson @ 2025-03-18 21:31 UTC (permalink / raw)
To: qemu-devel; +Cc: pierrick.bouvier, philmd
Based-on: 20250317183417.285700-1-pierrick.bouvier@linaro.org
("[PATCH v6 00/18] make system memory API available for common code")
v1: 20250313034524.3069690-1-richard.henderson@linaro.org
A number of bugs have been fixed from v1, and small adjustments.
Phil came up with a better version of one of my patches, and I
have replaced mine. Now based on Pierrick's v6 memory.h work.
This is all together at
https://gitlab.com/rth7680/qemu.git tcg-next
r~
Philippe Mathieu-Daudé (2):
accel/tcg: Remove unnecesary inclusion of memory-internal.h in
cputlb.c
exec: Restrict memory-internal.h to system/
Richard Henderson (40):
accel/tcg: Build user-exec-stub.c once
accel/tcg: Build plugin-gen.c once
accel/tcg: Fix cpu_ld*_code_mmu for user mode
include/exec: Use vaddr for *_mmu guest memory access routines
include/exec: Split out cpu-ldst-common.h
include/exec: Split out cpu-mmu-index.h
include/exec: Inline *_mmuidx_ra memory operations
include/exec: Inline *_data_ra memory operations
include/exec: Inline *_data memory operations
include/exec: Inline *_code memory operations
accel/tcg: Perform aligned atomic reads in translator_ld
accel/tcg: Use cpu_ld*_code_mmu in translator.c
accel/tcg: Implement translator_ld*_end
accel/tcg: Remove mmap_lock/unlock from watchpoint.c
include/exec: Split out mmap-lock.h
include/system: Move exec/memory.h to system/memory.h
include/system: Move exec/address-spaces.h to system/address-spaces.h
include/system: Move exec/ioport.h to system/ioport.h
include/system: Move exec/ram_addr.h to system/ram_addr.h
include/system: Move exec/ramblock.h to system/ramblock.h
meson: Introduce top-level libuser_ss and libsystem_ss
gdbstub: Move syscalls.c out of common_ss
accel/tcg: Use libuser_ss and libsystem_ss
semihosting: Move user-only implementation out-of-line
target/mips: Restrict semihosting tests to system mode
target/xtensa: Restrict semihosting tests to system mode
include/exec: Split out watchpoint.h
hw/core: Move unconditional files to libsystem_ss, libuser_ss
system: Move most files to libsystem_ss
plugins: Move api.c, core.c to libuser_ss, libsystem_ss
include/exec: Drop ifndef CONFIG_USER_ONLY from cpu-common.h
include/hw/core: Drop ifndef CONFIG_USER_ONLY from cpu.h
include/hw/intc: Remove ifndef CONFIG_USER_ONLY from armv7m_nvic.h
include/hw/s390x: Remove ifndef CONFIG_USER_ONLY in css.h
include/exec: Split out icount.h
include/exec: Protect icount_enabled from poisoned symbols
include/system: Remove ifndef CONFIG_USER_ONLY in qtest.h
include/qemu: Remove ifndef CONFIG_USER_ONLY from accel.h
target/riscv: Remove ifndef CONFIG_USER_ONLY from cpu_cfg.h
meson: Only allow CONFIG_USER_ONLY from certain source sets
accel/tcg/atomic_template.h | 16 +-
accel/tcg/internal-target.h | 1 +
hw/arm/strongarm.h | 2 +-
hw/display/apple-gfx.h | 2 +-
hw/display/framebuffer.h | 2 +-
hw/display/vga_int.h | 4 +-
hw/hyperv/hv-balloon-our_range_memslots.h | 2 +-
hw/intc/ioapic_internal.h | 2 +-
hw/net/i82596.h | 4 +-
hw/net/pcnet.h | 2 +-
hw/s390x/ipl.h | 2 +-
hw/tpm/tpm_ppi.h | 2 +-
hw/usb/hcd-uhci.h | 2 +-
hw/vfio/pci.h | 2 +-
hw/virtio/vhost-iova-tree.h | 2 +-
include/exec/cpu-all.h | 10 +-
include/exec/cpu-common.h | 26 -
include/exec/cpu-ldst-common.h | 122 +++++
include/exec/cpu-mmu-index.h | 39 ++
include/exec/cpu_ldst.h | 540 +++++++++++++-------
include/exec/icount.h | 76 +++
include/exec/mmap-lock.h | 33 ++
include/exec/page-protection.h | 22 -
include/exec/poison.h | 5 +
include/exec/translator.h | 50 +-
include/exec/watchpoint.h | 41 ++
include/hw/acpi/acpi.h | 2 +-
include/hw/acpi/ich9_tco.h | 2 +-
include/hw/arm/fsl-imx25.h | 2 +-
include/hw/arm/fsl-imx31.h | 2 +-
include/hw/arm/fsl-imx6.h | 2 +-
include/hw/arm/fsl-imx6ul.h | 2 +-
include/hw/arm/omap.h | 2 +-
include/hw/arm/stm32l4x5_soc.h | 2 +-
include/hw/boards.h | 2 +-
include/hw/char/parallel-isa.h | 2 +-
include/hw/char/parallel.h | 2 +-
include/hw/char/riscv_htif.h | 2 +-
include/hw/char/serial-mm.h | 2 +-
include/hw/char/serial.h | 2 +-
include/hw/core/cpu.h | 40 --
include/hw/display/macfb.h | 2 +-
include/hw/dma/i8257.h | 2 +-
include/hw/fsi/aspeed_apb2opb.h | 2 +-
include/hw/fsi/cfam.h | 2 +-
include/hw/fsi/fsi-master.h | 2 +-
include/hw/fsi/fsi.h | 2 +-
include/hw/fsi/lbus.h | 2 +-
include/hw/gpio/npcm7xx_gpio.h | 2 +-
include/hw/hw.h | 4 -
include/hw/i2c/npcm7xx_smbus.h | 2 +-
include/hw/i2c/pm_smbus.h | 2 +-
include/hw/i386/apic_internal.h | 2 +-
include/hw/i386/x86.h | 2 +-
include/hw/ide/ahci.h | 2 +-
include/hw/ide/ide-bus.h | 2 +-
include/hw/intc/armv7m_nvic.h | 14 -
include/hw/ipmi/ipmi.h | 2 +-
include/hw/isa/apm.h | 2 +-
include/hw/isa/isa.h | 4 +-
include/hw/m68k/q800.h | 2 +-
include/hw/mem/npcm7xx_mc.h | 2 +-
include/hw/mem/pc-dimm.h | 2 +-
include/hw/mips/mips.h | 2 +-
include/hw/misc/auxbus.h | 2 +-
include/hw/misc/ivshmem-flat.h | 2 +-
include/hw/misc/lasi.h | 2 +-
include/hw/misc/mac_via.h | 2 +-
include/hw/misc/npcm7xx_mft.h | 2 +-
include/hw/misc/npcm_clk.h | 2 +-
include/hw/misc/npcm_gcr.h | 2 +-
include/hw/misc/pvpanic.h | 2 +-
include/hw/net/dp8393x.h | 2 +-
include/hw/net/msf2-emac.h | 2 +-
include/hw/nubus/nubus.h | 2 +-
include/hw/nvram/mac_nvram.h | 2 +-
include/hw/nvram/npcm7xx_otp.h | 2 +-
include/hw/pci-host/fsl_imx8m_phy.h | 2 +-
include/hw/pci-host/pam.h | 2 +-
include/hw/pci-host/remote.h | 2 +-
include/hw/pci/pci.h | 2 +-
include/hw/pci/pcie_host.h | 2 +-
include/hw/pci/shpc.h | 2 +-
include/hw/ppc/mac_dbdma.h | 2 +-
include/hw/ppc/pnv_lpc.h | 2 +-
include/hw/ppc/pnv_occ.h | 2 +-
include/hw/ppc/pnv_sbe.h | 2 +-
include/hw/ppc/pnv_xscom.h | 2 +-
include/hw/ppc/ppc4xx.h | 2 +-
include/hw/ppc/vof.h | 4 +-
include/hw/ppc/xics.h | 2 +-
include/hw/register.h | 2 +-
include/hw/remote/proxy-memory-listener.h | 2 +-
include/hw/s390x/css.h | 2 -
include/hw/sh4/sh_intc.h | 2 +-
include/hw/southbridge/ich9.h | 2 +-
include/hw/sysbus.h | 2 +-
include/hw/timer/npcm7xx_timer.h | 2 +-
include/hw/tricore/triboard.h | 2 +-
include/hw/tricore/tricore.h | 2 +-
include/hw/usb.h | 2 +-
include/hw/vfio/vfio-common.h | 2 +-
include/hw/vfio/vfio-container-base.h | 2 +-
include/hw/virtio/vhost-backend.h | 2 +-
include/hw/virtio/vhost.h | 2 +-
include/hw/virtio/virtio.h | 2 +-
include/hw/xen/xen-pvh-common.h | 2 +-
include/hw/xtensa/mx_pic.h | 2 +-
include/qemu/accel.h | 10 +-
include/qemu/iova-tree.h | 2 +-
include/qemu/reserved-region.h | 2 +-
include/semihosting/semihost.h | 29 +-
include/{exec => system}/address-spaces.h | 8 +-
include/system/confidential-guest-support.h | 4 -
include/system/cpu-timers.h | 58 ---
include/system/dma.h | 4 +-
include/system/hostmem.h | 2 +-
include/{exec => system}/ioport.h | 8 +-
include/system/kvm_int.h | 2 +-
include/{exec => system}/memory.h | 8 +-
include/system/qtest.h | 2 -
include/{exec => system}/ram_addr.h | 11 +-
include/{exec => system}/ramblock.h | 9 +-
include/system/replay.h | 4 -
include/system/vhost-user-backend.h | 2 +-
include/system/xen.h | 4 -
migration/rdma.h | 2 +-
rust/wrapper.h | 4 +-
{include/exec => system}/memory-internal.h | 6 -
target/i386/hvf/vmx.h | 2 +-
target/loongarch/cpu.h | 2 +-
target/mips/cpu.h | 2 +-
target/riscv/cpu_cfg.h | 2 -
accel/hvf/hvf-accel-ops.c | 2 +-
accel/kvm/kvm-all.c | 4 +-
accel/tcg/cpu-exec.c | 3 +-
accel/tcg/cputlb.c | 41 +-
accel/tcg/icount-common.c | 2 +-
accel/tcg/monitor.c | 1 +
accel/tcg/plugin-gen.c | 13 +-
accel/tcg/tb-maint.c | 1 +
accel/tcg/tcg-accel-ops-icount.c | 2 +-
accel/tcg/tcg-accel-ops-mttcg.c | 2 +-
accel/tcg/tcg-accel-ops-rr.c | 2 +-
accel/tcg/tcg-accel-ops.c | 3 +-
accel/tcg/tcg-all.c | 2 +-
accel/tcg/translate-all.c | 5 +-
accel/tcg/translator.c | 120 +++--
accel/tcg/user-exec.c | 89 +---
accel/tcg/watchpoint.c | 3 -
backends/tpm/tpm_util.c | 2 +-
block/blkio.c | 4 +-
disas/disas-mon.c | 2 +-
hw/acpi/erst.c | 4 +-
hw/arm/aspeed_ast10x0.c | 2 +-
hw/arm/bananapi_m2u.c | 2 +-
hw/arm/collie.c | 2 +-
hw/arm/exynos4_boards.c | 2 +-
hw/arm/fsl-imx31.c | 2 +-
hw/arm/fsl-imx8mp.c | 2 +-
hw/arm/imx8mp-evk.c | 2 +-
hw/arm/integratorcp.c | 2 +-
hw/arm/kzm.c | 2 +-
hw/arm/microbit.c | 2 +-
hw/arm/mps2-tz.c | 2 +-
hw/arm/mps2.c | 2 +-
hw/arm/mps3r.c | 2 +-
hw/arm/msf2-soc.c | 2 +-
hw/arm/msf2-som.c | 2 +-
hw/arm/musca.c | 2 +-
hw/arm/omap1.c | 2 +-
hw/arm/omap_sx1.c | 2 +-
hw/arm/orangepi.c | 2 +-
hw/arm/stellaris.c | 2 +-
hw/arm/stm32f100_soc.c | 2 +-
hw/arm/stm32f205_soc.c | 2 +-
hw/arm/stm32f405_soc.c | 2 +-
hw/arm/stm32l4x5_soc.c | 2 +-
hw/avr/atmega.c | 4 +-
hw/block/fdc-isa.c | 2 +-
hw/block/fdc-sysbus.c | 2 +-
hw/char/goldfish_tty.c | 2 +-
hw/char/omap_uart.c | 2 +-
hw/char/riscv_htif.c | 2 +-
hw/core/cpu-system.c | 4 +-
hw/core/loader-fit.c | 2 +-
hw/core/loader.c | 2 +-
hw/core/null-machine.c | 2 +-
hw/core/ptimer.c | 2 +-
hw/core/sysbus.c | 2 +-
hw/display/edid-region.c | 2 +-
hw/display/virtio-gpu-udmabuf.c | 2 +-
hw/dma/rc4030.c | 2 +-
hw/hyperv/hv-balloon.c | 4 +-
hw/hyperv/hyperv.c | 4 +-
hw/i386/acpi-common.c | 2 +-
hw/i386/acpi-microvm.c | 2 +-
hw/i386/kvm/xen_evtchn.c | 2 +-
hw/i386/kvm/xen_gnttab.c | 2 +-
hw/i386/kvm/xen_overlay.c | 2 +-
hw/i386/pc_piix.c | 2 +-
hw/i386/sgx-epc.c | 2 +-
hw/i386/sgx.c | 2 +-
hw/i386/vapic.c | 2 +-
hw/ide/ahci-sysbus.c | 2 +-
hw/input/lasips2.c | 2 +-
hw/intc/loongarch_extioi.c | 2 +-
hw/intc/mips_gic.c | 2 +-
hw/intc/ompic.c | 2 +-
hw/intc/riscv_aplic.c | 2 +-
hw/intc/riscv_imsic.c | 2 +-
hw/loongarch/virt.c | 2 +-
hw/mem/memory-device.c | 2 +-
hw/microblaze/petalogix_ml605_mmu.c | 2 +-
hw/microblaze/petalogix_s3adsp1800_mmu.c | 2 +-
hw/microblaze/xlnx-zynqmp-pmu.c | 2 +-
hw/mips/mipssim.c | 2 +-
hw/misc/allwinner-h3-dramc.c | 2 +-
hw/misc/allwinner-r40-dramc.c | 2 +-
hw/misc/ivshmem-flat.c | 2 +-
hw/misc/mac_via.c | 2 +-
hw/net/i82596.c | 2 +-
hw/net/ne2000.c | 2 +-
hw/nvram/fw_cfg.c | 2 +-
hw/openrisc/openrisc_sim.c | 2 +-
hw/openrisc/virt.c | 2 +-
hw/pci-bridge/pci_bridge_dev.c | 2 +-
hw/pci-host/mv64361.c | 2 +-
hw/pci-host/remote.c | 2 +-
hw/ppc/pegasos2.c | 2 +-
hw/ppc/pnv_homer.c | 2 +-
hw/ppc/pnv_psi.c | 2 +-
hw/ppc/ppc4xx_sdram.c | 2 +-
hw/ppc/prep_systemio.c | 2 +-
hw/ppc/rs6000_mc.c | 2 +-
hw/ppc/sam460ex.c | 2 +-
hw/ppc/spapr.c | 2 +-
hw/ppc/spapr_caps.c | 2 +-
hw/ppc/spapr_ovec.c | 2 +-
hw/ppc/spapr_pci.c | 2 +-
hw/ppc/vof.c | 2 +-
hw/remote/iommu.c | 4 +-
hw/remote/machine.c | 2 +-
hw/remote/memory.c | 2 +-
hw/remote/proxy-memory-listener.c | 4 +-
hw/remote/vfio-user-obj.c | 2 +-
hw/riscv/microblaze-v-generic.c | 2 +-
hw/riscv/opentitan.c | 2 +-
hw/riscv/shakti_c.c | 2 +-
hw/s390x/css.c | 2 +-
hw/s390x/s390-pci-inst.c | 2 +-
hw/s390x/s390-skeys.c | 2 +-
hw/s390x/s390-stattrib-kvm.c | 2 +-
hw/s390x/s390-stattrib.c | 2 +-
hw/s390x/s390-virtio-ccw.c | 2 +-
hw/s390x/virtio-ccw.c | 2 +-
hw/sparc/sun4m_iommu.c | 2 +-
hw/sparc64/sun4u_iommu.c | 2 +-
hw/timer/hpet.c | 2 +-
hw/timer/sh_timer.c | 2 +-
hw/tpm/tpm_crb.c | 2 +-
hw/vfio/ap.c | 2 +-
hw/vfio/ccw.c | 2 +-
hw/vfio/common.c | 7 +-
hw/vfio/container.c | 6 +-
hw/vfio/platform.c | 4 +-
hw/vfio/spapr.c | 4 +-
hw/virtio/vhost-user.c | 2 +-
hw/virtio/vhost-vdpa.c | 2 +-
hw/virtio/virtio-balloon.c | 2 +-
hw/virtio/virtio-bus.c | 2 +-
hw/virtio/virtio-mem.c | 2 +-
hw/xtensa/sim.c | 2 +-
hw/xtensa/virt.c | 2 +-
hw/xtensa/xtensa_memory.c | 2 +-
hw/xtensa/xtfpga.c | 2 +-
linux-user/arm/cpu_loop.c | 1 +
linux-user/elfload.c | 1 +
linux-user/flatload.c | 1 +
linux-user/mmap.c | 1 +
linux-user/syscall.c | 1 +
migration/dirtyrate.c | 4 +-
migration/file.c | 2 +-
migration/multifd-nocomp.c | 2 +-
migration/multifd-qatzip.c | 2 +-
migration/multifd-qpl.c | 2 +-
migration/multifd-uadk.c | 2 +-
migration/multifd-zero-page.c | 2 +-
migration/multifd-zlib.c | 2 +-
migration/multifd-zstd.c | 2 +-
migration/multifd.c | 2 +-
migration/postcopy-ram.c | 2 +-
migration/ram.c | 2 +-
migration/rdma.c | 2 +-
migration/savevm.c | 2 +-
monitor/hmp-cmds-target.c | 4 +-
monitor/hmp-cmds.c | 4 +-
replay/replay.c | 2 +-
semihosting/uaccess.c | 1 +
semihosting/user.c | 15 +
stubs/icount.c | 2 +-
stubs/ram-block.c | 2 +-
system/cpu-timers.c | 1 +
system/dirtylimit.c | 2 +-
system/dma-helpers.c | 2 +-
system/ioport.c | 6 +-
system/memory.c | 10 +-
system/memory_mapping.c | 4 +-
system/physmem.c | 9 +-
system/qtest.c | 4 +-
system/vl.c | 1 +
system/watchpoint.c | 1 +
target/arm/debug_helper.c | 1 +
target/arm/gdbstub64.c | 3 +
target/arm/helper.c | 2 +
target/arm/hvf/hvf.c | 2 +-
target/arm/kvm.c | 2 +-
target/arm/tcg/mte_helper.c | 2 +-
target/avr/helper.c | 2 +-
target/hppa/mem_helper.c | 1 +
target/i386/cpu-apic.c | 2 +-
target/i386/cpu.c | 3 +-
target/i386/kvm/xen-emu.c | 2 +-
target/i386/machine.c | 2 +-
target/i386/nvmm/nvmm-all.c | 4 +-
target/i386/sev.c | 2 +-
target/i386/tcg/system/bpt_helper.c | 1 +
target/i386/tcg/system/misc_helper.c | 2 +-
target/i386/tcg/system/tcg-cpu.c | 2 +-
target/i386/tcg/translate.c | 1 +
target/i386/whpx/whpx-all.c | 4 +-
target/loongarch/cpu_helper.c | 1 +
target/loongarch/kvm/kvm.c | 2 +-
target/microblaze/helper.c | 1 +
target/microblaze/mmu.c | 1 +
target/mips/cpu.c | 7 +-
target/openrisc/translate.c | 1 +
target/ppc/cpu.c | 1 +
target/ppc/cpu_init.c | 2 +-
target/ppc/kvm.c | 2 +-
target/riscv/cpu_helper.c | 2 +-
target/riscv/csr.c | 2 +-
target/riscv/debug.c | 2 +
target/riscv/kvm/kvm-cpu.c | 2 +-
target/riscv/machine.c | 2 +-
target/riscv/pmu.c | 2 +-
target/s390x/helper.c | 1 +
target/s390x/kvm/kvm.c | 2 +-
target/s390x/mmu_helper.c | 2 +-
target/s390x/sigp.c | 2 +-
target/s390x/tcg/excp_helper.c | 3 +-
target/sparc/cpu.c | 1 +
target/sparc/mmu_helper.c | 1 +
target/tricore/helper.c | 1 +
target/xtensa/cpu.c | 2 +-
target/xtensa/dbg_helper.c | 3 +-
target/xtensa/mmu_helper.c | 1 +
target/xtensa/translate.c | 24 +-
tests/qtest/fuzz/generic_fuzz.c | 4 +-
tests/qtest/fuzz/qos_fuzz.c | 2 +-
tests/qtest/fuzz/qtest_wrappers.c | 2 +-
tests/unit/test-resv-mem.c | 2 +-
ui/console.c | 2 +-
util/async.c | 2 +-
util/main-loop.c | 1 +
util/qemu-timer.c | 1 +
util/vfio-helpers.c | 2 +-
MAINTAINERS | 10 +-
accel/tcg/ldst_common.c.inc | 335 +-----------
accel/tcg/meson.build | 25 +-
docs/devel/memory.rst | 2 +-
gdbstub/meson.build | 36 +-
hw/core/meson.build | 4 +-
hw/display/apple-gfx.m | 2 +-
meson.build | 24 +
plugins/meson.build | 5 +-
scripts/analyze-inclusions | 2 +-
semihosting/meson.build | 2 +
system/meson.build | 7 +-
tcg/meson.build | 23 +-
380 files changed, 1340 insertions(+), 1369 deletions(-)
create mode 100644 include/exec/cpu-ldst-common.h
create mode 100644 include/exec/cpu-mmu-index.h
create mode 100644 include/exec/icount.h
create mode 100644 include/exec/mmap-lock.h
create mode 100644 include/exec/watchpoint.h
rename include/{exec => system}/address-spaces.h (89%)
rename include/{exec => system}/ioport.h (96%)
rename include/{exec => system}/memory.h (99%)
rename include/{exec => system}/ram_addr.h (99%)
rename include/{exec => system}/ramblock.h (96%)
rename {include/exec => system}/memory-internal.h (88%)
create mode 100644 semihosting/user.c
--
2.43.0
^ permalink raw reply [flat|nested] 90+ messages in thread
* [PATCH v2 01/42] accel/tcg: Build user-exec-stub.c once
2025-03-18 21:31 [PATCH v2 00/42] accel/tcg, codebase: Build once patches Richard Henderson
@ 2025-03-18 21:31 ` Richard Henderson
2025-03-18 21:31 ` [PATCH v2 02/42] accel/tcg: Build plugin-gen.c once Richard Henderson
` (40 subsequent siblings)
41 siblings, 0 replies; 90+ messages in thread
From: Richard Henderson @ 2025-03-18 21:31 UTC (permalink / raw)
To: qemu-devel; +Cc: pierrick.bouvier, philmd, Alex Bennée
CONFIG_USER_ONLY == !CONFIG_SYSTEM_ONLY.
Therefore it's cleaner to just add to user_ss.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
accel/tcg/meson.build | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/accel/tcg/meson.build b/accel/tcg/meson.build
index 38ff227eb0..14bf797fda 100644
--- a/accel/tcg/meson.build
+++ b/accel/tcg/meson.build
@@ -12,7 +12,6 @@ tcg_specific_ss.add(files(
'translator.c',
))
tcg_specific_ss.add(when: 'CONFIG_USER_ONLY', if_true: files('user-exec.c'))
-tcg_specific_ss.add(when: 'CONFIG_SYSTEM_ONLY', if_false: files('user-exec-stub.c'))
if get_option('plugins')
tcg_specific_ss.add(files('plugin-gen.c'))
endif
@@ -22,6 +21,10 @@ specific_ss.add(when: ['CONFIG_SYSTEM_ONLY', 'CONFIG_TCG'], if_true: files(
'cputlb.c',
))
+user_ss.add(when: ['CONFIG_TCG'], if_true: files(
+ 'user-exec-stub.c',
+))
+
system_ss.add(when: ['CONFIG_TCG'], if_true: files(
'icount-common.c',
'monitor.c',
--
2.43.0
^ permalink raw reply related [flat|nested] 90+ messages in thread
* [PATCH v2 02/42] accel/tcg: Build plugin-gen.c once
2025-03-18 21:31 [PATCH v2 00/42] accel/tcg, codebase: Build once patches Richard Henderson
2025-03-18 21:31 ` [PATCH v2 01/42] accel/tcg: Build user-exec-stub.c once Richard Henderson
@ 2025-03-18 21:31 ` Richard Henderson
2025-03-18 21:31 ` [PATCH v2 03/42] accel/tcg: Fix cpu_ld*_code_mmu for user mode Richard Henderson
` (39 subsequent siblings)
41 siblings, 0 replies; 90+ messages in thread
From: Richard Henderson @ 2025-03-18 21:31 UTC (permalink / raw)
To: qemu-devel; +Cc: pierrick.bouvier, philmd, Alex Bennée
We assert that env immediately follows CPUState in cpu-all.h.
Change the offsetof expressions to be based on CPUState instead
of ArchCPU.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
accel/tcg/plugin-gen.c | 13 +++++--------
accel/tcg/meson.build | 7 ++++---
2 files changed, 9 insertions(+), 11 deletions(-)
diff --git a/accel/tcg/plugin-gen.c b/accel/tcg/plugin-gen.c
index 7e5f040bf7..c1da753894 100644
--- a/accel/tcg/plugin-gen.c
+++ b/accel/tcg/plugin-gen.c
@@ -22,13 +22,12 @@
#include "qemu/osdep.h"
#include "qemu/plugin.h"
#include "qemu/log.h"
-#include "cpu.h"
#include "tcg/tcg.h"
#include "tcg/tcg-temp-internal.h"
-#include "tcg/tcg-op.h"
-#include "exec/exec-all.h"
+#include "tcg/tcg-op-common.h"
#include "exec/plugin-gen.h"
#include "exec/translator.h"
+#include "exec/translation-block.h"
enum plugin_gen_from {
PLUGIN_GEN_FROM_TB,
@@ -89,15 +88,13 @@ static void gen_enable_mem_helper(struct qemu_plugin_tb *ptb,
qemu_plugin_add_dyn_cb_arr(arr);
tcg_gen_st_ptr(tcg_constant_ptr((intptr_t)arr), tcg_env,
- offsetof(CPUState, neg.plugin_mem_cbs) -
- offsetof(ArchCPU, env));
+ offsetof(CPUState, neg.plugin_mem_cbs) - sizeof(CPUState));
}
static void gen_disable_mem_helper(void)
{
tcg_gen_st_ptr(tcg_constant_ptr(0), tcg_env,
- offsetof(CPUState, neg.plugin_mem_cbs) -
- offsetof(ArchCPU, env));
+ offsetof(CPUState, neg.plugin_mem_cbs) - sizeof(CPUState));
}
static TCGv_i32 gen_cpu_index(void)
@@ -113,7 +110,7 @@ static TCGv_i32 gen_cpu_index(void)
}
TCGv_i32 cpu_index = tcg_temp_ebb_new_i32();
tcg_gen_ld_i32(cpu_index, tcg_env,
- -offsetof(ArchCPU, env) + offsetof(CPUState, cpu_index));
+ offsetof(CPUState, cpu_index) - sizeof(CPUState));
return cpu_index;
}
diff --git a/accel/tcg/meson.build b/accel/tcg/meson.build
index 14bf797fda..185830d0f5 100644
--- a/accel/tcg/meson.build
+++ b/accel/tcg/meson.build
@@ -3,6 +3,10 @@ common_ss.add(when: 'CONFIG_TCG', if_true: files(
'tcg-runtime.c',
'tcg-runtime-gvec.c',
))
+if get_option('plugins')
+ common_ss.add(when: 'CONFIG_TCG', if_true: files('plugin-gen.c'))
+endif
+
tcg_specific_ss = ss.source_set()
tcg_specific_ss.add(files(
'tcg-all.c',
@@ -12,9 +16,6 @@ tcg_specific_ss.add(files(
'translator.c',
))
tcg_specific_ss.add(when: 'CONFIG_USER_ONLY', if_true: files('user-exec.c'))
-if get_option('plugins')
- tcg_specific_ss.add(files('plugin-gen.c'))
-endif
specific_ss.add_all(when: 'CONFIG_TCG', if_true: tcg_specific_ss)
specific_ss.add(when: ['CONFIG_SYSTEM_ONLY', 'CONFIG_TCG'], if_true: files(
--
2.43.0
^ permalink raw reply related [flat|nested] 90+ messages in thread
* [PATCH v2 03/42] accel/tcg: Fix cpu_ld*_code_mmu for user mode
2025-03-18 21:31 [PATCH v2 00/42] accel/tcg, codebase: Build once patches Richard Henderson
2025-03-18 21:31 ` [PATCH v2 01/42] accel/tcg: Build user-exec-stub.c once Richard Henderson
2025-03-18 21:31 ` [PATCH v2 02/42] accel/tcg: Build plugin-gen.c once Richard Henderson
@ 2025-03-18 21:31 ` Richard Henderson
2025-03-18 23:52 ` Pierrick Bouvier
2025-03-19 1:09 ` Pierrick Bouvier
2025-03-18 21:31 ` [PATCH v2 04/42] include/exec: Use vaddr for *_mmu guest memory access routines Richard Henderson
` (38 subsequent siblings)
41 siblings, 2 replies; 90+ messages in thread
From: Richard Henderson @ 2025-03-18 21:31 UTC (permalink / raw)
To: qemu-devel; +Cc: pierrick.bouvier, philmd
These routines are buggy in multiple ways:
- Use of target-endian loads, then a bswap that
depends on the host endiannness.
- A non-unwinding code load must set_helper_retaddr 1,
which is magic within adjust_signal_pc.
- cpu_ldq_code_mmu used MMU_DATA_LOAD
The bugs are hidden because all current uses of cpu_ld*_code_mmu
are from system mode.
Fixes: 2899062614a ("accel/tcg: Add cpu_ld*_code_mmu")
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
accel/tcg/user-exec.c | 41 ++++-------------------------------------
1 file changed, 4 insertions(+), 37 deletions(-)
diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c
index 2322181b15..629a1c9ce6 100644
--- a/accel/tcg/user-exec.c
+++ b/accel/tcg/user-exec.c
@@ -1257,58 +1257,25 @@ uint64_t cpu_ldq_code(CPUArchState *env, abi_ptr ptr)
uint8_t cpu_ldb_code_mmu(CPUArchState *env, abi_ptr addr,
MemOpIdx oi, uintptr_t ra)
{
- void *haddr;
- uint8_t ret;
-
- haddr = cpu_mmu_lookup(env_cpu(env), addr, oi, ra, MMU_INST_FETCH);
- ret = ldub_p(haddr);
- clear_helper_retaddr();
- return ret;
+ return do_ld1_mmu(env_cpu(env), addr, oi, ra ? ra : 1, MMU_INST_FETCH);
}
uint16_t cpu_ldw_code_mmu(CPUArchState *env, abi_ptr addr,
MemOpIdx oi, uintptr_t ra)
{
- void *haddr;
- uint16_t ret;
-
- haddr = cpu_mmu_lookup(env_cpu(env), addr, oi, ra, MMU_INST_FETCH);
- ret = lduw_p(haddr);
- clear_helper_retaddr();
- if (get_memop(oi) & MO_BSWAP) {
- ret = bswap16(ret);
- }
- return ret;
+ return do_ld2_mmu(env_cpu(env), addr, oi, ra ? ra : 1, MMU_INST_FETCH);
}
uint32_t cpu_ldl_code_mmu(CPUArchState *env, abi_ptr addr,
MemOpIdx oi, uintptr_t ra)
{
- void *haddr;
- uint32_t ret;
-
- haddr = cpu_mmu_lookup(env_cpu(env), addr, oi, ra, MMU_INST_FETCH);
- ret = ldl_p(haddr);
- clear_helper_retaddr();
- if (get_memop(oi) & MO_BSWAP) {
- ret = bswap32(ret);
- }
- return ret;
+ return do_ld4_mmu(env_cpu(env), addr, oi, ra ? ra : 1, MMU_INST_FETCH);
}
uint64_t cpu_ldq_code_mmu(CPUArchState *env, abi_ptr addr,
MemOpIdx oi, uintptr_t ra)
{
- void *haddr;
- uint64_t ret;
-
- haddr = cpu_mmu_lookup(env_cpu(env), addr, oi, ra, MMU_DATA_LOAD);
- ret = ldq_p(haddr);
- clear_helper_retaddr();
- if (get_memop(oi) & MO_BSWAP) {
- ret = bswap64(ret);
- }
- return ret;
+ return do_ld8_mmu(env_cpu(env), addr, oi, ra ? ra : 1, MMU_INST_FETCH);
}
#include "ldst_common.c.inc"
--
2.43.0
^ permalink raw reply related [flat|nested] 90+ messages in thread
* [PATCH v2 04/42] include/exec: Use vaddr for *_mmu guest memory access routines
2025-03-18 21:31 [PATCH v2 00/42] accel/tcg, codebase: Build once patches Richard Henderson
` (2 preceding siblings ...)
2025-03-18 21:31 ` [PATCH v2 03/42] accel/tcg: Fix cpu_ld*_code_mmu for user mode Richard Henderson
@ 2025-03-18 21:31 ` Richard Henderson
2025-03-18 21:31 ` [PATCH v2 05/42] include/exec: Split out cpu-ldst-common.h Richard Henderson
` (37 subsequent siblings)
41 siblings, 0 replies; 90+ messages in thread
From: Richard Henderson @ 2025-03-18 21:31 UTC (permalink / raw)
To: qemu-devel; +Cc: pierrick.bouvier, philmd
Use vaddr only for the newest api, because it has the least
number of uses and therefore is the easiest to audit.
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
accel/tcg/atomic_template.h | 16 ++++++-------
include/exec/cpu_ldst.h | 48 ++++++++++++++++++-------------------
accel/tcg/cputlb.c | 8 +++----
accel/tcg/user-exec.c | 8 +++----
accel/tcg/ldst_common.c.inc | 20 ++++++++--------
5 files changed, 50 insertions(+), 50 deletions(-)
diff --git a/accel/tcg/atomic_template.h b/accel/tcg/atomic_template.h
index 89593b2502..08a475c10c 100644
--- a/accel/tcg/atomic_template.h
+++ b/accel/tcg/atomic_template.h
@@ -77,7 +77,7 @@
# define END _le
#endif
-ABI_TYPE ATOMIC_NAME(cmpxchg)(CPUArchState *env, abi_ptr addr,
+ABI_TYPE ATOMIC_NAME(cmpxchg)(CPUArchState *env, vaddr addr,
ABI_TYPE cmpv, ABI_TYPE newv,
MemOpIdx oi, uintptr_t retaddr)
{
@@ -101,7 +101,7 @@ ABI_TYPE ATOMIC_NAME(cmpxchg)(CPUArchState *env, abi_ptr addr,
}
#if DATA_SIZE < 16
-ABI_TYPE ATOMIC_NAME(xchg)(CPUArchState *env, abi_ptr addr, ABI_TYPE val,
+ABI_TYPE ATOMIC_NAME(xchg)(CPUArchState *env, vaddr addr, ABI_TYPE val,
MemOpIdx oi, uintptr_t retaddr)
{
DATA_TYPE *haddr = atomic_mmu_lookup(env_cpu(env), addr, oi,
@@ -120,7 +120,7 @@ ABI_TYPE ATOMIC_NAME(xchg)(CPUArchState *env, abi_ptr addr, ABI_TYPE val,
}
#define GEN_ATOMIC_HELPER(X) \
-ABI_TYPE ATOMIC_NAME(X)(CPUArchState *env, abi_ptr addr, \
+ABI_TYPE ATOMIC_NAME(X)(CPUArchState *env, vaddr addr, \
ABI_TYPE val, MemOpIdx oi, uintptr_t retaddr) \
{ \
DATA_TYPE *haddr, ret; \
@@ -156,7 +156,7 @@ GEN_ATOMIC_HELPER(xor_fetch)
* of CF_PARALLEL's value, we'll trace just a read and a write.
*/
#define GEN_ATOMIC_HELPER_FN(X, FN, XDATA_TYPE, RET) \
-ABI_TYPE ATOMIC_NAME(X)(CPUArchState *env, abi_ptr addr, \
+ABI_TYPE ATOMIC_NAME(X)(CPUArchState *env, vaddr addr, \
ABI_TYPE xval, MemOpIdx oi, uintptr_t retaddr) \
{ \
XDATA_TYPE *haddr, cmp, old, new, val = xval; \
@@ -202,7 +202,7 @@ GEN_ATOMIC_HELPER_FN(umax_fetch, MAX, DATA_TYPE, new)
# define END _be
#endif
-ABI_TYPE ATOMIC_NAME(cmpxchg)(CPUArchState *env, abi_ptr addr,
+ABI_TYPE ATOMIC_NAME(cmpxchg)(CPUArchState *env, vaddr addr,
ABI_TYPE cmpv, ABI_TYPE newv,
MemOpIdx oi, uintptr_t retaddr)
{
@@ -226,7 +226,7 @@ ABI_TYPE ATOMIC_NAME(cmpxchg)(CPUArchState *env, abi_ptr addr,
}
#if DATA_SIZE < 16
-ABI_TYPE ATOMIC_NAME(xchg)(CPUArchState *env, abi_ptr addr, ABI_TYPE val,
+ABI_TYPE ATOMIC_NAME(xchg)(CPUArchState *env, vaddr addr, ABI_TYPE val,
MemOpIdx oi, uintptr_t retaddr)
{
DATA_TYPE *haddr = atomic_mmu_lookup(env_cpu(env), addr, oi,
@@ -245,7 +245,7 @@ ABI_TYPE ATOMIC_NAME(xchg)(CPUArchState *env, abi_ptr addr, ABI_TYPE val,
}
#define GEN_ATOMIC_HELPER(X) \
-ABI_TYPE ATOMIC_NAME(X)(CPUArchState *env, abi_ptr addr, \
+ABI_TYPE ATOMIC_NAME(X)(CPUArchState *env, vaddr addr, \
ABI_TYPE val, MemOpIdx oi, uintptr_t retaddr) \
{ \
DATA_TYPE *haddr, ret; \
@@ -278,7 +278,7 @@ GEN_ATOMIC_HELPER(xor_fetch)
* of CF_PARALLEL's value, we'll trace just a read and a write.
*/
#define GEN_ATOMIC_HELPER_FN(X, FN, XDATA_TYPE, RET) \
-ABI_TYPE ATOMIC_NAME(X)(CPUArchState *env, abi_ptr addr, \
+ABI_TYPE ATOMIC_NAME(X)(CPUArchState *env, vaddr addr, \
ABI_TYPE xval, MemOpIdx oi, uintptr_t retaddr) \
{ \
XDATA_TYPE *haddr, ldo, ldn, old, new, val = xval; \
diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h
index 769e9fc440..ddd8e0cf48 100644
--- a/include/exec/cpu_ldst.h
+++ b/include/exec/cpu_ldst.h
@@ -157,48 +157,48 @@ void cpu_stl_le_mmuidx_ra(CPUArchState *env, abi_ptr ptr, uint32_t val,
void cpu_stq_le_mmuidx_ra(CPUArchState *env, abi_ptr ptr, uint64_t val,
int mmu_idx, uintptr_t ra);
-uint8_t cpu_ldb_mmu(CPUArchState *env, abi_ptr ptr, MemOpIdx oi, uintptr_t ra);
-uint16_t cpu_ldw_mmu(CPUArchState *env, abi_ptr ptr, MemOpIdx oi, uintptr_t ra);
-uint32_t cpu_ldl_mmu(CPUArchState *env, abi_ptr ptr, MemOpIdx oi, uintptr_t ra);
-uint64_t cpu_ldq_mmu(CPUArchState *env, abi_ptr ptr, MemOpIdx oi, uintptr_t ra);
-Int128 cpu_ld16_mmu(CPUArchState *env, abi_ptr addr, MemOpIdx oi, uintptr_t ra);
+uint8_t cpu_ldb_mmu(CPUArchState *env, vaddr ptr, MemOpIdx oi, uintptr_t ra);
+uint16_t cpu_ldw_mmu(CPUArchState *env, vaddr ptr, MemOpIdx oi, uintptr_t ra);
+uint32_t cpu_ldl_mmu(CPUArchState *env, vaddr ptr, MemOpIdx oi, uintptr_t ra);
+uint64_t cpu_ldq_mmu(CPUArchState *env, vaddr ptr, MemOpIdx oi, uintptr_t ra);
+Int128 cpu_ld16_mmu(CPUArchState *env, vaddr addr, MemOpIdx oi, uintptr_t ra);
-void cpu_stb_mmu(CPUArchState *env, abi_ptr ptr, uint8_t val,
+void cpu_stb_mmu(CPUArchState *env, vaddr ptr, uint8_t val,
MemOpIdx oi, uintptr_t ra);
-void cpu_stw_mmu(CPUArchState *env, abi_ptr ptr, uint16_t val,
+void cpu_stw_mmu(CPUArchState *env, vaddr ptr, uint16_t val,
MemOpIdx oi, uintptr_t ra);
-void cpu_stl_mmu(CPUArchState *env, abi_ptr ptr, uint32_t val,
+void cpu_stl_mmu(CPUArchState *env, vaddr ptr, uint32_t val,
MemOpIdx oi, uintptr_t ra);
-void cpu_stq_mmu(CPUArchState *env, abi_ptr ptr, uint64_t val,
+void cpu_stq_mmu(CPUArchState *env, vaddr ptr, uint64_t val,
MemOpIdx oi, uintptr_t ra);
-void cpu_st16_mmu(CPUArchState *env, abi_ptr addr, Int128 val,
+void cpu_st16_mmu(CPUArchState *env, vaddr addr, Int128 val,
MemOpIdx oi, uintptr_t ra);
-uint32_t cpu_atomic_cmpxchgb_mmu(CPUArchState *env, abi_ptr addr,
+uint32_t cpu_atomic_cmpxchgb_mmu(CPUArchState *env, vaddr addr,
uint32_t cmpv, uint32_t newv,
MemOpIdx oi, uintptr_t retaddr);
-uint32_t cpu_atomic_cmpxchgw_le_mmu(CPUArchState *env, abi_ptr addr,
+uint32_t cpu_atomic_cmpxchgw_le_mmu(CPUArchState *env, vaddr addr,
uint32_t cmpv, uint32_t newv,
MemOpIdx oi, uintptr_t retaddr);
-uint32_t cpu_atomic_cmpxchgl_le_mmu(CPUArchState *env, abi_ptr addr,
+uint32_t cpu_atomic_cmpxchgl_le_mmu(CPUArchState *env, vaddr addr,
uint32_t cmpv, uint32_t newv,
MemOpIdx oi, uintptr_t retaddr);
-uint64_t cpu_atomic_cmpxchgq_le_mmu(CPUArchState *env, abi_ptr addr,
+uint64_t cpu_atomic_cmpxchgq_le_mmu(CPUArchState *env, vaddr addr,
uint64_t cmpv, uint64_t newv,
MemOpIdx oi, uintptr_t retaddr);
-uint32_t cpu_atomic_cmpxchgw_be_mmu(CPUArchState *env, abi_ptr addr,
+uint32_t cpu_atomic_cmpxchgw_be_mmu(CPUArchState *env, vaddr addr,
uint32_t cmpv, uint32_t newv,
MemOpIdx oi, uintptr_t retaddr);
-uint32_t cpu_atomic_cmpxchgl_be_mmu(CPUArchState *env, abi_ptr addr,
+uint32_t cpu_atomic_cmpxchgl_be_mmu(CPUArchState *env, vaddr addr,
uint32_t cmpv, uint32_t newv,
MemOpIdx oi, uintptr_t retaddr);
-uint64_t cpu_atomic_cmpxchgq_be_mmu(CPUArchState *env, abi_ptr addr,
+uint64_t cpu_atomic_cmpxchgq_be_mmu(CPUArchState *env, vaddr addr,
uint64_t cmpv, uint64_t newv,
MemOpIdx oi, uintptr_t retaddr);
#define GEN_ATOMIC_HELPER(NAME, TYPE, SUFFIX) \
TYPE cpu_atomic_ ## NAME ## SUFFIX ## _mmu \
- (CPUArchState *env, abi_ptr addr, TYPE val, \
+ (CPUArchState *env, vaddr addr, TYPE val, \
MemOpIdx oi, uintptr_t retaddr);
#ifdef CONFIG_ATOMIC64
@@ -244,10 +244,10 @@ GEN_ATOMIC_HELPER_ALL(xchg)
#undef GEN_ATOMIC_HELPER_ALL
#undef GEN_ATOMIC_HELPER
-Int128 cpu_atomic_cmpxchgo_le_mmu(CPUArchState *env, abi_ptr addr,
+Int128 cpu_atomic_cmpxchgo_le_mmu(CPUArchState *env, vaddr addr,
Int128 cmpv, Int128 newv,
MemOpIdx oi, uintptr_t retaddr);
-Int128 cpu_atomic_cmpxchgo_be_mmu(CPUArchState *env, abi_ptr addr,
+Int128 cpu_atomic_cmpxchgo_be_mmu(CPUArchState *env, vaddr addr,
Int128 cmpv, Int128 newv,
MemOpIdx oi, uintptr_t retaddr);
@@ -297,13 +297,13 @@ Int128 cpu_atomic_cmpxchgo_be_mmu(CPUArchState *env, abi_ptr addr,
# define cpu_stq_mmuidx_ra cpu_stq_le_mmuidx_ra
#endif
-uint8_t cpu_ldb_code_mmu(CPUArchState *env, abi_ptr addr,
+uint8_t cpu_ldb_code_mmu(CPUArchState *env, vaddr addr,
MemOpIdx oi, uintptr_t ra);
-uint16_t cpu_ldw_code_mmu(CPUArchState *env, abi_ptr addr,
+uint16_t cpu_ldw_code_mmu(CPUArchState *env, vaddr addr,
MemOpIdx oi, uintptr_t ra);
-uint32_t cpu_ldl_code_mmu(CPUArchState *env, abi_ptr addr,
+uint32_t cpu_ldl_code_mmu(CPUArchState *env, vaddr addr,
MemOpIdx oi, uintptr_t ra);
-uint64_t cpu_ldq_code_mmu(CPUArchState *env, abi_ptr addr,
+uint64_t cpu_ldq_code_mmu(CPUArchState *env, vaddr addr,
MemOpIdx oi, uintptr_t ra);
uint32_t cpu_ldub_code(CPUArchState *env, abi_ptr addr);
diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c
index fb22048876..b03998f926 100644
--- a/accel/tcg/cputlb.c
+++ b/accel/tcg/cputlb.c
@@ -2925,25 +2925,25 @@ uint64_t cpu_ldq_code(CPUArchState *env, abi_ptr addr)
return do_ld8_mmu(cs, addr, oi, 0, MMU_INST_FETCH);
}
-uint8_t cpu_ldb_code_mmu(CPUArchState *env, abi_ptr addr,
+uint8_t cpu_ldb_code_mmu(CPUArchState *env, vaddr addr,
MemOpIdx oi, uintptr_t retaddr)
{
return do_ld1_mmu(env_cpu(env), addr, oi, retaddr, MMU_INST_FETCH);
}
-uint16_t cpu_ldw_code_mmu(CPUArchState *env, abi_ptr addr,
+uint16_t cpu_ldw_code_mmu(CPUArchState *env, vaddr addr,
MemOpIdx oi, uintptr_t retaddr)
{
return do_ld2_mmu(env_cpu(env), addr, oi, retaddr, MMU_INST_FETCH);
}
-uint32_t cpu_ldl_code_mmu(CPUArchState *env, abi_ptr addr,
+uint32_t cpu_ldl_code_mmu(CPUArchState *env, vaddr addr,
MemOpIdx oi, uintptr_t retaddr)
{
return do_ld4_mmu(env_cpu(env), addr, oi, retaddr, MMU_INST_FETCH);
}
-uint64_t cpu_ldq_code_mmu(CPUArchState *env, abi_ptr addr,
+uint64_t cpu_ldq_code_mmu(CPUArchState *env, vaddr addr,
MemOpIdx oi, uintptr_t retaddr)
{
return do_ld8_mmu(env_cpu(env), addr, oi, retaddr, MMU_INST_FETCH);
diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c
index 629a1c9ce6..dec17435c5 100644
--- a/accel/tcg/user-exec.c
+++ b/accel/tcg/user-exec.c
@@ -1254,25 +1254,25 @@ uint64_t cpu_ldq_code(CPUArchState *env, abi_ptr ptr)
return ret;
}
-uint8_t cpu_ldb_code_mmu(CPUArchState *env, abi_ptr addr,
+uint8_t cpu_ldb_code_mmu(CPUArchState *env, vaddr addr,
MemOpIdx oi, uintptr_t ra)
{
return do_ld1_mmu(env_cpu(env), addr, oi, ra ? ra : 1, MMU_INST_FETCH);
}
-uint16_t cpu_ldw_code_mmu(CPUArchState *env, abi_ptr addr,
+uint16_t cpu_ldw_code_mmu(CPUArchState *env, vaddr addr,
MemOpIdx oi, uintptr_t ra)
{
return do_ld2_mmu(env_cpu(env), addr, oi, ra ? ra : 1, MMU_INST_FETCH);
}
-uint32_t cpu_ldl_code_mmu(CPUArchState *env, abi_ptr addr,
+uint32_t cpu_ldl_code_mmu(CPUArchState *env, vaddr addr,
MemOpIdx oi, uintptr_t ra)
{
return do_ld4_mmu(env_cpu(env), addr, oi, ra ? ra : 1, MMU_INST_FETCH);
}
-uint64_t cpu_ldq_code_mmu(CPUArchState *env, abi_ptr addr,
+uint64_t cpu_ldq_code_mmu(CPUArchState *env, vaddr addr,
MemOpIdx oi, uintptr_t ra)
{
return do_ld8_mmu(env_cpu(env), addr, oi, ra ? ra : 1, MMU_INST_FETCH);
diff --git a/accel/tcg/ldst_common.c.inc b/accel/tcg/ldst_common.c.inc
index ebbf380d76..0447c0bb92 100644
--- a/accel/tcg/ldst_common.c.inc
+++ b/accel/tcg/ldst_common.c.inc
@@ -135,7 +135,7 @@ static void plugin_load_cb(CPUArchState *env, abi_ptr addr,
}
}
-uint8_t cpu_ldb_mmu(CPUArchState *env, abi_ptr addr, MemOpIdx oi, uintptr_t ra)
+uint8_t cpu_ldb_mmu(CPUArchState *env, vaddr addr, MemOpIdx oi, uintptr_t ra)
{
uint8_t ret;
@@ -145,7 +145,7 @@ uint8_t cpu_ldb_mmu(CPUArchState *env, abi_ptr addr, MemOpIdx oi, uintptr_t ra)
return ret;
}
-uint16_t cpu_ldw_mmu(CPUArchState *env, abi_ptr addr,
+uint16_t cpu_ldw_mmu(CPUArchState *env, vaddr addr,
MemOpIdx oi, uintptr_t ra)
{
uint16_t ret;
@@ -156,7 +156,7 @@ uint16_t cpu_ldw_mmu(CPUArchState *env, abi_ptr addr,
return ret;
}
-uint32_t cpu_ldl_mmu(CPUArchState *env, abi_ptr addr,
+uint32_t cpu_ldl_mmu(CPUArchState *env, vaddr addr,
MemOpIdx oi, uintptr_t ra)
{
uint32_t ret;
@@ -167,7 +167,7 @@ uint32_t cpu_ldl_mmu(CPUArchState *env, abi_ptr addr,
return ret;
}
-uint64_t cpu_ldq_mmu(CPUArchState *env, abi_ptr addr,
+uint64_t cpu_ldq_mmu(CPUArchState *env, vaddr addr,
MemOpIdx oi, uintptr_t ra)
{
uint64_t ret;
@@ -178,7 +178,7 @@ uint64_t cpu_ldq_mmu(CPUArchState *env, abi_ptr addr,
return ret;
}
-Int128 cpu_ld16_mmu(CPUArchState *env, abi_ptr addr,
+Int128 cpu_ld16_mmu(CPUArchState *env, vaddr addr,
MemOpIdx oi, uintptr_t ra)
{
Int128 ret;
@@ -205,14 +205,14 @@ static void plugin_store_cb(CPUArchState *env, abi_ptr addr,
}
}
-void cpu_stb_mmu(CPUArchState *env, abi_ptr addr, uint8_t val,
+void cpu_stb_mmu(CPUArchState *env, vaddr addr, uint8_t val,
MemOpIdx oi, uintptr_t retaddr)
{
helper_stb_mmu(env, addr, val, oi, retaddr);
plugin_store_cb(env, addr, val, 0, oi);
}
-void cpu_stw_mmu(CPUArchState *env, abi_ptr addr, uint16_t val,
+void cpu_stw_mmu(CPUArchState *env, vaddr addr, uint16_t val,
MemOpIdx oi, uintptr_t retaddr)
{
tcg_debug_assert((get_memop(oi) & MO_SIZE) == MO_16);
@@ -220,7 +220,7 @@ void cpu_stw_mmu(CPUArchState *env, abi_ptr addr, uint16_t val,
plugin_store_cb(env, addr, val, 0, oi);
}
-void cpu_stl_mmu(CPUArchState *env, abi_ptr addr, uint32_t val,
+void cpu_stl_mmu(CPUArchState *env, vaddr addr, uint32_t val,
MemOpIdx oi, uintptr_t retaddr)
{
tcg_debug_assert((get_memop(oi) & MO_SIZE) == MO_32);
@@ -228,7 +228,7 @@ void cpu_stl_mmu(CPUArchState *env, abi_ptr addr, uint32_t val,
plugin_store_cb(env, addr, val, 0, oi);
}
-void cpu_stq_mmu(CPUArchState *env, abi_ptr addr, uint64_t val,
+void cpu_stq_mmu(CPUArchState *env, vaddr addr, uint64_t val,
MemOpIdx oi, uintptr_t retaddr)
{
tcg_debug_assert((get_memop(oi) & MO_SIZE) == MO_64);
@@ -236,7 +236,7 @@ void cpu_stq_mmu(CPUArchState *env, abi_ptr addr, uint64_t val,
plugin_store_cb(env, addr, val, 0, oi);
}
-void cpu_st16_mmu(CPUArchState *env, abi_ptr addr, Int128 val,
+void cpu_st16_mmu(CPUArchState *env, vaddr addr, Int128 val,
MemOpIdx oi, uintptr_t retaddr)
{
tcg_debug_assert((get_memop(oi) & MO_SIZE) == MO_128);
--
2.43.0
^ permalink raw reply related [flat|nested] 90+ messages in thread
* [PATCH v2 05/42] include/exec: Split out cpu-ldst-common.h
2025-03-18 21:31 [PATCH v2 00/42] accel/tcg, codebase: Build once patches Richard Henderson
` (3 preceding siblings ...)
2025-03-18 21:31 ` [PATCH v2 04/42] include/exec: Use vaddr for *_mmu guest memory access routines Richard Henderson
@ 2025-03-18 21:31 ` Richard Henderson
2025-03-18 21:31 ` [PATCH v2 06/42] include/exec: Split out cpu-mmu-index.h Richard Henderson
` (36 subsequent siblings)
41 siblings, 0 replies; 90+ messages in thread
From: Richard Henderson @ 2025-03-18 21:31 UTC (permalink / raw)
To: qemu-devel; +Cc: pierrick.bouvier, philmd
Split out the *_mmu api, which no longer uses
target specific argument types.
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/exec/cpu-ldst-common.h | 122 +++++++++++++++++++++++++++++++++
include/exec/cpu_ldst.h | 108 +----------------------------
2 files changed, 123 insertions(+), 107 deletions(-)
create mode 100644 include/exec/cpu-ldst-common.h
diff --git a/include/exec/cpu-ldst-common.h b/include/exec/cpu-ldst-common.h
new file mode 100644
index 0000000000..c46a6ade5d
--- /dev/null
+++ b/include/exec/cpu-ldst-common.h
@@ -0,0 +1,122 @@
+/*
+ * Software MMU support
+ *
+ * SPDX-License-Identifier: LGPL-2.1-or-later
+ */
+
+#ifndef CPU_LDST_COMMON_H
+#define CPU_LDST_COMMON_H
+
+#ifndef CONFIG_TCG
+#error Can only include this header with TCG
+#endif
+
+#include "exec/memopidx.h"
+#include "exec/vaddr.h"
+#include "exec/mmu-access-type.h"
+#include "qemu/int128.h"
+
+uint8_t cpu_ldb_mmu(CPUArchState *env, vaddr ptr, MemOpIdx oi, uintptr_t ra);
+uint16_t cpu_ldw_mmu(CPUArchState *env, vaddr ptr, MemOpIdx oi, uintptr_t ra);
+uint32_t cpu_ldl_mmu(CPUArchState *env, vaddr ptr, MemOpIdx oi, uintptr_t ra);
+uint64_t cpu_ldq_mmu(CPUArchState *env, vaddr ptr, MemOpIdx oi, uintptr_t ra);
+Int128 cpu_ld16_mmu(CPUArchState *env, vaddr addr, MemOpIdx oi, uintptr_t ra);
+
+void cpu_stb_mmu(CPUArchState *env, vaddr ptr, uint8_t val,
+ MemOpIdx oi, uintptr_t ra);
+void cpu_stw_mmu(CPUArchState *env, vaddr ptr, uint16_t val,
+ MemOpIdx oi, uintptr_t ra);
+void cpu_stl_mmu(CPUArchState *env, vaddr ptr, uint32_t val,
+ MemOpIdx oi, uintptr_t ra);
+void cpu_stq_mmu(CPUArchState *env, vaddr ptr, uint64_t val,
+ MemOpIdx oi, uintptr_t ra);
+void cpu_st16_mmu(CPUArchState *env, vaddr addr, Int128 val,
+ MemOpIdx oi, uintptr_t ra);
+
+uint32_t cpu_atomic_cmpxchgb_mmu(CPUArchState *env, vaddr addr,
+ uint32_t cmpv, uint32_t newv,
+ MemOpIdx oi, uintptr_t retaddr);
+uint32_t cpu_atomic_cmpxchgw_le_mmu(CPUArchState *env, vaddr addr,
+ uint32_t cmpv, uint32_t newv,
+ MemOpIdx oi, uintptr_t retaddr);
+uint32_t cpu_atomic_cmpxchgl_le_mmu(CPUArchState *env, vaddr addr,
+ uint32_t cmpv, uint32_t newv,
+ MemOpIdx oi, uintptr_t retaddr);
+uint64_t cpu_atomic_cmpxchgq_le_mmu(CPUArchState *env, vaddr addr,
+ uint64_t cmpv, uint64_t newv,
+ MemOpIdx oi, uintptr_t retaddr);
+uint32_t cpu_atomic_cmpxchgw_be_mmu(CPUArchState *env, vaddr addr,
+ uint32_t cmpv, uint32_t newv,
+ MemOpIdx oi, uintptr_t retaddr);
+uint32_t cpu_atomic_cmpxchgl_be_mmu(CPUArchState *env, vaddr addr,
+ uint32_t cmpv, uint32_t newv,
+ MemOpIdx oi, uintptr_t retaddr);
+uint64_t cpu_atomic_cmpxchgq_be_mmu(CPUArchState *env, vaddr addr,
+ uint64_t cmpv, uint64_t newv,
+ MemOpIdx oi, uintptr_t retaddr);
+
+#define GEN_ATOMIC_HELPER(NAME, TYPE, SUFFIX) \
+TYPE cpu_atomic_ ## NAME ## SUFFIX ## _mmu \
+ (CPUArchState *env, vaddr addr, TYPE val, \
+ MemOpIdx oi, uintptr_t retaddr);
+
+#ifdef CONFIG_ATOMIC64
+#define GEN_ATOMIC_HELPER_ALL(NAME) \
+ GEN_ATOMIC_HELPER(NAME, uint32_t, b) \
+ GEN_ATOMIC_HELPER(NAME, uint32_t, w_le) \
+ GEN_ATOMIC_HELPER(NAME, uint32_t, w_be) \
+ GEN_ATOMIC_HELPER(NAME, uint32_t, l_le) \
+ GEN_ATOMIC_HELPER(NAME, uint32_t, l_be) \
+ GEN_ATOMIC_HELPER(NAME, uint64_t, q_le) \
+ GEN_ATOMIC_HELPER(NAME, uint64_t, q_be)
+#else
+#define GEN_ATOMIC_HELPER_ALL(NAME) \
+ GEN_ATOMIC_HELPER(NAME, uint32_t, b) \
+ GEN_ATOMIC_HELPER(NAME, uint32_t, w_le) \
+ GEN_ATOMIC_HELPER(NAME, uint32_t, w_be) \
+ GEN_ATOMIC_HELPER(NAME, uint32_t, l_le) \
+ GEN_ATOMIC_HELPER(NAME, uint32_t, l_be)
+#endif
+
+GEN_ATOMIC_HELPER_ALL(fetch_add)
+GEN_ATOMIC_HELPER_ALL(fetch_sub)
+GEN_ATOMIC_HELPER_ALL(fetch_and)
+GEN_ATOMIC_HELPER_ALL(fetch_or)
+GEN_ATOMIC_HELPER_ALL(fetch_xor)
+GEN_ATOMIC_HELPER_ALL(fetch_smin)
+GEN_ATOMIC_HELPER_ALL(fetch_umin)
+GEN_ATOMIC_HELPER_ALL(fetch_smax)
+GEN_ATOMIC_HELPER_ALL(fetch_umax)
+
+GEN_ATOMIC_HELPER_ALL(add_fetch)
+GEN_ATOMIC_HELPER_ALL(sub_fetch)
+GEN_ATOMIC_HELPER_ALL(and_fetch)
+GEN_ATOMIC_HELPER_ALL(or_fetch)
+GEN_ATOMIC_HELPER_ALL(xor_fetch)
+GEN_ATOMIC_HELPER_ALL(smin_fetch)
+GEN_ATOMIC_HELPER_ALL(umin_fetch)
+GEN_ATOMIC_HELPER_ALL(smax_fetch)
+GEN_ATOMIC_HELPER_ALL(umax_fetch)
+
+GEN_ATOMIC_HELPER_ALL(xchg)
+
+#undef GEN_ATOMIC_HELPER_ALL
+#undef GEN_ATOMIC_HELPER
+
+Int128 cpu_atomic_cmpxchgo_le_mmu(CPUArchState *env, vaddr addr,
+ Int128 cmpv, Int128 newv,
+ MemOpIdx oi, uintptr_t retaddr);
+Int128 cpu_atomic_cmpxchgo_be_mmu(CPUArchState *env, vaddr addr,
+ Int128 cmpv, Int128 newv,
+ MemOpIdx oi, uintptr_t retaddr);
+
+uint8_t cpu_ldb_code_mmu(CPUArchState *env, vaddr addr,
+ MemOpIdx oi, uintptr_t ra);
+uint16_t cpu_ldw_code_mmu(CPUArchState *env, vaddr addr,
+ MemOpIdx oi, uintptr_t ra);
+uint32_t cpu_ldl_code_mmu(CPUArchState *env, vaddr addr,
+ MemOpIdx oi, uintptr_t ra);
+uint64_t cpu_ldq_code_mmu(CPUArchState *env, vaddr addr,
+ MemOpIdx oi, uintptr_t ra);
+
+#endif /* CPU_LDST_COMMON_H */
diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h
index ddd8e0cf48..1fbdbe59ae 100644
--- a/include/exec/cpu_ldst.h
+++ b/include/exec/cpu_ldst.h
@@ -66,11 +66,8 @@
#error Can only include this header with TCG
#endif
-#include "exec/memopidx.h"
-#include "exec/vaddr.h"
+#include "exec/cpu-ldst-common.h"
#include "exec/abi_ptr.h"
-#include "exec/mmu-access-type.h"
-#include "qemu/int128.h"
#if defined(CONFIG_USER_ONLY)
#include "user/guest-host.h"
@@ -157,100 +154,6 @@ void cpu_stl_le_mmuidx_ra(CPUArchState *env, abi_ptr ptr, uint32_t val,
void cpu_stq_le_mmuidx_ra(CPUArchState *env, abi_ptr ptr, uint64_t val,
int mmu_idx, uintptr_t ra);
-uint8_t cpu_ldb_mmu(CPUArchState *env, vaddr ptr, MemOpIdx oi, uintptr_t ra);
-uint16_t cpu_ldw_mmu(CPUArchState *env, vaddr ptr, MemOpIdx oi, uintptr_t ra);
-uint32_t cpu_ldl_mmu(CPUArchState *env, vaddr ptr, MemOpIdx oi, uintptr_t ra);
-uint64_t cpu_ldq_mmu(CPUArchState *env, vaddr ptr, MemOpIdx oi, uintptr_t ra);
-Int128 cpu_ld16_mmu(CPUArchState *env, vaddr addr, MemOpIdx oi, uintptr_t ra);
-
-void cpu_stb_mmu(CPUArchState *env, vaddr ptr, uint8_t val,
- MemOpIdx oi, uintptr_t ra);
-void cpu_stw_mmu(CPUArchState *env, vaddr ptr, uint16_t val,
- MemOpIdx oi, uintptr_t ra);
-void cpu_stl_mmu(CPUArchState *env, vaddr ptr, uint32_t val,
- MemOpIdx oi, uintptr_t ra);
-void cpu_stq_mmu(CPUArchState *env, vaddr ptr, uint64_t val,
- MemOpIdx oi, uintptr_t ra);
-void cpu_st16_mmu(CPUArchState *env, vaddr addr, Int128 val,
- MemOpIdx oi, uintptr_t ra);
-
-uint32_t cpu_atomic_cmpxchgb_mmu(CPUArchState *env, vaddr addr,
- uint32_t cmpv, uint32_t newv,
- MemOpIdx oi, uintptr_t retaddr);
-uint32_t cpu_atomic_cmpxchgw_le_mmu(CPUArchState *env, vaddr addr,
- uint32_t cmpv, uint32_t newv,
- MemOpIdx oi, uintptr_t retaddr);
-uint32_t cpu_atomic_cmpxchgl_le_mmu(CPUArchState *env, vaddr addr,
- uint32_t cmpv, uint32_t newv,
- MemOpIdx oi, uintptr_t retaddr);
-uint64_t cpu_atomic_cmpxchgq_le_mmu(CPUArchState *env, vaddr addr,
- uint64_t cmpv, uint64_t newv,
- MemOpIdx oi, uintptr_t retaddr);
-uint32_t cpu_atomic_cmpxchgw_be_mmu(CPUArchState *env, vaddr addr,
- uint32_t cmpv, uint32_t newv,
- MemOpIdx oi, uintptr_t retaddr);
-uint32_t cpu_atomic_cmpxchgl_be_mmu(CPUArchState *env, vaddr addr,
- uint32_t cmpv, uint32_t newv,
- MemOpIdx oi, uintptr_t retaddr);
-uint64_t cpu_atomic_cmpxchgq_be_mmu(CPUArchState *env, vaddr addr,
- uint64_t cmpv, uint64_t newv,
- MemOpIdx oi, uintptr_t retaddr);
-
-#define GEN_ATOMIC_HELPER(NAME, TYPE, SUFFIX) \
-TYPE cpu_atomic_ ## NAME ## SUFFIX ## _mmu \
- (CPUArchState *env, vaddr addr, TYPE val, \
- MemOpIdx oi, uintptr_t retaddr);
-
-#ifdef CONFIG_ATOMIC64
-#define GEN_ATOMIC_HELPER_ALL(NAME) \
- GEN_ATOMIC_HELPER(NAME, uint32_t, b) \
- GEN_ATOMIC_HELPER(NAME, uint32_t, w_le) \
- GEN_ATOMIC_HELPER(NAME, uint32_t, w_be) \
- GEN_ATOMIC_HELPER(NAME, uint32_t, l_le) \
- GEN_ATOMIC_HELPER(NAME, uint32_t, l_be) \
- GEN_ATOMIC_HELPER(NAME, uint64_t, q_le) \
- GEN_ATOMIC_HELPER(NAME, uint64_t, q_be)
-#else
-#define GEN_ATOMIC_HELPER_ALL(NAME) \
- GEN_ATOMIC_HELPER(NAME, uint32_t, b) \
- GEN_ATOMIC_HELPER(NAME, uint32_t, w_le) \
- GEN_ATOMIC_HELPER(NAME, uint32_t, w_be) \
- GEN_ATOMIC_HELPER(NAME, uint32_t, l_le) \
- GEN_ATOMIC_HELPER(NAME, uint32_t, l_be)
-#endif
-
-GEN_ATOMIC_HELPER_ALL(fetch_add)
-GEN_ATOMIC_HELPER_ALL(fetch_sub)
-GEN_ATOMIC_HELPER_ALL(fetch_and)
-GEN_ATOMIC_HELPER_ALL(fetch_or)
-GEN_ATOMIC_HELPER_ALL(fetch_xor)
-GEN_ATOMIC_HELPER_ALL(fetch_smin)
-GEN_ATOMIC_HELPER_ALL(fetch_umin)
-GEN_ATOMIC_HELPER_ALL(fetch_smax)
-GEN_ATOMIC_HELPER_ALL(fetch_umax)
-
-GEN_ATOMIC_HELPER_ALL(add_fetch)
-GEN_ATOMIC_HELPER_ALL(sub_fetch)
-GEN_ATOMIC_HELPER_ALL(and_fetch)
-GEN_ATOMIC_HELPER_ALL(or_fetch)
-GEN_ATOMIC_HELPER_ALL(xor_fetch)
-GEN_ATOMIC_HELPER_ALL(smin_fetch)
-GEN_ATOMIC_HELPER_ALL(umin_fetch)
-GEN_ATOMIC_HELPER_ALL(smax_fetch)
-GEN_ATOMIC_HELPER_ALL(umax_fetch)
-
-GEN_ATOMIC_HELPER_ALL(xchg)
-
-#undef GEN_ATOMIC_HELPER_ALL
-#undef GEN_ATOMIC_HELPER
-
-Int128 cpu_atomic_cmpxchgo_le_mmu(CPUArchState *env, vaddr addr,
- Int128 cmpv, Int128 newv,
- MemOpIdx oi, uintptr_t retaddr);
-Int128 cpu_atomic_cmpxchgo_be_mmu(CPUArchState *env, vaddr addr,
- Int128 cmpv, Int128 newv,
- MemOpIdx oi, uintptr_t retaddr);
-
#if TARGET_BIG_ENDIAN
# define cpu_lduw_data cpu_lduw_be_data
# define cpu_ldsw_data cpu_ldsw_be_data
@@ -297,15 +200,6 @@ Int128 cpu_atomic_cmpxchgo_be_mmu(CPUArchState *env, vaddr addr,
# define cpu_stq_mmuidx_ra cpu_stq_le_mmuidx_ra
#endif
-uint8_t cpu_ldb_code_mmu(CPUArchState *env, vaddr addr,
- MemOpIdx oi, uintptr_t ra);
-uint16_t cpu_ldw_code_mmu(CPUArchState *env, vaddr addr,
- MemOpIdx oi, uintptr_t ra);
-uint32_t cpu_ldl_code_mmu(CPUArchState *env, vaddr addr,
- MemOpIdx oi, uintptr_t ra);
-uint64_t cpu_ldq_code_mmu(CPUArchState *env, vaddr addr,
- MemOpIdx oi, uintptr_t ra);
-
uint32_t cpu_ldub_code(CPUArchState *env, abi_ptr addr);
uint32_t cpu_lduw_code(CPUArchState *env, abi_ptr addr);
uint32_t cpu_ldl_code(CPUArchState *env, abi_ptr addr);
--
2.43.0
^ permalink raw reply related [flat|nested] 90+ messages in thread
* [PATCH v2 06/42] include/exec: Split out cpu-mmu-index.h
2025-03-18 21:31 [PATCH v2 00/42] accel/tcg, codebase: Build once patches Richard Henderson
` (4 preceding siblings ...)
2025-03-18 21:31 ` [PATCH v2 05/42] include/exec: Split out cpu-ldst-common.h Richard Henderson
@ 2025-03-18 21:31 ` Richard Henderson
2025-03-19 0:02 ` Pierrick Bouvier
2025-04-02 11:26 ` Philippe Mathieu-Daudé
2025-03-18 21:31 ` [PATCH v2 07/42] include/exec: Inline *_mmuidx_ra memory operations Richard Henderson
` (35 subsequent siblings)
41 siblings, 2 replies; 90+ messages in thread
From: Richard Henderson @ 2025-03-18 21:31 UTC (permalink / raw)
To: qemu-devel; +Cc: pierrick.bouvier, philmd
The implementation of cpu_mmu_index was split between cpu-common.h
and cpu-all.h, depending on CONFIG_USER_ONLY. We already have the
plumbing common to user and system mode. Using MMU_USER_IDX
requires the cpu.h for a specific target, and so is restricted to
when we're compiling per-target.
Include the new header only where needed.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/exec/cpu-all.h | 6 ------
include/exec/cpu-common.h | 20 ------------------
include/exec/cpu-mmu-index.h | 39 +++++++++++++++++++++++++++++++++++
include/exec/cpu_ldst.h | 1 +
semihosting/uaccess.c | 1 +
target/arm/gdbstub64.c | 3 +++
target/hppa/mem_helper.c | 1 +
target/i386/tcg/translate.c | 1 +
target/loongarch/cpu_helper.c | 1 +
target/microblaze/helper.c | 1 +
target/microblaze/mmu.c | 1 +
target/openrisc/translate.c | 1 +
target/sparc/cpu.c | 1 +
target/sparc/mmu_helper.c | 1 +
target/tricore/helper.c | 1 +
target/xtensa/mmu_helper.c | 1 +
16 files changed, 54 insertions(+), 26 deletions(-)
create mode 100644 include/exec/cpu-mmu-index.h
diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h
index 902ca1f3c7..6108351f58 100644
--- a/include/exec/cpu-all.h
+++ b/include/exec/cpu-all.h
@@ -48,8 +48,6 @@ CPUArchState *cpu_copy(CPUArchState *env);
#ifdef CONFIG_USER_ONLY
-static inline int cpu_mmu_index(CPUState *cs, bool ifetch);
-
/*
* Allow some level of source compatibility with softmmu. We do not
* support any of the more exotic features, so only invalid pages may
@@ -59,10 +57,6 @@ static inline int cpu_mmu_index(CPUState *cs, bool ifetch);
#define TLB_MMIO (1 << (TARGET_PAGE_BITS_MIN - 2))
#define TLB_WATCHPOINT 0
-static inline int cpu_mmu_index(CPUState *cs, bool ifetch)
-{
- return MMU_USER_IDX;
-}
#else
/*
diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h
index 3771b2130c..be032e1a49 100644
--- a/include/exec/cpu-common.h
+++ b/include/exec/cpu-common.h
@@ -272,24 +272,4 @@ static inline CPUState *env_cpu(CPUArchState *env)
return (CPUState *)env_cpu_const(env);
}
-#ifndef CONFIG_USER_ONLY
-/**
- * cpu_mmu_index:
- * @env: The cpu environment
- * @ifetch: True for code access, false for data access.
- *
- * Return the core mmu index for the current translation regime.
- * This function is used by generic TCG code paths.
- *
- * The user-only version of this function is inline in cpu-all.h,
- * where it always returns MMU_USER_IDX.
- */
-static inline int cpu_mmu_index(CPUState *cs, bool ifetch)
-{
- int ret = cs->cc->mmu_index(cs, ifetch);
- tcg_debug_assert(ret >= 0 && ret < NB_MMU_MODES);
- return ret;
-}
-#endif /* !CONFIG_USER_ONLY */
-
#endif /* CPU_COMMON_H */
diff --git a/include/exec/cpu-mmu-index.h b/include/exec/cpu-mmu-index.h
new file mode 100644
index 0000000000..b46e622048
--- /dev/null
+++ b/include/exec/cpu-mmu-index.h
@@ -0,0 +1,39 @@
+/*
+ * cpu_mmu_index()
+ *
+ * Copyright (c) 2003 Fabrice Bellard
+ *
+ * SPDX-License-Identifier: LGPL-2.1+
+ */
+
+#ifndef EXEC_CPU_MMU_INDEX_H
+#define EXEC_CPU_MMU_INDEX_H
+
+#include "hw/core/cpu.h"
+#include "tcg/debug-assert.h"
+#ifdef COMPILING_PER_TARGET
+#include "cpu.h"
+#endif
+
+/**
+ * cpu_mmu_index:
+ * @env: The cpu environment
+ * @ifetch: True for code access, false for data access.
+ *
+ * Return the core mmu index for the current translation regime.
+ * This function is used by generic TCG code paths.
+ */
+static inline int cpu_mmu_index(CPUState *cs, bool ifetch)
+{
+#ifdef COMPILING_PER_TARGET
+# ifdef CONFIG_USER_ONLY
+ return MMU_USER_IDX;
+# endif
+#endif
+
+ int ret = cs->cc->mmu_index(cs, ifetch);
+ tcg_debug_assert(ret >= 0 && ret < NB_MMU_MODES);
+ return ret;
+}
+
+#endif /* EXEC_CPU_MMU_INDEX_H */
diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h
index 1fbdbe59ae..0b10d840fe 100644
--- a/include/exec/cpu_ldst.h
+++ b/include/exec/cpu_ldst.h
@@ -67,6 +67,7 @@
#endif
#include "exec/cpu-ldst-common.h"
+#include "exec/cpu-mmu-index.h"
#include "exec/abi_ptr.h"
#if defined(CONFIG_USER_ONLY)
diff --git a/semihosting/uaccess.c b/semihosting/uaccess.c
index 382a366ce3..a957891166 100644
--- a/semihosting/uaccess.c
+++ b/semihosting/uaccess.c
@@ -9,6 +9,7 @@
#include "qemu/osdep.h"
#include "exec/cpu-all.h"
+#include "exec/cpu-mmu-index.h"
#include "exec/exec-all.h"
#include "semihosting/uaccess.h"
diff --git a/target/arm/gdbstub64.c b/target/arm/gdbstub64.c
index 1a4dbec567..a9d8352b76 100644
--- a/target/arm/gdbstub64.c
+++ b/target/arm/gdbstub64.c
@@ -27,6 +27,9 @@
#include <sys/prctl.h>
#include "mte_user_helper.h"
#endif
+#ifdef CONFIG_TCG
+#include "exec/cpu-mmu-index.h"
+#endif
int aarch64_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
{
diff --git a/target/hppa/mem_helper.c b/target/hppa/mem_helper.c
index fb1d93ef1f..510786518d 100644
--- a/target/hppa/mem_helper.c
+++ b/target/hppa/mem_helper.c
@@ -22,6 +22,7 @@
#include "cpu.h"
#include "exec/exec-all.h"
#include "exec/cputlb.h"
+#include "exec/cpu-mmu-index.h"
#include "exec/page-protection.h"
#include "exec/helper-proto.h"
#include "hw/core/cpu.h"
diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c
index a8935f487a..20a5c69795 100644
--- a/target/i386/tcg/translate.c
+++ b/target/i386/tcg/translate.c
@@ -20,6 +20,7 @@
#include "qemu/host-utils.h"
#include "cpu.h"
+#include "exec/cpu-mmu-index.h"
#include "exec/exec-all.h"
#include "exec/translation-block.h"
#include "tcg/tcg-op.h"
diff --git a/target/loongarch/cpu_helper.c b/target/loongarch/cpu_helper.c
index 930466ca48..8662fb36ed 100644
--- a/target/loongarch/cpu_helper.c
+++ b/target/loongarch/cpu_helper.c
@@ -8,6 +8,7 @@
#include "qemu/osdep.h"
#include "cpu.h"
+#include "exec/cpu-mmu-index.h"
#include "internals.h"
#include "cpu-csr.h"
diff --git a/target/microblaze/helper.c b/target/microblaze/helper.c
index 27fc929bee..996514ffe8 100644
--- a/target/microblaze/helper.c
+++ b/target/microblaze/helper.c
@@ -21,6 +21,7 @@
#include "qemu/osdep.h"
#include "cpu.h"
#include "exec/cputlb.h"
+#include "exec/cpu-mmu-index.h"
#include "exec/page-protection.h"
#include "qemu/host-utils.h"
#include "exec/log.h"
diff --git a/target/microblaze/mmu.c b/target/microblaze/mmu.c
index f8587d5ac4..987ac9e3a7 100644
--- a/target/microblaze/mmu.c
+++ b/target/microblaze/mmu.c
@@ -22,6 +22,7 @@
#include "qemu/log.h"
#include "cpu.h"
#include "exec/cputlb.h"
+#include "exec/cpu-mmu-index.h"
#include "exec/page-protection.h"
static unsigned int tlb_decode_size(unsigned int f)
diff --git a/target/openrisc/translate.c b/target/openrisc/translate.c
index 7a6af183ae..5b437959ac 100644
--- a/target/openrisc/translate.c
+++ b/target/openrisc/translate.c
@@ -20,6 +20,7 @@
#include "qemu/osdep.h"
#include "cpu.h"
+#include "exec/cpu-mmu-index.h"
#include "exec/exec-all.h"
#include "tcg/tcg-op.h"
#include "qemu/log.h"
diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c
index 5716120117..1bf00407af 100644
--- a/target/sparc/cpu.c
+++ b/target/sparc/cpu.c
@@ -22,6 +22,7 @@
#include "cpu.h"
#include "qemu/module.h"
#include "qemu/qemu-print.h"
+#include "exec/cpu-mmu-index.h"
#include "exec/exec-all.h"
#include "exec/translation-block.h"
#include "hw/qdev-properties.h"
diff --git a/target/sparc/mmu_helper.c b/target/sparc/mmu_helper.c
index 7548d01777..4a0cedd9e2 100644
--- a/target/sparc/mmu_helper.c
+++ b/target/sparc/mmu_helper.c
@@ -21,6 +21,7 @@
#include "qemu/log.h"
#include "cpu.h"
#include "exec/cputlb.h"
+#include "exec/cpu-mmu-index.h"
#include "exec/page-protection.h"
#include "qemu/qemu-print.h"
#include "trace.h"
diff --git a/target/tricore/helper.c b/target/tricore/helper.c
index a64412e6bd..be3d97af78 100644
--- a/target/tricore/helper.c
+++ b/target/tricore/helper.c
@@ -20,6 +20,7 @@
#include "hw/registerfields.h"
#include "cpu.h"
#include "exec/cputlb.h"
+#include "exec/cpu-mmu-index.h"
#include "exec/page-protection.h"
#include "fpu/softfloat-helpers.h"
#include "qemu/qemu-print.h"
diff --git a/target/xtensa/mmu_helper.c b/target/xtensa/mmu_helper.c
index 63be741a42..96140c89c7 100644
--- a/target/xtensa/mmu_helper.c
+++ b/target/xtensa/mmu_helper.c
@@ -33,6 +33,7 @@
#include "exec/helper-proto.h"
#include "qemu/host-utils.h"
#include "exec/cputlb.h"
+#include "exec/cpu-mmu-index.h"
#include "exec/exec-all.h"
#include "exec/page-protection.h"
--
2.43.0
^ permalink raw reply related [flat|nested] 90+ messages in thread
* [PATCH v2 07/42] include/exec: Inline *_mmuidx_ra memory operations
2025-03-18 21:31 [PATCH v2 00/42] accel/tcg, codebase: Build once patches Richard Henderson
` (5 preceding siblings ...)
2025-03-18 21:31 ` [PATCH v2 06/42] include/exec: Split out cpu-mmu-index.h Richard Henderson
@ 2025-03-18 21:31 ` Richard Henderson
2025-03-18 21:31 ` [PATCH v2 08/42] include/exec: Inline *_data_ra " Richard Henderson
` (34 subsequent siblings)
41 siblings, 0 replies; 90+ messages in thread
From: Richard Henderson @ 2025-03-18 21:31 UTC (permalink / raw)
To: qemu-devel; +Cc: pierrick.bouvier, philmd
These need to be per-target for 'abi_ptr'. Expand inline to
the *_mmu api with trivial massaging of the arguments.
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/exec/cpu_ldst.h | 163 ++++++++++++++++++++++++++++--------
accel/tcg/ldst_common.c.inc | 118 --------------------------
2 files changed, 129 insertions(+), 152 deletions(-)
diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h
index 0b10d840fe..4149f04368 100644
--- a/include/exec/cpu_ldst.h
+++ b/include/exec/cpu_ldst.h
@@ -119,41 +119,136 @@ void cpu_stl_le_data_ra(CPUArchState *env, abi_ptr ptr,
void cpu_stq_le_data_ra(CPUArchState *env, abi_ptr ptr,
uint64_t val, uintptr_t ra);
-uint32_t cpu_ldub_mmuidx_ra(CPUArchState *env, abi_ptr ptr,
- int mmu_idx, uintptr_t ra);
-int cpu_ldsb_mmuidx_ra(CPUArchState *env, abi_ptr ptr,
- int mmu_idx, uintptr_t ra);
-uint32_t cpu_lduw_be_mmuidx_ra(CPUArchState *env, abi_ptr ptr,
- int mmu_idx, uintptr_t ra);
-int cpu_ldsw_be_mmuidx_ra(CPUArchState *env, abi_ptr ptr,
- int mmu_idx, uintptr_t ra);
-uint32_t cpu_ldl_be_mmuidx_ra(CPUArchState *env, abi_ptr ptr,
- int mmu_idx, uintptr_t ra);
-uint64_t cpu_ldq_be_mmuidx_ra(CPUArchState *env, abi_ptr ptr,
- int mmu_idx, uintptr_t ra);
-uint32_t cpu_lduw_le_mmuidx_ra(CPUArchState *env, abi_ptr ptr,
- int mmu_idx, uintptr_t ra);
-int cpu_ldsw_le_mmuidx_ra(CPUArchState *env, abi_ptr ptr,
- int mmu_idx, uintptr_t ra);
-uint32_t cpu_ldl_le_mmuidx_ra(CPUArchState *env, abi_ptr ptr,
- int mmu_idx, uintptr_t ra);
-uint64_t cpu_ldq_le_mmuidx_ra(CPUArchState *env, abi_ptr ptr,
- int mmu_idx, uintptr_t ra);
+static inline uint32_t
+cpu_ldub_mmuidx_ra(CPUArchState *env, abi_ptr addr, int mmu_idx, uintptr_t ra)
+{
+ MemOpIdx oi = make_memop_idx(MO_UB, mmu_idx);
+ return cpu_ldb_mmu(env, addr, oi, ra);
+}
-void cpu_stb_mmuidx_ra(CPUArchState *env, abi_ptr ptr, uint32_t val,
- int mmu_idx, uintptr_t ra);
-void cpu_stw_be_mmuidx_ra(CPUArchState *env, abi_ptr ptr, uint32_t val,
- int mmu_idx, uintptr_t ra);
-void cpu_stl_be_mmuidx_ra(CPUArchState *env, abi_ptr ptr, uint32_t val,
- int mmu_idx, uintptr_t ra);
-void cpu_stq_be_mmuidx_ra(CPUArchState *env, abi_ptr ptr, uint64_t val,
- int mmu_idx, uintptr_t ra);
-void cpu_stw_le_mmuidx_ra(CPUArchState *env, abi_ptr ptr, uint32_t val,
- int mmu_idx, uintptr_t ra);
-void cpu_stl_le_mmuidx_ra(CPUArchState *env, abi_ptr ptr, uint32_t val,
- int mmu_idx, uintptr_t ra);
-void cpu_stq_le_mmuidx_ra(CPUArchState *env, abi_ptr ptr, uint64_t val,
- int mmu_idx, uintptr_t ra);
+static inline int
+cpu_ldsb_mmuidx_ra(CPUArchState *env, abi_ptr addr, int mmu_idx, uintptr_t ra)
+{
+ return (int8_t)cpu_ldub_mmuidx_ra(env, addr, mmu_idx, ra);
+}
+
+static inline uint32_t
+cpu_lduw_be_mmuidx_ra(CPUArchState *env, abi_ptr addr,
+ int mmu_idx, uintptr_t ra)
+{
+ MemOpIdx oi = make_memop_idx(MO_BEUW | MO_UNALN, mmu_idx);
+ return cpu_ldw_mmu(env, addr, oi, ra);
+}
+
+static inline int
+cpu_ldsw_be_mmuidx_ra(CPUArchState *env, abi_ptr addr,
+ int mmu_idx, uintptr_t ra)
+{
+ return (int16_t)cpu_lduw_be_mmuidx_ra(env, addr, mmu_idx, ra);
+}
+
+static inline uint32_t
+cpu_ldl_be_mmuidx_ra(CPUArchState *env, abi_ptr addr,
+ int mmu_idx, uintptr_t ra)
+{
+ MemOpIdx oi = make_memop_idx(MO_BEUL | MO_UNALN, mmu_idx);
+ return cpu_ldl_mmu(env, addr, oi, ra);
+}
+
+static inline uint64_t
+cpu_ldq_be_mmuidx_ra(CPUArchState *env, abi_ptr addr,
+ int mmu_idx, uintptr_t ra)
+{
+ MemOpIdx oi = make_memop_idx(MO_BEUQ | MO_UNALN, mmu_idx);
+ return cpu_ldq_mmu(env, addr, oi, ra);
+}
+
+static inline uint32_t
+cpu_lduw_le_mmuidx_ra(CPUArchState *env, abi_ptr addr,
+ int mmu_idx, uintptr_t ra)
+{
+ MemOpIdx oi = make_memop_idx(MO_LEUW | MO_UNALN, mmu_idx);
+ return cpu_ldw_mmu(env, addr, oi, ra);
+}
+
+static inline int
+cpu_ldsw_le_mmuidx_ra(CPUArchState *env, abi_ptr addr,
+ int mmu_idx, uintptr_t ra)
+{
+ return (int16_t)cpu_lduw_le_mmuidx_ra(env, addr, mmu_idx, ra);
+}
+
+static inline uint32_t
+cpu_ldl_le_mmuidx_ra(CPUArchState *env, abi_ptr addr,
+ int mmu_idx, uintptr_t ra)
+{
+ MemOpIdx oi = make_memop_idx(MO_LEUL | MO_UNALN, mmu_idx);
+ return cpu_ldl_mmu(env, addr, oi, ra);
+}
+
+static inline uint64_t
+cpu_ldq_le_mmuidx_ra(CPUArchState *env, abi_ptr addr,
+ int mmu_idx, uintptr_t ra)
+{
+ MemOpIdx oi = make_memop_idx(MO_LEUQ | MO_UNALN, mmu_idx);
+ return cpu_ldq_mmu(env, addr, oi, ra);
+}
+
+static inline void
+cpu_stb_mmuidx_ra(CPUArchState *env, abi_ptr addr, uint32_t val,
+ int mmu_idx, uintptr_t ra)
+{
+ MemOpIdx oi = make_memop_idx(MO_UB, mmu_idx);
+ cpu_stb_mmu(env, addr, val, oi, ra);
+}
+
+static inline void
+cpu_stw_be_mmuidx_ra(CPUArchState *env, abi_ptr addr, uint32_t val,
+ int mmu_idx, uintptr_t ra)
+{
+ MemOpIdx oi = make_memop_idx(MO_BEUW | MO_UNALN, mmu_idx);
+ cpu_stw_mmu(env, addr, val, oi, ra);
+}
+
+static inline void
+cpu_stl_be_mmuidx_ra(CPUArchState *env, abi_ptr addr, uint32_t val,
+ int mmu_idx, uintptr_t ra)
+{
+ MemOpIdx oi = make_memop_idx(MO_BEUL | MO_UNALN, mmu_idx);
+ cpu_stl_mmu(env, addr, val, oi, ra);
+}
+
+static inline void
+cpu_stq_be_mmuidx_ra(CPUArchState *env, abi_ptr addr, uint64_t val,
+ int mmu_idx, uintptr_t ra)
+{
+ MemOpIdx oi = make_memop_idx(MO_BEUQ | MO_UNALN, mmu_idx);
+ cpu_stq_mmu(env, addr, val, oi, ra);
+}
+
+static inline void
+cpu_stw_le_mmuidx_ra(CPUArchState *env, abi_ptr addr, uint32_t val,
+ int mmu_idx, uintptr_t ra)
+{
+ MemOpIdx oi = make_memop_idx(MO_LEUW | MO_UNALN, mmu_idx);
+ cpu_stw_mmu(env, addr, val, oi, ra);
+}
+
+static inline void
+cpu_stl_le_mmuidx_ra(CPUArchState *env, abi_ptr addr, uint32_t val,
+ int mmu_idx, uintptr_t ra)
+{
+ MemOpIdx oi = make_memop_idx(MO_LEUL | MO_UNALN, mmu_idx);
+ cpu_stl_mmu(env, addr, val, oi, ra);
+}
+
+static inline void
+cpu_stq_le_mmuidx_ra(CPUArchState *env, abi_ptr addr, uint64_t val,
+ int mmu_idx, uintptr_t ra)
+{
+ MemOpIdx oi = make_memop_idx(MO_LEUQ | MO_UNALN, mmu_idx);
+ cpu_stq_mmu(env, addr, val, oi, ra);
+}
#if TARGET_BIG_ENDIAN
# define cpu_lduw_data cpu_lduw_be_data
diff --git a/accel/tcg/ldst_common.c.inc b/accel/tcg/ldst_common.c.inc
index 0447c0bb92..99a56df3fb 100644
--- a/accel/tcg/ldst_common.c.inc
+++ b/accel/tcg/ldst_common.c.inc
@@ -248,124 +248,6 @@ void cpu_st16_mmu(CPUArchState *env, vaddr addr, Int128 val,
* Wrappers of the above
*/
-uint32_t cpu_ldub_mmuidx_ra(CPUArchState *env, abi_ptr addr,
- int mmu_idx, uintptr_t ra)
-{
- MemOpIdx oi = make_memop_idx(MO_UB, mmu_idx);
- return cpu_ldb_mmu(env, addr, oi, ra);
-}
-
-int cpu_ldsb_mmuidx_ra(CPUArchState *env, abi_ptr addr,
- int mmu_idx, uintptr_t ra)
-{
- return (int8_t)cpu_ldub_mmuidx_ra(env, addr, mmu_idx, ra);
-}
-
-uint32_t cpu_lduw_be_mmuidx_ra(CPUArchState *env, abi_ptr addr,
- int mmu_idx, uintptr_t ra)
-{
- MemOpIdx oi = make_memop_idx(MO_BEUW | MO_UNALN, mmu_idx);
- return cpu_ldw_mmu(env, addr, oi, ra);
-}
-
-int cpu_ldsw_be_mmuidx_ra(CPUArchState *env, abi_ptr addr,
- int mmu_idx, uintptr_t ra)
-{
- return (int16_t)cpu_lduw_be_mmuidx_ra(env, addr, mmu_idx, ra);
-}
-
-uint32_t cpu_ldl_be_mmuidx_ra(CPUArchState *env, abi_ptr addr,
- int mmu_idx, uintptr_t ra)
-{
- MemOpIdx oi = make_memop_idx(MO_BEUL | MO_UNALN, mmu_idx);
- return cpu_ldl_mmu(env, addr, oi, ra);
-}
-
-uint64_t cpu_ldq_be_mmuidx_ra(CPUArchState *env, abi_ptr addr,
- int mmu_idx, uintptr_t ra)
-{
- MemOpIdx oi = make_memop_idx(MO_BEUQ | MO_UNALN, mmu_idx);
- return cpu_ldq_mmu(env, addr, oi, ra);
-}
-
-uint32_t cpu_lduw_le_mmuidx_ra(CPUArchState *env, abi_ptr addr,
- int mmu_idx, uintptr_t ra)
-{
- MemOpIdx oi = make_memop_idx(MO_LEUW | MO_UNALN, mmu_idx);
- return cpu_ldw_mmu(env, addr, oi, ra);
-}
-
-int cpu_ldsw_le_mmuidx_ra(CPUArchState *env, abi_ptr addr,
- int mmu_idx, uintptr_t ra)
-{
- return (int16_t)cpu_lduw_le_mmuidx_ra(env, addr, mmu_idx, ra);
-}
-
-uint32_t cpu_ldl_le_mmuidx_ra(CPUArchState *env, abi_ptr addr,
- int mmu_idx, uintptr_t ra)
-{
- MemOpIdx oi = make_memop_idx(MO_LEUL | MO_UNALN, mmu_idx);
- return cpu_ldl_mmu(env, addr, oi, ra);
-}
-
-uint64_t cpu_ldq_le_mmuidx_ra(CPUArchState *env, abi_ptr addr,
- int mmu_idx, uintptr_t ra)
-{
- MemOpIdx oi = make_memop_idx(MO_LEUQ | MO_UNALN, mmu_idx);
- return cpu_ldq_mmu(env, addr, oi, ra);
-}
-
-void cpu_stb_mmuidx_ra(CPUArchState *env, abi_ptr addr, uint32_t val,
- int mmu_idx, uintptr_t ra)
-{
- MemOpIdx oi = make_memop_idx(MO_UB, mmu_idx);
- cpu_stb_mmu(env, addr, val, oi, ra);
-}
-
-void cpu_stw_be_mmuidx_ra(CPUArchState *env, abi_ptr addr, uint32_t val,
- int mmu_idx, uintptr_t ra)
-{
- MemOpIdx oi = make_memop_idx(MO_BEUW | MO_UNALN, mmu_idx);
- cpu_stw_mmu(env, addr, val, oi, ra);
-}
-
-void cpu_stl_be_mmuidx_ra(CPUArchState *env, abi_ptr addr, uint32_t val,
- int mmu_idx, uintptr_t ra)
-{
- MemOpIdx oi = make_memop_idx(MO_BEUL | MO_UNALN, mmu_idx);
- cpu_stl_mmu(env, addr, val, oi, ra);
-}
-
-void cpu_stq_be_mmuidx_ra(CPUArchState *env, abi_ptr addr, uint64_t val,
- int mmu_idx, uintptr_t ra)
-{
- MemOpIdx oi = make_memop_idx(MO_BEUQ | MO_UNALN, mmu_idx);
- cpu_stq_mmu(env, addr, val, oi, ra);
-}
-
-void cpu_stw_le_mmuidx_ra(CPUArchState *env, abi_ptr addr, uint32_t val,
- int mmu_idx, uintptr_t ra)
-{
- MemOpIdx oi = make_memop_idx(MO_LEUW | MO_UNALN, mmu_idx);
- cpu_stw_mmu(env, addr, val, oi, ra);
-}
-
-void cpu_stl_le_mmuidx_ra(CPUArchState *env, abi_ptr addr, uint32_t val,
- int mmu_idx, uintptr_t ra)
-{
- MemOpIdx oi = make_memop_idx(MO_LEUL | MO_UNALN, mmu_idx);
- cpu_stl_mmu(env, addr, val, oi, ra);
-}
-
-void cpu_stq_le_mmuidx_ra(CPUArchState *env, abi_ptr addr, uint64_t val,
- int mmu_idx, uintptr_t ra)
-{
- MemOpIdx oi = make_memop_idx(MO_LEUQ | MO_UNALN, mmu_idx);
- cpu_stq_mmu(env, addr, val, oi, ra);
-}
-
-/*--------------------------*/
-
uint32_t cpu_ldub_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t ra)
{
int mmu_index = cpu_mmu_index(env_cpu(env), false);
--
2.43.0
^ permalink raw reply related [flat|nested] 90+ messages in thread
* [PATCH v2 08/42] include/exec: Inline *_data_ra memory operations
2025-03-18 21:31 [PATCH v2 00/42] accel/tcg, codebase: Build once patches Richard Henderson
` (6 preceding siblings ...)
2025-03-18 21:31 ` [PATCH v2 07/42] include/exec: Inline *_mmuidx_ra memory operations Richard Henderson
@ 2025-03-18 21:31 ` Richard Henderson
2025-03-18 21:31 ` [PATCH v2 09/42] include/exec: Inline *_data " Richard Henderson
` (33 subsequent siblings)
41 siblings, 0 replies; 90+ messages in thread
From: Richard Henderson @ 2025-03-18 21:31 UTC (permalink / raw)
To: qemu-devel; +Cc: pierrick.bouvier, philmd
These need to be per-target for 'abi_ptr'. Expand inline to
the *_mmuidx_ra api with a lookup of the target's cpu_mmu_index().
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/exec/cpu_ldst.h | 144 +++++++++++++++++++++++++++++-------
accel/tcg/ldst_common.c.inc | 108 ---------------------------
2 files changed, 118 insertions(+), 134 deletions(-)
diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h
index 4149f04368..a2a90c7554 100644
--- a/include/exec/cpu_ldst.h
+++ b/include/exec/cpu_ldst.h
@@ -85,17 +85,6 @@ int cpu_ldsw_le_data(CPUArchState *env, abi_ptr ptr);
uint32_t cpu_ldl_le_data(CPUArchState *env, abi_ptr ptr);
uint64_t cpu_ldq_le_data(CPUArchState *env, abi_ptr ptr);
-uint32_t cpu_ldub_data_ra(CPUArchState *env, abi_ptr ptr, uintptr_t ra);
-int cpu_ldsb_data_ra(CPUArchState *env, abi_ptr ptr, uintptr_t ra);
-uint32_t cpu_lduw_be_data_ra(CPUArchState *env, abi_ptr ptr, uintptr_t ra);
-int cpu_ldsw_be_data_ra(CPUArchState *env, abi_ptr ptr, uintptr_t ra);
-uint32_t cpu_ldl_be_data_ra(CPUArchState *env, abi_ptr ptr, uintptr_t ra);
-uint64_t cpu_ldq_be_data_ra(CPUArchState *env, abi_ptr ptr, uintptr_t ra);
-uint32_t cpu_lduw_le_data_ra(CPUArchState *env, abi_ptr ptr, uintptr_t ra);
-int cpu_ldsw_le_data_ra(CPUArchState *env, abi_ptr ptr, uintptr_t ra);
-uint32_t cpu_ldl_le_data_ra(CPUArchState *env, abi_ptr ptr, uintptr_t ra);
-uint64_t cpu_ldq_le_data_ra(CPUArchState *env, abi_ptr ptr, uintptr_t ra);
-
void cpu_stb_data(CPUArchState *env, abi_ptr ptr, uint32_t val);
void cpu_stw_be_data(CPUArchState *env, abi_ptr ptr, uint32_t val);
void cpu_stl_be_data(CPUArchState *env, abi_ptr ptr, uint32_t val);
@@ -104,21 +93,6 @@ void cpu_stw_le_data(CPUArchState *env, abi_ptr ptr, uint32_t val);
void cpu_stl_le_data(CPUArchState *env, abi_ptr ptr, uint32_t val);
void cpu_stq_le_data(CPUArchState *env, abi_ptr ptr, uint64_t val);
-void cpu_stb_data_ra(CPUArchState *env, abi_ptr ptr,
- uint32_t val, uintptr_t ra);
-void cpu_stw_be_data_ra(CPUArchState *env, abi_ptr ptr,
- uint32_t val, uintptr_t ra);
-void cpu_stl_be_data_ra(CPUArchState *env, abi_ptr ptr,
- uint32_t val, uintptr_t ra);
-void cpu_stq_be_data_ra(CPUArchState *env, abi_ptr ptr,
- uint64_t val, uintptr_t ra);
-void cpu_stw_le_data_ra(CPUArchState *env, abi_ptr ptr,
- uint32_t val, uintptr_t ra);
-void cpu_stl_le_data_ra(CPUArchState *env, abi_ptr ptr,
- uint32_t val, uintptr_t ra);
-void cpu_stq_le_data_ra(CPUArchState *env, abi_ptr ptr,
- uint64_t val, uintptr_t ra);
-
static inline uint32_t
cpu_ldub_mmuidx_ra(CPUArchState *env, abi_ptr addr, int mmu_idx, uintptr_t ra)
{
@@ -250,6 +224,124 @@ cpu_stq_le_mmuidx_ra(CPUArchState *env, abi_ptr addr, uint64_t val,
cpu_stq_mmu(env, addr, val, oi, ra);
}
+/*--------------------------*/
+
+static inline uint32_t
+cpu_ldub_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t ra)
+{
+ int mmu_index = cpu_mmu_index(env_cpu(env), false);
+ return cpu_ldub_mmuidx_ra(env, addr, mmu_index, ra);
+}
+
+static inline int
+cpu_ldsb_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t ra)
+{
+ return (int8_t)cpu_ldub_data_ra(env, addr, ra);
+}
+
+static inline uint32_t
+cpu_lduw_be_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t ra)
+{
+ int mmu_index = cpu_mmu_index(env_cpu(env), false);
+ return cpu_lduw_be_mmuidx_ra(env, addr, mmu_index, ra);
+}
+
+static inline int
+cpu_ldsw_be_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t ra)
+{
+ return (int16_t)cpu_lduw_be_data_ra(env, addr, ra);
+}
+
+static inline uint32_t
+cpu_ldl_be_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t ra)
+{
+ int mmu_index = cpu_mmu_index(env_cpu(env), false);
+ return cpu_ldl_be_mmuidx_ra(env, addr, mmu_index, ra);
+}
+
+static inline uint64_t
+cpu_ldq_be_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t ra)
+{
+ int mmu_index = cpu_mmu_index(env_cpu(env), false);
+ return cpu_ldq_be_mmuidx_ra(env, addr, mmu_index, ra);
+}
+
+static inline uint32_t
+cpu_lduw_le_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t ra)
+{
+ int mmu_index = cpu_mmu_index(env_cpu(env), false);
+ return cpu_lduw_le_mmuidx_ra(env, addr, mmu_index, ra);
+}
+
+static inline int
+cpu_ldsw_le_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t ra)
+{
+ return (int16_t)cpu_lduw_le_data_ra(env, addr, ra);
+}
+
+static inline uint32_t
+cpu_ldl_le_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t ra)
+{
+ int mmu_index = cpu_mmu_index(env_cpu(env), false);
+ return cpu_ldl_le_mmuidx_ra(env, addr, mmu_index, ra);
+}
+
+static inline uint64_t
+cpu_ldq_le_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t ra)
+{
+ int mmu_index = cpu_mmu_index(env_cpu(env), false);
+ return cpu_ldq_le_mmuidx_ra(env, addr, mmu_index, ra);
+}
+
+static inline void
+cpu_stb_data_ra(CPUArchState *env, abi_ptr addr, uint32_t val, uintptr_t ra)
+{
+ int mmu_index = cpu_mmu_index(env_cpu(env), false);
+ cpu_stb_mmuidx_ra(env, addr, val, mmu_index, ra);
+}
+
+static inline void
+cpu_stw_be_data_ra(CPUArchState *env, abi_ptr addr, uint32_t val, uintptr_t ra)
+{
+ int mmu_index = cpu_mmu_index(env_cpu(env), false);
+ cpu_stw_be_mmuidx_ra(env, addr, val, mmu_index, ra);
+}
+
+static inline void
+cpu_stl_be_data_ra(CPUArchState *env, abi_ptr addr, uint32_t val, uintptr_t ra)
+{
+ int mmu_index = cpu_mmu_index(env_cpu(env), false);
+ cpu_stl_be_mmuidx_ra(env, addr, val, mmu_index, ra);
+}
+
+static inline void
+cpu_stq_be_data_ra(CPUArchState *env, abi_ptr addr, uint64_t val, uintptr_t ra)
+{
+ int mmu_index = cpu_mmu_index(env_cpu(env), false);
+ cpu_stq_be_mmuidx_ra(env, addr, val, mmu_index, ra);
+}
+
+static inline void
+cpu_stw_le_data_ra(CPUArchState *env, abi_ptr addr, uint32_t val, uintptr_t ra)
+{
+ int mmu_index = cpu_mmu_index(env_cpu(env), false);
+ cpu_stw_le_mmuidx_ra(env, addr, val, mmu_index, ra);
+}
+
+static inline void
+cpu_stl_le_data_ra(CPUArchState *env, abi_ptr addr, uint32_t val, uintptr_t ra)
+{
+ int mmu_index = cpu_mmu_index(env_cpu(env), false);
+ cpu_stl_le_mmuidx_ra(env, addr, val, mmu_index, ra);
+}
+
+static inline void
+cpu_stq_le_data_ra(CPUArchState *env, abi_ptr addr, uint64_t val, uintptr_t ra)
+{
+ int mmu_index = cpu_mmu_index(env_cpu(env), false);
+ cpu_stq_le_mmuidx_ra(env, addr, val, mmu_index, ra);
+}
+
#if TARGET_BIG_ENDIAN
# define cpu_lduw_data cpu_lduw_be_data
# define cpu_ldsw_data cpu_ldsw_be_data
diff --git a/accel/tcg/ldst_common.c.inc b/accel/tcg/ldst_common.c.inc
index 99a56df3fb..2f203290db 100644
--- a/accel/tcg/ldst_common.c.inc
+++ b/accel/tcg/ldst_common.c.inc
@@ -248,114 +248,6 @@ void cpu_st16_mmu(CPUArchState *env, vaddr addr, Int128 val,
* Wrappers of the above
*/
-uint32_t cpu_ldub_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t ra)
-{
- int mmu_index = cpu_mmu_index(env_cpu(env), false);
- return cpu_ldub_mmuidx_ra(env, addr, mmu_index, ra);
-}
-
-int cpu_ldsb_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t ra)
-{
- return (int8_t)cpu_ldub_data_ra(env, addr, ra);
-}
-
-uint32_t cpu_lduw_be_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t ra)
-{
- int mmu_index = cpu_mmu_index(env_cpu(env), false);
- return cpu_lduw_be_mmuidx_ra(env, addr, mmu_index, ra);
-}
-
-int cpu_ldsw_be_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t ra)
-{
- return (int16_t)cpu_lduw_be_data_ra(env, addr, ra);
-}
-
-uint32_t cpu_ldl_be_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t ra)
-{
- int mmu_index = cpu_mmu_index(env_cpu(env), false);
- return cpu_ldl_be_mmuidx_ra(env, addr, mmu_index, ra);
-}
-
-uint64_t cpu_ldq_be_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t ra)
-{
- int mmu_index = cpu_mmu_index(env_cpu(env), false);
- return cpu_ldq_be_mmuidx_ra(env, addr, mmu_index, ra);
-}
-
-uint32_t cpu_lduw_le_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t ra)
-{
- int mmu_index = cpu_mmu_index(env_cpu(env), false);
- return cpu_lduw_le_mmuidx_ra(env, addr, mmu_index, ra);
-}
-
-int cpu_ldsw_le_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t ra)
-{
- return (int16_t)cpu_lduw_le_data_ra(env, addr, ra);
-}
-
-uint32_t cpu_ldl_le_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t ra)
-{
- int mmu_index = cpu_mmu_index(env_cpu(env), false);
- return cpu_ldl_le_mmuidx_ra(env, addr, mmu_index, ra);
-}
-
-uint64_t cpu_ldq_le_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t ra)
-{
- int mmu_index = cpu_mmu_index(env_cpu(env), false);
- return cpu_ldq_le_mmuidx_ra(env, addr, mmu_index, ra);
-}
-
-void cpu_stb_data_ra(CPUArchState *env, abi_ptr addr,
- uint32_t val, uintptr_t ra)
-{
- int mmu_index = cpu_mmu_index(env_cpu(env), false);
- cpu_stb_mmuidx_ra(env, addr, val, mmu_index, ra);
-}
-
-void cpu_stw_be_data_ra(CPUArchState *env, abi_ptr addr,
- uint32_t val, uintptr_t ra)
-{
- int mmu_index = cpu_mmu_index(env_cpu(env), false);
- cpu_stw_be_mmuidx_ra(env, addr, val, mmu_index, ra);
-}
-
-void cpu_stl_be_data_ra(CPUArchState *env, abi_ptr addr,
- uint32_t val, uintptr_t ra)
-{
- int mmu_index = cpu_mmu_index(env_cpu(env), false);
- cpu_stl_be_mmuidx_ra(env, addr, val, mmu_index, ra);
-}
-
-void cpu_stq_be_data_ra(CPUArchState *env, abi_ptr addr,
- uint64_t val, uintptr_t ra)
-{
- int mmu_index = cpu_mmu_index(env_cpu(env), false);
- cpu_stq_be_mmuidx_ra(env, addr, val, mmu_index, ra);
-}
-
-void cpu_stw_le_data_ra(CPUArchState *env, abi_ptr addr,
- uint32_t val, uintptr_t ra)
-{
- int mmu_index = cpu_mmu_index(env_cpu(env), false);
- cpu_stw_le_mmuidx_ra(env, addr, val, mmu_index, ra);
-}
-
-void cpu_stl_le_data_ra(CPUArchState *env, abi_ptr addr,
- uint32_t val, uintptr_t ra)
-{
- int mmu_index = cpu_mmu_index(env_cpu(env), false);
- cpu_stl_le_mmuidx_ra(env, addr, val, mmu_index, ra);
-}
-
-void cpu_stq_le_data_ra(CPUArchState *env, abi_ptr addr,
- uint64_t val, uintptr_t ra)
-{
- int mmu_index = cpu_mmu_index(env_cpu(env), false);
- cpu_stq_le_mmuidx_ra(env, addr, val, mmu_index, ra);
-}
-
-/*--------------------------*/
-
uint32_t cpu_ldub_data(CPUArchState *env, abi_ptr addr)
{
return cpu_ldub_data_ra(env, addr, 0);
--
2.43.0
^ permalink raw reply related [flat|nested] 90+ messages in thread
* [PATCH v2 09/42] include/exec: Inline *_data memory operations
2025-03-18 21:31 [PATCH v2 00/42] accel/tcg, codebase: Build once patches Richard Henderson
` (7 preceding siblings ...)
2025-03-18 21:31 ` [PATCH v2 08/42] include/exec: Inline *_data_ra " Richard Henderson
@ 2025-03-18 21:31 ` Richard Henderson
2025-04-01 6:24 ` Philippe Mathieu-Daudé
2025-03-18 21:31 ` [PATCH v2 10/42] include/exec: Inline *_code " Richard Henderson
` (32 subsequent siblings)
41 siblings, 1 reply; 90+ messages in thread
From: Richard Henderson @ 2025-03-18 21:31 UTC (permalink / raw)
To: qemu-devel; +Cc: pierrick.bouvier, philmd
These need to be per-target for 'abi_ptr'. Expand inline to
the *_data_ra api with ra == 0.
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/exec/cpu_ldst.h | 123 ++++++++++++++++++++++++++++++------
accel/tcg/ldst_common.c.inc | 89 --------------------------
2 files changed, 104 insertions(+), 108 deletions(-)
diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h
index a2a90c7554..d084da0b5f 100644
--- a/include/exec/cpu_ldst.h
+++ b/include/exec/cpu_ldst.h
@@ -74,25 +74,6 @@
#include "user/guest-host.h"
#endif /* CONFIG_USER_ONLY */
-uint32_t cpu_ldub_data(CPUArchState *env, abi_ptr ptr);
-int cpu_ldsb_data(CPUArchState *env, abi_ptr ptr);
-uint32_t cpu_lduw_be_data(CPUArchState *env, abi_ptr ptr);
-int cpu_ldsw_be_data(CPUArchState *env, abi_ptr ptr);
-uint32_t cpu_ldl_be_data(CPUArchState *env, abi_ptr ptr);
-uint64_t cpu_ldq_be_data(CPUArchState *env, abi_ptr ptr);
-uint32_t cpu_lduw_le_data(CPUArchState *env, abi_ptr ptr);
-int cpu_ldsw_le_data(CPUArchState *env, abi_ptr ptr);
-uint32_t cpu_ldl_le_data(CPUArchState *env, abi_ptr ptr);
-uint64_t cpu_ldq_le_data(CPUArchState *env, abi_ptr ptr);
-
-void cpu_stb_data(CPUArchState *env, abi_ptr ptr, uint32_t val);
-void cpu_stw_be_data(CPUArchState *env, abi_ptr ptr, uint32_t val);
-void cpu_stl_be_data(CPUArchState *env, abi_ptr ptr, uint32_t val);
-void cpu_stq_be_data(CPUArchState *env, abi_ptr ptr, uint64_t val);
-void cpu_stw_le_data(CPUArchState *env, abi_ptr ptr, uint32_t val);
-void cpu_stl_le_data(CPUArchState *env, abi_ptr ptr, uint32_t val);
-void cpu_stq_le_data(CPUArchState *env, abi_ptr ptr, uint64_t val);
-
static inline uint32_t
cpu_ldub_mmuidx_ra(CPUArchState *env, abi_ptr addr, int mmu_idx, uintptr_t ra)
{
@@ -342,6 +323,110 @@ cpu_stq_le_data_ra(CPUArchState *env, abi_ptr addr, uint64_t val, uintptr_t ra)
cpu_stq_le_mmuidx_ra(env, addr, val, mmu_index, ra);
}
+/*--------------------------*/
+
+static inline uint32_t
+cpu_ldub_data(CPUArchState *env, abi_ptr addr)
+{
+ return cpu_ldub_data_ra(env, addr, 0);
+}
+
+static inline int
+cpu_ldsb_data(CPUArchState *env, abi_ptr addr)
+{
+ return (int8_t)cpu_ldub_data(env, addr);
+}
+
+static inline uint32_t
+cpu_lduw_be_data(CPUArchState *env, abi_ptr addr)
+{
+ return cpu_lduw_be_data_ra(env, addr, 0);
+}
+
+static inline int
+cpu_ldsw_be_data(CPUArchState *env, abi_ptr addr)
+{
+ return (int16_t)cpu_lduw_be_data(env, addr);
+}
+
+static inline uint32_t
+cpu_ldl_be_data(CPUArchState *env, abi_ptr addr)
+{
+ return cpu_ldl_be_data_ra(env, addr, 0);
+}
+
+static inline uint64_t
+cpu_ldq_be_data(CPUArchState *env, abi_ptr addr)
+{
+ return cpu_ldq_be_data_ra(env, addr, 0);
+}
+
+static inline uint32_t
+cpu_lduw_le_data(CPUArchState *env, abi_ptr addr)
+{
+ return cpu_lduw_le_data_ra(env, addr, 0);
+}
+
+static inline int
+cpu_ldsw_le_data(CPUArchState *env, abi_ptr addr)
+{
+ return (int16_t)cpu_lduw_le_data(env, addr);
+}
+
+static inline uint32_t
+cpu_ldl_le_data(CPUArchState *env, abi_ptr addr)
+{
+ return cpu_ldl_le_data_ra(env, addr, 0);
+}
+
+static inline uint64_t
+cpu_ldq_le_data(CPUArchState *env, abi_ptr addr)
+{
+ return cpu_ldq_le_data_ra(env, addr, 0);
+}
+
+static inline void
+cpu_stb_data(CPUArchState *env, abi_ptr addr, uint32_t val)
+{
+ cpu_stb_data_ra(env, addr, val, 0);
+}
+
+static inline void
+cpu_stw_be_data(CPUArchState *env, abi_ptr addr, uint32_t val)
+{
+ cpu_stw_be_data_ra(env, addr, val, 0);
+}
+
+static inline void
+cpu_stl_be_data(CPUArchState *env, abi_ptr addr, uint32_t val)
+{
+ cpu_stl_be_data_ra(env, addr, val, 0);
+}
+
+static inline void
+cpu_stq_be_data(CPUArchState *env, abi_ptr addr, uint64_t val)
+{
+ cpu_stq_be_data_ra(env, addr, val, 0);
+}
+
+static inline void
+cpu_stw_le_data(CPUArchState *env, abi_ptr addr, uint32_t val)
+{
+ cpu_stw_le_data_ra(env, addr, val, 0);
+}
+
+static inline void
+cpu_stl_le_data(CPUArchState *env, abi_ptr addr, uint32_t val)
+{
+ cpu_stl_le_data_ra(env, addr, val, 0);
+}
+
+static inline void
+cpu_stq_le_data(CPUArchState *env, abi_ptr addr, uint64_t val)
+{
+ cpu_stq_le_data_ra(env, addr, val, 0);
+}
+
#if TARGET_BIG_ENDIAN
# define cpu_lduw_data cpu_lduw_be_data
# define cpu_ldsw_data cpu_ldsw_be_data
diff --git a/accel/tcg/ldst_common.c.inc b/accel/tcg/ldst_common.c.inc
index 2f203290db..9791a4e9ef 100644
--- a/accel/tcg/ldst_common.c.inc
+++ b/accel/tcg/ldst_common.c.inc
@@ -243,92 +243,3 @@ void cpu_st16_mmu(CPUArchState *env, vaddr addr, Int128 val,
do_st16_mmu(env_cpu(env), addr, val, oi, retaddr);
plugin_store_cb(env, addr, int128_getlo(val), int128_gethi(val), oi);
}
-
-/*
- * Wrappers of the above
- */
-
-uint32_t cpu_ldub_data(CPUArchState *env, abi_ptr addr)
-{
- return cpu_ldub_data_ra(env, addr, 0);
-}
-
-int cpu_ldsb_data(CPUArchState *env, abi_ptr addr)
-{
- return (int8_t)cpu_ldub_data(env, addr);
-}
-
-uint32_t cpu_lduw_be_data(CPUArchState *env, abi_ptr addr)
-{
- return cpu_lduw_be_data_ra(env, addr, 0);
-}
-
-int cpu_ldsw_be_data(CPUArchState *env, abi_ptr addr)
-{
- return (int16_t)cpu_lduw_be_data(env, addr);
-}
-
-uint32_t cpu_ldl_be_data(CPUArchState *env, abi_ptr addr)
-{
- return cpu_ldl_be_data_ra(env, addr, 0);
-}
-
-uint64_t cpu_ldq_be_data(CPUArchState *env, abi_ptr addr)
-{
- return cpu_ldq_be_data_ra(env, addr, 0);
-}
-
-uint32_t cpu_lduw_le_data(CPUArchState *env, abi_ptr addr)
-{
- return cpu_lduw_le_data_ra(env, addr, 0);
-}
-
-int cpu_ldsw_le_data(CPUArchState *env, abi_ptr addr)
-{
- return (int16_t)cpu_lduw_le_data(env, addr);
-}
-
-uint32_t cpu_ldl_le_data(CPUArchState *env, abi_ptr addr)
-{
- return cpu_ldl_le_data_ra(env, addr, 0);
-}
-
-uint64_t cpu_ldq_le_data(CPUArchState *env, abi_ptr addr)
-{
- return cpu_ldq_le_data_ra(env, addr, 0);
-}
-
-void cpu_stb_data(CPUArchState *env, abi_ptr addr, uint32_t val)
-{
- cpu_stb_data_ra(env, addr, val, 0);
-}
-
-void cpu_stw_be_data(CPUArchState *env, abi_ptr addr, uint32_t val)
-{
- cpu_stw_be_data_ra(env, addr, val, 0);
-}
-
-void cpu_stl_be_data(CPUArchState *env, abi_ptr addr, uint32_t val)
-{
- cpu_stl_be_data_ra(env, addr, val, 0);
-}
-
-void cpu_stq_be_data(CPUArchState *env, abi_ptr addr, uint64_t val)
-{
- cpu_stq_be_data_ra(env, addr, val, 0);
-}
-
-void cpu_stw_le_data(CPUArchState *env, abi_ptr addr, uint32_t val)
-{
- cpu_stw_le_data_ra(env, addr, val, 0);
-}
-
-void cpu_stl_le_data(CPUArchState *env, abi_ptr addr, uint32_t val)
-{
- cpu_stl_le_data_ra(env, addr, val, 0);
-}
-
-void cpu_stq_le_data(CPUArchState *env, abi_ptr addr, uint64_t val)
-{
- cpu_stq_le_data_ra(env, addr, val, 0);
-}
--
2.43.0
^ permalink raw reply related [flat|nested] 90+ messages in thread
* [PATCH v2 10/42] include/exec: Inline *_code memory operations
2025-03-18 21:31 [PATCH v2 00/42] accel/tcg, codebase: Build once patches Richard Henderson
` (8 preceding siblings ...)
2025-03-18 21:31 ` [PATCH v2 09/42] include/exec: Inline *_data " Richard Henderson
@ 2025-03-18 21:31 ` Richard Henderson
2025-03-18 21:31 ` [PATCH v2 11/42] accel/tcg: Perform aligned atomic reads in translator_ld Richard Henderson
` (31 subsequent siblings)
41 siblings, 0 replies; 90+ messages in thread
From: Richard Henderson @ 2025-03-18 21:31 UTC (permalink / raw)
To: qemu-devel; +Cc: pierrick.bouvier, philmd
These need to be per-target for 'abi_ptr' and endianness.
These expand inline to the *_mmu api with a lookup of the
target's cpu_mmu_index() and ra == 0.
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/exec/cpu_ldst.h | 31 +++++++++++++++++++++++++++----
accel/tcg/cputlb.c | 28 ----------------------------
accel/tcg/user-exec.c | 40 ----------------------------------------
3 files changed, 27 insertions(+), 72 deletions(-)
diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h
index d084da0b5f..82e67eff68 100644
--- a/include/exec/cpu_ldst.h
+++ b/include/exec/cpu_ldst.h
@@ -473,10 +473,33 @@ cpu_stq_le_data(CPUArchState *env, abi_ptr addr, uint64_t val)
# define cpu_stq_mmuidx_ra cpu_stq_le_mmuidx_ra
#endif
-uint32_t cpu_ldub_code(CPUArchState *env, abi_ptr addr);
-uint32_t cpu_lduw_code(CPUArchState *env, abi_ptr addr);
-uint32_t cpu_ldl_code(CPUArchState *env, abi_ptr addr);
-uint64_t cpu_ldq_code(CPUArchState *env, abi_ptr addr);
+static inline uint32_t cpu_ldub_code(CPUArchState *env, abi_ptr addr)
+{
+ CPUState *cs = env_cpu(env);
+ MemOpIdx oi = make_memop_idx(MO_UB, cpu_mmu_index(cs, true));
+ return cpu_ldb_code_mmu(env, addr, oi, 0);
+}
+
+static inline uint32_t cpu_lduw_code(CPUArchState *env, abi_ptr addr)
+{
+ CPUState *cs = env_cpu(env);
+ MemOpIdx oi = make_memop_idx(MO_TEUW, cpu_mmu_index(cs, true));
+ return cpu_ldw_code_mmu(env, addr, oi, 0);
+}
+
+static inline uint32_t cpu_ldl_code(CPUArchState *env, abi_ptr addr)
+{
+ CPUState *cs = env_cpu(env);
+ MemOpIdx oi = make_memop_idx(MO_TEUL, cpu_mmu_index(cs, true));
+ return cpu_ldl_code_mmu(env, addr, oi, 0);
+}
+
+static inline uint64_t cpu_ldq_code(CPUArchState *env, abi_ptr addr)
+{
+ CPUState *cs = env_cpu(env);
+ MemOpIdx oi = make_memop_idx(MO_TEUQ, cpu_mmu_index(cs, true));
+ return cpu_ldq_code_mmu(env, addr, oi, 0);
+}
/**
* tlb_vaddr_to_host:
diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c
index b03998f926..2817c9dbdd 100644
--- a/accel/tcg/cputlb.c
+++ b/accel/tcg/cputlb.c
@@ -2897,34 +2897,6 @@ static void do_st16_mmu(CPUState *cpu, vaddr addr, Int128 val,
/* Code access functions. */
-uint32_t cpu_ldub_code(CPUArchState *env, abi_ptr addr)
-{
- CPUState *cs = env_cpu(env);
- MemOpIdx oi = make_memop_idx(MO_UB, cpu_mmu_index(cs, true));
- return do_ld1_mmu(cs, addr, oi, 0, MMU_INST_FETCH);
-}
-
-uint32_t cpu_lduw_code(CPUArchState *env, abi_ptr addr)
-{
- CPUState *cs = env_cpu(env);
- MemOpIdx oi = make_memop_idx(MO_TEUW, cpu_mmu_index(cs, true));
- return do_ld2_mmu(cs, addr, oi, 0, MMU_INST_FETCH);
-}
-
-uint32_t cpu_ldl_code(CPUArchState *env, abi_ptr addr)
-{
- CPUState *cs = env_cpu(env);
- MemOpIdx oi = make_memop_idx(MO_TEUL, cpu_mmu_index(cs, true));
- return do_ld4_mmu(cs, addr, oi, 0, MMU_INST_FETCH);
-}
-
-uint64_t cpu_ldq_code(CPUArchState *env, abi_ptr addr)
-{
- CPUState *cs = env_cpu(env);
- MemOpIdx oi = make_memop_idx(MO_TEUQ, cpu_mmu_index(cs, true));
- return do_ld8_mmu(cs, addr, oi, 0, MMU_INST_FETCH);
-}
-
uint8_t cpu_ldb_code_mmu(CPUArchState *env, vaddr addr,
MemOpIdx oi, uintptr_t retaddr)
{
diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c
index dec17435c5..ebc7c3ecf5 100644
--- a/accel/tcg/user-exec.c
+++ b/accel/tcg/user-exec.c
@@ -1214,46 +1214,6 @@ static void do_st16_mmu(CPUState *cpu, vaddr addr, Int128 val,
clear_helper_retaddr();
}
-uint32_t cpu_ldub_code(CPUArchState *env, abi_ptr ptr)
-{
- uint32_t ret;
-
- set_helper_retaddr(1);
- ret = ldub_p(g2h_untagged(ptr));
- clear_helper_retaddr();
- return ret;
-}
-
-uint32_t cpu_lduw_code(CPUArchState *env, abi_ptr ptr)
-{
- uint32_t ret;
-
- set_helper_retaddr(1);
- ret = lduw_p(g2h_untagged(ptr));
- clear_helper_retaddr();
- return ret;
-}
-
-uint32_t cpu_ldl_code(CPUArchState *env, abi_ptr ptr)
-{
- uint32_t ret;
-
- set_helper_retaddr(1);
- ret = ldl_p(g2h_untagged(ptr));
- clear_helper_retaddr();
- return ret;
-}
-
-uint64_t cpu_ldq_code(CPUArchState *env, abi_ptr ptr)
-{
- uint64_t ret;
-
- set_helper_retaddr(1);
- ret = ldq_p(g2h_untagged(ptr));
- clear_helper_retaddr();
- return ret;
-}
-
uint8_t cpu_ldb_code_mmu(CPUArchState *env, vaddr addr,
MemOpIdx oi, uintptr_t ra)
{
--
2.43.0
^ permalink raw reply related [flat|nested] 90+ messages in thread
* [PATCH v2 11/42] accel/tcg: Perform aligned atomic reads in translator_ld
2025-03-18 21:31 [PATCH v2 00/42] accel/tcg, codebase: Build once patches Richard Henderson
` (9 preceding siblings ...)
2025-03-18 21:31 ` [PATCH v2 10/42] include/exec: Inline *_code " Richard Henderson
@ 2025-03-18 21:31 ` Richard Henderson
2025-03-19 0:05 ` Alistair Francis
` (3 more replies)
2025-03-18 21:31 ` [PATCH v2 12/42] accel/tcg: Use cpu_ld*_code_mmu in translator.c Richard Henderson
` (30 subsequent siblings)
41 siblings, 4 replies; 90+ messages in thread
From: Richard Henderson @ 2025-03-18 21:31 UTC (permalink / raw)
To: qemu-devel; +Cc: pierrick.bouvier, philmd
Perform aligned atomic reads in translator_ld, if possible.
According to
https://lore.kernel.org/qemu-devel/20240607101403.1109-1-jim.shu@sifive.com/
this is required for RISC-V Ziccif.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
accel/tcg/translator.c | 42 ++++++++++++++++++++++++++++++++++++++----
1 file changed, 38 insertions(+), 4 deletions(-)
diff --git a/accel/tcg/translator.c b/accel/tcg/translator.c
index ef1538b4fc..157be33bf6 100644
--- a/accel/tcg/translator.c
+++ b/accel/tcg/translator.c
@@ -265,12 +265,14 @@ static bool translator_ld(CPUArchState *env, DisasContextBase *db,
if (likely(((base ^ last) & TARGET_PAGE_MASK) == 0)) {
/* Entire read is from the first page. */
- memcpy(dest, host + (pc - base), len);
- return true;
+ goto do_read;
}
if (unlikely(((base ^ pc) & TARGET_PAGE_MASK) == 0)) {
- /* Read begins on the first page and extends to the second. */
+ /*
+ * Read begins on the first page and extends to the second.
+ * The unaligned read is never atomic.
+ */
size_t len0 = -(pc | TARGET_PAGE_MASK);
memcpy(dest, host + (pc - base), len0);
pc += len0;
@@ -329,7 +331,39 @@ static bool translator_ld(CPUArchState *env, DisasContextBase *db,
host = db->host_addr[1];
}
- memcpy(dest, host + (pc - base), len);
+ do_read:
+ /*
+ * Assume aligned reads should be atomic, if possible.
+ * We're not in a position to jump out with EXCP_ATOMIC.
+ */
+ host += pc - base;
+ switch (len) {
+ case 2:
+ if (QEMU_IS_ALIGNED(pc, 2)) {
+ uint16_t t = qatomic_read((uint16_t *)host);
+ stw_he_p(dest, t);
+ return true;
+ }
+ break;
+ case 4:
+ if (QEMU_IS_ALIGNED(pc, 4)) {
+ uint32_t t = qatomic_read((uint32_t *)host);
+ stl_he_p(dest, t);
+ return true;
+ }
+ break;
+#ifdef CONFIG_ATOMIC64
+ case 8:
+ if (QEMU_IS_ALIGNED(pc, 8)) {
+ uint64_t t = qatomic_read__nocheck((uint64_t *)host);
+ stq_he_p(dest, t);
+ return true;
+ }
+ break;
+#endif
+ }
+ /* Unaligned or partial read from the second page is not atomic. */
+ memcpy(dest, host, len);
return true;
}
--
2.43.0
^ permalink raw reply related [flat|nested] 90+ messages in thread
* [PATCH v2 12/42] accel/tcg: Use cpu_ld*_code_mmu in translator.c
2025-03-18 21:31 [PATCH v2 00/42] accel/tcg, codebase: Build once patches Richard Henderson
` (10 preceding siblings ...)
2025-03-18 21:31 ` [PATCH v2 11/42] accel/tcg: Perform aligned atomic reads in translator_ld Richard Henderson
@ 2025-03-18 21:31 ` Richard Henderson
2025-03-19 0:23 ` Pierrick Bouvier
2025-03-18 21:31 ` [PATCH v2 13/42] accel/tcg: Implement translator_ld*_end Richard Henderson
` (29 subsequent siblings)
41 siblings, 1 reply; 90+ messages in thread
From: Richard Henderson @ 2025-03-18 21:31 UTC (permalink / raw)
To: qemu-devel; +Cc: pierrick.bouvier, philmd
Cache the mmu index in DisasContextBase.
Perform the read on host endianness, which lets us
share code with the translator_ld fast path.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/exec/translator.h | 1 +
accel/tcg/translator.c | 58 ++++++++++++++++++---------------------
2 files changed, 28 insertions(+), 31 deletions(-)
diff --git a/include/exec/translator.h b/include/exec/translator.h
index d70942a10f..205dd85bba 100644
--- a/include/exec/translator.h
+++ b/include/exec/translator.h
@@ -73,6 +73,7 @@ struct DisasContextBase {
int max_insns;
bool plugin_enabled;
bool fake_insn;
+ uint8_t code_mmuidx;
struct TCGOp *insn_start;
void *host_addr[2];
diff --git a/accel/tcg/translator.c b/accel/tcg/translator.c
index 157be33bf6..6fd9237298 100644
--- a/accel/tcg/translator.c
+++ b/accel/tcg/translator.c
@@ -11,10 +11,10 @@
#include "qemu/log.h"
#include "qemu/error-report.h"
#include "exec/exec-all.h"
+#include "exec/cpu-ldst-common.h"
+#include "exec/cpu-mmu-index.h"
#include "exec/translator.h"
-#include "exec/cpu_ldst.h"
#include "exec/plugin-gen.h"
-#include "exec/cpu_ldst.h"
#include "exec/tswap.h"
#include "tcg/tcg-op-common.h"
#include "internal-target.h"
@@ -142,6 +142,7 @@ void translator_loop(CPUState *cpu, TranslationBlock *tb, int *max_insns,
db->host_addr[1] = NULL;
db->record_start = 0;
db->record_len = 0;
+ db->code_mmuidx = cpu_mmu_index(cpu, true);
ops->init_disas_context(db, cpu);
tcg_debug_assert(db->is_jmp == DISAS_NEXT); /* no early exit */
@@ -457,55 +458,50 @@ bool translator_st(const DisasContextBase *db, void *dest,
uint8_t translator_ldub(CPUArchState *env, DisasContextBase *db, vaddr pc)
{
- uint8_t raw;
+ uint8_t val;
- if (!translator_ld(env, db, &raw, pc, sizeof(raw))) {
- raw = cpu_ldub_code(env, pc);
- record_save(db, pc, &raw, sizeof(raw));
+ if (!translator_ld(env, db, &val, pc, sizeof(val))) {
+ MemOpIdx oi = make_memop_idx(MO_UB, db->code_mmuidx);
+ val = cpu_ldb_code_mmu(env, pc, oi, 0);
+ record_save(db, pc, &val, sizeof(val));
}
- return raw;
+ return val;
}
uint16_t translator_lduw(CPUArchState *env, DisasContextBase *db, vaddr pc)
{
- uint16_t raw, tgt;
+ uint16_t val;
- if (translator_ld(env, db, &raw, pc, sizeof(raw))) {
- tgt = tswap16(raw);
- } else {
- tgt = cpu_lduw_code(env, pc);
- raw = tswap16(tgt);
- record_save(db, pc, &raw, sizeof(raw));
+ if (!translator_ld(env, db, &val, pc, sizeof(val))) {
+ MemOpIdx oi = make_memop_idx(MO_UW, db->code_mmuidx);
+ val = cpu_ldw_code_mmu(env, pc, oi, 0);
+ record_save(db, pc, &val, sizeof(val));
}
- return tgt;
+ return tswap16(val);
}
uint32_t translator_ldl(CPUArchState *env, DisasContextBase *db, vaddr pc)
{
- uint32_t raw, tgt;
+ uint32_t val;
- if (translator_ld(env, db, &raw, pc, sizeof(raw))) {
- tgt = tswap32(raw);
- } else {
- tgt = cpu_ldl_code(env, pc);
- raw = tswap32(tgt);
- record_save(db, pc, &raw, sizeof(raw));
+ if (!translator_ld(env, db, &val, pc, sizeof(val))) {
+ MemOpIdx oi = make_memop_idx(MO_UL, db->code_mmuidx);
+ val = cpu_ldl_code_mmu(env, pc, oi, 0);
+ record_save(db, pc, &val, sizeof(val));
}
- return tgt;
+ return tswap32(val);
}
uint64_t translator_ldq(CPUArchState *env, DisasContextBase *db, vaddr pc)
{
- uint64_t raw, tgt;
+ uint64_t val;
- if (translator_ld(env, db, &raw, pc, sizeof(raw))) {
- tgt = tswap64(raw);
- } else {
- tgt = cpu_ldq_code(env, pc);
- raw = tswap64(tgt);
- record_save(db, pc, &raw, sizeof(raw));
+ if (!translator_ld(env, db, &val, pc, sizeof(val))) {
+ MemOpIdx oi = make_memop_idx(MO_UQ, db->code_mmuidx);
+ val = cpu_ldq_code_mmu(env, pc, oi, 0);
+ record_save(db, pc, &val, sizeof(val));
}
- return tgt;
+ return tswap64(val);
}
void translator_fake_ld(DisasContextBase *db, const void *data, size_t len)
--
2.43.0
^ permalink raw reply related [flat|nested] 90+ messages in thread
* [PATCH v2 13/42] accel/tcg: Implement translator_ld*_end
2025-03-18 21:31 [PATCH v2 00/42] accel/tcg, codebase: Build once patches Richard Henderson
` (11 preceding siblings ...)
2025-03-18 21:31 ` [PATCH v2 12/42] accel/tcg: Use cpu_ld*_code_mmu in translator.c Richard Henderson
@ 2025-03-18 21:31 ` Richard Henderson
2025-03-18 21:31 ` [PATCH v2 14/42] accel/tcg: Remove mmap_lock/unlock from watchpoint.c Richard Henderson
` (28 subsequent siblings)
41 siblings, 0 replies; 90+ messages in thread
From: Richard Henderson @ 2025-03-18 21:31 UTC (permalink / raw)
To: qemu-devel; +Cc: pierrick.bouvier, philmd
Add a new family of translator load functions which take
an absolute endianness value in the form of MO_BE/MO_LE.
Expand the other translator_ld* functions on top of this.
Remove exec/tswap.h from translator.c.
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/exec/translator.h | 49 ++++++++++++++++++++++++---------------
accel/tcg/translator.c | 26 +++++++++++++++------
2 files changed, 49 insertions(+), 26 deletions(-)
diff --git a/include/exec/translator.h b/include/exec/translator.h
index 205dd85bba..3c32655569 100644
--- a/include/exec/translator.h
+++ b/include/exec/translator.h
@@ -18,7 +18,7 @@
* member in your target-specific DisasContext.
*/
-#include "qemu/bswap.h"
+#include "exec/memop.h"
#include "exec/vaddr.h"
/**
@@ -181,42 +181,53 @@ bool translator_io_start(DisasContextBase *db);
*/
uint8_t translator_ldub(CPUArchState *env, DisasContextBase *db, vaddr pc);
-uint16_t translator_lduw(CPUArchState *env, DisasContextBase *db, vaddr pc);
-uint32_t translator_ldl(CPUArchState *env, DisasContextBase *db, vaddr pc);
-uint64_t translator_ldq(CPUArchState *env, DisasContextBase *db, vaddr pc);
+uint16_t translator_lduw_end(CPUArchState *env, DisasContextBase *db,
+ vaddr pc, MemOp endian);
+uint32_t translator_ldl_end(CPUArchState *env, DisasContextBase *db,
+ vaddr pc, MemOp endian);
+uint64_t translator_ldq_end(CPUArchState *env, DisasContextBase *db,
+ vaddr pc, MemOp endian);
+
+#ifdef COMPILING_PER_TARGET
+static inline uint16_t
+translator_lduw(CPUArchState *env, DisasContextBase *db, vaddr pc)
+{
+ return translator_lduw_end(env, db, pc, MO_TE);
+}
+
+static inline uint32_t
+translator_ldl(CPUArchState *env, DisasContextBase *db, vaddr pc)
+{
+ return translator_ldl_end(env, db, pc, MO_TE);
+}
+
+static inline uint64_t
+translator_ldq(CPUArchState *env, DisasContextBase *db, vaddr pc)
+{
+ return translator_ldq_end(env, db, pc, MO_TE);
+}
static inline uint16_t
translator_lduw_swap(CPUArchState *env, DisasContextBase *db,
vaddr pc, bool do_swap)
{
- uint16_t ret = translator_lduw(env, db, pc);
- if (do_swap) {
- ret = bswap16(ret);
- }
- return ret;
+ return translator_lduw_end(env, db, pc, MO_TE ^ (do_swap * MO_BSWAP));
}
static inline uint32_t
translator_ldl_swap(CPUArchState *env, DisasContextBase *db,
vaddr pc, bool do_swap)
{
- uint32_t ret = translator_ldl(env, db, pc);
- if (do_swap) {
- ret = bswap32(ret);
- }
- return ret;
+ return translator_ldl_end(env, db, pc, MO_TE ^ (do_swap * MO_BSWAP));
}
static inline uint64_t
translator_ldq_swap(CPUArchState *env, DisasContextBase *db,
vaddr pc, bool do_swap)
{
- uint64_t ret = translator_ldq(env, db, pc);
- if (do_swap) {
- ret = bswap64(ret);
- }
- return ret;
+ return translator_ldq_end(env, db, pc, MO_TE ^ (do_swap * MO_BSWAP));
}
+#endif /* COMPILING_PER_TARGET */
/**
* translator_fake_ld - fake instruction load
diff --git a/accel/tcg/translator.c b/accel/tcg/translator.c
index 6fd9237298..7ef04fc597 100644
--- a/accel/tcg/translator.c
+++ b/accel/tcg/translator.c
@@ -8,6 +8,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/bswap.h"
#include "qemu/log.h"
#include "qemu/error-report.h"
#include "exec/exec-all.h"
@@ -15,7 +16,6 @@
#include "exec/cpu-mmu-index.h"
#include "exec/translator.h"
#include "exec/plugin-gen.h"
-#include "exec/tswap.h"
#include "tcg/tcg-op-common.h"
#include "internal-target.h"
#include "disas/disas.h"
@@ -468,7 +468,8 @@ uint8_t translator_ldub(CPUArchState *env, DisasContextBase *db, vaddr pc)
return val;
}
-uint16_t translator_lduw(CPUArchState *env, DisasContextBase *db, vaddr pc)
+uint16_t translator_lduw_end(CPUArchState *env, DisasContextBase *db,
+ vaddr pc, MemOp endian)
{
uint16_t val;
@@ -477,10 +478,14 @@ uint16_t translator_lduw(CPUArchState *env, DisasContextBase *db, vaddr pc)
val = cpu_ldw_code_mmu(env, pc, oi, 0);
record_save(db, pc, &val, sizeof(val));
}
- return tswap16(val);
+ if (endian & MO_BSWAP) {
+ val = bswap16(val);
+ }
+ return val;
}
-uint32_t translator_ldl(CPUArchState *env, DisasContextBase *db, vaddr pc)
+uint32_t translator_ldl_end(CPUArchState *env, DisasContextBase *db,
+ vaddr pc, MemOp endian)
{
uint32_t val;
@@ -489,10 +494,14 @@ uint32_t translator_ldl(CPUArchState *env, DisasContextBase *db, vaddr pc)
val = cpu_ldl_code_mmu(env, pc, oi, 0);
record_save(db, pc, &val, sizeof(val));
}
- return tswap32(val);
+ if (endian & MO_BSWAP) {
+ val = bswap32(val);
+ }
+ return val;
}
-uint64_t translator_ldq(CPUArchState *env, DisasContextBase *db, vaddr pc)
+uint64_t translator_ldq_end(CPUArchState *env, DisasContextBase *db,
+ vaddr pc, MemOp endian)
{
uint64_t val;
@@ -501,7 +510,10 @@ uint64_t translator_ldq(CPUArchState *env, DisasContextBase *db, vaddr pc)
val = cpu_ldq_code_mmu(env, pc, oi, 0);
record_save(db, pc, &val, sizeof(val));
}
- return tswap64(val);
+ if (endian & MO_BSWAP) {
+ val = bswap64(val);
+ }
+ return val;
}
void translator_fake_ld(DisasContextBase *db, const void *data, size_t len)
--
2.43.0
^ permalink raw reply related [flat|nested] 90+ messages in thread
* [PATCH v2 14/42] accel/tcg: Remove mmap_lock/unlock from watchpoint.c
2025-03-18 21:31 [PATCH v2 00/42] accel/tcg, codebase: Build once patches Richard Henderson
` (12 preceding siblings ...)
2025-03-18 21:31 ` [PATCH v2 13/42] accel/tcg: Implement translator_ld*_end Richard Henderson
@ 2025-03-18 21:31 ` Richard Henderson
2025-03-18 21:31 ` [PATCH v2 15/42] include/exec: Split out mmap-lock.h Richard Henderson
` (27 subsequent siblings)
41 siblings, 0 replies; 90+ messages in thread
From: Richard Henderson @ 2025-03-18 21:31 UTC (permalink / raw)
To: qemu-devel; +Cc: pierrick.bouvier, philmd
The mmap_lock is user-only, whereas watchpoint.c
is only compiled for system mode.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
accel/tcg/watchpoint.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/accel/tcg/watchpoint.c b/accel/tcg/watchpoint.c
index 65b21884ce..cfb37a49e7 100644
--- a/accel/tcg/watchpoint.c
+++ b/accel/tcg/watchpoint.c
@@ -124,17 +124,14 @@ void cpu_check_watchpoint(CPUState *cpu, vaddr addr, vaddr len,
}
cpu->watchpoint_hit = wp;
- mmap_lock();
/* This call also restores vCPU state */
tb_check_watchpoint(cpu, ra);
if (wp->flags & BP_STOP_BEFORE_ACCESS) {
cpu->exception_index = EXCP_DEBUG;
- mmap_unlock();
cpu_loop_exit(cpu);
} else {
/* Force execution of one insn next time. */
cpu->cflags_next_tb = 1 | CF_NOIRQ | curr_cflags(cpu);
- mmap_unlock();
cpu_loop_exit_noexc(cpu);
}
} else {
--
2.43.0
^ permalink raw reply related [flat|nested] 90+ messages in thread
* [PATCH v2 15/42] include/exec: Split out mmap-lock.h
2025-03-18 21:31 [PATCH v2 00/42] accel/tcg, codebase: Build once patches Richard Henderson
` (13 preceding siblings ...)
2025-03-18 21:31 ` [PATCH v2 14/42] accel/tcg: Remove mmap_lock/unlock from watchpoint.c Richard Henderson
@ 2025-03-18 21:31 ` Richard Henderson
2025-03-31 22:05 ` Pierrick Bouvier
2025-03-18 21:31 ` [PATCH v2 16/42] include/system: Move exec/memory.h to system/memory.h Richard Henderson
` (26 subsequent siblings)
41 siblings, 1 reply; 90+ messages in thread
From: Richard Henderson @ 2025-03-18 21:31 UTC (permalink / raw)
To: qemu-devel; +Cc: pierrick.bouvier, philmd
Split out mmap_lock, et al from page-protection.h
to a new header.
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
accel/tcg/internal-target.h | 1 +
include/exec/mmap-lock.h | 33 +++++++++++++++++++++++++++++++++
include/exec/page-protection.h | 22 ----------------------
accel/tcg/cpu-exec.c | 1 +
accel/tcg/tb-maint.c | 1 +
accel/tcg/translate-all.c | 1 +
linux-user/arm/cpu_loop.c | 1 +
linux-user/elfload.c | 1 +
linux-user/flatload.c | 1 +
linux-user/mmap.c | 1 +
linux-user/syscall.c | 1 +
target/arm/helper.c | 1 +
12 files changed, 43 insertions(+), 22 deletions(-)
create mode 100644 include/exec/mmap-lock.h
diff --git a/accel/tcg/internal-target.h b/accel/tcg/internal-target.h
index 2cdf11c905..c88f007ffb 100644
--- a/accel/tcg/internal-target.h
+++ b/accel/tcg/internal-target.h
@@ -13,6 +13,7 @@
#include "exec/translation-block.h"
#include "tb-internal.h"
#include "tcg-target-mo.h"
+#include "exec/mmap-lock.h"
/*
* Access to the various translations structures need to be serialised
diff --git a/include/exec/mmap-lock.h b/include/exec/mmap-lock.h
new file mode 100644
index 0000000000..eb02dd409c
--- /dev/null
+++ b/include/exec/mmap-lock.h
@@ -0,0 +1,33 @@
+/*
+ * QEMU user-only mmap lock, with stubs for system mode
+ *
+ * Copyright (c) 2003 Fabrice Bellard
+ *
+ * SPDX-License-Identifier: LGPL-2.1+
+ */
+#ifndef EXEC_MMAP_LOCK_H
+#define EXEC_MMAP_LOCK_H
+
+#ifdef CONFIG_USER_ONLY
+
+void TSA_NO_TSA mmap_lock(void);
+void TSA_NO_TSA mmap_unlock(void);
+bool have_mmap_lock(void);
+
+static inline void mmap_unlock_guard(void *unused)
+{
+ mmap_unlock();
+}
+
+#define WITH_MMAP_LOCK_GUARD() \
+ for (int _mmap_lock_iter __attribute__((cleanup(mmap_unlock_guard))) \
+ = (mmap_lock(), 0); _mmap_lock_iter == 0; _mmap_lock_iter = 1)
+
+#else
+
+static inline void mmap_lock(void) {}
+static inline void mmap_unlock(void) {}
+#define WITH_MMAP_LOCK_GUARD()
+
+#endif /* CONFIG_USER_ONLY */
+#endif /* EXEC_MMAP_LOCK_H */
diff --git a/include/exec/page-protection.h b/include/exec/page-protection.h
index 3e0a8a0333..c43231af8b 100644
--- a/include/exec/page-protection.h
+++ b/include/exec/page-protection.h
@@ -38,26 +38,4 @@
*/
#define PAGE_PASSTHROUGH 0x0800
-#ifdef CONFIG_USER_ONLY
-
-void TSA_NO_TSA mmap_lock(void);
-void TSA_NO_TSA mmap_unlock(void);
-bool have_mmap_lock(void);
-
-static inline void mmap_unlock_guard(void *unused)
-{
- mmap_unlock();
-}
-
-#define WITH_MMAP_LOCK_GUARD() \
- for (int _mmap_lock_iter __attribute__((cleanup(mmap_unlock_guard))) \
- = (mmap_lock(), 0); _mmap_lock_iter == 0; _mmap_lock_iter = 1)
-#else
-
-static inline void mmap_lock(void) {}
-static inline void mmap_unlock(void) {}
-#define WITH_MMAP_LOCK_GUARD()
-
-#endif /* !CONFIG_USER_ONLY */
-
#endif
diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c
index ef3d967e3a..372b876604 100644
--- a/accel/tcg/cpu-exec.c
+++ b/accel/tcg/cpu-exec.c
@@ -27,6 +27,7 @@
#include "disas/disas.h"
#include "exec/cpu-common.h"
#include "exec/page-protection.h"
+#include "exec/mmap-lock.h"
#include "exec/translation-block.h"
#include "tcg/tcg.h"
#include "qemu/atomic.h"
diff --git a/accel/tcg/tb-maint.c b/accel/tcg/tb-maint.c
index 3f1bebf6ab..d5899ad047 100644
--- a/accel/tcg/tb-maint.c
+++ b/accel/tcg/tb-maint.c
@@ -24,6 +24,7 @@
#include "exec/log.h"
#include "exec/exec-all.h"
#include "exec/page-protection.h"
+#include "exec/mmap-lock.h"
#include "exec/tb-flush.h"
#include "tb-internal.h"
#include "system/tcg.h"
diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c
index 82bc16bd53..16e5043597 100644
--- a/accel/tcg/translate-all.c
+++ b/accel/tcg/translate-all.c
@@ -45,6 +45,7 @@
#include "exec/cputlb.h"
#include "exec/page-protection.h"
+#include "exec/mmap-lock.h"
#include "tb-internal.h"
#include "exec/translator.h"
#include "exec/tb-flush.h"
diff --git a/linux-user/arm/cpu_loop.c b/linux-user/arm/cpu_loop.c
index 7416e3216e..e8417d0406 100644
--- a/linux-user/arm/cpu_loop.c
+++ b/linux-user/arm/cpu_loop.c
@@ -25,6 +25,7 @@
#include "signal-common.h"
#include "semihosting/common-semi.h"
#include "exec/page-protection.h"
+#include "exec/mmap-lock.h"
#include "user/page-protection.h"
#include "target/arm/syndrome.h"
diff --git a/linux-user/elfload.c b/linux-user/elfload.c
index 8799e4ea27..f54054dce3 100644
--- a/linux-user/elfload.c
+++ b/linux-user/elfload.c
@@ -10,6 +10,7 @@
#include "user/tswap-target.h"
#include "user/page-protection.h"
#include "exec/page-protection.h"
+#include "exec/mmap-lock.h"
#include "exec/translation-block.h"
#include "user/guest-base.h"
#include "user-internals.h"
diff --git a/linux-user/flatload.c b/linux-user/flatload.c
index d5cb1830dd..4beb3ed1b9 100644
--- a/linux-user/flatload.c
+++ b/linux-user/flatload.c
@@ -35,6 +35,7 @@
#include "qemu.h"
#include "exec/page-protection.h"
+#include "exec/mmap-lock.h"
#include "user-internals.h"
#include "loader.h"
#include "user-mmap.h"
diff --git a/linux-user/mmap.c b/linux-user/mmap.c
index d1f36e6f16..f88a80c31e 100644
--- a/linux-user/mmap.c
+++ b/linux-user/mmap.c
@@ -21,6 +21,7 @@
#include "trace.h"
#include "exec/log.h"
#include "exec/page-protection.h"
+#include "exec/mmap-lock.h"
#include "exec/tb-flush.h"
#include "exec/translation-block.h"
#include "qemu.h"
diff --git a/linux-user/syscall.c b/linux-user/syscall.c
index b32de763f7..4928f0b080 100644
--- a/linux-user/syscall.c
+++ b/linux-user/syscall.c
@@ -26,6 +26,7 @@
#include "tcg/startup.h"
#include "target_mman.h"
#include "exec/page-protection.h"
+#include "exec/mmap-lock.h"
#include "exec/tb-flush.h"
#include "exec/translation-block.h"
#include <elf.h>
diff --git a/target/arm/helper.c b/target/arm/helper.c
index bb445e30cd..0454b06a6c 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -14,6 +14,7 @@
#include "cpu-features.h"
#include "exec/helper-proto.h"
#include "exec/page-protection.h"
+#include "exec/mmap-lock.h"
#include "qemu/main-loop.h"
#include "qemu/timer.h"
#include "qemu/bitops.h"
--
2.43.0
^ permalink raw reply related [flat|nested] 90+ messages in thread
* [PATCH v2 16/42] include/system: Move exec/memory.h to system/memory.h
2025-03-18 21:31 [PATCH v2 00/42] accel/tcg, codebase: Build once patches Richard Henderson
` (14 preceding siblings ...)
2025-03-18 21:31 ` [PATCH v2 15/42] include/exec: Split out mmap-lock.h Richard Henderson
@ 2025-03-18 21:31 ` Richard Henderson
2025-03-18 21:31 ` [PATCH v2 17/42] include/system: Move exec/address-spaces.h to system/address-spaces.h Richard Henderson
` (25 subsequent siblings)
41 siblings, 0 replies; 90+ messages in thread
From: Richard Henderson @ 2025-03-18 21:31 UTC (permalink / raw)
To: qemu-devel; +Cc: pierrick.bouvier, philmd
Convert the existing includes with
sed -i ,exec/memory.h,system/memory.h,g
Move the include within cpu-all.h into a !CONFIG_USER_ONLY block.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
hw/arm/strongarm.h | 2 +-
hw/display/apple-gfx.h | 2 +-
hw/display/framebuffer.h | 2 +-
hw/display/vga_int.h | 2 +-
hw/hyperv/hv-balloon-our_range_memslots.h | 2 +-
hw/intc/ioapic_internal.h | 2 +-
hw/net/i82596.h | 2 +-
hw/net/pcnet.h | 2 +-
hw/tpm/tpm_ppi.h | 2 +-
hw/usb/hcd-uhci.h | 2 +-
hw/vfio/pci.h | 2 +-
hw/virtio/vhost-iova-tree.h | 2 +-
include/exec/cpu-all.h | 4 +++-
include/exec/ioport.h | 2 +-
include/exec/ram_addr.h | 2 +-
include/hw/acpi/acpi.h | 2 +-
include/hw/acpi/ich9_tco.h | 2 +-
include/hw/arm/fsl-imx25.h | 2 +-
include/hw/arm/fsl-imx31.h | 2 +-
include/hw/arm/fsl-imx6.h | 2 +-
include/hw/arm/fsl-imx6ul.h | 2 +-
include/hw/arm/omap.h | 2 +-
include/hw/arm/stm32l4x5_soc.h | 2 +-
include/hw/boards.h | 2 +-
include/hw/char/parallel.h | 2 +-
include/hw/char/riscv_htif.h | 2 +-
include/hw/char/serial-mm.h | 2 +-
include/hw/char/serial.h | 2 +-
include/hw/display/macfb.h | 2 +-
include/hw/fsi/aspeed_apb2opb.h | 2 +-
include/hw/fsi/cfam.h | 2 +-
include/hw/fsi/fsi-master.h | 2 +-
include/hw/fsi/fsi.h | 2 +-
include/hw/fsi/lbus.h | 2 +-
include/hw/gpio/npcm7xx_gpio.h | 2 +-
include/hw/i2c/npcm7xx_smbus.h | 2 +-
include/hw/i2c/pm_smbus.h | 2 +-
include/hw/i386/apic_internal.h | 2 +-
include/hw/i386/x86.h | 2 +-
include/hw/ide/ahci.h | 2 +-
include/hw/ipmi/ipmi.h | 2 +-
include/hw/isa/apm.h | 2 +-
include/hw/isa/isa.h | 2 +-
include/hw/m68k/q800.h | 2 +-
include/hw/mem/npcm7xx_mc.h | 2 +-
include/hw/mem/pc-dimm.h | 2 +-
include/hw/mips/mips.h | 2 +-
include/hw/misc/auxbus.h | 2 +-
include/hw/misc/ivshmem-flat.h | 2 +-
include/hw/misc/mac_via.h | 2 +-
include/hw/misc/npcm7xx_mft.h | 2 +-
include/hw/misc/npcm_clk.h | 2 +-
include/hw/misc/npcm_gcr.h | 2 +-
include/hw/misc/pvpanic.h | 2 +-
include/hw/net/dp8393x.h | 2 +-
include/hw/net/msf2-emac.h | 2 +-
include/hw/nvram/mac_nvram.h | 2 +-
include/hw/nvram/npcm7xx_otp.h | 2 +-
include/hw/pci-host/fsl_imx8m_phy.h | 2 +-
include/hw/pci-host/pam.h | 2 +-
include/hw/pci-host/remote.h | 2 +-
include/hw/pci/pci.h | 2 +-
include/hw/pci/pcie_host.h | 2 +-
include/hw/pci/shpc.h | 2 +-
include/hw/ppc/mac_dbdma.h | 2 +-
include/hw/ppc/pnv_lpc.h | 2 +-
include/hw/ppc/pnv_occ.h | 2 +-
include/hw/ppc/pnv_sbe.h | 2 +-
include/hw/ppc/pnv_xscom.h | 2 +-
include/hw/ppc/ppc4xx.h | 2 +-
include/hw/ppc/vof.h | 2 +-
include/hw/ppc/xics.h | 2 +-
include/hw/register.h | 2 +-
include/hw/remote/proxy-memory-listener.h | 2 +-
include/hw/sh4/sh_intc.h | 2 +-
include/hw/southbridge/ich9.h | 2 +-
include/hw/sysbus.h | 2 +-
include/hw/timer/npcm7xx_timer.h | 2 +-
include/hw/tricore/tricore.h | 2 +-
include/hw/usb.h | 2 +-
include/hw/vfio/vfio-common.h | 2 +-
include/hw/vfio/vfio-container-base.h | 2 +-
include/hw/virtio/vhost-backend.h | 2 +-
include/hw/virtio/vhost.h | 2 +-
include/hw/virtio/virtio.h | 2 +-
include/hw/xen/xen-pvh-common.h | 2 +-
include/hw/xtensa/mx_pic.h | 2 +-
include/qemu/iova-tree.h | 2 +-
include/qemu/reserved-region.h | 2 +-
include/system/dma.h | 2 +-
include/system/hostmem.h | 2 +-
include/system/kvm_int.h | 2 +-
include/{exec => system}/memory.h | 8 ++------
include/system/vhost-user-backend.h | 2 +-
migration/rdma.h | 2 +-
rust/wrapper.h | 2 +-
target/loongarch/cpu.h | 2 +-
target/mips/cpu.h | 2 +-
accel/kvm/kvm-all.c | 2 +-
accel/tcg/cputlb.c | 2 +-
backends/tpm/tpm_util.c | 2 +-
block/blkio.c | 4 ++--
disas/disas-mon.c | 2 +-
hw/acpi/erst.c | 2 +-
hw/avr/atmega.c | 2 +-
hw/block/fdc-sysbus.c | 2 +-
hw/core/cpu-system.c | 2 +-
hw/core/loader-fit.c | 2 +-
hw/core/loader.c | 2 +-
hw/display/edid-region.c | 2 +-
hw/hyperv/hyperv.c | 2 +-
hw/i386/acpi-common.c | 2 +-
hw/i386/acpi-microvm.c | 2 +-
hw/i386/pc_piix.c | 2 +-
hw/intc/mips_gic.c | 2 +-
hw/intc/ompic.c | 2 +-
hw/net/ne2000.c | 2 +-
hw/pci-bridge/pci_bridge_dev.c | 2 +-
hw/pci-host/remote.c | 2 +-
hw/ppc/pnv_homer.c | 2 +-
hw/ppc/sam460ex.c | 2 +-
hw/remote/iommu.c | 2 +-
hw/remote/machine.c | 2 +-
hw/remote/proxy-memory-listener.c | 2 +-
hw/remote/vfio-user-obj.c | 2 +-
hw/s390x/s390-pci-inst.c | 2 +-
hw/timer/sh_timer.c | 2 +-
hw/vfio/common.c | 2 +-
hw/vfio/container.c | 2 +-
hw/vfio/platform.c | 2 +-
hw/xtensa/sim.c | 2 +-
hw/xtensa/virt.c | 2 +-
hw/xtensa/xtensa_memory.c | 2 +-
hw/xtensa/xtfpga.c | 2 +-
migration/dirtyrate.c | 2 +-
migration/rdma.c | 2 +-
migration/savevm.c | 2 +-
monitor/hmp-cmds-target.c | 2 +-
stubs/ram-block.c | 2 +-
system/dirtylimit.c | 2 +-
system/ioport.c | 2 +-
system/memory.c | 2 +-
system/memory_mapping.c | 2 +-
system/physmem.c | 2 +-
system/qtest.c | 2 +-
target/xtensa/cpu.c | 2 +-
tests/qtest/fuzz/generic_fuzz.c | 2 +-
tests/qtest/fuzz/qos_fuzz.c | 2 +-
tests/unit/test-resv-mem.c | 2 +-
ui/console.c | 2 +-
util/vfio-helpers.c | 2 +-
MAINTAINERS | 2 +-
docs/devel/memory.rst | 2 +-
scripts/analyze-inclusions | 2 +-
154 files changed, 158 insertions(+), 160 deletions(-)
rename include/{exec => system}/memory.h (99%)
diff --git a/hw/arm/strongarm.h b/hw/arm/strongarm.h
index 192821f6aa..b11b3a3379 100644
--- a/hw/arm/strongarm.h
+++ b/hw/arm/strongarm.h
@@ -1,7 +1,7 @@
#ifndef STRONGARM_H
#define STRONGARM_H
-#include "exec/memory.h"
+#include "system/memory.h"
#include "target/arm/cpu-qom.h"
#define SA_CS0 0x00000000
diff --git a/hw/display/apple-gfx.h b/hw/display/apple-gfx.h
index 3900cdbabb..a8b1d1efc0 100644
--- a/hw/display/apple-gfx.h
+++ b/hw/display/apple-gfx.h
@@ -9,7 +9,7 @@
#define QEMU_APPLE_GFX_H
#include "qemu/queue.h"
-#include "exec/memory.h"
+#include "system/memory.h"
#include "hw/qdev-properties.h"
#include "ui/surface.h"
diff --git a/hw/display/framebuffer.h b/hw/display/framebuffer.h
index 38fa0dcec6..29a828ce7a 100644
--- a/hw/display/framebuffer.h
+++ b/hw/display/framebuffer.h
@@ -1,7 +1,7 @@
#ifndef QEMU_FRAMEBUFFER_H
#define QEMU_FRAMEBUFFER_H
-#include "exec/memory.h"
+#include "system/memory.h"
/* Framebuffer device helper routines. */
diff --git a/hw/display/vga_int.h b/hw/display/vga_int.h
index f77c1c1145..60ad26e03e 100644
--- a/hw/display/vga_int.h
+++ b/hw/display/vga_int.h
@@ -27,7 +27,7 @@
#include "ui/console.h"
#include "exec/ioport.h"
-#include "exec/memory.h"
+#include "system/memory.h"
#include "hw/display/bochs-vbe.h"
#include "hw/acpi/acpi_aml_interface.h"
diff --git a/hw/hyperv/hv-balloon-our_range_memslots.h b/hw/hyperv/hv-balloon-our_range_memslots.h
index df3b686bc7..b1f19d77da 100644
--- a/hw/hyperv/hv-balloon-our_range_memslots.h
+++ b/hw/hyperv/hv-balloon-our_range_memslots.h
@@ -11,7 +11,7 @@
#define HW_HYPERV_HV_BALLOON_OUR_RANGE_MEMSLOTS_H
-#include "exec/memory.h"
+#include "system/memory.h"
#include "qom/object.h"
#include "hv-balloon-page_range_tree.h"
diff --git a/hw/intc/ioapic_internal.h b/hw/intc/ioapic_internal.h
index 37b8565539..51205767f4 100644
--- a/hw/intc/ioapic_internal.h
+++ b/hw/intc/ioapic_internal.h
@@ -22,7 +22,7 @@
#ifndef HW_INTC_IOAPIC_INTERNAL_H
#define HW_INTC_IOAPIC_INTERNAL_H
-#include "exec/memory.h"
+#include "system/memory.h"
#include "hw/intc/ioapic.h"
#include "hw/sysbus.h"
#include "qemu/notify.h"
diff --git a/hw/net/i82596.h b/hw/net/i82596.h
index f0bbe810eb..4bdfcaf856 100644
--- a/hw/net/i82596.h
+++ b/hw/net/i82596.h
@@ -3,7 +3,7 @@
#define I82596_IOPORT_SIZE 0x20
-#include "exec/memory.h"
+#include "system/memory.h"
#include "exec/address-spaces.h"
#define PORT_RESET 0x00 /* reset 82596 */
diff --git a/hw/net/pcnet.h b/hw/net/pcnet.h
index eb7f46aab3..a94356ec30 100644
--- a/hw/net/pcnet.h
+++ b/hw/net/pcnet.h
@@ -7,7 +7,7 @@
#define PCNET_LOOPTEST_CRC 1
#define PCNET_LOOPTEST_NOCRC 2
-#include "exec/memory.h"
+#include "system/memory.h"
#include "hw/irq.h"
/* BUS CONFIGURATION REGISTERS */
diff --git a/hw/tpm/tpm_ppi.h b/hw/tpm/tpm_ppi.h
index bf5d4a300f..88f316ee95 100644
--- a/hw/tpm/tpm_ppi.h
+++ b/hw/tpm/tpm_ppi.h
@@ -12,7 +12,7 @@
#ifndef TPM_TPM_PPI_H
#define TPM_TPM_PPI_H
-#include "exec/memory.h"
+#include "system/memory.h"
typedef struct TPMPPI {
MemoryRegion ram;
diff --git a/hw/usb/hcd-uhci.h b/hw/usb/hcd-uhci.h
index 6d26b94e92..d4664297cf 100644
--- a/hw/usb/hcd-uhci.h
+++ b/hw/usb/hcd-uhci.h
@@ -28,7 +28,7 @@
#ifndef HW_USB_HCD_UHCI_H
#define HW_USB_HCD_UHCI_H
-#include "exec/memory.h"
+#include "system/memory.h"
#include "qemu/timer.h"
#include "hw/pci/pci_device.h"
#include "hw/usb.h"
diff --git a/hw/vfio/pci.h b/hw/vfio/pci.h
index d94ecaba68..6c59300248 100644
--- a/hw/vfio/pci.h
+++ b/hw/vfio/pci.h
@@ -12,7 +12,7 @@
#ifndef HW_VFIO_VFIO_PCI_H
#define HW_VFIO_VFIO_PCI_H
-#include "exec/memory.h"
+#include "system/memory.h"
#include "hw/pci/pci_device.h"
#include "hw/vfio/vfio-common.h"
#include "qemu/event_notifier.h"
diff --git a/hw/virtio/vhost-iova-tree.h b/hw/virtio/vhost-iova-tree.h
index 0c4ba5abd5..08f63b61cd 100644
--- a/hw/virtio/vhost-iova-tree.h
+++ b/hw/virtio/vhost-iova-tree.h
@@ -11,7 +11,7 @@
#define HW_VIRTIO_VHOST_IOVA_TREE_H
#include "qemu/iova-tree.h"
-#include "exec/memory.h"
+#include "system/memory.h"
typedef struct VhostIOVATree VhostIOVATree;
diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h
index 6108351f58..981a08e3bb 100644
--- a/include/exec/cpu-all.h
+++ b/include/exec/cpu-all.h
@@ -22,9 +22,11 @@
#include "exec/page-protection.h"
#include "exec/cpu-common.h"
#include "exec/cpu-interrupt.h"
-#include "exec/memory.h"
#include "exec/tswap.h"
#include "hw/core/cpu.h"
+#ifndef CONFIG_USER_ONLY
+#include "system/memory.h"
+#endif
/* some important defines:
*
diff --git a/include/exec/ioport.h b/include/exec/ioport.h
index 4397f12f93..ecea3575bc 100644
--- a/include/exec/ioport.h
+++ b/include/exec/ioport.h
@@ -24,7 +24,7 @@
#ifndef IOPORT_H
#define IOPORT_H
-#include "exec/memory.h"
+#include "system/memory.h"
#define MAX_IOPORTS (64 * 1024)
#define IOPORTS_MASK (MAX_IOPORTS - 1)
diff --git a/include/exec/ram_addr.h b/include/exec/ram_addr.h
index 92e8708af7..8677761af5 100644
--- a/include/exec/ram_addr.h
+++ b/include/exec/ram_addr.h
@@ -26,7 +26,7 @@
#include "exec/ramlist.h"
#include "exec/ramblock.h"
#include "exec/exec-all.h"
-#include "exec/memory.h"
+#include "system/memory.h"
#include "exec/target_page.h"
#include "qemu/rcu.h"
diff --git a/include/hw/acpi/acpi.h b/include/hw/acpi/acpi.h
index d1a4fa2af8..4b8ee094c4 100644
--- a/include/hw/acpi/acpi.h
+++ b/include/hw/acpi/acpi.h
@@ -21,7 +21,7 @@
*/
#include "qemu/notify.h"
-#include "exec/memory.h"
+#include "system/memory.h"
#include "hw/acpi/acpi_dev_interface.h"
/*
diff --git a/include/hw/acpi/ich9_tco.h b/include/hw/acpi/ich9_tco.h
index 2562a7cf39..b3c3f69451 100644
--- a/include/hw/acpi/ich9_tco.h
+++ b/include/hw/acpi/ich9_tco.h
@@ -10,7 +10,7 @@
#ifndef HW_ACPI_TCO_H
#define HW_ACPI_TCO_H
-#include "exec/memory.h"
+#include "system/memory.h"
#include "migration/vmstate.h"
/* As per ICH9 spec, the internal timer has an error of ~0.6s on every tick */
diff --git a/include/hw/arm/fsl-imx25.h b/include/hw/arm/fsl-imx25.h
index df2f83980f..b68d4334a0 100644
--- a/include/hw/arm/fsl-imx25.h
+++ b/include/hw/arm/fsl-imx25.h
@@ -29,7 +29,7 @@
#include "hw/sd/sdhci.h"
#include "hw/usb/chipidea.h"
#include "hw/watchdog/wdt_imx2.h"
-#include "exec/memory.h"
+#include "system/memory.h"
#include "target/arm/cpu.h"
#include "qom/object.h"
diff --git a/include/hw/arm/fsl-imx31.h b/include/hw/arm/fsl-imx31.h
index 40c593a5cf..41232a2237 100644
--- a/include/hw/arm/fsl-imx31.h
+++ b/include/hw/arm/fsl-imx31.h
@@ -25,7 +25,7 @@
#include "hw/i2c/imx_i2c.h"
#include "hw/gpio/imx_gpio.h"
#include "hw/watchdog/wdt_imx2.h"
-#include "exec/memory.h"
+#include "system/memory.h"
#include "target/arm/cpu.h"
#include "qom/object.h"
diff --git a/include/hw/arm/fsl-imx6.h b/include/hw/arm/fsl-imx6.h
index 9da32fc189..124bbd478f 100644
--- a/include/hw/arm/fsl-imx6.h
+++ b/include/hw/arm/fsl-imx6.h
@@ -34,7 +34,7 @@
#include "hw/usb/imx-usb-phy.h"
#include "hw/pci-host/designware.h"
#include "hw/or-irq.h"
-#include "exec/memory.h"
+#include "system/memory.h"
#include "cpu.h"
#include "qom/object.h"
diff --git a/include/hw/arm/fsl-imx6ul.h b/include/hw/arm/fsl-imx6ul.h
index 8277b0e8b2..4e3209b25b 100644
--- a/include/hw/arm/fsl-imx6ul.h
+++ b/include/hw/arm/fsl-imx6ul.h
@@ -33,7 +33,7 @@
#include "hw/net/imx_fec.h"
#include "hw/usb/chipidea.h"
#include "hw/usb/imx-usb-phy.h"
-#include "exec/memory.h"
+#include "system/memory.h"
#include "cpu.h"
#include "qom/object.h"
#include "qemu/units.h"
diff --git a/include/hw/arm/omap.h b/include/hw/arm/omap.h
index 7cb87ea89c..6185507373 100644
--- a/include/hw/arm/omap.h
+++ b/include/hw/arm/omap.h
@@ -20,7 +20,7 @@
#ifndef HW_ARM_OMAP_H
#define HW_ARM_OMAP_H
-#include "exec/memory.h"
+#include "system/memory.h"
#include "target/arm/cpu-qom.h"
#include "qemu/log.h"
#include "qom/object.h"
diff --git a/include/hw/arm/stm32l4x5_soc.h b/include/hw/arm/stm32l4x5_soc.h
index c243fb0e7f..c2fae6e23f 100644
--- a/include/hw/arm/stm32l4x5_soc.h
+++ b/include/hw/arm/stm32l4x5_soc.h
@@ -24,7 +24,7 @@
#ifndef HW_ARM_STM32L4x5_SOC_H
#define HW_ARM_STM32L4x5_SOC_H
-#include "exec/memory.h"
+#include "system/memory.h"
#include "hw/arm/armv7m.h"
#include "hw/or-irq.h"
#include "hw/misc/stm32l4x5_syscfg.h"
diff --git a/include/hw/boards.h b/include/hw/boards.h
index f22b2e7fc7..02f43ac5d4 100644
--- a/include/hw/boards.h
+++ b/include/hw/boards.h
@@ -3,7 +3,7 @@
#ifndef HW_BOARDS_H
#define HW_BOARDS_H
-#include "exec/memory.h"
+#include "system/memory.h"
#include "system/hostmem.h"
#include "system/blockdev.h"
#include "qapi/qapi-types-machine.h"
diff --git a/include/hw/char/parallel.h b/include/hw/char/parallel.h
index cfb97cc7cc..7b04478226 100644
--- a/include/hw/char/parallel.h
+++ b/include/hw/char/parallel.h
@@ -1,7 +1,7 @@
#ifndef HW_PARALLEL_H
#define HW_PARALLEL_H
-#include "exec/memory.h"
+#include "system/memory.h"
#include "hw/isa/isa.h"
#include "hw/irq.h"
#include "chardev/char-fe.h"
diff --git a/include/hw/char/riscv_htif.h b/include/hw/char/riscv_htif.h
index df493fdf6b..ee0ca29902 100644
--- a/include/hw/char/riscv_htif.h
+++ b/include/hw/char/riscv_htif.h
@@ -22,7 +22,7 @@
#include "chardev/char.h"
#include "chardev/char-fe.h"
-#include "exec/memory.h"
+#include "system/memory.h"
#define TYPE_HTIF_UART "riscv.htif.uart"
diff --git a/include/hw/char/serial-mm.h b/include/hw/char/serial-mm.h
index 62a8489d69..77abd098e0 100644
--- a/include/hw/char/serial-mm.h
+++ b/include/hw/char/serial-mm.h
@@ -27,7 +27,7 @@
#define HW_SERIAL_MM_H
#include "hw/char/serial.h"
-#include "exec/memory.h"
+#include "system/memory.h"
#include "chardev/char.h"
#include "hw/sysbus.h"
#include "qom/object.h"
diff --git a/include/hw/char/serial.h b/include/hw/char/serial.h
index 942b372df6..4bf90a46f3 100644
--- a/include/hw/char/serial.h
+++ b/include/hw/char/serial.h
@@ -27,7 +27,7 @@
#define HW_SERIAL_H
#include "chardev/char-fe.h"
-#include "exec/memory.h"
+#include "system/memory.h"
#include "qemu/fifo8.h"
#include "qom/object.h"
diff --git a/include/hw/display/macfb.h b/include/hw/display/macfb.h
index 27cebefc9e..0fae1f33a6 100644
--- a/include/hw/display/macfb.h
+++ b/include/hw/display/macfb.h
@@ -13,7 +13,7 @@
#ifndef MACFB_H
#define MACFB_H
-#include "exec/memory.h"
+#include "system/memory.h"
#include "hw/irq.h"
#include "hw/nubus/nubus.h"
#include "hw/sysbus.h"
diff --git a/include/hw/fsi/aspeed_apb2opb.h b/include/hw/fsi/aspeed_apb2opb.h
index f6a2387abf..878619eafa 100644
--- a/include/hw/fsi/aspeed_apb2opb.h
+++ b/include/hw/fsi/aspeed_apb2opb.h
@@ -8,7 +8,7 @@
#ifndef FSI_ASPEED_APB2OPB_H
#define FSI_ASPEED_APB2OPB_H
-#include "exec/memory.h"
+#include "system/memory.h"
#include "hw/fsi/fsi-master.h"
#include "hw/sysbus.h"
diff --git a/include/hw/fsi/cfam.h b/include/hw/fsi/cfam.h
index 7abc3b287b..cceb4bd6f1 100644
--- a/include/hw/fsi/cfam.h
+++ b/include/hw/fsi/cfam.h
@@ -7,7 +7,7 @@
#ifndef FSI_CFAM_H
#define FSI_CFAM_H
-#include "exec/memory.h"
+#include "system/memory.h"
#include "hw/fsi/fsi.h"
#include "hw/fsi/lbus.h"
diff --git a/include/hw/fsi/fsi-master.h b/include/hw/fsi/fsi-master.h
index 68e5f56db2..b634ecd393 100644
--- a/include/hw/fsi/fsi-master.h
+++ b/include/hw/fsi/fsi-master.h
@@ -7,7 +7,7 @@
#ifndef FSI_FSI_MASTER_H
#define FSI_FSI_MASTER_H
-#include "exec/memory.h"
+#include "system/memory.h"
#include "hw/qdev-core.h"
#include "hw/fsi/fsi.h"
#include "hw/fsi/cfam.h"
diff --git a/include/hw/fsi/fsi.h b/include/hw/fsi/fsi.h
index e00f6ef078..f34765ed80 100644
--- a/include/hw/fsi/fsi.h
+++ b/include/hw/fsi/fsi.h
@@ -7,7 +7,7 @@
#ifndef FSI_FSI_H
#define FSI_FSI_H
-#include "exec/memory.h"
+#include "system/memory.h"
#include "hw/qdev-core.h"
#include "hw/fsi/lbus.h"
#include "qemu/bitops.h"
diff --git a/include/hw/fsi/lbus.h b/include/hw/fsi/lbus.h
index 558268c013..12519073cd 100644
--- a/include/hw/fsi/lbus.h
+++ b/include/hw/fsi/lbus.h
@@ -9,7 +9,7 @@
#include "hw/qdev-core.h"
#include "qemu/units.h"
-#include "exec/memory.h"
+#include "system/memory.h"
#define TYPE_FSI_LBUS_DEVICE "fsi.lbus.device"
OBJECT_DECLARE_SIMPLE_TYPE(FSILBusDevice, FSI_LBUS_DEVICE)
diff --git a/include/hw/gpio/npcm7xx_gpio.h b/include/hw/gpio/npcm7xx_gpio.h
index b1d771bd77..7c0bf61a96 100644
--- a/include/hw/gpio/npcm7xx_gpio.h
+++ b/include/hw/gpio/npcm7xx_gpio.h
@@ -15,7 +15,7 @@
#ifndef NPCM7XX_GPIO_H
#define NPCM7XX_GPIO_H
-#include "exec/memory.h"
+#include "system/memory.h"
#include "hw/sysbus.h"
/* Number of pins managed by each controller. */
diff --git a/include/hw/i2c/npcm7xx_smbus.h b/include/hw/i2c/npcm7xx_smbus.h
index dc45963c0e..9c544c561b 100644
--- a/include/hw/i2c/npcm7xx_smbus.h
+++ b/include/hw/i2c/npcm7xx_smbus.h
@@ -16,7 +16,7 @@
#ifndef NPCM7XX_SMBUS_H
#define NPCM7XX_SMBUS_H
-#include "exec/memory.h"
+#include "system/memory.h"
#include "hw/i2c/i2c.h"
#include "hw/irq.h"
#include "hw/sysbus.h"
diff --git a/include/hw/i2c/pm_smbus.h b/include/hw/i2c/pm_smbus.h
index 0d74207efb..dafe0df4f6 100644
--- a/include/hw/i2c/pm_smbus.h
+++ b/include/hw/i2c/pm_smbus.h
@@ -1,7 +1,7 @@
#ifndef PM_SMBUS_H
#define PM_SMBUS_H
-#include "exec/memory.h"
+#include "system/memory.h"
#include "hw/i2c/smbus_master.h"
#define PM_SMBUS_MAX_MSG_SIZE 32
diff --git a/include/hw/i386/apic_internal.h b/include/hw/i386/apic_internal.h
index d6e85833da..429278da61 100644
--- a/include/hw/i386/apic_internal.h
+++ b/include/hw/i386/apic_internal.h
@@ -22,7 +22,7 @@
#define QEMU_APIC_INTERNAL_H
#include "cpu.h"
-#include "exec/memory.h"
+#include "system/memory.h"
#include "qemu/timer.h"
#include "target/i386/cpu-qom.h"
#include "qom/object.h"
diff --git a/include/hw/i386/x86.h b/include/hw/i386/x86.h
index d43cb3908e..258b1343a1 100644
--- a/include/hw/i386/x86.h
+++ b/include/hw/i386/x86.h
@@ -18,7 +18,7 @@
#define HW_I386_X86_H
#include "exec/hwaddr.h"
-#include "exec/memory.h"
+#include "system/memory.h"
#include "hw/boards.h"
#include "hw/i386/topology.h"
diff --git a/include/hw/ide/ahci.h b/include/hw/ide/ahci.h
index ac0292c634..cd07b87811 100644
--- a/include/hw/ide/ahci.h
+++ b/include/hw/ide/ahci.h
@@ -24,7 +24,7 @@
#ifndef HW_IDE_AHCI_H
#define HW_IDE_AHCI_H
-#include "exec/memory.h"
+#include "system/memory.h"
typedef struct AHCIDevice AHCIDevice;
diff --git a/include/hw/ipmi/ipmi.h b/include/hw/ipmi/ipmi.h
index 77a7213ed9..2882eb7f3d 100644
--- a/include/hw/ipmi/ipmi.h
+++ b/include/hw/ipmi/ipmi.h
@@ -25,7 +25,7 @@
#ifndef HW_IPMI_H
#define HW_IPMI_H
-#include "exec/memory.h"
+#include "system/memory.h"
#include "hw/qdev-core.h"
#include "qom/object.h"
diff --git a/include/hw/isa/apm.h b/include/hw/isa/apm.h
index b6e070c00e..0834539045 100644
--- a/include/hw/isa/apm.h
+++ b/include/hw/isa/apm.h
@@ -1,7 +1,7 @@
#ifndef APM_H
#define APM_H
-#include "exec/memory.h"
+#include "system/memory.h"
#define APM_CNT_IOPORT 0xb2
#define ACPI_PORT_SMI_CMD APM_CNT_IOPORT
diff --git a/include/hw/isa/isa.h b/include/hw/isa/isa.h
index 40d6224a4e..1d852011b3 100644
--- a/include/hw/isa/isa.h
+++ b/include/hw/isa/isa.h
@@ -3,7 +3,7 @@
/* ISA bus */
-#include "exec/memory.h"
+#include "system/memory.h"
#include "exec/ioport.h"
#include "hw/qdev-core.h"
#include "qom/object.h"
diff --git a/include/hw/m68k/q800.h b/include/hw/m68k/q800.h
index 34365c9860..9caaed9692 100644
--- a/include/hw/m68k/q800.h
+++ b/include/hw/m68k/q800.h
@@ -26,7 +26,7 @@
#include "hw/boards.h"
#include "qom/object.h"
#include "target/m68k/cpu-qom.h"
-#include "exec/memory.h"
+#include "system/memory.h"
#include "hw/m68k/q800-glue.h"
#include "hw/misc/mac_via.h"
#include "hw/net/dp8393x.h"
diff --git a/include/hw/mem/npcm7xx_mc.h b/include/hw/mem/npcm7xx_mc.h
index 7ed38be243..568cc35fdd 100644
--- a/include/hw/mem/npcm7xx_mc.h
+++ b/include/hw/mem/npcm7xx_mc.h
@@ -16,7 +16,7 @@
#ifndef NPCM7XX_MC_H
#define NPCM7XX_MC_H
-#include "exec/memory.h"
+#include "system/memory.h"
#include "hw/sysbus.h"
/**
diff --git a/include/hw/mem/pc-dimm.h b/include/hw/mem/pc-dimm.h
index fe0f3ea963..e0dbdd43dc 100644
--- a/include/hw/mem/pc-dimm.h
+++ b/include/hw/mem/pc-dimm.h
@@ -16,7 +16,7 @@
#ifndef QEMU_PC_DIMM_H
#define QEMU_PC_DIMM_H
-#include "exec/memory.h"
+#include "system/memory.h"
#include "hw/qdev-core.h"
#include "qom/object.h"
diff --git a/include/hw/mips/mips.h b/include/hw/mips/mips.h
index 101799f7d3..1f3672ba5f 100644
--- a/include/hw/mips/mips.h
+++ b/include/hw/mips/mips.h
@@ -7,7 +7,7 @@
/* Kernels can be configured with 64KB pages */
#define INITRD_PAGE_SIZE (64 * KiB)
-#include "exec/memory.h"
+#include "system/memory.h"
/* bonito.c */
PCIBus *bonito_init(qemu_irq *pic);
diff --git a/include/hw/misc/auxbus.h b/include/hw/misc/auxbus.h
index 03cacdee42..ccd18ce209 100644
--- a/include/hw/misc/auxbus.h
+++ b/include/hw/misc/auxbus.h
@@ -25,7 +25,7 @@
#ifndef HW_MISC_AUXBUS_H
#define HW_MISC_AUXBUS_H
-#include "exec/memory.h"
+#include "system/memory.h"
#include "hw/qdev-core.h"
#include "qom/object.h"
diff --git a/include/hw/misc/ivshmem-flat.h b/include/hw/misc/ivshmem-flat.h
index 0c2b015781..09bc3abcad 100644
--- a/include/hw/misc/ivshmem-flat.h
+++ b/include/hw/misc/ivshmem-flat.h
@@ -14,7 +14,7 @@
#include "qemu/queue.h"
#include "qemu/event_notifier.h"
#include "chardev/char-fe.h"
-#include "exec/memory.h"
+#include "system/memory.h"
#include "qom/object.h"
#include "hw/sysbus.h"
diff --git a/include/hw/misc/mac_via.h b/include/hw/misc/mac_via.h
index 63cdcf7c69..6a15228150 100644
--- a/include/hw/misc/mac_via.h
+++ b/include/hw/misc/mac_via.h
@@ -9,7 +9,7 @@
#ifndef HW_MISC_MAC_VIA_H
#define HW_MISC_MAC_VIA_H
-#include "exec/memory.h"
+#include "system/memory.h"
#include "hw/sysbus.h"
#include "hw/misc/mos6522.h"
#include "hw/input/adb.h"
diff --git a/include/hw/misc/npcm7xx_mft.h b/include/hw/misc/npcm7xx_mft.h
index d6384382ce..e4b997a6ad 100644
--- a/include/hw/misc/npcm7xx_mft.h
+++ b/include/hw/misc/npcm7xx_mft.h
@@ -16,7 +16,7 @@
#ifndef NPCM7XX_MFT_H
#define NPCM7XX_MFT_H
-#include "exec/memory.h"
+#include "system/memory.h"
#include "hw/clock.h"
#include "hw/irq.h"
#include "hw/sysbus.h"
diff --git a/include/hw/misc/npcm_clk.h b/include/hw/misc/npcm_clk.h
index 8fa1e14bdd..52e972f460 100644
--- a/include/hw/misc/npcm_clk.h
+++ b/include/hw/misc/npcm_clk.h
@@ -16,7 +16,7 @@
#ifndef NPCM_CLK_H
#define NPCM_CLK_H
-#include "exec/memory.h"
+#include "system/memory.h"
#include "hw/clock.h"
#include "hw/sysbus.h"
diff --git a/include/hw/misc/npcm_gcr.h b/include/hw/misc/npcm_gcr.h
index d81bb9afb2..702e7fddb1 100644
--- a/include/hw/misc/npcm_gcr.h
+++ b/include/hw/misc/npcm_gcr.h
@@ -16,7 +16,7 @@
#ifndef NPCM_GCR_H
#define NPCM_GCR_H
-#include "exec/memory.h"
+#include "system/memory.h"
#include "hw/sysbus.h"
#include "qom/object.h"
diff --git a/include/hw/misc/pvpanic.h b/include/hw/misc/pvpanic.h
index 049a94c112..5098693437 100644
--- a/include/hw/misc/pvpanic.h
+++ b/include/hw/misc/pvpanic.h
@@ -15,7 +15,7 @@
#ifndef HW_MISC_PVPANIC_H
#define HW_MISC_PVPANIC_H
-#include "exec/memory.h"
+#include "system/memory.h"
#include "qom/object.h"
#include "standard-headers/misc/pvpanic.h"
diff --git a/include/hw/net/dp8393x.h b/include/hw/net/dp8393x.h
index 4a3f7478be..24273dc1f4 100644
--- a/include/hw/net/dp8393x.h
+++ b/include/hw/net/dp8393x.h
@@ -22,7 +22,7 @@
#include "hw/sysbus.h"
#include "net/net.h"
-#include "exec/memory.h"
+#include "system/memory.h"
#define SONIC_REG_COUNT 0x40
diff --git a/include/hw/net/msf2-emac.h b/include/hw/net/msf2-emac.h
index 846ba6e6dc..b5d9127e46 100644
--- a/include/hw/net/msf2-emac.h
+++ b/include/hw/net/msf2-emac.h
@@ -23,7 +23,7 @@
*/
#include "hw/sysbus.h"
-#include "exec/memory.h"
+#include "system/memory.h"
#include "net/net.h"
#include "net/eth.h"
#include "qom/object.h"
diff --git a/include/hw/nvram/mac_nvram.h b/include/hw/nvram/mac_nvram.h
index 0c4dfaeff6..e9d8398f84 100644
--- a/include/hw/nvram/mac_nvram.h
+++ b/include/hw/nvram/mac_nvram.h
@@ -26,7 +26,7 @@
#ifndef MAC_NVRAM_H
#define MAC_NVRAM_H
-#include "exec/memory.h"
+#include "system/memory.h"
#include "hw/sysbus.h"
#define MACIO_NVRAM_SIZE 0x2000
diff --git a/include/hw/nvram/npcm7xx_otp.h b/include/hw/nvram/npcm7xx_otp.h
index ea4b5d0731..77b05f8b82 100644
--- a/include/hw/nvram/npcm7xx_otp.h
+++ b/include/hw/nvram/npcm7xx_otp.h
@@ -16,7 +16,7 @@
#ifndef NPCM7XX_OTP_H
#define NPCM7XX_OTP_H
-#include "exec/memory.h"
+#include "system/memory.h"
#include "hw/sysbus.h"
/* Each OTP module holds 8192 bits of one-time programmable storage */
diff --git a/include/hw/pci-host/fsl_imx8m_phy.h b/include/hw/pci-host/fsl_imx8m_phy.h
index 4f4875b37d..5f1b212fd9 100644
--- a/include/hw/pci-host/fsl_imx8m_phy.h
+++ b/include/hw/pci-host/fsl_imx8m_phy.h
@@ -11,7 +11,7 @@
#include "hw/sysbus.h"
#include "qom/object.h"
-#include "exec/memory.h"
+#include "system/memory.h"
#define TYPE_FSL_IMX8M_PCIE_PHY "fsl-imx8m-pcie-phy"
OBJECT_DECLARE_SIMPLE_TYPE(FslImx8mPciePhyState, FSL_IMX8M_PCIE_PHY)
diff --git a/include/hw/pci-host/pam.h b/include/hw/pci-host/pam.h
index 005916f826..44f3908160 100644
--- a/include/hw/pci-host/pam.h
+++ b/include/hw/pci-host/pam.h
@@ -50,7 +50,7 @@
* 0xf0000 - 0xfffff System BIOS Area Memory Segments
*/
-#include "exec/memory.h"
+#include "system/memory.h"
#define SMRAM_C_BASE 0xa0000
#define SMRAM_C_END 0xc0000
diff --git a/include/hw/pci-host/remote.h b/include/hw/pci-host/remote.h
index 690a01f0fe..5264c35936 100644
--- a/include/hw/pci-host/remote.h
+++ b/include/hw/pci-host/remote.h
@@ -11,7 +11,7 @@
#ifndef PCI_HOST_REMOTE_H
#define PCI_HOST_REMOTE_H
-#include "exec/memory.h"
+#include "system/memory.h"
#include "hw/pci/pcie_host.h"
#define TYPE_REMOTE_PCIHOST "remote-pcihost"
diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h
index 822fbacdf0..c2fe6caa2c 100644
--- a/include/hw/pci/pci.h
+++ b/include/hw/pci/pci.h
@@ -1,7 +1,7 @@
#ifndef QEMU_PCI_H
#define QEMU_PCI_H
-#include "exec/memory.h"
+#include "system/memory.h"
#include "system/dma.h"
#include "system/host_iommu_device.h"
diff --git a/include/hw/pci/pcie_host.h b/include/hw/pci/pcie_host.h
index 82d92177da..f09de76bfe 100644
--- a/include/hw/pci/pcie_host.h
+++ b/include/hw/pci/pcie_host.h
@@ -22,7 +22,7 @@
#define PCIE_HOST_H
#include "hw/pci/pci_host.h"
-#include "exec/memory.h"
+#include "system/memory.h"
#include "qom/object.h"
#define TYPE_PCIE_HOST_BRIDGE "pcie-host-bridge"
diff --git a/include/hw/pci/shpc.h b/include/hw/pci/shpc.h
index a0789df153..ad1089567a 100644
--- a/include/hw/pci/shpc.h
+++ b/include/hw/pci/shpc.h
@@ -1,7 +1,7 @@
#ifndef SHPC_H
#define SHPC_H
-#include "exec/memory.h"
+#include "system/memory.h"
#include "hw/hotplug.h"
#include "hw/pci/pci_device.h"
#include "migration/vmstate.h"
diff --git a/include/hw/ppc/mac_dbdma.h b/include/hw/ppc/mac_dbdma.h
index 672c2be471..896ee4a2b1 100644
--- a/include/hw/ppc/mac_dbdma.h
+++ b/include/hw/ppc/mac_dbdma.h
@@ -23,7 +23,7 @@
#ifndef HW_MAC_DBDMA_H
#define HW_MAC_DBDMA_H
-#include "exec/memory.h"
+#include "system/memory.h"
#include "qemu/iov.h"
#include "system/dma.h"
#include "hw/sysbus.h"
diff --git a/include/hw/ppc/pnv_lpc.h b/include/hw/ppc/pnv_lpc.h
index 174add4c53..266d56214f 100644
--- a/include/hw/ppc/pnv_lpc.h
+++ b/include/hw/ppc/pnv_lpc.h
@@ -20,7 +20,7 @@
#ifndef PPC_PNV_LPC_H
#define PPC_PNV_LPC_H
-#include "exec/memory.h"
+#include "system/memory.h"
#include "hw/ppc/pnv.h"
#include "hw/qdev-core.h"
#include "hw/isa/isa.h" /* For ISA_NUM_IRQS */
diff --git a/include/hw/ppc/pnv_occ.h b/include/hw/ppc/pnv_occ.h
index 3ec42de0ff..013ea2e53e 100644
--- a/include/hw/ppc/pnv_occ.h
+++ b/include/hw/ppc/pnv_occ.h
@@ -20,7 +20,7 @@
#ifndef PPC_PNV_OCC_H
#define PPC_PNV_OCC_H
-#include "exec/memory.h"
+#include "system/memory.h"
#include "hw/qdev-core.h"
#define TYPE_PNV_OCC "pnv-occ"
diff --git a/include/hw/ppc/pnv_sbe.h b/include/hw/ppc/pnv_sbe.h
index b6b378ad14..48a8b86a80 100644
--- a/include/hw/ppc/pnv_sbe.h
+++ b/include/hw/ppc/pnv_sbe.h
@@ -20,7 +20,7 @@
#ifndef PPC_PNV_SBE_H
#define PPC_PNV_SBE_H
-#include "exec/memory.h"
+#include "system/memory.h"
#include "hw/qdev-core.h"
#define TYPE_PNV_SBE "pnv-sbe"
diff --git a/include/hw/ppc/pnv_xscom.h b/include/hw/ppc/pnv_xscom.h
index a927aea1c0..b14549db70 100644
--- a/include/hw/ppc/pnv_xscom.h
+++ b/include/hw/ppc/pnv_xscom.h
@@ -20,7 +20,7 @@
#ifndef PPC_PNV_XSCOM_H
#define PPC_PNV_XSCOM_H
-#include "exec/memory.h"
+#include "system/memory.h"
typedef struct PnvXScomInterface PnvXScomInterface;
typedef struct PnvChip PnvChip;
diff --git a/include/hw/ppc/ppc4xx.h b/include/hw/ppc/ppc4xx.h
index 1bd9b8821b..2e94b00673 100644
--- a/include/hw/ppc/ppc4xx.h
+++ b/include/hw/ppc/ppc4xx.h
@@ -26,7 +26,7 @@
#define PPC4XX_H
#include "hw/ppc/ppc.h"
-#include "exec/memory.h"
+#include "system/memory.h"
#include "hw/sysbus.h"
/*
diff --git a/include/hw/ppc/vof.h b/include/hw/ppc/vof.h
index d3f293da8b..2918aaab12 100644
--- a/include/hw/ppc/vof.h
+++ b/include/hw/ppc/vof.h
@@ -8,7 +8,7 @@
#include "qom/object.h"
#include "exec/address-spaces.h"
-#include "exec/memory.h"
+#include "system/memory.h"
#include "exec/cpu-defs.h"
typedef struct Vof {
diff --git a/include/hw/ppc/xics.h b/include/hw/ppc/xics.h
index e94d53405f..097fcdf00f 100644
--- a/include/hw/ppc/xics.h
+++ b/include/hw/ppc/xics.h
@@ -28,7 +28,7 @@
#ifndef XICS_H
#define XICS_H
-#include "exec/memory.h"
+#include "system/memory.h"
#include "hw/qdev-core.h"
#include "qom/object.h"
diff --git a/include/hw/register.h b/include/hw/register.h
index 6a076cfcdf..a913c52aee 100644
--- a/include/hw/register.h
+++ b/include/hw/register.h
@@ -12,7 +12,7 @@
#define REGISTER_H
#include "hw/qdev-core.h"
-#include "exec/memory.h"
+#include "system/memory.h"
#include "hw/registerfields.h"
#include "qom/object.h"
diff --git a/include/hw/remote/proxy-memory-listener.h b/include/hw/remote/proxy-memory-listener.h
index c4f3efb928..ec516d8267 100644
--- a/include/hw/remote/proxy-memory-listener.h
+++ b/include/hw/remote/proxy-memory-listener.h
@@ -9,7 +9,7 @@
#ifndef PROXY_MEMORY_LISTENER_H
#define PROXY_MEMORY_LISTENER_H
-#include "exec/memory.h"
+#include "system/memory.h"
#include "io/channel.h"
typedef struct ProxyMemoryListener {
diff --git a/include/hw/sh4/sh_intc.h b/include/hw/sh4/sh_intc.h
index f62d5c5e13..94f183121e 100644
--- a/include/hw/sh4/sh_intc.h
+++ b/include/hw/sh4/sh_intc.h
@@ -1,7 +1,7 @@
#ifndef SH_INTC_H
#define SH_INTC_H
-#include "exec/memory.h"
+#include "system/memory.h"
typedef unsigned char intc_enum;
diff --git a/include/hw/southbridge/ich9.h b/include/hw/southbridge/ich9.h
index 6c60017024..1e231e89c9 100644
--- a/include/hw/southbridge/ich9.h
+++ b/include/hw/southbridge/ich9.h
@@ -7,7 +7,7 @@
#include "hw/pci/pci.h"
#include "hw/pci/pci_device.h"
#include "hw/rtc/mc146818rtc.h"
-#include "exec/memory.h"
+#include "system/memory.h"
#include "qemu/notify.h"
#include "qom/object.h"
diff --git a/include/hw/sysbus.h b/include/hw/sysbus.h
index 81bbda10d3..7dc88aaa27 100644
--- a/include/hw/sysbus.h
+++ b/include/hw/sysbus.h
@@ -4,7 +4,7 @@
/* Devices attached directly to the main system bus. */
#include "hw/qdev-core.h"
-#include "exec/memory.h"
+#include "system/memory.h"
#include "qom/object.h"
#define QDEV_MAX_MMIO 32
diff --git a/include/hw/timer/npcm7xx_timer.h b/include/hw/timer/npcm7xx_timer.h
index d45c051b56..e287375dce 100644
--- a/include/hw/timer/npcm7xx_timer.h
+++ b/include/hw/timer/npcm7xx_timer.h
@@ -16,7 +16,7 @@
#ifndef NPCM7XX_TIMER_H
#define NPCM7XX_TIMER_H
-#include "exec/memory.h"
+#include "system/memory.h"
#include "hw/sysbus.h"
#include "qemu/timer.h"
diff --git a/include/hw/tricore/tricore.h b/include/hw/tricore/tricore.h
index c19ed3f013..4ffc0fe1d6 100644
--- a/include/hw/tricore/tricore.h
+++ b/include/hw/tricore/tricore.h
@@ -1,7 +1,7 @@
#ifndef HW_TRICORE_H
#define HW_TRICORE_H
-#include "exec/memory.h"
+#include "system/memory.h"
struct tricore_boot_info {
uint64_t ram_size;
diff --git a/include/hw/usb.h b/include/hw/usb.h
index e410693d0c..26a9f3ecde 100644
--- a/include/hw/usb.h
+++ b/include/hw/usb.h
@@ -25,7 +25,7 @@
* THE SOFTWARE.
*/
-#include "exec/memory.h"
+#include "system/memory.h"
#include "hw/qdev-core.h"
#include "qemu/iov.h"
#include "qemu/queue.h"
diff --git a/include/hw/vfio/vfio-common.h b/include/hw/vfio/vfio-common.h
index 04b123a6c9..f5b3f45a43 100644
--- a/include/hw/vfio/vfio-common.h
+++ b/include/hw/vfio/vfio-common.h
@@ -21,7 +21,7 @@
#ifndef HW_VFIO_VFIO_COMMON_H
#define HW_VFIO_VFIO_COMMON_H
-#include "exec/memory.h"
+#include "system/memory.h"
#include "qemu/queue.h"
#include "qemu/notify.h"
#include "ui/console.h"
diff --git a/include/hw/vfio/vfio-container-base.h b/include/hw/vfio/vfio-container-base.h
index 4cff9943ab..6aca02fb3d 100644
--- a/include/hw/vfio/vfio-container-base.h
+++ b/include/hw/vfio/vfio-container-base.h
@@ -13,7 +13,7 @@
#ifndef HW_VFIO_VFIO_CONTAINER_BASE_H
#define HW_VFIO_VFIO_CONTAINER_BASE_H
-#include "exec/memory.h"
+#include "system/memory.h"
typedef struct VFIODevice VFIODevice;
typedef struct VFIOIOMMUClass VFIOIOMMUClass;
diff --git a/include/hw/virtio/vhost-backend.h b/include/hw/virtio/vhost-backend.h
index 70c2e8ffee..d6df209a2f 100644
--- a/include/hw/virtio/vhost-backend.h
+++ b/include/hw/virtio/vhost-backend.h
@@ -11,7 +11,7 @@
#ifndef VHOST_BACKEND_H
#define VHOST_BACKEND_H
-#include "exec/memory.h"
+#include "system/memory.h"
typedef enum VhostBackendType {
VHOST_BACKEND_TYPE_NONE = 0,
diff --git a/include/hw/virtio/vhost.h b/include/hw/virtio/vhost.h
index a9469d50bc..bb4b58e115 100644
--- a/include/hw/virtio/vhost.h
+++ b/include/hw/virtio/vhost.h
@@ -3,7 +3,7 @@
#include "hw/virtio/vhost-backend.h"
#include "hw/virtio/virtio.h"
-#include "exec/memory.h"
+#include "system/memory.h"
#define VHOST_F_DEVICE_IOTLB 63
#define VHOST_USER_F_PROTOCOL_FEATURES 30
diff --git a/include/hw/virtio/virtio.h b/include/hw/virtio/virtio.h
index 6386910280..7e0c471ea4 100644
--- a/include/hw/virtio/virtio.h
+++ b/include/hw/virtio/virtio.h
@@ -14,7 +14,7 @@
#ifndef QEMU_VIRTIO_H
#define QEMU_VIRTIO_H
-#include "exec/memory.h"
+#include "system/memory.h"
#include "hw/qdev-core.h"
#include "net/net.h"
#include "migration/vmstate.h"
diff --git a/include/hw/xen/xen-pvh-common.h b/include/hw/xen/xen-pvh-common.h
index 17c5a58a5a..5db83d88ec 100644
--- a/include/hw/xen/xen-pvh-common.h
+++ b/include/hw/xen/xen-pvh-common.h
@@ -9,7 +9,7 @@
#ifndef XEN_PVH_COMMON_H__
#define XEN_PVH_COMMON_H__
-#include "exec/memory.h"
+#include "system/memory.h"
#include "qom/object.h"
#include "hw/boards.h"
#include "hw/pci-host/gpex.h"
diff --git a/include/hw/xtensa/mx_pic.h b/include/hw/xtensa/mx_pic.h
index 500424c8d3..cd316d86eb 100644
--- a/include/hw/xtensa/mx_pic.h
+++ b/include/hw/xtensa/mx_pic.h
@@ -28,7 +28,7 @@
#ifndef XTENSA_MX_PIC_H
#define XTENSA_MX_PIC_H
-#include "exec/memory.h"
+#include "system/memory.h"
struct XtensaMxPic;
typedef struct XtensaMxPic XtensaMxPic;
diff --git a/include/qemu/iova-tree.h b/include/qemu/iova-tree.h
index 16d354a814..14e82a22d5 100644
--- a/include/qemu/iova-tree.h
+++ b/include/qemu/iova-tree.h
@@ -23,7 +23,7 @@
* for the thread safety issue.
*/
-#include "exec/memory.h"
+#include "system/memory.h"
#include "exec/hwaddr.h"
#define IOVA_OK (0)
diff --git a/include/qemu/reserved-region.h b/include/qemu/reserved-region.h
index 8e6f0a97e2..9026cf08fd 100644
--- a/include/qemu/reserved-region.h
+++ b/include/qemu/reserved-region.h
@@ -20,7 +20,7 @@
#ifndef QEMU_RESERVED_REGION_H
#define QEMU_RESERVED_REGION_H
-#include "exec/memory.h"
+#include "system/memory.h"
/*
* Insert a new region into a sorted list of reserved regions. In case
diff --git a/include/system/dma.h b/include/system/dma.h
index e142f7efa6..aaa03b9711 100644
--- a/include/system/dma.h
+++ b/include/system/dma.h
@@ -10,7 +10,7 @@
#ifndef DMA_H
#define DMA_H
-#include "exec/memory.h"
+#include "system/memory.h"
#include "exec/address-spaces.h"
#include "block/block.h"
#include "block/accounting.h"
diff --git a/include/system/hostmem.h b/include/system/hostmem.h
index 62642e602c..88fa791ac7 100644
--- a/include/system/hostmem.h
+++ b/include/system/hostmem.h
@@ -16,7 +16,7 @@
#include "system/numa.h"
#include "qapi/qapi-types-machine.h"
#include "qom/object.h"
-#include "exec/memory.h"
+#include "system/memory.h"
#include "qemu/bitmap.h"
#include "qemu/thread-context.h"
diff --git a/include/system/kvm_int.h b/include/system/kvm_int.h
index 4de6106869..756a3c0a25 100644
--- a/include/system/kvm_int.h
+++ b/include/system/kvm_int.h
@@ -9,7 +9,7 @@
#ifndef QEMU_KVM_INT_H
#define QEMU_KVM_INT_H
-#include "exec/memory.h"
+#include "system/memory.h"
#include "qapi/qapi-types-common.h"
#include "qemu/accel.h"
#include "qemu/queue.h"
diff --git a/include/exec/memory.h b/include/system/memory.h
similarity index 99%
rename from include/exec/memory.h
rename to include/system/memory.h
index a3bb0542bf..f901976ed5 100644
--- a/include/exec/memory.h
+++ b/include/system/memory.h
@@ -11,10 +11,8 @@
*
*/
-#ifndef MEMORY_H
-#define MEMORY_H
-
-#ifndef CONFIG_USER_ONLY
+#ifndef SYSTEM_MEMORY_H
+#define SYSTEM_MEMORY_H
#include "exec/cpu-common.h"
#include "exec/hwaddr.h"
@@ -3197,5 +3195,3 @@ void ram_block_add_cpr_blocker(RAMBlock *rb, Error **errp);
void ram_block_del_cpr_blocker(RAMBlock *rb);
#endif
-
-#endif
diff --git a/include/system/vhost-user-backend.h b/include/system/vhost-user-backend.h
index 327b0b84f1..5ed953cd53 100644
--- a/include/system/vhost-user-backend.h
+++ b/include/system/vhost-user-backend.h
@@ -13,7 +13,7 @@
#define QEMU_VHOST_USER_BACKEND_H
#include "qom/object.h"
-#include "exec/memory.h"
+#include "system/memory.h"
#include "qemu/option.h"
#include "qemu/bitmap.h"
#include "hw/virtio/vhost.h"
diff --git a/migration/rdma.h b/migration/rdma.h
index f55f28bbed..4d3386b84a 100644
--- a/migration/rdma.h
+++ b/migration/rdma.h
@@ -19,7 +19,7 @@
#ifndef QEMU_MIGRATION_RDMA_H
#define QEMU_MIGRATION_RDMA_H
-#include "exec/memory.h"
+#include "system/memory.h"
void rdma_start_outgoing_migration(void *opaque, InetSocketAddress *host_port,
Error **errp);
diff --git a/rust/wrapper.h b/rust/wrapper.h
index d927ad6799..3bc4a6c899 100644
--- a/rust/wrapper.h
+++ b/rust/wrapper.h
@@ -52,7 +52,7 @@ typedef enum memory_order {
#include "qemu-io.h"
#include "system/system.h"
#include "hw/sysbus.h"
-#include "exec/memory.h"
+#include "system/memory.h"
#include "chardev/char-fe.h"
#include "hw/clock.h"
#include "hw/qdev-clock.h"
diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h
index eae874c67b..1916716547 100644
--- a/target/loongarch/cpu.h
+++ b/target/loongarch/cpu.h
@@ -14,7 +14,7 @@
#include "hw/registerfields.h"
#include "qemu/timer.h"
#ifndef CONFIG_USER_ONLY
-#include "exec/memory.h"
+#include "system/memory.h"
#endif
#include "cpu-csr.h"
#include "cpu-qom.h"
diff --git a/target/mips/cpu.h b/target/mips/cpu.h
index f6877ece8b..9ef72a95d7 100644
--- a/target/mips/cpu.h
+++ b/target/mips/cpu.h
@@ -4,7 +4,7 @@
#include "cpu-qom.h"
#include "exec/cpu-defs.h"
#ifndef CONFIG_USER_ONLY
-#include "exec/memory.h"
+#include "system/memory.h"
#endif
#include "fpu/softfloat-types.h"
#include "hw/clock.h"
diff --git a/accel/kvm/kvm-all.c b/accel/kvm/kvm-all.c
index f89568bfa3..0d47bb0d9b 100644
--- a/accel/kvm/kvm-all.c
+++ b/accel/kvm/kvm-all.c
@@ -33,7 +33,7 @@
#include "system/cpus.h"
#include "system/accel-blocker.h"
#include "qemu/bswap.h"
-#include "exec/memory.h"
+#include "system/memory.h"
#include "exec/ram_addr.h"
#include "qemu/event_notifier.h"
#include "qemu/main-loop.h"
diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c
index 2817c9dbdd..6f0ea9067b 100644
--- a/accel/tcg/cputlb.c
+++ b/accel/tcg/cputlb.c
@@ -22,7 +22,7 @@
#include "accel/tcg/cpu-ops.h"
#include "exec/exec-all.h"
#include "exec/page-protection.h"
-#include "exec/memory.h"
+#include "system/memory.h"
#include "exec/cpu_ldst.h"
#include "exec/cputlb.h"
#include "exec/tb-flush.h"
diff --git a/backends/tpm/tpm_util.c b/backends/tpm/tpm_util.c
index f07a2656ce..f2d1739e33 100644
--- a/backends/tpm/tpm_util.c
+++ b/backends/tpm/tpm_util.c
@@ -25,7 +25,7 @@
#include "qapi/error.h"
#include "qapi/visitor.h"
#include "tpm_int.h"
-#include "exec/memory.h"
+#include "system/memory.h"
#include "hw/qdev-properties.h"
#include "system/tpm_backend.h"
#include "system/tpm_util.h"
diff --git a/block/blkio.c b/block/blkio.c
index 5f4fce2b1b..4142673984 100644
--- a/block/blkio.c
+++ b/block/blkio.c
@@ -11,7 +11,7 @@
#include "qemu/osdep.h"
#include <blkio.h>
#include "block/block_int.h"
-#include "exec/memory.h"
+#include "system/memory.h"
#include "exec/cpu-common.h" /* for qemu_ram_get_fd() */
#include "qemu/defer-call.h"
#include "qapi/error.h"
@@ -19,7 +19,7 @@
#include "qobject/qdict.h"
#include "qemu/module.h"
#include "system/block-backend.h"
-#include "exec/memory.h" /* for ram_block_discard_disable() */
+#include "system/memory.h" /* for ram_block_discard_disable() */
#include "block/block-io.h"
diff --git a/disas/disas-mon.c b/disas/disas-mon.c
index 37bf16ac79..9c693618c2 100644
--- a/disas/disas-mon.c
+++ b/disas/disas-mon.c
@@ -7,7 +7,7 @@
#include "qemu/osdep.h"
#include "disas-internal.h"
#include "disas/disas.h"
-#include "exec/memory.h"
+#include "system/memory.h"
#include "hw/core/cpu.h"
#include "monitor/monitor.h"
diff --git a/hw/acpi/erst.c b/hw/acpi/erst.c
index ec64f92893..5c4c1dc638 100644
--- a/hw/acpi/erst.c
+++ b/hw/acpi/erst.c
@@ -12,7 +12,7 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
#include "hw/qdev-core.h"
-#include "exec/memory.h"
+#include "system/memory.h"
#include "qom/object.h"
#include "hw/pci/pci_device.h"
#include "qom/object_interfaces.h"
diff --git a/hw/avr/atmega.c b/hw/avr/atmega.c
index f6844bf118..59c0160283 100644
--- a/hw/avr/atmega.c
+++ b/hw/avr/atmega.c
@@ -12,7 +12,7 @@
#include "qemu/module.h"
#include "qemu/units.h"
#include "qapi/error.h"
-#include "exec/memory.h"
+#include "system/memory.h"
#include "exec/address-spaces.h"
#include "system/system.h"
#include "hw/qdev-properties.h"
diff --git a/hw/block/fdc-sysbus.c b/hw/block/fdc-sysbus.c
index 381b492aec..4955e478cd 100644
--- a/hw/block/fdc-sysbus.c
+++ b/hw/block/fdc-sysbus.c
@@ -26,7 +26,7 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
#include "qom/object.h"
-#include "exec/memory.h"
+#include "system/memory.h"
#include "hw/sysbus.h"
#include "hw/block/fdc.h"
#include "migration/vmstate.h"
diff --git a/hw/core/cpu-system.c b/hw/core/cpu-system.c
index aed5076ec7..5ef8c24b5b 100644
--- a/hw/core/cpu-system.c
+++ b/hw/core/cpu-system.c
@@ -22,7 +22,7 @@
#include "qapi/error.h"
#include "exec/address-spaces.h"
#include "exec/cputlb.h"
-#include "exec/memory.h"
+#include "system/memory.h"
#include "exec/tb-flush.h"
#include "exec/tswap.h"
#include "hw/qdev-core.h"
diff --git a/hw/core/loader-fit.c b/hw/core/loader-fit.c
index 6eb66406b0..2dea485ae0 100644
--- a/hw/core/loader-fit.c
+++ b/hw/core/loader-fit.c
@@ -20,7 +20,7 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
#include "qemu/units.h"
-#include "exec/memory.h"
+#include "system/memory.h"
#include "hw/loader.h"
#include "hw/loader-fit.h"
#include "qemu/cutils.h"
diff --git a/hw/core/loader.c b/hw/core/loader.c
index ce6ff1b52e..564b63106e 100644
--- a/hw/core/loader.c
+++ b/hw/core/loader.c
@@ -59,7 +59,7 @@
#include "uboot_image.h"
#include "hw/loader.h"
#include "hw/nvram/fw_cfg.h"
-#include "exec/memory.h"
+#include "system/memory.h"
#include "hw/boards.h"
#include "qemu/cutils.h"
#include "system/runstate.h"
diff --git a/hw/display/edid-region.c b/hw/display/edid-region.c
index 675429dc18..f1596fba9a 100644
--- a/hw/display/edid-region.c
+++ b/hw/display/edid-region.c
@@ -1,5 +1,5 @@
#include "qemu/osdep.h"
-#include "exec/memory.h"
+#include "system/memory.h"
#include "hw/display/edid.h"
static uint64_t edid_region_read(void *ptr, hwaddr addr, unsigned size)
diff --git a/hw/hyperv/hyperv.c b/hw/hyperv/hyperv.c
index 831e04f214..382c62d668 100644
--- a/hw/hyperv/hyperv.c
+++ b/hw/hyperv/hyperv.c
@@ -12,7 +12,7 @@
#include "qemu/module.h"
#include "qapi/error.h"
#include "exec/address-spaces.h"
-#include "exec/memory.h"
+#include "system/memory.h"
#include "system/kvm.h"
#include "qemu/bitops.h"
#include "qemu/error-report.h"
diff --git a/hw/i386/acpi-common.c b/hw/i386/acpi-common.c
index 0cc2919bb8..7bd08067a7 100644
--- a/hw/i386/acpi-common.c
+++ b/hw/i386/acpi-common.c
@@ -23,7 +23,7 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
-#include "exec/memory.h"
+#include "system/memory.h"
#include "hw/acpi/acpi.h"
#include "hw/acpi/aml-build.h"
#include "hw/acpi/utils.h"
diff --git a/hw/i386/acpi-microvm.c b/hw/i386/acpi-microvm.c
index 279da6b4aa..bc6571778c 100644
--- a/hw/i386/acpi-microvm.c
+++ b/hw/i386/acpi-microvm.c
@@ -24,7 +24,7 @@
#include "qemu/cutils.h"
#include "qapi/error.h"
-#include "exec/memory.h"
+#include "system/memory.h"
#include "hw/acpi/acpi.h"
#include "hw/acpi/acpi_aml_interface.h"
#include "hw/acpi/aml-build.h"
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index 6c91e2d292..e9dbbe086a 100644
--- a/hw/i386/pc_piix.c
+++ b/hw/i386/pc_piix.c
@@ -47,7 +47,7 @@
#include "hw/i386/kvm/clock.h"
#include "hw/sysbus.h"
#include "hw/i2c/smbus_eeprom.h"
-#include "exec/memory.h"
+#include "system/memory.h"
#include "hw/acpi/acpi.h"
#include "qapi/error.h"
#include "qemu/error-report.h"
diff --git a/hw/intc/mips_gic.c b/hw/intc/mips_gic.c
index 5e3cbeabec..12d3908938 100644
--- a/hw/intc/mips_gic.c
+++ b/hw/intc/mips_gic.c
@@ -14,7 +14,7 @@
#include "qemu/module.h"
#include "qapi/error.h"
#include "hw/sysbus.h"
-#include "exec/memory.h"
+#include "system/memory.h"
#include "system/kvm.h"
#include "system/reset.h"
#include "kvm_mips.h"
diff --git a/hw/intc/ompic.c b/hw/intc/ompic.c
index 42af4567c6..169baf2ded 100644
--- a/hw/intc/ompic.c
+++ b/hw/intc/ompic.c
@@ -13,7 +13,7 @@
#include "hw/qdev-properties.h"
#include "hw/sysbus.h"
#include "migration/vmstate.h"
-#include "exec/memory.h"
+#include "system/memory.h"
#include "qom/object.h"
#define TYPE_OR1K_OMPIC "or1k-ompic"
diff --git a/hw/net/ne2000.c b/hw/net/ne2000.c
index b482c5f3af..b1923c8c3e 100644
--- a/hw/net/ne2000.c
+++ b/hw/net/ne2000.c
@@ -25,7 +25,7 @@
#include "qemu/osdep.h"
#include "net/eth.h"
#include "qemu/module.h"
-#include "exec/memory.h"
+#include "system/memory.h"
#include "hw/irq.h"
#include "migration/vmstate.h"
#include "ne2000.h"
diff --git a/hw/pci-bridge/pci_bridge_dev.c b/hw/pci-bridge/pci_bridge_dev.c
index 0a91a8ae6c..4931ea24f6 100644
--- a/hw/pci-bridge/pci_bridge_dev.c
+++ b/hw/pci-bridge/pci_bridge_dev.c
@@ -28,7 +28,7 @@
#include "hw/pci/shpc.h"
#include "hw/pci/slotid_cap.h"
#include "hw/qdev-properties.h"
-#include "exec/memory.h"
+#include "system/memory.h"
#include "hw/pci/pci_bus.h"
#include "hw/hotplug.h"
#include "qom/object.h"
diff --git a/hw/pci-host/remote.c b/hw/pci-host/remote.c
index bfb25ef6af..be077d075e 100644
--- a/hw/pci-host/remote.c
+++ b/hw/pci-host/remote.c
@@ -28,7 +28,7 @@
#include "hw/pci/pcie_host.h"
#include "hw/qdev-properties.h"
#include "hw/pci-host/remote.h"
-#include "exec/memory.h"
+#include "system/memory.h"
static const char *remote_pcihost_root_bus_path(PCIHostState *host_bridge,
PCIBus *rootbus)
diff --git a/hw/ppc/pnv_homer.c b/hw/ppc/pnv_homer.c
index 18a53a80c1..0521f9a428 100644
--- a/hw/ppc/pnv_homer.c
+++ b/hw/ppc/pnv_homer.c
@@ -20,7 +20,7 @@
#include "qemu/log.h"
#include "qapi/error.h"
#include "exec/hwaddr.h"
-#include "exec/memory.h"
+#include "system/memory.h"
#include "system/cpus.h"
#include "hw/qdev-core.h"
#include "hw/qdev-properties.h"
diff --git a/hw/ppc/sam460ex.c b/hw/ppc/sam460ex.c
index 7dc3b309c8..a070de23cf 100644
--- a/hw/ppc/sam460ex.c
+++ b/hw/ppc/sam460ex.c
@@ -24,7 +24,7 @@
#include "exec/page-protection.h"
#include "hw/loader.h"
#include "elf.h"
-#include "exec/memory.h"
+#include "system/memory.h"
#include "ppc440.h"
#include "hw/pci-host/ppc4xx.h"
#include "hw/block/flash.h"
diff --git a/hw/remote/iommu.c b/hw/remote/iommu.c
index 7c56aad0fc..ec845d1f58 100644
--- a/hw/remote/iommu.c
+++ b/hw/remote/iommu.c
@@ -13,7 +13,7 @@
#include "hw/remote/iommu.h"
#include "hw/pci/pci_bus.h"
#include "hw/pci/pci.h"
-#include "exec/memory.h"
+#include "system/memory.h"
#include "exec/address-spaces.h"
#include "trace.h"
diff --git a/hw/remote/machine.c b/hw/remote/machine.c
index fdc6c441bb..d4616025e8 100644
--- a/hw/remote/machine.c
+++ b/hw/remote/machine.c
@@ -16,7 +16,7 @@
#include "qemu/osdep.h"
#include "hw/remote/machine.h"
-#include "exec/memory.h"
+#include "system/memory.h"
#include "qapi/error.h"
#include "hw/pci/pci_host.h"
#include "hw/remote/iohub.h"
diff --git a/hw/remote/proxy-memory-listener.c b/hw/remote/proxy-memory-listener.c
index a926f61ebe..ce7f5b9bfb 100644
--- a/hw/remote/proxy-memory-listener.c
+++ b/hw/remote/proxy-memory-listener.c
@@ -10,7 +10,7 @@
#include "qemu/int128.h"
#include "qemu/range.h"
-#include "exec/memory.h"
+#include "system/memory.h"
#include "exec/cpu-common.h"
#include "exec/ram_addr.h"
#include "qapi/error.h"
diff --git a/hw/remote/vfio-user-obj.c b/hw/remote/vfio-user-obj.c
index 6e51a92856..9bdd0a465b 100644
--- a/hw/remote/vfio-user-obj.c
+++ b/hw/remote/vfio-user-obj.c
@@ -57,7 +57,7 @@
#include "hw/qdev-core.h"
#include "hw/pci/pci.h"
#include "qemu/timer.h"
-#include "exec/memory.h"
+#include "system/memory.h"
#include "hw/pci/msi.h"
#include "hw/pci/msix.h"
#include "hw/remote/vfio-user-obj.h"
diff --git a/hw/s390x/s390-pci-inst.c b/hw/s390x/s390-pci-inst.c
index 8cdeb6cb7f..b4e003c19c 100644
--- a/hw/s390x/s390-pci-inst.c
+++ b/hw/s390x/s390-pci-inst.c
@@ -13,7 +13,7 @@
#include "qemu/osdep.h"
#include "exec/memop.h"
-#include "exec/memory.h"
+#include "system/memory.h"
#include "qemu/error-report.h"
#include "system/hw_accel.h"
#include "hw/boards.h"
diff --git a/hw/timer/sh_timer.c b/hw/timer/sh_timer.c
index 7788939766..d4fa32c9d6 100644
--- a/hw/timer/sh_timer.c
+++ b/hw/timer/sh_timer.c
@@ -9,7 +9,7 @@
*/
#include "qemu/osdep.h"
-#include "exec/memory.h"
+#include "system/memory.h"
#include "qemu/log.h"
#include "hw/irq.h"
#include "hw/sh4/sh.h"
diff --git a/hw/vfio/common.c b/hw/vfio/common.c
index 1a0d9290f8..989c6ee83d 100644
--- a/hw/vfio/common.c
+++ b/hw/vfio/common.c
@@ -28,7 +28,7 @@
#include "hw/vfio/vfio-common.h"
#include "hw/vfio/pci.h"
#include "exec/address-spaces.h"
-#include "exec/memory.h"
+#include "system/memory.h"
#include "exec/ram_addr.h"
#include "exec/target_page.h"
#include "hw/hw.h"
diff --git a/hw/vfio/container.c b/hw/vfio/container.c
index 7c57bdd27b..1d1c5f9a77 100644
--- a/hw/vfio/container.c
+++ b/hw/vfio/container.c
@@ -24,7 +24,7 @@
#include "hw/vfio/vfio-common.h"
#include "exec/address-spaces.h"
-#include "exec/memory.h"
+#include "system/memory.h"
#include "exec/ram_addr.h"
#include "qemu/error-report.h"
#include "qemu/range.h"
diff --git a/hw/vfio/platform.c b/hw/vfio/platform.c
index 67bc57409c..96c6bf5654 100644
--- a/hw/vfio/platform.c
+++ b/hw/vfio/platform.c
@@ -28,7 +28,7 @@
#include "qemu/main-loop.h"
#include "qemu/module.h"
#include "qemu/range.h"
-#include "exec/memory.h"
+#include "system/memory.h"
#include "exec/address-spaces.h"
#include "qemu/queue.h"
#include "hw/sysbus.h"
diff --git a/hw/xtensa/sim.c b/hw/xtensa/sim.c
index 1cea29c66d..49d17e7bb2 100644
--- a/hw/xtensa/sim.c
+++ b/hw/xtensa/sim.c
@@ -32,7 +32,7 @@
#include "hw/boards.h"
#include "hw/loader.h"
#include "elf.h"
-#include "exec/memory.h"
+#include "system/memory.h"
#include "qemu/error-report.h"
#include "xtensa_memory.h"
#include "xtensa_sim.h"
diff --git a/hw/xtensa/virt.c b/hw/xtensa/virt.c
index b08404fc17..b10866ccd8 100644
--- a/hw/xtensa/virt.c
+++ b/hw/xtensa/virt.c
@@ -33,7 +33,7 @@
#include "hw/pci-host/gpex.h"
#include "net/net.h"
#include "elf.h"
-#include "exec/memory.h"
+#include "system/memory.h"
#include "qemu/error-report.h"
#include "xtensa_memory.h"
#include "xtensa_sim.h"
diff --git a/hw/xtensa/xtensa_memory.c b/hw/xtensa/xtensa_memory.c
index 2c1095f017..13a6077d86 100644
--- a/hw/xtensa/xtensa_memory.c
+++ b/hw/xtensa/xtensa_memory.c
@@ -27,7 +27,7 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
-#include "exec/memory.h"
+#include "system/memory.h"
#include "qemu/error-report.h"
#include "xtensa_memory.h"
diff --git a/hw/xtensa/xtfpga.c b/hw/xtensa/xtfpga.c
index 3f3677f1c9..3bd0ef8268 100644
--- a/hw/xtensa/xtfpga.c
+++ b/hw/xtensa/xtfpga.c
@@ -34,7 +34,7 @@
#include "hw/loader.h"
#include "hw/qdev-properties.h"
#include "elf.h"
-#include "exec/memory.h"
+#include "system/memory.h"
#include "exec/tswap.h"
#include "hw/char/serial-mm.h"
#include "net/net.h"
diff --git a/migration/dirtyrate.c b/migration/dirtyrate.c
index 4cd14779d6..09caf92f87 100644
--- a/migration/dirtyrate.c
+++ b/migration/dirtyrate.c
@@ -27,7 +27,7 @@
#include "qobject/qdict.h"
#include "system/kvm.h"
#include "system/runstate.h"
-#include "exec/memory.h"
+#include "system/memory.h"
#include "qemu/xxhash.h"
#include "migration.h"
diff --git a/migration/rdma.c b/migration/rdma.c
index 76fb034923..d9603ab603 100644
--- a/migration/rdma.c
+++ b/migration/rdma.c
@@ -30,7 +30,7 @@
#include "qemu/sockets.h"
#include "qemu/bitmap.h"
#include "qemu/coroutine.h"
-#include "exec/memory.h"
+#include "system/memory.h"
#include <sys/socket.h>
#include <netdb.h>
#include <arpa/inet.h>
diff --git a/migration/savevm.c b/migration/savevm.c
index ce158c3512..c33200a33f 100644
--- a/migration/savevm.c
+++ b/migration/savevm.c
@@ -48,7 +48,7 @@
#include "qapi/qapi-builtin-visit.h"
#include "qemu/error-report.h"
#include "system/cpus.h"
-#include "exec/memory.h"
+#include "system/memory.h"
#include "exec/target_page.h"
#include "trace.h"
#include "qemu/iov.h"
diff --git a/monitor/hmp-cmds-target.c b/monitor/hmp-cmds-target.c
index 239c2a61a4..6654d31406 100644
--- a/monitor/hmp-cmds-target.c
+++ b/monitor/hmp-cmds-target.c
@@ -25,7 +25,7 @@
#include "qemu/osdep.h"
#include "disas/disas.h"
#include "exec/address-spaces.h"
-#include "exec/memory.h"
+#include "system/memory.h"
#include "monitor/hmp-target.h"
#include "monitor/monitor-internal.h"
#include "qapi/error.h"
diff --git a/stubs/ram-block.c b/stubs/ram-block.c
index 108197683b..e88fab31a5 100644
--- a/stubs/ram-block.c
+++ b/stubs/ram-block.c
@@ -1,7 +1,7 @@
#include "qemu/osdep.h"
#include "exec/ramlist.h"
#include "exec/cpu-common.h"
-#include "exec/memory.h"
+#include "system/memory.h"
void *qemu_ram_get_host_addr(RAMBlock *rb)
{
diff --git a/system/dirtylimit.c b/system/dirtylimit.c
index 7dedef8dd4..30cd09f3d1 100644
--- a/system/dirtylimit.c
+++ b/system/dirtylimit.c
@@ -19,7 +19,7 @@
#include "system/dirtylimit.h"
#include "monitor/hmp.h"
#include "monitor/monitor.h"
-#include "exec/memory.h"
+#include "system/memory.h"
#include "exec/target_page.h"
#include "hw/boards.h"
#include "system/kvm.h"
diff --git a/system/ioport.c b/system/ioport.c
index 89daae9d60..2291739039 100644
--- a/system/ioport.c
+++ b/system/ioport.c
@@ -27,7 +27,7 @@
#include "qemu/osdep.h"
#include "exec/ioport.h"
-#include "exec/memory.h"
+#include "system/memory.h"
#include "exec/address-spaces.h"
#include "trace.h"
diff --git a/system/memory.c b/system/memory.c
index eddd21a6cd..2865d0deb1 100644
--- a/system/memory.c
+++ b/system/memory.c
@@ -16,7 +16,7 @@
#include "qemu/osdep.h"
#include "qemu/log.h"
#include "qapi/error.h"
-#include "exec/memory.h"
+#include "system/memory.h"
#include "qapi/visitor.h"
#include "qemu/bitops.h"
#include "qemu/error-report.h"
diff --git a/system/memory_mapping.c b/system/memory_mapping.c
index 37d3325f77..8538a8241e 100644
--- a/system/memory_mapping.c
+++ b/system/memory_mapping.c
@@ -16,7 +16,7 @@
#include "qapi/error.h"
#include "system/memory_mapping.h"
-#include "exec/memory.h"
+#include "system/memory.h"
#include "exec/address-spaces.h"
#include "hw/core/cpu.h"
diff --git a/system/physmem.c b/system/physmem.c
index e97de3ef65..be92969a4a 100644
--- a/system/physmem.c
+++ b/system/physmem.c
@@ -50,7 +50,7 @@
#include "qemu/log.h"
#include "qemu/memalign.h"
#include "qemu/memfd.h"
-#include "exec/memory.h"
+#include "system/memory.h"
#include "exec/ioport.h"
#include "system/dma.h"
#include "system/hostmem.h"
diff --git a/system/qtest.c b/system/qtest.c
index 12152efbcd..5407289154 100644
--- a/system/qtest.c
+++ b/system/qtest.c
@@ -17,7 +17,7 @@
#include "system/runstate.h"
#include "chardev/char-fe.h"
#include "exec/ioport.h"
-#include "exec/memory.h"
+#include "system/memory.h"
#include "exec/tswap.h"
#include "hw/qdev-core.h"
#include "hw/irq.h"
diff --git a/target/xtensa/cpu.c b/target/xtensa/cpu.c
index 7663b62d01..ec6a0a8b66 100644
--- a/target/xtensa/cpu.c
+++ b/target/xtensa/cpu.c
@@ -36,7 +36,7 @@
#include "migration/vmstate.h"
#include "hw/qdev-clock.h"
#ifndef CONFIG_USER_ONLY
-#include "exec/memory.h"
+#include "system/memory.h"
#endif
diff --git a/tests/qtest/fuzz/generic_fuzz.c b/tests/qtest/fuzz/generic_fuzz.c
index d107a496da..239be9372d 100644
--- a/tests/qtest/fuzz/generic_fuzz.c
+++ b/tests/qtest/fuzz/generic_fuzz.c
@@ -20,7 +20,7 @@
#include "tests/qtest/libqos/pci-pc.h"
#include "fuzz.h"
#include "string.h"
-#include "exec/memory.h"
+#include "system/memory.h"
#include "exec/ramblock.h"
#include "hw/qdev-core.h"
#include "hw/pci/pci.h"
diff --git a/tests/qtest/fuzz/qos_fuzz.c b/tests/qtest/fuzz/qos_fuzz.c
index d3839bf999..9afe8bf6d8 100644
--- a/tests/qtest/fuzz/qos_fuzz.c
+++ b/tests/qtest/fuzz/qos_fuzz.c
@@ -19,7 +19,7 @@
#include "qemu/osdep.h"
#include "qemu/units.h"
#include "qapi/error.h"
-#include "exec/memory.h"
+#include "system/memory.h"
#include "qemu/main-loop.h"
#include "tests/qtest/libqtest.h"
diff --git a/tests/unit/test-resv-mem.c b/tests/unit/test-resv-mem.c
index cd8f7318cc..4de2d042d1 100644
--- a/tests/unit/test-resv-mem.c
+++ b/tests/unit/test-resv-mem.c
@@ -10,7 +10,7 @@
#include "qemu/osdep.h"
#include "qemu/range.h"
-#include "exec/memory.h"
+#include "system/memory.h"
#include "qemu/reserved-region.h"
#define DEBUG 0
diff --git a/ui/console.c b/ui/console.c
index 6456e8dd90..6cd122cf40 100644
--- a/ui/console.c
+++ b/ui/console.c
@@ -35,7 +35,7 @@
#include "qemu/option.h"
#include "chardev/char.h"
#include "trace.h"
-#include "exec/memory.h"
+#include "system/memory.h"
#include "qom/object.h"
#include "qemu/memfd.h"
diff --git a/util/vfio-helpers.c b/util/vfio-helpers.c
index f8bab46c68..fdff042ab4 100644
--- a/util/vfio-helpers.c
+++ b/util/vfio-helpers.c
@@ -16,7 +16,7 @@
#include "qapi/error.h"
#include "exec/ramlist.h"
#include "exec/cpu-common.h"
-#include "exec/memory.h"
+#include "system/memory.h"
#include "trace.h"
#include "qemu/error-report.h"
#include "standard-headers/linux/pci_regs.h"
diff --git a/MAINTAINERS b/MAINTAINERS
index 8f470a1c9b..f606e158a7 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -3106,7 +3106,7 @@ R: Philippe Mathieu-Daudé <philmd@linaro.org>
S: Supported
F: include/exec/ioport.h
F: include/exec/memop.h
-F: include/exec/memory.h
+F: include/system/memory.h
F: include/exec/ram_addr.h
F: include/exec/ramblock.h
F: include/system/memory_mapping.h
diff --git a/docs/devel/memory.rst b/docs/devel/memory.rst
index 69c5e3f914..57fb2aec76 100644
--- a/docs/devel/memory.rst
+++ b/docs/devel/memory.rst
@@ -369,4 +369,4 @@ callbacks are called:
API Reference
-------------
-.. kernel-doc:: include/exec/memory.h
+.. kernel-doc:: include/system/memory.h
diff --git a/scripts/analyze-inclusions b/scripts/analyze-inclusions
index b6280f25c8..d2c566667d 100644
--- a/scripts/analyze-inclusions
+++ b/scripts/analyze-inclusions
@@ -53,7 +53,7 @@ echo $(grep_include -F 'trace/generated-tracers.h') files include generated-trac
echo $(grep_include -F 'qapi/error.h') files include qapi/error.h
echo $(grep_include -F 'qom/object.h') files include qom/object.h
echo $(grep_include -F 'block/aio.h') files include block/aio.h
-echo $(grep_include -F 'exec/memory.h') files include exec/memory.h
+echo $(grep_include -F 'system/memory.h') files include system/memory.h
echo $(grep_include -F 'fpu/softfloat.h') files include fpu/softfloat.h
echo $(grep_include -F 'qemu/bswap.h') files include qemu/bswap.h
echo
--
2.43.0
^ permalink raw reply related [flat|nested] 90+ messages in thread
* [PATCH v2 17/42] include/system: Move exec/address-spaces.h to system/address-spaces.h
2025-03-18 21:31 [PATCH v2 00/42] accel/tcg, codebase: Build once patches Richard Henderson
` (15 preceding siblings ...)
2025-03-18 21:31 ` [PATCH v2 16/42] include/system: Move exec/memory.h to system/memory.h Richard Henderson
@ 2025-03-18 21:31 ` Richard Henderson
2025-03-18 21:31 ` [PATCH v2 18/42] include/system: Move exec/ioport.h to system/ioport.h Richard Henderson
` (24 subsequent siblings)
41 siblings, 0 replies; 90+ messages in thread
From: Richard Henderson @ 2025-03-18 21:31 UTC (permalink / raw)
To: qemu-devel; +Cc: pierrick.bouvier, philmd
Convert the existing includes with sed.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
hw/net/i82596.h | 2 +-
hw/s390x/ipl.h | 2 +-
include/hw/misc/lasi.h | 2 +-
include/hw/nubus/nubus.h | 2 +-
include/hw/ppc/vof.h | 2 +-
include/hw/tricore/triboard.h | 2 +-
include/{exec => system}/address-spaces.h | 8 ++------
include/system/dma.h | 2 +-
rust/wrapper.h | 2 +-
target/i386/hvf/vmx.h | 2 +-
accel/hvf/hvf-accel-ops.c | 2 +-
hw/acpi/erst.c | 2 +-
hw/arm/aspeed_ast10x0.c | 2 +-
hw/arm/bananapi_m2u.c | 2 +-
hw/arm/collie.c | 2 +-
hw/arm/exynos4_boards.c | 2 +-
hw/arm/fsl-imx31.c | 2 +-
hw/arm/fsl-imx8mp.c | 2 +-
hw/arm/imx8mp-evk.c | 2 +-
hw/arm/integratorcp.c | 2 +-
hw/arm/kzm.c | 2 +-
hw/arm/microbit.c | 2 +-
hw/arm/mps2-tz.c | 2 +-
hw/arm/mps2.c | 2 +-
hw/arm/mps3r.c | 2 +-
hw/arm/msf2-soc.c | 2 +-
hw/arm/msf2-som.c | 2 +-
hw/arm/musca.c | 2 +-
hw/arm/omap1.c | 2 +-
hw/arm/omap_sx1.c | 2 +-
hw/arm/orangepi.c | 2 +-
hw/arm/stellaris.c | 2 +-
hw/arm/stm32f100_soc.c | 2 +-
hw/arm/stm32f205_soc.c | 2 +-
hw/arm/stm32f405_soc.c | 2 +-
hw/arm/stm32l4x5_soc.c | 2 +-
hw/avr/atmega.c | 2 +-
hw/char/goldfish_tty.c | 2 +-
hw/char/omap_uart.c | 2 +-
hw/char/riscv_htif.c | 2 +-
hw/core/cpu-system.c | 2 +-
hw/core/null-machine.c | 2 +-
hw/core/sysbus.c | 2 +-
hw/dma/rc4030.c | 2 +-
hw/hyperv/hv-balloon.c | 2 +-
hw/hyperv/hyperv.c | 2 +-
hw/i386/kvm/xen_evtchn.c | 2 +-
hw/i386/kvm/xen_gnttab.c | 2 +-
hw/i386/kvm/xen_overlay.c | 2 +-
hw/i386/sgx-epc.c | 2 +-
hw/i386/sgx.c | 2 +-
hw/i386/vapic.c | 2 +-
hw/ide/ahci-sysbus.c | 2 +-
hw/input/lasips2.c | 2 +-
hw/intc/loongarch_extioi.c | 2 +-
hw/intc/riscv_aplic.c | 2 +-
hw/intc/riscv_imsic.c | 2 +-
hw/loongarch/virt.c | 2 +-
hw/mem/memory-device.c | 2 +-
hw/microblaze/petalogix_ml605_mmu.c | 2 +-
hw/microblaze/petalogix_s3adsp1800_mmu.c | 2 +-
hw/microblaze/xlnx-zynqmp-pmu.c | 2 +-
hw/mips/mipssim.c | 2 +-
hw/misc/allwinner-h3-dramc.c | 2 +-
hw/misc/allwinner-r40-dramc.c | 2 +-
hw/misc/ivshmem-flat.c | 2 +-
hw/misc/mac_via.c | 2 +-
hw/net/i82596.c | 2 +-
hw/nvram/fw_cfg.c | 2 +-
hw/openrisc/openrisc_sim.c | 2 +-
hw/openrisc/virt.c | 2 +-
hw/pci-host/mv64361.c | 2 +-
hw/ppc/pegasos2.c | 2 +-
hw/ppc/pnv_psi.c | 2 +-
hw/ppc/ppc4xx_sdram.c | 2 +-
hw/ppc/prep_systemio.c | 2 +-
hw/ppc/rs6000_mc.c | 2 +-
hw/ppc/spapr_ovec.c | 2 +-
hw/ppc/vof.c | 2 +-
hw/remote/iommu.c | 2 +-
hw/riscv/microblaze-v-generic.c | 2 +-
hw/riscv/opentitan.c | 2 +-
hw/riscv/shakti_c.c | 2 +-
hw/s390x/css.c | 2 +-
hw/s390x/s390-skeys.c | 2 +-
hw/s390x/virtio-ccw.c | 2 +-
hw/sparc/sun4m_iommu.c | 2 +-
hw/sparc64/sun4u_iommu.c | 2 +-
hw/timer/hpet.c | 2 +-
hw/tpm/tpm_crb.c | 2 +-
hw/vfio/ap.c | 2 +-
hw/vfio/ccw.c | 2 +-
hw/vfio/common.c | 2 +-
hw/vfio/container.c | 2 +-
hw/vfio/platform.c | 2 +-
hw/vfio/spapr.c | 2 +-
hw/virtio/vhost-vdpa.c | 2 +-
hw/virtio/virtio-balloon.c | 2 +-
hw/virtio/virtio-bus.c | 2 +-
monitor/hmp-cmds-target.c | 2 +-
monitor/hmp-cmds.c | 2 +-
system/ioport.c | 2 +-
system/memory.c | 2 +-
system/memory_mapping.c | 2 +-
target/arm/hvf/hvf.c | 2 +-
target/arm/kvm.c | 2 +-
target/avr/helper.c | 2 +-
target/i386/cpu-apic.c | 2 +-
target/i386/cpu.c | 2 +-
target/i386/kvm/xen-emu.c | 2 +-
target/i386/nvmm/nvmm-all.c | 2 +-
target/i386/sev.c | 2 +-
target/i386/tcg/system/misc_helper.c | 2 +-
target/i386/tcg/system/tcg-cpu.c | 2 +-
target/i386/whpx/whpx-all.c | 2 +-
target/loongarch/kvm/kvm.c | 2 +-
target/riscv/kvm/kvm-cpu.c | 2 +-
target/s390x/mmu_helper.c | 2 +-
target/s390x/sigp.c | 2 +-
target/s390x/tcg/excp_helper.c | 2 +-
target/xtensa/dbg_helper.c | 2 +-
hw/display/apple-gfx.m | 2 +-
122 files changed, 123 insertions(+), 127 deletions(-)
rename include/{exec => system}/address-spaces.h (89%)
diff --git a/hw/net/i82596.h b/hw/net/i82596.h
index 4bdfcaf856..dc1fa1a1dc 100644
--- a/hw/net/i82596.h
+++ b/hw/net/i82596.h
@@ -4,7 +4,7 @@
#define I82596_IOPORT_SIZE 0x20
#include "system/memory.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#define PORT_RESET 0x00 /* reset 82596 */
#define PORT_SELFTEST 0x01 /* selftest */
diff --git a/hw/s390x/ipl.h b/hw/s390x/ipl.h
index 8e3882d506..c6ecb3433c 100644
--- a/hw/s390x/ipl.h
+++ b/hw/s390x/ipl.h
@@ -14,7 +14,7 @@
#define HW_S390_IPL_H
#include "cpu.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "hw/qdev-core.h"
#include "hw/s390x/ipl/qipl.h"
#include "qom/object.h"
diff --git a/include/hw/misc/lasi.h b/include/hw/misc/lasi.h
index f01c0f680a..0bdfb11b50 100644
--- a/include/hw/misc/lasi.h
+++ b/include/hw/misc/lasi.h
@@ -12,7 +12,7 @@
#ifndef LASI_H
#define LASI_H
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "hw/pci/pci_host.h"
#include "hw/boards.h"
diff --git a/include/hw/nubus/nubus.h b/include/hw/nubus/nubus.h
index fee79b71d1..7825840dca 100644
--- a/include/hw/nubus/nubus.h
+++ b/include/hw/nubus/nubus.h
@@ -11,7 +11,7 @@
#include "hw/qdev-properties.h"
#include "hw/sysbus.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "qom/object.h"
#include "qemu/units.h"
diff --git a/include/hw/ppc/vof.h b/include/hw/ppc/vof.h
index 2918aaab12..3a0fbffe54 100644
--- a/include/hw/ppc/vof.h
+++ b/include/hw/ppc/vof.h
@@ -7,7 +7,7 @@
#define HW_VOF_H
#include "qom/object.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "system/memory.h"
#include "exec/cpu-defs.h"
diff --git a/include/hw/tricore/triboard.h b/include/hw/tricore/triboard.h
index 8250470643..ca49a0c752 100644
--- a/include/hw/tricore/triboard.h
+++ b/include/hw/tricore/triboard.h
@@ -21,7 +21,7 @@
#include "qapi/error.h"
#include "hw/boards.h"
#include "system/system.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "qom/object.h"
#include "hw/tricore/tc27x_soc.h"
diff --git a/include/exec/address-spaces.h b/include/system/address-spaces.h
similarity index 89%
rename from include/exec/address-spaces.h
rename to include/system/address-spaces.h
index 0d0aa61d68..72d17afb0f 100644
--- a/include/exec/address-spaces.h
+++ b/include/system/address-spaces.h
@@ -11,16 +11,14 @@
*
*/
-#ifndef EXEC_ADDRESS_SPACES_H
-#define EXEC_ADDRESS_SPACES_H
+#ifndef SYSTEM_ADDRESS_SPACES_H
+#define SYSTEM_ADDRESS_SPACES_H
/*
* Internal interfaces between memory.c/exec.c/vl.c. Do not #include unless
* you're one of them.
*/
-#ifndef CONFIG_USER_ONLY
-
/* Get the root memory region. This interface should only be used temporarily
* until a proper bus interface is available.
*/
@@ -35,5 +33,3 @@ extern AddressSpace address_space_memory;
extern AddressSpace address_space_io;
#endif
-
-#endif
diff --git a/include/system/dma.h b/include/system/dma.h
index aaa03b9711..82e7ad5437 100644
--- a/include/system/dma.h
+++ b/include/system/dma.h
@@ -11,7 +11,7 @@
#define DMA_H
#include "system/memory.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "block/block.h"
#include "block/accounting.h"
diff --git a/rust/wrapper.h b/rust/wrapper.h
index 3bc4a6c899..f80dbab24f 100644
--- a/rust/wrapper.h
+++ b/rust/wrapper.h
@@ -64,4 +64,4 @@ typedef enum memory_order {
#include "chardev/char-serial.h"
#include "exec/memattrs.h"
#include "qemu/timer.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
diff --git a/target/i386/hvf/vmx.h b/target/i386/hvf/vmx.h
index 80ce26279b..87a478f7fd 100644
--- a/target/i386/hvf/vmx.h
+++ b/target/i386/hvf/vmx.h
@@ -33,7 +33,7 @@
#include "system/hvf.h"
#include "system/hvf_int.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
static inline uint64_t rreg(hv_vcpuid_t vcpu, hv_x86_reg_t reg)
{
diff --git a/accel/hvf/hvf-accel-ops.c b/accel/hvf/hvf-accel-ops.c
index 12fc30c276..601c3bc0ac 100644
--- a/accel/hvf/hvf-accel-ops.c
+++ b/accel/hvf/hvf-accel-ops.c
@@ -50,7 +50,7 @@
#include "qemu/osdep.h"
#include "qemu/error-report.h"
#include "qemu/main-loop.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "exec/exec-all.h"
#include "gdbstub/enums.h"
#include "hw/boards.h"
diff --git a/hw/acpi/erst.c b/hw/acpi/erst.c
index 5c4c1dc638..2e49b551f2 100644
--- a/hw/acpi/erst.c
+++ b/hw/acpi/erst.c
@@ -23,7 +23,7 @@
#include "hw/acpi/acpi-defs.h"
#include "hw/acpi/aml-build.h"
#include "hw/acpi/bios-linker-loader.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "system/hostmem.h"
#include "hw/acpi/erst.h"
#include "trace.h"
diff --git a/hw/arm/aspeed_ast10x0.c b/hw/arm/aspeed_ast10x0.c
index ec329f4991..21ffab10f3 100644
--- a/hw/arm/aspeed_ast10x0.c
+++ b/hw/arm/aspeed_ast10x0.c
@@ -11,7 +11,7 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "system/system.h"
#include "hw/qdev-clock.h"
#include "hw/misc/unimp.h"
diff --git a/hw/arm/bananapi_m2u.c b/hw/arm/bananapi_m2u.c
index 4d84d10d24..b750a575f7 100644
--- a/hw/arm/bananapi_m2u.c
+++ b/hw/arm/bananapi_m2u.c
@@ -19,7 +19,7 @@
#include "qemu/osdep.h"
#include "qemu/units.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "qapi/error.h"
#include "qemu/error-report.h"
#include "hw/boards.h"
diff --git a/hw/arm/collie.c b/hw/arm/collie.c
index eaa5c52d45..e83aee58c6 100644
--- a/hw/arm/collie.c
+++ b/hw/arm/collie.c
@@ -16,7 +16,7 @@
#include "strongarm.h"
#include "hw/arm/boot.h"
#include "hw/block/flash.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "qom/object.h"
#include "qemu/error-report.h"
diff --git a/hw/arm/exynos4_boards.c b/hw/arm/exynos4_boards.c
index 43dc89d902..2d8f2d7326 100644
--- a/hw/arm/exynos4_boards.c
+++ b/hw/arm/exynos4_boards.c
@@ -28,7 +28,7 @@
#include "hw/sysbus.h"
#include "net/net.h"
#include "hw/arm/boot.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "hw/arm/exynos4210.h"
#include "hw/net/lan9118.h"
#include "hw/qdev-properties.h"
diff --git a/hw/arm/fsl-imx31.c b/hw/arm/fsl-imx31.c
index 9de0f2148f..2a8ffb15f7 100644
--- a/hw/arm/fsl-imx31.c
+++ b/hw/arm/fsl-imx31.c
@@ -23,7 +23,7 @@
#include "qapi/error.h"
#include "hw/arm/fsl-imx31.h"
#include "system/system.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "hw/qdev-properties.h"
#include "chardev/char.h"
#include "target/arm/cpu-qom.h"
diff --git a/hw/arm/fsl-imx8mp.c b/hw/arm/fsl-imx8mp.c
index c3f6da6322..2cf5eeaf31 100644
--- a/hw/arm/fsl-imx8mp.c
+++ b/hw/arm/fsl-imx8mp.c
@@ -9,7 +9,7 @@
*/
#include "qemu/osdep.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "hw/arm/bsa.h"
#include "hw/arm/fsl-imx8mp.h"
#include "hw/intc/arm_gicv3.h"
diff --git a/hw/arm/imx8mp-evk.c b/hw/arm/imx8mp-evk.c
index e1a7892fd7..6e64ec4ea5 100644
--- a/hw/arm/imx8mp-evk.c
+++ b/hw/arm/imx8mp-evk.c
@@ -7,7 +7,7 @@
*/
#include "qemu/osdep.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "hw/arm/boot.h"
#include "hw/arm/fsl-imx8mp.h"
#include "hw/boards.h"
diff --git a/hw/arm/integratorcp.c b/hw/arm/integratorcp.c
index 8aa2e6e98e..ac0c6c6096 100644
--- a/hw/arm/integratorcp.c
+++ b/hw/arm/integratorcp.c
@@ -16,7 +16,7 @@
#include "hw/misc/arm_integrator_debug.h"
#include "hw/net/smc91c111.h"
#include "net/net.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "system/runstate.h"
#include "system/system.h"
#include "qemu/log.h"
diff --git a/hw/arm/kzm.c b/hw/arm/kzm.c
index 08d2b3025c..362c145409 100644
--- a/hw/arm/kzm.c
+++ b/hw/arm/kzm.c
@@ -19,7 +19,7 @@
#include "hw/arm/boot.h"
#include "hw/boards.h"
#include "qemu/error-report.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "net/net.h"
#include "hw/net/lan9118.h"
#include "hw/char/serial-mm.h"
diff --git a/hw/arm/microbit.c b/hw/arm/microbit.c
index 3f56fb45ce..ade363daaa 100644
--- a/hw/arm/microbit.c
+++ b/hw/arm/microbit.c
@@ -13,7 +13,7 @@
#include "hw/boards.h"
#include "hw/arm/boot.h"
#include "system/system.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "hw/arm/nrf51_soc.h"
#include "hw/i2c/microbit_i2c.h"
diff --git a/hw/arm/mps2-tz.c b/hw/arm/mps2-tz.c
index 13ed868b6b..b0633a5a69 100644
--- a/hw/arm/mps2-tz.c
+++ b/hw/arm/mps2-tz.c
@@ -54,7 +54,7 @@
#include "hw/arm/armv7m.h"
#include "hw/or-irq.h"
#include "hw/boards.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "system/system.h"
#include "system/reset.h"
#include "hw/misc/unimp.h"
diff --git a/hw/arm/mps2.c b/hw/arm/mps2.c
index 3f8db0cab6..6958485a66 100644
--- a/hw/arm/mps2.c
+++ b/hw/arm/mps2.c
@@ -33,7 +33,7 @@
#include "hw/arm/armv7m.h"
#include "hw/or-irq.h"
#include "hw/boards.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "system/system.h"
#include "hw/qdev-properties.h"
#include "hw/misc/unimp.h"
diff --git a/hw/arm/mps3r.c b/hw/arm/mps3r.c
index 1bddb5e822..4dd1e8a718 100644
--- a/hw/arm/mps3r.c
+++ b/hw/arm/mps3r.c
@@ -28,7 +28,7 @@
#include "qemu/units.h"
#include "qapi/error.h"
#include "qobject/qlist.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "cpu.h"
#include "system/system.h"
#include "hw/boards.h"
diff --git a/hw/arm/msf2-soc.c b/hw/arm/msf2-soc.c
index e8a5b231ba..bc9b419e37 100644
--- a/hw/arm/msf2-soc.c
+++ b/hw/arm/msf2-soc.c
@@ -25,7 +25,7 @@
#include "qemu/osdep.h"
#include "qemu/units.h"
#include "qapi/error.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "hw/char/serial-mm.h"
#include "hw/arm/msf2-soc.h"
#include "hw/misc/unimp.h"
diff --git a/hw/arm/msf2-som.c b/hw/arm/msf2-som.c
index 9b20f1e2c9..29c76c6860 100644
--- a/hw/arm/msf2-som.c
+++ b/hw/arm/msf2-som.c
@@ -33,7 +33,7 @@
#include "hw/qdev-properties.h"
#include "hw/arm/boot.h"
#include "hw/qdev-clock.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "hw/arm/msf2-soc.h"
#define DDR_BASE_ADDRESS 0xA0000000
diff --git a/hw/arm/musca.c b/hw/arm/musca.c
index e9c092abc3..a4f43f1992 100644
--- a/hw/arm/musca.c
+++ b/hw/arm/musca.c
@@ -22,7 +22,7 @@
#include "qemu/osdep.h"
#include "qemu/error-report.h"
#include "qapi/error.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "system/system.h"
#include "hw/arm/boot.h"
#include "hw/arm/armsse.h"
diff --git a/hw/arm/omap1.c b/hw/arm/omap1.c
index 3ee10b4777..91d7e3f04b 100644
--- a/hw/arm/omap1.c
+++ b/hw/arm/omap1.c
@@ -23,7 +23,7 @@
#include "qemu/main-loop.h"
#include "qapi/error.h"
#include "cpu.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "hw/hw.h"
#include "hw/irq.h"
#include "hw/qdev-properties.h"
diff --git a/hw/arm/omap_sx1.c b/hw/arm/omap_sx1.c
index 24b4043183..aa1e96b3ad 100644
--- a/hw/arm/omap_sx1.c
+++ b/hw/arm/omap_sx1.c
@@ -34,7 +34,7 @@
#include "hw/arm/boot.h"
#include "hw/block/flash.h"
#include "system/qtest.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "qemu/cutils.h"
#include "qemu/error-report.h"
diff --git a/hw/arm/orangepi.c b/hw/arm/orangepi.c
index 634af9b0a1..e0956880d1 100644
--- a/hw/arm/orangepi.c
+++ b/hw/arm/orangepi.c
@@ -19,7 +19,7 @@
#include "qemu/osdep.h"
#include "qemu/units.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "qapi/error.h"
#include "qemu/error-report.h"
#include "hw/boards.h"
diff --git a/hw/arm/stellaris.c b/hw/arm/stellaris.c
index 3361111360..cbe914c93e 100644
--- a/hw/arm/stellaris.c
+++ b/hw/arm/stellaris.c
@@ -20,7 +20,7 @@
#include "net/net.h"
#include "hw/boards.h"
#include "qemu/log.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "system/system.h"
#include "hw/arm/armv7m.h"
#include "hw/char/pl011.h"
diff --git a/hw/arm/stm32f100_soc.c b/hw/arm/stm32f100_soc.c
index 53b5636452..0eabaf8d9b 100644
--- a/hw/arm/stm32f100_soc.c
+++ b/hw/arm/stm32f100_soc.c
@@ -27,7 +27,7 @@
#include "qapi/error.h"
#include "qemu/module.h"
#include "hw/arm/boot.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "hw/arm/stm32f100_soc.h"
#include "hw/qdev-properties.h"
#include "hw/qdev-clock.h"
diff --git a/hw/arm/stm32f205_soc.c b/hw/arm/stm32f205_soc.c
index 47a54e592b..32e96912f0 100644
--- a/hw/arm/stm32f205_soc.c
+++ b/hw/arm/stm32f205_soc.c
@@ -26,7 +26,7 @@
#include "qapi/error.h"
#include "qemu/module.h"
#include "hw/arm/boot.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "hw/arm/stm32f205_soc.h"
#include "hw/qdev-properties.h"
#include "hw/qdev-clock.h"
diff --git a/hw/arm/stm32f405_soc.c b/hw/arm/stm32f405_soc.c
index 18d8824f29..bba9060daf 100644
--- a/hw/arm/stm32f405_soc.c
+++ b/hw/arm/stm32f405_soc.c
@@ -24,7 +24,7 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "system/system.h"
#include "hw/arm/stm32f405_soc.h"
#include "hw/qdev-clock.h"
diff --git a/hw/arm/stm32l4x5_soc.c b/hw/arm/stm32l4x5_soc.c
index dbf75329f7..6278d354c8 100644
--- a/hw/arm/stm32l4x5_soc.c
+++ b/hw/arm/stm32l4x5_soc.c
@@ -24,7 +24,7 @@
#include "qemu/osdep.h"
#include "qemu/units.h"
#include "qapi/error.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "system/system.h"
#include "hw/or-irq.h"
#include "hw/arm/stm32l4x5_soc.h"
diff --git a/hw/avr/atmega.c b/hw/avr/atmega.c
index 59c0160283..ee8747781e 100644
--- a/hw/avr/atmega.c
+++ b/hw/avr/atmega.c
@@ -13,7 +13,7 @@
#include "qemu/units.h"
#include "qapi/error.h"
#include "system/memory.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "system/system.h"
#include "hw/qdev-properties.h"
#include "hw/sysbus.h"
diff --git a/hw/char/goldfish_tty.c b/hw/char/goldfish_tty.c
index 7374561141..f0891ffa4d 100644
--- a/hw/char/goldfish_tty.c
+++ b/hw/char/goldfish_tty.c
@@ -15,7 +15,7 @@
#include "chardev/char-fe.h"
#include "qemu/log.h"
#include "trace.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "system/dma.h"
#include "hw/char/goldfish_tty.h"
diff --git a/hw/char/omap_uart.c b/hw/char/omap_uart.c
index 07fb868965..8cbf6ce803 100644
--- a/hw/char/omap_uart.c
+++ b/hw/char/omap_uart.c
@@ -21,7 +21,7 @@
#include "chardev/char.h"
#include "hw/arm/omap.h"
#include "hw/char/serial-mm.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
/* UARTs */
struct omap_uart_s {
diff --git a/hw/char/riscv_htif.c b/hw/char/riscv_htif.c
index ec5db5a597..c884be5d75 100644
--- a/hw/char/riscv_htif.c
+++ b/hw/char/riscv_htif.c
@@ -28,7 +28,7 @@
#include "chardev/char-fe.h"
#include "qemu/timer.h"
#include "qemu/error-report.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "exec/tswap.h"
#include "system/dma.h"
#include "system/runstate.h"
diff --git a/hw/core/cpu-system.c b/hw/core/cpu-system.c
index 5ef8c24b5b..82b68b8927 100644
--- a/hw/core/cpu-system.c
+++ b/hw/core/cpu-system.c
@@ -20,7 +20,7 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "exec/cputlb.h"
#include "system/memory.h"
#include "exec/tb-flush.h"
diff --git a/hw/core/null-machine.c b/hw/core/null-machine.c
index 7f1fb562be..a6e477a2d8 100644
--- a/hw/core/null-machine.c
+++ b/hw/core/null-machine.c
@@ -14,7 +14,7 @@
#include "qemu/osdep.h"
#include "qemu/error-report.h"
#include "hw/boards.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "hw/core/cpu.h"
static void machine_none_init(MachineState *mch)
diff --git a/hw/core/sysbus.c b/hw/core/sysbus.c
index 98819d5dc6..6eb4c0f15a 100644
--- a/hw/core/sysbus.c
+++ b/hw/core/sysbus.c
@@ -21,7 +21,7 @@
#include "qapi/error.h"
#include "hw/sysbus.h"
#include "monitor/monitor.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
static void sysbus_dev_print(Monitor *mon, DeviceState *dev, int indent);
static char *sysbus_get_fw_dev_path(DeviceState *dev);
diff --git a/hw/dma/rc4030.c b/hw/dma/rc4030.c
index 5bf54347ed..6842e7d491 100644
--- a/hw/dma/rc4030.c
+++ b/hw/dma/rc4030.c
@@ -32,7 +32,7 @@
#include "qemu/timer.h"
#include "qemu/log.h"
#include "qemu/module.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "trace.h"
#include "qom/object.h"
diff --git a/hw/hyperv/hv-balloon.c b/hw/hyperv/hv-balloon.c
index 6f33c3e741..0b1da723c8 100644
--- a/hw/hyperv/hv-balloon.c
+++ b/hw/hyperv/hv-balloon.c
@@ -10,7 +10,7 @@
#include "qemu/osdep.h"
#include "hv-balloon-internal.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "exec/cpu-common.h"
#include "exec/ramblock.h"
#include "hw/boards.h"
diff --git a/hw/hyperv/hyperv.c b/hw/hyperv/hyperv.c
index 382c62d668..d21e428eae 100644
--- a/hw/hyperv/hyperv.c
+++ b/hw/hyperv/hyperv.c
@@ -11,7 +11,7 @@
#include "qemu/main-loop.h"
#include "qemu/module.h"
#include "qapi/error.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "system/memory.h"
#include "system/kvm.h"
#include "qemu/bitops.h"
diff --git a/hw/i386/kvm/xen_evtchn.c b/hw/i386/kvm/xen_evtchn.c
index 9b8b092bc2..f9223ef1a1 100644
--- a/hw/i386/kvm/xen_evtchn.c
+++ b/hw/i386/kvm/xen_evtchn.c
@@ -23,7 +23,7 @@
#include "qobject/qdict.h"
#include "qom/object.h"
#include "exec/target_page.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "migration/vmstate.h"
#include "trace.h"
diff --git a/hw/i386/kvm/xen_gnttab.c b/hw/i386/kvm/xen_gnttab.c
index 7b843a72b1..430ba62896 100644
--- a/hw/i386/kvm/xen_gnttab.c
+++ b/hw/i386/kvm/xen_gnttab.c
@@ -17,7 +17,7 @@
#include "qapi/error.h"
#include "qom/object.h"
#include "exec/target_page.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "migration/vmstate.h"
#include "hw/sysbus.h"
diff --git a/hw/i386/kvm/xen_overlay.c b/hw/i386/kvm/xen_overlay.c
index db9aa7942d..a2b26e9906 100644
--- a/hw/i386/kvm/xen_overlay.c
+++ b/hw/i386/kvm/xen_overlay.c
@@ -16,7 +16,7 @@
#include "qapi/error.h"
#include "qom/object.h"
#include "exec/target_page.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "migration/vmstate.h"
#include "hw/sysbus.h"
diff --git a/hw/i386/sgx-epc.c b/hw/i386/sgx-epc.c
index 875e1c5c33..00b220d4d6 100644
--- a/hw/i386/sgx-epc.c
+++ b/hw/i386/sgx-epc.c
@@ -17,7 +17,7 @@
#include "qapi/error.h"
#include "qapi/visitor.h"
#include "target/i386/cpu.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
static const Property sgx_epc_properties[] = {
DEFINE_PROP_UINT64(SGX_EPC_ADDR_PROP, SGXEPCDevice, addr, 0),
diff --git a/hw/i386/sgx.c b/hw/i386/sgx.c
index e665e2111c..5685c4fb80 100644
--- a/hw/i386/sgx.c
+++ b/hw/i386/sgx.c
@@ -20,7 +20,7 @@
#include "qapi/error.h"
#include "qemu/error-report.h"
#include "qapi/qapi-commands-misc-target.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "system/hw_accel.h"
#include "system/reset.h"
#include <sys/ioctl.h>
diff --git a/hw/i386/vapic.c b/hw/i386/vapic.c
index 14de9b7a82..26aae64e5d 100644
--- a/hw/i386/vapic.c
+++ b/hw/i386/vapic.c
@@ -16,7 +16,7 @@
#include "system/hw_accel.h"
#include "system/kvm.h"
#include "system/runstate.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "hw/i386/apic_internal.h"
#include "hw/sysbus.h"
#include "hw/boards.h"
diff --git a/hw/ide/ahci-sysbus.c b/hw/ide/ahci-sysbus.c
index 03a5bd42d0..3c1935d81c 100644
--- a/hw/ide/ahci-sysbus.c
+++ b/hw/ide/ahci-sysbus.c
@@ -22,7 +22,7 @@
*/
#include "qemu/osdep.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "hw/qdev-properties.h"
#include "migration/vmstate.h"
diff --git a/hw/input/lasips2.c b/hw/input/lasips2.c
index d9f8c36778..987034efd3 100644
--- a/hw/input/lasips2.c
+++ b/hw/input/lasips2.c
@@ -29,7 +29,7 @@
#include "hw/input/lasips2.h"
#include "exec/hwaddr.h"
#include "trace.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "migration/vmstate.h"
#include "hw/irq.h"
#include "qapi/error.h"
diff --git a/hw/intc/loongarch_extioi.c b/hw/intc/loongarch_extioi.c
index a51a215e6e..a558c50185 100644
--- a/hw/intc/loongarch_extioi.c
+++ b/hw/intc/loongarch_extioi.c
@@ -11,7 +11,7 @@
#include "qapi/error.h"
#include "hw/irq.h"
#include "hw/loongarch/virt.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "hw/intc/loongarch_extioi.h"
#include "trace.h"
diff --git a/hw/intc/riscv_aplic.c b/hw/intc/riscv_aplic.c
index 5964cde7e0..789c4a4d6e 100644
--- a/hw/intc/riscv_aplic.c
+++ b/hw/intc/riscv_aplic.c
@@ -22,7 +22,7 @@
#include "qemu/module.h"
#include "qemu/error-report.h"
#include "qemu/bswap.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "hw/sysbus.h"
#include "hw/pci/msi.h"
#include "hw/boards.h"
diff --git a/hw/intc/riscv_imsic.c b/hw/intc/riscv_imsic.c
index 241b12fef0..852f413e5a 100644
--- a/hw/intc/riscv_imsic.c
+++ b/hw/intc/riscv_imsic.c
@@ -22,7 +22,7 @@
#include "qemu/module.h"
#include "qemu/error-report.h"
#include "qemu/bswap.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "hw/sysbus.h"
#include "hw/pci/msi.h"
#include "hw/boards.h"
diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
index a5840ff968..08ae2d9692 100644
--- a/hw/loongarch/virt.c
+++ b/hw/loongarch/virt.c
@@ -18,7 +18,7 @@
#include "system/reset.h"
#include "system/rtc.h"
#include "hw/loongarch/virt.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "hw/irq.h"
#include "net/net.h"
#include "hw/loader.h"
diff --git a/hw/mem/memory-device.c b/hw/mem/memory-device.c
index 1de8dfec7d..1a432e9bd2 100644
--- a/hw/mem/memory-device.c
+++ b/hw/mem/memory-device.c
@@ -17,7 +17,7 @@
#include "qemu/range.h"
#include "hw/virtio/vhost.h"
#include "system/kvm.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "trace.h"
static bool memory_device_is_empty(const MemoryDeviceState *md)
diff --git a/hw/microblaze/petalogix_ml605_mmu.c b/hw/microblaze/petalogix_ml605_mmu.c
index 21ad215e44..c887c7a99e 100644
--- a/hw/microblaze/petalogix_ml605_mmu.c
+++ b/hw/microblaze/petalogix_ml605_mmu.c
@@ -36,7 +36,7 @@
#include "hw/boards.h"
#include "hw/char/serial-mm.h"
#include "hw/qdev-properties.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "hw/ssi/ssi.h"
#include "boot.h"
diff --git a/hw/microblaze/petalogix_s3adsp1800_mmu.c b/hw/microblaze/petalogix_s3adsp1800_mmu.c
index bdba2006b7..f976c90bd2 100644
--- a/hw/microblaze/petalogix_s3adsp1800_mmu.c
+++ b/hw/microblaze/petalogix_s3adsp1800_mmu.c
@@ -33,7 +33,7 @@
#include "system/system.h"
#include "hw/boards.h"
#include "hw/misc/unimp.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "hw/char/xilinx_uartlite.h"
#include "boot.h"
diff --git a/hw/microblaze/xlnx-zynqmp-pmu.c b/hw/microblaze/xlnx-zynqmp-pmu.c
index bdbf7328bf..0922c65295 100644
--- a/hw/microblaze/xlnx-zynqmp-pmu.c
+++ b/hw/microblaze/xlnx-zynqmp-pmu.c
@@ -17,7 +17,7 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "hw/boards.h"
#include "cpu.h"
#include "boot.h"
diff --git a/hw/mips/mipssim.c b/hw/mips/mipssim.c
index c530688e76..b6dabf2893 100644
--- a/hw/mips/mipssim.c
+++ b/hw/mips/mipssim.c
@@ -28,7 +28,7 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
#include "qemu/datadir.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "hw/clock.h"
#include "hw/mips/mips.h"
#include "hw/char/serial-mm.h"
diff --git a/hw/misc/allwinner-h3-dramc.c b/hw/misc/allwinner-h3-dramc.c
index c4f3eb9274..74ff71b753 100644
--- a/hw/misc/allwinner-h3-dramc.c
+++ b/hw/misc/allwinner-h3-dramc.c
@@ -24,7 +24,7 @@
#include "migration/vmstate.h"
#include "qemu/log.h"
#include "qemu/module.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "hw/qdev-properties.h"
#include "qapi/error.h"
#include "hw/misc/allwinner-h3-dramc.h"
diff --git a/hw/misc/allwinner-r40-dramc.c b/hw/misc/allwinner-r40-dramc.c
index 96e1848c21..5908a059e8 100644
--- a/hw/misc/allwinner-r40-dramc.c
+++ b/hw/misc/allwinner-r40-dramc.c
@@ -24,7 +24,7 @@
#include "migration/vmstate.h"
#include "qemu/log.h"
#include "qemu/module.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "hw/qdev-properties.h"
#include "qapi/error.h"
#include "qemu/bitops.h"
diff --git a/hw/misc/ivshmem-flat.c b/hw/misc/ivshmem-flat.c
index 40309a8ff3..076c4b42de 100644
--- a/hw/misc/ivshmem-flat.c
+++ b/hw/misc/ivshmem-flat.c
@@ -17,7 +17,7 @@
#include "hw/qdev-properties-system.h"
#include "hw/sysbus.h"
#include "chardev/char-fe.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "trace.h"
#include "hw/misc/ivshmem-flat.h"
diff --git a/hw/misc/mac_via.c b/hw/misc/mac_via.c
index 03b1feda50..3c0819c58a 100644
--- a/hw/misc/mac_via.c
+++ b/hw/misc/mac_via.c
@@ -16,7 +16,7 @@
*/
#include "qemu/osdep.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "migration/vmstate.h"
#include "hw/sysbus.h"
#include "hw/irq.h"
diff --git a/hw/net/i82596.c b/hw/net/i82596.c
index ee919dab3c..64ed3c8390 100644
--- a/hw/net/i82596.c
+++ b/hw/net/i82596.c
@@ -15,7 +15,7 @@
#include "hw/irq.h"
#include "hw/qdev-properties.h"
#include "migration/vmstate.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "qemu/module.h"
#include "trace.h"
#include "i82596.h"
diff --git a/hw/nvram/fw_cfg.c b/hw/nvram/fw_cfg.c
index a757939cfb..cbfb2b5303 100644
--- a/hw/nvram/fw_cfg.c
+++ b/hw/nvram/fw_cfg.c
@@ -27,7 +27,7 @@
#include "system/system.h"
#include "system/dma.h"
#include "system/reset.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "hw/boards.h"
#include "hw/nvram/fw_cfg.h"
#include "hw/qdev-properties.h"
diff --git a/hw/openrisc/openrisc_sim.c b/hw/openrisc/openrisc_sim.c
index 83d7c2a8af..c2284a7d41 100644
--- a/hw/openrisc/openrisc_sim.c
+++ b/hw/openrisc/openrisc_sim.c
@@ -28,7 +28,7 @@
#include "net/net.h"
#include "hw/openrisc/boot.h"
#include "hw/qdev-properties.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "system/device_tree.h"
#include "system/system.h"
#include "hw/sysbus.h"
diff --git a/hw/openrisc/virt.c b/hw/openrisc/virt.c
index 3055306783..0d1c1f103c 100644
--- a/hw/openrisc/virt.c
+++ b/hw/openrisc/virt.c
@@ -11,7 +11,7 @@
#include "qemu/guest-random.h"
#include "qapi/error.h"
#include "cpu.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "hw/irq.h"
#include "hw/boards.h"
#include "hw/char/serial-mm.h"
diff --git a/hw/pci-host/mv64361.c b/hw/pci-host/mv64361.c
index 9c41c155fb..a297318c6e 100644
--- a/hw/pci-host/mv64361.c
+++ b/hw/pci-host/mv64361.c
@@ -17,7 +17,7 @@
#include "hw/irq.h"
#include "hw/intc/i8259.h"
#include "hw/qdev-properties.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "qemu/log.h"
#include "qemu/error-report.h"
#include "trace.h"
diff --git a/hw/ppc/pegasos2.c b/hw/ppc/pegasos2.c
index 246d6d633b..7b2dc6985c 100644
--- a/hw/ppc/pegasos2.c
+++ b/hw/ppc/pegasos2.c
@@ -31,7 +31,7 @@
#include "qemu/error-report.h"
#include "system/kvm.h"
#include "kvm_ppc.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "qom/qom-qobject.h"
#include "qobject/qdict.h"
#include "trace.h"
diff --git a/hw/ppc/pnv_psi.c b/hw/ppc/pnv_psi.c
index 1fe11dde50..f832ee61e8 100644
--- a/hw/ppc/pnv_psi.c
+++ b/hw/ppc/pnv_psi.c
@@ -18,7 +18,7 @@
*/
#include "qemu/osdep.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "hw/irq.h"
#include "target/ppc/cpu.h"
#include "qemu/log.h"
diff --git a/hw/ppc/ppc4xx_sdram.c b/hw/ppc/ppc4xx_sdram.c
index 562bff8d53..bf0faad9e7 100644
--- a/hw/ppc/ppc4xx_sdram.c
+++ b/hw/ppc/ppc4xx_sdram.c
@@ -34,7 +34,7 @@
#include "qapi/error.h"
#include "qemu/log.h"
#include "qemu/error-report.h"
-#include "exec/address-spaces.h" /* get_system_memory() */
+#include "system/address-spaces.h" /* get_system_memory() */
#include "hw/irq.h"
#include "hw/qdev-properties.h"
#include "hw/ppc/ppc4xx.h"
diff --git a/hw/ppc/prep_systemio.c b/hw/ppc/prep_systemio.c
index b1f2e130f0..08f29e72e4 100644
--- a/hw/ppc/prep_systemio.c
+++ b/hw/ppc/prep_systemio.c
@@ -28,7 +28,7 @@
#include "hw/isa/isa.h"
#include "hw/qdev-properties.h"
#include "migration/vmstate.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "qom/object.h"
#include "qemu/error-report.h" /* for error_report() */
#include "qemu/module.h"
diff --git a/hw/ppc/rs6000_mc.c b/hw/ppc/rs6000_mc.c
index 0e5d53b8b6..27f1c90f06 100644
--- a/hw/ppc/rs6000_mc.c
+++ b/hw/ppc/rs6000_mc.c
@@ -24,7 +24,7 @@
#include "hw/isa/isa.h"
#include "hw/qdev-properties.h"
#include "migration/vmstate.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "qapi/error.h"
#include "trace.h"
#include "qom/object.h"
diff --git a/hw/ppc/spapr_ovec.c b/hw/ppc/spapr_ovec.c
index 88e29536aa..6d6eaf67cb 100644
--- a/hw/ppc/spapr_ovec.c
+++ b/hw/ppc/spapr_ovec.c
@@ -15,7 +15,7 @@
#include "hw/ppc/spapr_ovec.h"
#include "migration/vmstate.h"
#include "qemu/bitmap.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "qemu/error-report.h"
#include "trace.h"
#include <libfdt.h>
diff --git a/hw/ppc/vof.c b/hw/ppc/vof.c
index 09cb77de93..f14efa3a7c 100644
--- a/hw/ppc/vof.c
+++ b/hw/ppc/vof.c
@@ -15,7 +15,7 @@
#include "qemu/units.h"
#include "qemu/log.h"
#include "qapi/error.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "hw/ppc/vof.h"
#include "hw/ppc/fdt.h"
#include "system/runstate.h"
diff --git a/hw/remote/iommu.c b/hw/remote/iommu.c
index ec845d1f58..3e0758a21e 100644
--- a/hw/remote/iommu.c
+++ b/hw/remote/iommu.c
@@ -14,7 +14,7 @@
#include "hw/pci/pci_bus.h"
#include "hw/pci/pci.h"
#include "system/memory.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "trace.h"
/**
diff --git a/hw/riscv/microblaze-v-generic.c b/hw/riscv/microblaze-v-generic.c
index d8e67906d2..e863c50cbc 100644
--- a/hw/riscv/microblaze-v-generic.c
+++ b/hw/riscv/microblaze-v-generic.c
@@ -22,7 +22,7 @@
#include "net/net.h"
#include "hw/boards.h"
#include "hw/char/serial-mm.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "hw/char/xilinx_uartlite.h"
#include "hw/misc/unimp.h"
diff --git a/hw/riscv/opentitan.c b/hw/riscv/opentitan.c
index 98a67fe52a..019d6b3986 100644
--- a/hw/riscv/opentitan.c
+++ b/hw/riscv/opentitan.c
@@ -28,7 +28,7 @@
#include "hw/riscv/boot.h"
#include "qemu/units.h"
#include "system/system.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
/*
* This version of the OpenTitan machine currently supports
diff --git a/hw/riscv/shakti_c.c b/hw/riscv/shakti_c.c
index e2242b97d0..17c5c72102 100644
--- a/hw/riscv/shakti_c.c
+++ b/hw/riscv/shakti_c.c
@@ -25,7 +25,7 @@
#include "hw/intc/riscv_aclint.h"
#include "system/system.h"
#include "hw/qdev-properties.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "hw/riscv/boot.h"
static const struct MemmapEntry {
diff --git a/hw/s390x/css.c b/hw/s390x/css.c
index 738800c98d..2059c5dd0b 100644
--- a/hw/s390x/css.c
+++ b/hw/s390x/css.c
@@ -14,7 +14,7 @@
#include "qapi/visitor.h"
#include "qemu/bitops.h"
#include "qemu/error-report.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "hw/s390x/ioinst.h"
#include "hw/qdev-properties.h"
#include "hw/s390x/css.h"
diff --git a/hw/s390x/s390-skeys.c b/hw/s390x/s390-skeys.c
index 811d892122..425e3e4a87 100644
--- a/hw/s390x/s390-skeys.c
+++ b/hw/s390x/s390-skeys.c
@@ -19,7 +19,7 @@
#include "qobject/qdict.h"
#include "qemu/error-report.h"
#include "system/memory_mapping.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "system/kvm.h"
#include "migration/qemu-file-types.h"
#include "migration/register.h"
diff --git a/hw/s390x/virtio-ccw.c b/hw/s390x/virtio-ccw.c
index 43f3b162c8..e8ecb90826 100644
--- a/hw/s390x/virtio-ccw.c
+++ b/hw/s390x/virtio-ccw.c
@@ -12,7 +12,7 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "system/kvm.h"
#include "net/net.h"
#include "hw/virtio/virtio.h"
diff --git a/hw/sparc/sun4m_iommu.c b/hw/sparc/sun4m_iommu.c
index 5a4c1f5e3b..4a542b18d2 100644
--- a/hw/sparc/sun4m_iommu.c
+++ b/hw/sparc/sun4m_iommu.c
@@ -29,7 +29,7 @@
#include "hw/sysbus.h"
#include "migration/vmstate.h"
#include "qemu/module.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "trace.h"
/*
diff --git a/hw/sparc64/sun4u_iommu.c b/hw/sparc64/sun4u_iommu.c
index eba811af0c..533fcae1fb 100644
--- a/hw/sparc64/sun4u_iommu.c
+++ b/hw/sparc64/sun4u_iommu.c
@@ -27,7 +27,7 @@
#include "qemu/osdep.h"
#include "hw/sysbus.h"
#include "hw/sparc/sun4u_iommu.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "qemu/log.h"
#include "qemu/module.h"
#include "trace.h"
diff --git a/hw/timer/hpet.c b/hw/timer/hpet.c
index ccb97b6806..ea82472105 100644
--- a/hw/timer/hpet.c
+++ b/hw/timer/hpet.c
@@ -36,7 +36,7 @@
#include "hw/rtc/mc146818rtc_regs.h"
#include "migration/vmstate.h"
#include "hw/timer/i8254.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "qom/object.h"
#include "trace.h"
diff --git a/hw/tpm/tpm_crb.c b/hw/tpm/tpm_crb.c
index 6cdeb72df0..b668aee97a 100644
--- a/hw/tpm/tpm_crb.c
+++ b/hw/tpm/tpm_crb.c
@@ -18,7 +18,7 @@
#include "qemu/module.h"
#include "qapi/error.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "hw/qdev-properties.h"
#include "hw/pci/pci_ids.h"
#include "hw/acpi/tpm.h"
diff --git a/hw/vfio/ap.c b/hw/vfio/ap.c
index c7ab4ff57a..d6575d7c44 100644
--- a/hw/vfio/ap.c
+++ b/hw/vfio/ap.c
@@ -28,7 +28,7 @@
#include "migration/vmstate.h"
#include "hw/qdev-properties.h"
#include "hw/s390x/ap-bridge.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "qom/object.h"
#define TYPE_VFIO_AP_DEVICE "vfio-ap"
diff --git a/hw/vfio/ccw.c b/hw/vfio/ccw.c
index e5e0d9e3e7..29e804e122 100644
--- a/hw/vfio/ccw.c
+++ b/hw/vfio/ccw.c
@@ -27,7 +27,7 @@
#include "hw/s390x/vfio-ccw.h"
#include "hw/qdev-properties.h"
#include "hw/s390x/ccw-device.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "qemu/error-report.h"
#include "qemu/main-loop.h"
#include "qemu/module.h"
diff --git a/hw/vfio/common.c b/hw/vfio/common.c
index 989c6ee83d..98832af88d 100644
--- a/hw/vfio/common.c
+++ b/hw/vfio/common.c
@@ -27,7 +27,7 @@
#include "hw/vfio/vfio-common.h"
#include "hw/vfio/pci.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "system/memory.h"
#include "exec/ram_addr.h"
#include "exec/target_page.h"
diff --git a/hw/vfio/container.c b/hw/vfio/container.c
index 1d1c5f9a77..2e993c7e73 100644
--- a/hw/vfio/container.c
+++ b/hw/vfio/container.c
@@ -23,7 +23,7 @@
#include <linux/vfio.h>
#include "hw/vfio/vfio-common.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "system/memory.h"
#include "exec/ram_addr.h"
#include "qemu/error-report.h"
diff --git a/hw/vfio/platform.c b/hw/vfio/platform.c
index 96c6bf5654..c6edbdd4ae 100644
--- a/hw/vfio/platform.c
+++ b/hw/vfio/platform.c
@@ -29,7 +29,7 @@
#include "qemu/module.h"
#include "qemu/range.h"
#include "system/memory.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "qemu/queue.h"
#include "hw/sysbus.h"
#include "trace.h"
diff --git a/hw/vfio/spapr.c b/hw/vfio/spapr.c
index 1a5d1611f2..c9a7dd8d68 100644
--- a/hw/vfio/spapr.c
+++ b/hw/vfio/spapr.c
@@ -13,7 +13,7 @@
#include <linux/vfio.h>
#include "system/kvm.h"
#include "system/hostmem.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "hw/vfio/vfio-common.h"
#include "hw/hw.h"
diff --git a/hw/virtio/vhost-vdpa.c b/hw/virtio/vhost-vdpa.c
index 7efbde3d4c..1e0336df1d 100644
--- a/hw/virtio/vhost-vdpa.c
+++ b/hw/virtio/vhost-vdpa.c
@@ -20,7 +20,7 @@
#include "hw/virtio/virtio-net.h"
#include "hw/virtio/vhost-shadow-virtqueue.h"
#include "hw/virtio/vhost-vdpa.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "migration/blocker.h"
#include "qemu/cutils.h"
#include "qemu/main-loop.h"
diff --git a/hw/virtio/virtio-balloon.c b/hw/virtio/virtio-balloon.c
index 2eb5a14fa2..0d0603c674 100644
--- a/hw/virtio/virtio-balloon.c
+++ b/hw/virtio/virtio-balloon.c
@@ -24,7 +24,7 @@
#include "hw/boards.h"
#include "system/balloon.h"
#include "hw/virtio/virtio-balloon.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "qapi/error.h"
#include "qapi/qapi-events-machine.h"
#include "qapi/visitor.h"
diff --git a/hw/virtio/virtio-bus.c b/hw/virtio/virtio-bus.c
index 896feb37a1..d1c79c567b 100644
--- a/hw/virtio/virtio-bus.c
+++ b/hw/virtio/virtio-bus.c
@@ -28,7 +28,7 @@
#include "qapi/error.h"
#include "hw/virtio/virtio-bus.h"
#include "hw/virtio/virtio.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
/* #define DEBUG_VIRTIO_BUS */
diff --git a/monitor/hmp-cmds-target.c b/monitor/hmp-cmds-target.c
index 6654d31406..011a367357 100644
--- a/monitor/hmp-cmds-target.c
+++ b/monitor/hmp-cmds-target.c
@@ -24,7 +24,7 @@
#include "qemu/osdep.h"
#include "disas/disas.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "system/memory.h"
#include "monitor/hmp-target.h"
#include "monitor/monitor-internal.h"
diff --git a/monitor/hmp-cmds.c b/monitor/hmp-cmds.c
index 7ded3378cf..8ddcdd76c1 100644
--- a/monitor/hmp-cmds.c
+++ b/monitor/hmp-cmds.c
@@ -14,7 +14,7 @@
*/
#include "qemu/osdep.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "exec/ioport.h"
#include "exec/gdbstub.h"
#include "gdbstub/enums.h"
diff --git a/system/ioport.c b/system/ioport.c
index 2291739039..5300716464 100644
--- a/system/ioport.c
+++ b/system/ioport.c
@@ -28,7 +28,7 @@
#include "qemu/osdep.h"
#include "exec/ioport.h"
#include "system/memory.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "trace.h"
struct MemoryRegionPortioList {
diff --git a/system/memory.c b/system/memory.c
index 2865d0deb1..a4185ea353 100644
--- a/system/memory.c
+++ b/system/memory.c
@@ -33,7 +33,7 @@
#include "qemu/accel.h"
#include "hw/boards.h"
#include "migration/vmstate.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
//#define DEBUG_UNASSIGNED
diff --git a/system/memory_mapping.c b/system/memory_mapping.c
index 8538a8241e..da708a08ab 100644
--- a/system/memory_mapping.c
+++ b/system/memory_mapping.c
@@ -17,7 +17,7 @@
#include "system/memory_mapping.h"
#include "system/memory.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "hw/core/cpu.h"
//#define DEBUG_GUEST_PHYS_REGION_ADD
diff --git a/target/arm/hvf/hvf.c b/target/arm/hvf/hvf.c
index 2439af63a0..93a3f9b53d 100644
--- a/target/arm/hvf/hvf.c
+++ b/target/arm/hvf/hvf.c
@@ -22,7 +22,7 @@
#include <mach/mach_time.h>
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "hw/boards.h"
#include "hw/irq.h"
#include "qemu/main-loop.h"
diff --git a/target/arm/kvm.c b/target/arm/kvm.c
index da30bdbb23..97de8c7e93 100644
--- a/target/arm/kvm.c
+++ b/target/arm/kvm.c
@@ -30,7 +30,7 @@
#include "internals.h"
#include "hw/pci/pci.h"
#include "exec/memattrs.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "gdbstub/enums.h"
#include "hw/boards.h"
#include "hw/irq.h"
diff --git a/target/avr/helper.c b/target/avr/helper.c
index 3412312ad5..a1e2cc9c35 100644
--- a/target/avr/helper.c
+++ b/target/avr/helper.c
@@ -26,7 +26,7 @@
#include "exec/cputlb.h"
#include "exec/page-protection.h"
#include "exec/cpu_ldst.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "exec/helper-proto.h"
bool avr_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
diff --git a/target/i386/cpu-apic.c b/target/i386/cpu-apic.c
index c1708b04bb..242a05fdbe 100644
--- a/target/i386/cpu-apic.c
+++ b/target/i386/cpu-apic.c
@@ -14,7 +14,7 @@
#include "system/hw_accel.h"
#include "system/kvm.h"
#include "system/xen.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "hw/qdev-properties.h"
#include "hw/i386/apic_internal.h"
#include "cpu-internal.h"
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 1b64ceaaba..dba1b3ffef 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -38,7 +38,7 @@
#ifndef CONFIG_USER_ONLY
#include "system/reset.h"
#include "qapi/qapi-commands-machine-target.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "hw/boards.h"
#include "hw/i386/sgx-epc.h"
#endif
diff --git a/target/i386/kvm/xen-emu.c b/target/i386/kvm/xen-emu.c
index e81a245881..b23010374f 100644
--- a/target/i386/kvm/xen-emu.c
+++ b/target/i386/kvm/xen-emu.c
@@ -17,7 +17,7 @@
#include "system/kvm_int.h"
#include "system/kvm_xen.h"
#include "kvm/kvm_i386.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "xen-emu.h"
#include "trace.h"
#include "system/runstate.h"
diff --git a/target/i386/nvmm/nvmm-all.c b/target/i386/nvmm/nvmm-all.c
index 04e5f7e637..91f0e32366 100644
--- a/target/i386/nvmm/nvmm-all.c
+++ b/target/i386/nvmm/nvmm-all.c
@@ -9,7 +9,7 @@
#include "qemu/osdep.h"
#include "cpu.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "exec/ioport.h"
#include "qemu/accel.h"
#include "system/nvmm.h"
diff --git a/target/i386/sev.c b/target/i386/sev.c
index 0e1dbb6959..ba88976e9f 100644
--- a/target/i386/sev.c
+++ b/target/i386/sev.c
@@ -39,7 +39,7 @@
#include "qapi/qapi-commands-misc-target.h"
#include "confidential-guest.h"
#include "hw/i386/pc.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "qemu/queue.h"
OBJECT_DECLARE_TYPE(SevCommonState, SevCommonStateClass, SEV_COMMON)
diff --git a/target/i386/tcg/system/misc_helper.c b/target/i386/tcg/system/misc_helper.c
index ce18c75b9f..0555cf2604 100644
--- a/target/i386/tcg/system/misc_helper.c
+++ b/target/i386/tcg/system/misc_helper.c
@@ -22,7 +22,7 @@
#include "cpu.h"
#include "exec/helper-proto.h"
#include "exec/cpu_ldst.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "exec/cputlb.h"
#include "tcg/helper-tcg.h"
#include "hw/i386/apic.h"
diff --git a/target/i386/tcg/system/tcg-cpu.c b/target/i386/tcg/system/tcg-cpu.c
index 13a3507863..ab1f3c7c59 100644
--- a/target/i386/tcg/system/tcg-cpu.c
+++ b/target/i386/tcg/system/tcg-cpu.c
@@ -23,7 +23,7 @@
#include "system/system.h"
#include "qemu/units.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "tcg/tcg-cpu.h"
diff --git a/target/i386/whpx/whpx-all.c b/target/i386/whpx/whpx-all.c
index 41fb8c5a4e..d58cb11cee 100644
--- a/target/i386/whpx/whpx-all.c
+++ b/target/i386/whpx/whpx-all.c
@@ -10,7 +10,7 @@
#include "qemu/osdep.h"
#include "cpu.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "exec/ioport.h"
#include "gdbstub/helpers.h"
#include "qemu/accel.h"
diff --git a/target/loongarch/kvm/kvm.c b/target/loongarch/kvm/kvm.c
index 28735c80be..1668f12410 100644
--- a/target/loongarch/kvm/kvm.c
+++ b/target/loongarch/kvm/kvm.c
@@ -18,7 +18,7 @@
#include "system/kvm_int.h"
#include "hw/pci/pci.h"
#include "exec/memattrs.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "hw/boards.h"
#include "hw/irq.h"
#include "hw/loongarch/virt.h"
diff --git a/target/riscv/kvm/kvm-cpu.c b/target/riscv/kvm/kvm-cpu.c
index 4ffeeaa1c9..9686fa86e0 100644
--- a/target/riscv/kvm/kvm-cpu.c
+++ b/target/riscv/kvm/kvm-cpu.c
@@ -35,7 +35,7 @@
#include "accel/accel-cpu-target.h"
#include "hw/pci/pci.h"
#include "exec/memattrs.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "hw/boards.h"
#include "hw/irq.h"
#include "hw/intc/riscv_imsic.h"
diff --git a/target/s390x/mmu_helper.c b/target/s390x/mmu_helper.c
index d8f483898d..b079d120db 100644
--- a/target/s390x/mmu_helper.c
+++ b/target/s390x/mmu_helper.c
@@ -17,7 +17,7 @@
#include "qemu/osdep.h"
#include "qemu/error-report.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "cpu.h"
#include "s390x-internal.h"
#include "kvm/kvm_s390x.h"
diff --git a/target/s390x/sigp.c b/target/s390x/sigp.c
index 6a4d9c5081..a3347f1236 100644
--- a/target/s390x/sigp.c
+++ b/target/s390x/sigp.c
@@ -14,7 +14,7 @@
#include "hw/boards.h"
#include "system/hw_accel.h"
#include "system/runstate.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "exec/cputlb.h"
#include "exec/exec-all.h"
#include "system/tcg.h"
diff --git a/target/s390x/tcg/excp_helper.c b/target/s390x/tcg/excp_helper.c
index f969850f87..ac733f407f 100644
--- a/target/s390x/tcg/excp_helper.c
+++ b/target/s390x/tcg/excp_helper.c
@@ -28,7 +28,7 @@
#include "tcg_s390x.h"
#ifndef CONFIG_USER_ONLY
#include "qemu/timer.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "hw/s390x/ioinst.h"
#include "hw/s390x/s390_flic.h"
#include "hw/boards.h"
diff --git a/target/xtensa/dbg_helper.c b/target/xtensa/dbg_helper.c
index 5546c82ecd..163a1ffc7b 100644
--- a/target/xtensa/dbg_helper.c
+++ b/target/xtensa/dbg_helper.c
@@ -31,7 +31,7 @@
#include "exec/helper-proto.h"
#include "qemu/host-utils.h"
#include "exec/exec-all.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
void HELPER(wsr_ibreakenable)(CPUXtensaState *env, uint32_t v)
{
diff --git a/hw/display/apple-gfx.m b/hw/display/apple-gfx.m
index c4323574e1..2ff1c90df7 100644
--- a/hw/display/apple-gfx.m
+++ b/hw/display/apple-gfx.m
@@ -18,7 +18,7 @@
#include "qapi/visitor.h"
#include "qapi/error.h"
#include "block/aio-wait.h"
-#include "exec/address-spaces.h"
+#include "system/address-spaces.h"
#include "system/dma.h"
#include "migration/blocker.h"
#include "ui/console.h"
--
2.43.0
^ permalink raw reply related [flat|nested] 90+ messages in thread
* [PATCH v2 18/42] include/system: Move exec/ioport.h to system/ioport.h
2025-03-18 21:31 [PATCH v2 00/42] accel/tcg, codebase: Build once patches Richard Henderson
` (16 preceding siblings ...)
2025-03-18 21:31 ` [PATCH v2 17/42] include/system: Move exec/address-spaces.h to system/address-spaces.h Richard Henderson
@ 2025-03-18 21:31 ` Richard Henderson
2025-03-18 21:31 ` [PATCH v2 19/42] include/system: Move exec/ram_addr.h to system/ram_addr.h Richard Henderson
` (23 subsequent siblings)
41 siblings, 0 replies; 90+ messages in thread
From: Richard Henderson @ 2025-03-18 21:31 UTC (permalink / raw)
To: qemu-devel; +Cc: pierrick.bouvier, philmd
Convert the existing includes with sed.
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
hw/display/vga_int.h | 2 +-
include/hw/char/parallel-isa.h | 2 +-
include/hw/dma/i8257.h | 2 +-
include/hw/ide/ide-bus.h | 2 +-
include/hw/isa/isa.h | 2 +-
include/{exec => system}/ioport.h | 6 ++----
hw/block/fdc-isa.c | 2 +-
monitor/hmp-cmds.c | 2 +-
system/ioport.c | 2 +-
system/physmem.c | 2 +-
system/qtest.c | 2 +-
target/i386/nvmm/nvmm-all.c | 2 +-
target/i386/whpx/whpx-all.c | 2 +-
tests/qtest/fuzz/qtest_wrappers.c | 2 +-
MAINTAINERS | 2 +-
15 files changed, 16 insertions(+), 18 deletions(-)
rename include/{exec => system}/ioport.h (97%)
diff --git a/hw/display/vga_int.h b/hw/display/vga_int.h
index 60ad26e03e..747b5cc6cf 100644
--- a/hw/display/vga_int.h
+++ b/hw/display/vga_int.h
@@ -26,7 +26,7 @@
#define HW_VGA_INT_H
#include "ui/console.h"
-#include "exec/ioport.h"
+#include "system/ioport.h"
#include "system/memory.h"
#include "hw/display/bochs-vbe.h"
diff --git a/include/hw/char/parallel-isa.h b/include/hw/char/parallel-isa.h
index 5284b2ffec..3edaf9dbe4 100644
--- a/include/hw/char/parallel-isa.h
+++ b/include/hw/char/parallel-isa.h
@@ -12,7 +12,7 @@
#include "parallel.h"
-#include "exec/ioport.h"
+#include "system/ioport.h"
#include "hw/isa/isa.h"
#include "qom/object.h"
diff --git a/include/hw/dma/i8257.h b/include/hw/dma/i8257.h
index 4342e4a91e..33b6286d5a 100644
--- a/include/hw/dma/i8257.h
+++ b/include/hw/dma/i8257.h
@@ -2,7 +2,7 @@
#define HW_I8257_H
#include "hw/isa/isa.h"
-#include "exec/ioport.h"
+#include "system/ioport.h"
#include "qom/object.h"
#define TYPE_I8257 "i8257"
diff --git a/include/hw/ide/ide-bus.h b/include/hw/ide/ide-bus.h
index 4841a7dcd6..121b455fcd 100644
--- a/include/hw/ide/ide-bus.h
+++ b/include/hw/ide/ide-bus.h
@@ -1,7 +1,7 @@
#ifndef HW_IDE_BUS_H
#define HW_IDE_BUS_H
-#include "exec/ioport.h"
+#include "system/ioport.h"
#include "hw/ide/ide-dev.h"
#include "hw/ide/ide-dma.h"
diff --git a/include/hw/isa/isa.h b/include/hw/isa/isa.h
index 1d852011b3..a82c5f1004 100644
--- a/include/hw/isa/isa.h
+++ b/include/hw/isa/isa.h
@@ -4,7 +4,7 @@
/* ISA bus */
#include "system/memory.h"
-#include "exec/ioport.h"
+#include "system/ioport.h"
#include "hw/qdev-core.h"
#include "qom/object.h"
diff --git a/include/exec/ioport.h b/include/system/ioport.h
similarity index 97%
rename from include/exec/ioport.h
rename to include/system/ioport.h
index ecea3575bc..780ea5a676 100644
--- a/include/exec/ioport.h
+++ b/include/system/ioport.h
@@ -21,8 +21,8 @@
* IO ports API
*/
-#ifndef IOPORT_H
-#define IOPORT_H
+#ifndef SYSTEM_IOPORT_H
+#define SYSTEM_IOPORT_H
#include "system/memory.h"
@@ -39,9 +39,7 @@ typedef struct MemoryRegionPortio {
#define PORTIO_END_OF_LIST() { }
-#ifndef CONFIG_USER_ONLY
extern const MemoryRegionOps unassigned_io_ops;
-#endif
void cpu_outb(uint32_t addr, uint8_t val);
void cpu_outw(uint32_t addr, uint16_t val);
diff --git a/hw/block/fdc-isa.c b/hw/block/fdc-isa.c
index a10c24aab1..561cfa47c1 100644
--- a/hw/block/fdc-isa.c
+++ b/hw/block/fdc-isa.c
@@ -42,7 +42,7 @@
#include "system/block-backend.h"
#include "system/blockdev.h"
#include "system/system.h"
-#include "exec/ioport.h"
+#include "system/ioport.h"
#include "qemu/log.h"
#include "qemu/main-loop.h"
#include "qemu/module.h"
diff --git a/monitor/hmp-cmds.c b/monitor/hmp-cmds.c
index 8ddcdd76c1..74a0f56566 100644
--- a/monitor/hmp-cmds.c
+++ b/monitor/hmp-cmds.c
@@ -15,7 +15,7 @@
#include "qemu/osdep.h"
#include "system/address-spaces.h"
-#include "exec/ioport.h"
+#include "system/ioport.h"
#include "exec/gdbstub.h"
#include "gdbstub/enums.h"
#include "monitor/hmp.h"
diff --git a/system/ioport.c b/system/ioport.c
index 5300716464..4f96e9119f 100644
--- a/system/ioport.c
+++ b/system/ioport.c
@@ -26,7 +26,7 @@
*/
#include "qemu/osdep.h"
-#include "exec/ioport.h"
+#include "system/ioport.h"
#include "system/memory.h"
#include "system/address-spaces.h"
#include "trace.h"
diff --git a/system/physmem.c b/system/physmem.c
index be92969a4a..2850e14780 100644
--- a/system/physmem.c
+++ b/system/physmem.c
@@ -51,7 +51,7 @@
#include "qemu/memalign.h"
#include "qemu/memfd.h"
#include "system/memory.h"
-#include "exec/ioport.h"
+#include "system/ioport.h"
#include "system/dma.h"
#include "system/hostmem.h"
#include "system/hw_accel.h"
diff --git a/system/qtest.c b/system/qtest.c
index 5407289154..523a047995 100644
--- a/system/qtest.c
+++ b/system/qtest.c
@@ -16,7 +16,7 @@
#include "system/qtest.h"
#include "system/runstate.h"
#include "chardev/char-fe.h"
-#include "exec/ioport.h"
+#include "system/ioport.h"
#include "system/memory.h"
#include "exec/tswap.h"
#include "hw/qdev-core.h"
diff --git a/target/i386/nvmm/nvmm-all.c b/target/i386/nvmm/nvmm-all.c
index 91f0e32366..17394d073d 100644
--- a/target/i386/nvmm/nvmm-all.c
+++ b/target/i386/nvmm/nvmm-all.c
@@ -10,7 +10,7 @@
#include "qemu/osdep.h"
#include "cpu.h"
#include "system/address-spaces.h"
-#include "exec/ioport.h"
+#include "system/ioport.h"
#include "qemu/accel.h"
#include "system/nvmm.h"
#include "system/cpus.h"
diff --git a/target/i386/whpx/whpx-all.c b/target/i386/whpx/whpx-all.c
index d58cb11cee..b64852e13e 100644
--- a/target/i386/whpx/whpx-all.c
+++ b/target/i386/whpx/whpx-all.c
@@ -11,7 +11,7 @@
#include "qemu/osdep.h"
#include "cpu.h"
#include "system/address-spaces.h"
-#include "exec/ioport.h"
+#include "system/ioport.h"
#include "gdbstub/helpers.h"
#include "qemu/accel.h"
#include "system/whpx.h"
diff --git a/tests/qtest/fuzz/qtest_wrappers.c b/tests/qtest/fuzz/qtest_wrappers.c
index 0580f8df86..d7adcbe3fd 100644
--- a/tests/qtest/fuzz/qtest_wrappers.c
+++ b/tests/qtest/fuzz/qtest_wrappers.c
@@ -13,7 +13,7 @@
#include "qemu/osdep.h"
#include "hw/core/cpu.h"
-#include "exec/ioport.h"
+#include "system/ioport.h"
#include "fuzz.h"
diff --git a/MAINTAINERS b/MAINTAINERS
index f606e158a7..9a702ff636 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -3104,7 +3104,7 @@ M: Peter Xu <peterx@redhat.com>
M: David Hildenbrand <david@redhat.com>
R: Philippe Mathieu-Daudé <philmd@linaro.org>
S: Supported
-F: include/exec/ioport.h
+F: include/system/ioport.h
F: include/exec/memop.h
F: include/system/memory.h
F: include/exec/ram_addr.h
--
2.43.0
^ permalink raw reply related [flat|nested] 90+ messages in thread
* [PATCH v2 19/42] include/system: Move exec/ram_addr.h to system/ram_addr.h
2025-03-18 21:31 [PATCH v2 00/42] accel/tcg, codebase: Build once patches Richard Henderson
` (17 preceding siblings ...)
2025-03-18 21:31 ` [PATCH v2 18/42] include/system: Move exec/ioport.h to system/ioport.h Richard Henderson
@ 2025-03-18 21:31 ` Richard Henderson
2025-03-18 21:31 ` [PATCH v2 20/42] include/system: Move exec/ramblock.h to system/ramblock.h Richard Henderson
` (22 subsequent siblings)
41 siblings, 0 replies; 90+ messages in thread
From: Richard Henderson @ 2025-03-18 21:31 UTC (permalink / raw)
To: qemu-devel; +Cc: pierrick.bouvier, philmd
Convert the existing includes with sed.
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/{exec => system}/ram_addr.h | 7 +++----
accel/kvm/kvm-all.c | 2 +-
accel/tcg/cputlb.c | 2 +-
accel/tcg/translate-all.c | 2 +-
hw/ppc/spapr.c | 2 +-
hw/ppc/spapr_caps.c | 2 +-
hw/ppc/spapr_pci.c | 2 +-
hw/remote/memory.c | 2 +-
hw/remote/proxy-memory-listener.c | 2 +-
hw/s390x/s390-stattrib-kvm.c | 2 +-
hw/s390x/s390-stattrib.c | 2 +-
hw/s390x/s390-virtio-ccw.c | 2 +-
hw/vfio/common.c | 3 +--
hw/vfio/container.c | 2 +-
hw/vfio/spapr.c | 2 +-
hw/virtio/virtio-mem.c | 2 +-
migration/ram.c | 2 +-
system/memory.c | 2 +-
system/physmem.c | 2 +-
target/arm/tcg/mte_helper.c | 2 +-
target/ppc/kvm.c | 2 +-
target/s390x/kvm/kvm.c | 2 +-
MAINTAINERS | 2 +-
23 files changed, 25 insertions(+), 27 deletions(-)
rename include/{exec => system}/ram_addr.h (99%)
diff --git a/include/exec/ram_addr.h b/include/system/ram_addr.h
similarity index 99%
rename from include/exec/ram_addr.h
rename to include/system/ram_addr.h
index 8677761af5..3b81c3091f 100644
--- a/include/exec/ram_addr.h
+++ b/include/system/ram_addr.h
@@ -16,10 +16,9 @@
* The functions declared here will be removed soon.
*/
-#ifndef RAM_ADDR_H
-#define RAM_ADDR_H
+#ifndef SYSTEM_RAM_ADDR_H
+#define SYSTEM_RAM_ADDR_H
-#ifndef CONFIG_USER_ONLY
#include "system/xen.h"
#include "system/tcg.h"
#include "exec/cputlb.h"
@@ -559,5 +558,5 @@ uint64_t cpu_physical_memory_sync_dirty_bitmap(RAMBlock *rb,
return num_dirty;
}
-#endif
+
#endif
diff --git a/accel/kvm/kvm-all.c b/accel/kvm/kvm-all.c
index 0d47bb0d9b..0723a3933b 100644
--- a/accel/kvm/kvm-all.c
+++ b/accel/kvm/kvm-all.c
@@ -34,7 +34,7 @@
#include "system/accel-blocker.h"
#include "qemu/bswap.h"
#include "system/memory.h"
-#include "exec/ram_addr.h"
+#include "system/ram_addr.h"
#include "qemu/event_notifier.h"
#include "qemu/main-loop.h"
#include "trace.h"
diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c
index 6f0ea9067b..134e523cab 100644
--- a/accel/tcg/cputlb.c
+++ b/accel/tcg/cputlb.c
@@ -27,7 +27,7 @@
#include "exec/cputlb.h"
#include "exec/tb-flush.h"
#include "exec/memory-internal.h"
-#include "exec/ram_addr.h"
+#include "system/ram_addr.h"
#include "exec/mmu-access-type.h"
#include "exec/tlb-common.h"
#include "exec/vaddr.h"
diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c
index 16e5043597..167535bcb1 100644
--- a/accel/tcg/translate-all.c
+++ b/accel/tcg/translate-all.c
@@ -40,7 +40,7 @@
#endif
#endif
#else
-#include "exec/ram_addr.h"
+#include "system/ram_addr.h"
#endif
#include "exec/cputlb.h"
diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index a415e51d07..7ae7122093 100644
--- a/hw/ppc/spapr.c
+++ b/hw/ppc/spapr.c
@@ -77,7 +77,7 @@
#include "hw/virtio/virtio-scsi.h"
#include "hw/virtio/vhost-scsi-common.h"
-#include "exec/ram_addr.h"
+#include "system/ram_addr.h"
#include "system/confidential-guest-support.h"
#include "hw/usb.h"
#include "qemu/config-file.h"
diff --git a/hw/ppc/spapr_caps.c b/hw/ppc/spapr_caps.c
index 815c94ed2f..f2f5722d8a 100644
--- a/hw/ppc/spapr_caps.c
+++ b/hw/ppc/spapr_caps.c
@@ -27,7 +27,7 @@
#include "qapi/error.h"
#include "qapi/visitor.h"
#include "system/hw_accel.h"
-#include "exec/ram_addr.h"
+#include "system/ram_addr.h"
#include "target/ppc/cpu.h"
#include "target/ppc/mmu-hash64.h"
#include "cpu-models.h"
diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c
index e0a9d50edc..384269b831 100644
--- a/hw/ppc/spapr_pci.c
+++ b/hw/ppc/spapr_pci.c
@@ -34,7 +34,7 @@
#include "hw/pci/pci_host.h"
#include "hw/ppc/spapr.h"
#include "hw/pci-host/spapr.h"
-#include "exec/ram_addr.h"
+#include "system/ram_addr.h"
#include <libfdt.h>
#include "trace.h"
#include "qemu/error-report.h"
diff --git a/hw/remote/memory.c b/hw/remote/memory.c
index 6d60da91e0..00193a552f 100644
--- a/hw/remote/memory.c
+++ b/hw/remote/memory.c
@@ -11,7 +11,7 @@
#include "qemu/osdep.h"
#include "hw/remote/memory.h"
-#include "exec/ram_addr.h"
+#include "system/ram_addr.h"
#include "qapi/error.h"
static void remote_sysmem_reset(void)
diff --git a/hw/remote/proxy-memory-listener.c b/hw/remote/proxy-memory-listener.c
index ce7f5b9bfb..30ac74961d 100644
--- a/hw/remote/proxy-memory-listener.c
+++ b/hw/remote/proxy-memory-listener.c
@@ -12,7 +12,7 @@
#include "qemu/range.h"
#include "system/memory.h"
#include "exec/cpu-common.h"
-#include "exec/ram_addr.h"
+#include "system/ram_addr.h"
#include "qapi/error.h"
#include "qemu/error-report.h"
#include "hw/remote/mpqemu-link.h"
diff --git a/hw/s390x/s390-stattrib-kvm.c b/hw/s390x/s390-stattrib-kvm.c
index 2a8e31718b..f5695b0e53 100644
--- a/hw/s390x/s390-stattrib-kvm.c
+++ b/hw/s390x/s390-stattrib-kvm.c
@@ -16,7 +16,7 @@
#include "qemu/error-report.h"
#include "system/kvm.h"
#include "system/memory_mapping.h"
-#include "exec/ram_addr.h"
+#include "system/ram_addr.h"
#include "kvm/kvm_s390x.h"
#include "qapi/error.h"
diff --git a/hw/s390x/s390-stattrib.c b/hw/s390x/s390-stattrib.c
index be07c28c6e..d95b58a8a8 100644
--- a/hw/s390x/s390-stattrib.c
+++ b/hw/s390x/s390-stattrib.c
@@ -16,7 +16,7 @@
#include "hw/qdev-properties.h"
#include "hw/s390x/storage-attributes.h"
#include "qemu/error-report.h"
-#include "exec/ram_addr.h"
+#include "system/ram_addr.h"
#include "qapi/error.h"
#include "qobject/qdict.h"
#include "cpu.h"
diff --git a/hw/s390x/s390-virtio-ccw.c b/hw/s390x/s390-virtio-ccw.c
index 75b32182eb..81e570905e 100644
--- a/hw/s390x/s390-virtio-ccw.c
+++ b/hw/s390x/s390-virtio-ccw.c
@@ -13,7 +13,7 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
-#include "exec/ram_addr.h"
+#include "system/ram_addr.h"
#include "system/confidential-guest-support.h"
#include "hw/boards.h"
#include "hw/s390x/sclp.h"
diff --git a/hw/vfio/common.c b/hw/vfio/common.c
index 98832af88d..bae0633c3d 100644
--- a/hw/vfio/common.c
+++ b/hw/vfio/common.c
@@ -29,8 +29,7 @@
#include "hw/vfio/pci.h"
#include "system/address-spaces.h"
#include "system/memory.h"
-#include "exec/ram_addr.h"
-#include "exec/target_page.h"
+#include "system/ram_addr.h"
#include "hw/hw.h"
#include "qemu/error-report.h"
#include "qemu/main-loop.h"
diff --git a/hw/vfio/container.c b/hw/vfio/container.c
index 2e993c7e73..812d5edbcf 100644
--- a/hw/vfio/container.c
+++ b/hw/vfio/container.c
@@ -25,7 +25,7 @@
#include "hw/vfio/vfio-common.h"
#include "system/address-spaces.h"
#include "system/memory.h"
-#include "exec/ram_addr.h"
+#include "system/ram_addr.h"
#include "qemu/error-report.h"
#include "qemu/range.h"
#include "system/reset.h"
diff --git a/hw/vfio/spapr.c b/hw/vfio/spapr.c
index c9a7dd8d68..66a2d2bb0d 100644
--- a/hw/vfio/spapr.c
+++ b/hw/vfio/spapr.c
@@ -17,7 +17,7 @@
#include "hw/vfio/vfio-common.h"
#include "hw/hw.h"
-#include "exec/ram_addr.h"
+#include "system/ram_addr.h"
#include "qemu/error-report.h"
#include "qapi/error.h"
#include "trace.h"
diff --git a/hw/virtio/virtio-mem.c b/hw/virtio/virtio-mem.c
index 5f57eccbb6..c7968ee0c6 100644
--- a/hw/virtio/virtio-mem.c
+++ b/hw/virtio/virtio-mem.c
@@ -24,7 +24,7 @@
#include "hw/virtio/virtio-mem.h"
#include "qapi/error.h"
#include "qapi/visitor.h"
-#include "exec/ram_addr.h"
+#include "system/ram_addr.h"
#include "migration/misc.h"
#include "hw/boards.h"
#include "hw/qdev-properties.h"
diff --git a/migration/ram.c b/migration/ram.c
index 424df6d9f1..6295f675df 100644
--- a/migration/ram.c
+++ b/migration/ram.c
@@ -48,7 +48,7 @@
#include "qapi/qapi-commands-migration.h"
#include "qapi/qmp/qerror.h"
#include "trace.h"
-#include "exec/ram_addr.h"
+#include "system/ram_addr.h"
#include "exec/target_page.h"
#include "qemu/rcu_queue.h"
#include "migration/colo.h"
diff --git a/system/memory.c b/system/memory.c
index a4185ea353..6a5d853071 100644
--- a/system/memory.c
+++ b/system/memory.c
@@ -26,7 +26,7 @@
#include "trace.h"
#include "exec/memory-internal.h"
-#include "exec/ram_addr.h"
+#include "system/ram_addr.h"
#include "system/kvm.h"
#include "system/runstate.h"
#include "system/tcg.h"
diff --git a/system/physmem.c b/system/physmem.c
index 2850e14780..765d195cb0 100644
--- a/system/physmem.c
+++ b/system/physmem.c
@@ -67,7 +67,7 @@
#include "system/replay.h"
#include "exec/memory-internal.h"
-#include "exec/ram_addr.h"
+#include "system/ram_addr.h"
#include "qemu/pmem.h"
diff --git a/target/arm/tcg/mte_helper.c b/target/arm/tcg/mte_helper.c
index 5d6d8a17ae..80164a8050 100644
--- a/target/arm/tcg/mte_helper.c
+++ b/target/arm/tcg/mte_helper.c
@@ -27,7 +27,7 @@
#include "user/cpu_loop.h"
#include "user/page-protection.h"
#else
-#include "exec/ram_addr.h"
+#include "system/ram_addr.h"
#endif
#include "exec/cpu_ldst.h"
#include "exec/helper-proto.h"
diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c
index 992356cb75..8b12b8e7d2 100644
--- a/target/ppc/kvm.c
+++ b/target/ppc/kvm.c
@@ -41,7 +41,7 @@
#include "trace.h"
#include "gdbstub/enums.h"
#include "exec/memattrs.h"
-#include "exec/ram_addr.h"
+#include "system/ram_addr.h"
#include "system/hostmem.h"
#include "qemu/cutils.h"
#include "qemu/main-loop.h"
diff --git a/target/s390x/kvm/kvm.c b/target/s390x/kvm/kvm.c
index 4d56e653dd..b9f1422197 100644
--- a/target/s390x/kvm/kvm.c
+++ b/target/s390x/kvm/kvm.c
@@ -41,7 +41,7 @@
#include "system/runstate.h"
#include "system/device_tree.h"
#include "gdbstub/enums.h"
-#include "exec/ram_addr.h"
+#include "system/ram_addr.h"
#include "trace.h"
#include "hw/s390x/s390-pci-inst.h"
#include "hw/s390x/s390-pci-bus.h"
diff --git a/MAINTAINERS b/MAINTAINERS
index 9a702ff636..3e1af7e1b2 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -3107,7 +3107,7 @@ S: Supported
F: include/system/ioport.h
F: include/exec/memop.h
F: include/system/memory.h
-F: include/exec/ram_addr.h
+F: include/system/ram_addr.h
F: include/exec/ramblock.h
F: include/system/memory_mapping.h
F: system/dma-helpers.c
--
2.43.0
^ permalink raw reply related [flat|nested] 90+ messages in thread
* [PATCH v2 20/42] include/system: Move exec/ramblock.h to system/ramblock.h
2025-03-18 21:31 [PATCH v2 00/42] accel/tcg, codebase: Build once patches Richard Henderson
` (18 preceding siblings ...)
2025-03-18 21:31 ` [PATCH v2 19/42] include/system: Move exec/ram_addr.h to system/ram_addr.h Richard Henderson
@ 2025-03-18 21:31 ` Richard Henderson
2025-03-18 21:31 ` [PATCH v2 21/42] accel/tcg: Remove unnecesary inclusion of memory-internal.h in cputlb.c Richard Henderson
` (21 subsequent siblings)
41 siblings, 0 replies; 90+ messages in thread
From: Richard Henderson @ 2025-03-18 21:31 UTC (permalink / raw)
To: qemu-devel; +Cc: pierrick.bouvier, philmd
Convert the existing includes with sed.
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/system/ram_addr.h | 2 +-
include/{exec => system}/ramblock.h | 9 ++++-----
hw/display/virtio-gpu-udmabuf.c | 2 +-
hw/hyperv/hv-balloon.c | 2 +-
hw/virtio/vhost-user.c | 2 +-
migration/dirtyrate.c | 2 +-
migration/file.c | 2 +-
migration/multifd-nocomp.c | 2 +-
migration/multifd-qatzip.c | 2 +-
migration/multifd-qpl.c | 2 +-
migration/multifd-uadk.c | 2 +-
migration/multifd-zero-page.c | 2 +-
migration/multifd-zlib.c | 2 +-
migration/multifd-zstd.c | 2 +-
migration/multifd.c | 2 +-
migration/postcopy-ram.c | 2 +-
tests/qtest/fuzz/generic_fuzz.c | 2 +-
MAINTAINERS | 2 +-
18 files changed, 21 insertions(+), 22 deletions(-)
rename include/{exec => system}/ramblock.h (96%)
diff --git a/include/system/ram_addr.h b/include/system/ram_addr.h
index 3b81c3091f..b4e4425acb 100644
--- a/include/system/ram_addr.h
+++ b/include/system/ram_addr.h
@@ -23,7 +23,7 @@
#include "system/tcg.h"
#include "exec/cputlb.h"
#include "exec/ramlist.h"
-#include "exec/ramblock.h"
+#include "system/ramblock.h"
#include "exec/exec-all.h"
#include "system/memory.h"
#include "exec/target_page.h"
diff --git a/include/exec/ramblock.h b/include/system/ramblock.h
similarity index 96%
rename from include/exec/ramblock.h
rename to include/system/ramblock.h
index 64484cd821..d8a116ba99 100644
--- a/include/exec/ramblock.h
+++ b/include/system/ramblock.h
@@ -16,11 +16,10 @@
* The functions declared here will be removed soon.
*/
-#ifndef QEMU_EXEC_RAMBLOCK_H
-#define QEMU_EXEC_RAMBLOCK_H
+#ifndef SYSTEM_RAMBLOCK_H
+#define SYSTEM_RAMBLOCK_H
-#ifndef CONFIG_USER_ONLY
-#include "cpu-common.h"
+#include "exec/cpu-common.h"
#include "qemu/rcu.h"
#include "exec/ramlist.h"
@@ -91,5 +90,5 @@ struct RAMBlock {
*/
ram_addr_t postcopy_length;
};
-#endif
+
#endif
diff --git a/hw/display/virtio-gpu-udmabuf.c b/hw/display/virtio-gpu-udmabuf.c
index 85ca23cb32..0510577475 100644
--- a/hw/display/virtio-gpu-udmabuf.c
+++ b/hw/display/virtio-gpu-udmabuf.c
@@ -19,7 +19,7 @@
#include "hw/virtio/virtio-gpu.h"
#include "hw/virtio/virtio-gpu-pixman.h"
#include "trace.h"
-#include "exec/ramblock.h"
+#include "system/ramblock.h"
#include "system/hostmem.h"
#include <sys/ioctl.h>
#include <linux/memfd.h>
diff --git a/hw/hyperv/hv-balloon.c b/hw/hyperv/hv-balloon.c
index 0b1da723c8..acabff2c4a 100644
--- a/hw/hyperv/hv-balloon.c
+++ b/hw/hyperv/hv-balloon.c
@@ -12,7 +12,7 @@
#include "system/address-spaces.h"
#include "exec/cpu-common.h"
-#include "exec/ramblock.h"
+#include "system/ramblock.h"
#include "hw/boards.h"
#include "hw/hyperv/dynmem-proto.h"
#include "hw/hyperv/hv-balloon.h"
diff --git a/hw/virtio/vhost-user.c b/hw/virtio/vhost-user.c
index 267b612587..48561d3c74 100644
--- a/hw/virtio/vhost-user.c
+++ b/hw/virtio/vhost-user.c
@@ -28,7 +28,7 @@
#include "system/cryptodev.h"
#include "migration/postcopy-ram.h"
#include "trace.h"
-#include "exec/ramblock.h"
+#include "system/ramblock.h"
#include <sys/ioctl.h>
#include <sys/socket.h>
diff --git a/migration/dirtyrate.c b/migration/dirtyrate.c
index 09caf92f87..986624c79a 100644
--- a/migration/dirtyrate.c
+++ b/migration/dirtyrate.c
@@ -14,7 +14,7 @@
#include "qemu/error-report.h"
#include "hw/core/cpu.h"
#include "qapi/error.h"
-#include "exec/ramblock.h"
+#include "system/ramblock.h"
#include "exec/target_page.h"
#include "qemu/rcu_queue.h"
#include "qemu/main-loop.h"
diff --git a/migration/file.c b/migration/file.c
index 7f11e26f5c..bb8031e3c7 100644
--- a/migration/file.c
+++ b/migration/file.c
@@ -6,7 +6,7 @@
*/
#include "qemu/osdep.h"
-#include "exec/ramblock.h"
+#include "system/ramblock.h"
#include "qemu/cutils.h"
#include "qemu/error-report.h"
#include "qapi/error.h"
diff --git a/migration/multifd-nocomp.c b/migration/multifd-nocomp.c
index ffe75256c9..94f248e8a2 100644
--- a/migration/multifd-nocomp.c
+++ b/migration/multifd-nocomp.c
@@ -11,7 +11,7 @@
*/
#include "qemu/osdep.h"
-#include "exec/ramblock.h"
+#include "system/ramblock.h"
#include "exec/target_page.h"
#include "file.h"
#include "migration-stats.h"
diff --git a/migration/multifd-qatzip.c b/migration/multifd-qatzip.c
index 6a0e989fae..7419e5dc0d 100644
--- a/migration/multifd-qatzip.c
+++ b/migration/multifd-qatzip.c
@@ -13,7 +13,7 @@
*/
#include "qemu/osdep.h"
-#include "exec/ramblock.h"
+#include "system/ramblock.h"
#include "qapi/error.h"
#include "qemu/error-report.h"
#include "qapi/qapi-types-migration.h"
diff --git a/migration/multifd-qpl.c b/migration/multifd-qpl.c
index 88e2344af2..52902eb00c 100644
--- a/migration/multifd-qpl.c
+++ b/migration/multifd-qpl.c
@@ -14,7 +14,7 @@
#include "qemu/module.h"
#include "qapi/error.h"
#include "qapi/qapi-types-migration.h"
-#include "exec/ramblock.h"
+#include "system/ramblock.h"
#include "multifd.h"
#include "qpl/qpl.h"
diff --git a/migration/multifd-uadk.c b/migration/multifd-uadk.c
index 6895c1f65a..fd7cd9b5e8 100644
--- a/migration/multifd-uadk.c
+++ b/migration/multifd-uadk.c
@@ -13,7 +13,7 @@
#include "qemu/osdep.h"
#include "qemu/module.h"
#include "qapi/error.h"
-#include "exec/ramblock.h"
+#include "system/ramblock.h"
#include "migration.h"
#include "multifd.h"
#include "options.h"
diff --git a/migration/multifd-zero-page.c b/migration/multifd-zero-page.c
index f1e988a959..dbc1184921 100644
--- a/migration/multifd-zero-page.c
+++ b/migration/multifd-zero-page.c
@@ -12,7 +12,7 @@
#include "qemu/osdep.h"
#include "qemu/cutils.h"
-#include "exec/ramblock.h"
+#include "system/ramblock.h"
#include "migration.h"
#include "migration-stats.h"
#include "multifd.h"
diff --git a/migration/multifd-zlib.c b/migration/multifd-zlib.c
index 8cf8a26bb4..8820b2a787 100644
--- a/migration/multifd-zlib.c
+++ b/migration/multifd-zlib.c
@@ -13,7 +13,7 @@
#include "qemu/osdep.h"
#include <zlib.h>
#include "qemu/rcu.h"
-#include "exec/ramblock.h"
+#include "system/ramblock.h"
#include "exec/target_page.h"
#include "qapi/error.h"
#include "migration.h"
diff --git a/migration/multifd-zstd.c b/migration/multifd-zstd.c
index abed140855..3c2dcf76b0 100644
--- a/migration/multifd-zstd.c
+++ b/migration/multifd-zstd.c
@@ -13,7 +13,7 @@
#include "qemu/osdep.h"
#include <zstd.h>
#include "qemu/rcu.h"
-#include "exec/ramblock.h"
+#include "system/ramblock.h"
#include "exec/target_page.h"
#include "qapi/error.h"
#include "migration.h"
diff --git a/migration/multifd.c b/migration/multifd.c
index dfb5189f0e..86c83e43c0 100644
--- a/migration/multifd.c
+++ b/migration/multifd.c
@@ -16,7 +16,7 @@
#include "qemu/rcu.h"
#include "exec/target_page.h"
#include "system/system.h"
-#include "exec/ramblock.h"
+#include "system/ramblock.h"
#include "qemu/error-report.h"
#include "qapi/error.h"
#include "file.h"
diff --git a/migration/postcopy-ram.c b/migration/postcopy-ram.c
index 5d3edfcfec..995614b38c 100644
--- a/migration/postcopy-ram.c
+++ b/migration/postcopy-ram.c
@@ -31,7 +31,7 @@
#include "qemu/error-report.h"
#include "trace.h"
#include "hw/boards.h"
-#include "exec/ramblock.h"
+#include "system/ramblock.h"
#include "socket.h"
#include "yank_functions.h"
#include "tls.h"
diff --git a/tests/qtest/fuzz/generic_fuzz.c b/tests/qtest/fuzz/generic_fuzz.c
index 239be9372d..507de74806 100644
--- a/tests/qtest/fuzz/generic_fuzz.c
+++ b/tests/qtest/fuzz/generic_fuzz.c
@@ -21,7 +21,7 @@
#include "fuzz.h"
#include "string.h"
#include "system/memory.h"
-#include "exec/ramblock.h"
+#include "system/ramblock.h"
#include "hw/qdev-core.h"
#include "hw/pci/pci.h"
#include "hw/pci/pci_device.h"
diff --git a/MAINTAINERS b/MAINTAINERS
index 3e1af7e1b2..18a5381afd 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -3108,7 +3108,7 @@ F: include/system/ioport.h
F: include/exec/memop.h
F: include/system/memory.h
F: include/system/ram_addr.h
-F: include/exec/ramblock.h
+F: include/system/ramblock.h
F: include/system/memory_mapping.h
F: system/dma-helpers.c
F: system/ioport.c
--
2.43.0
^ permalink raw reply related [flat|nested] 90+ messages in thread
* [PATCH v2 21/42] accel/tcg: Remove unnecesary inclusion of memory-internal.h in cputlb.c
2025-03-18 21:31 [PATCH v2 00/42] accel/tcg, codebase: Build once patches Richard Henderson
` (19 preceding siblings ...)
2025-03-18 21:31 ` [PATCH v2 20/42] include/system: Move exec/ramblock.h to system/ramblock.h Richard Henderson
@ 2025-03-18 21:31 ` Richard Henderson
2025-03-18 21:31 ` [PATCH v2 22/42] exec: Restrict memory-internal.h to system/ Richard Henderson
` (20 subsequent siblings)
41 siblings, 0 replies; 90+ messages in thread
From: Richard Henderson @ 2025-03-18 21:31 UTC (permalink / raw)
To: qemu-devel; +Cc: pierrick.bouvier, philmd, David Hildenbrand
From: Philippe Mathieu-Daudé <philmd@linaro.org>
At some point cputlb.c stopped depending on the
"exec/memory-internal.h" header. Clean that now.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Reviewed-by: David Hildenbrand <david@redhat.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20250317161329.40300-2-philmd@linaro.org>
---
accel/tcg/cputlb.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c
index 134e523cab..613f919fff 100644
--- a/accel/tcg/cputlb.c
+++ b/accel/tcg/cputlb.c
@@ -26,7 +26,6 @@
#include "exec/cpu_ldst.h"
#include "exec/cputlb.h"
#include "exec/tb-flush.h"
-#include "exec/memory-internal.h"
#include "system/ram_addr.h"
#include "exec/mmu-access-type.h"
#include "exec/tlb-common.h"
--
2.43.0
^ permalink raw reply related [flat|nested] 90+ messages in thread
* [PATCH v2 22/42] exec: Restrict memory-internal.h to system/
2025-03-18 21:31 [PATCH v2 00/42] accel/tcg, codebase: Build once patches Richard Henderson
` (20 preceding siblings ...)
2025-03-18 21:31 ` [PATCH v2 21/42] accel/tcg: Remove unnecesary inclusion of memory-internal.h in cputlb.c Richard Henderson
@ 2025-03-18 21:31 ` Richard Henderson
2025-03-18 21:31 ` [PATCH v2 23/42] meson: Introduce top-level libuser_ss and libsystem_ss Richard Henderson
` (19 subsequent siblings)
41 siblings, 0 replies; 90+ messages in thread
From: Richard Henderson @ 2025-03-18 21:31 UTC (permalink / raw)
To: qemu-devel; +Cc: pierrick.bouvier, philmd, David Hildenbrand
From: Philippe Mathieu-Daudé <philmd@linaro.org>
Only file units within the system/ directory need access to
"memory-internal.h". Restrict its scope by moving it there.
The comment from commit 9d70618c684 ("memory-internal.h:
Remove obsolete claim that header is obsolete") is now obsolete,
remove it.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: David Hildenbrand <david@redhat.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20250317161329.40300-3-philmd@linaro.org>
---
{include/exec => system}/memory-internal.h | 6 ------
system/memory.c | 4 ++--
system/physmem.c | 3 ++-
MAINTAINERS | 2 +-
4 files changed, 5 insertions(+), 10 deletions(-)
rename {include/exec => system}/memory-internal.h (88%)
diff --git a/include/exec/memory-internal.h b/system/memory-internal.h
similarity index 88%
rename from include/exec/memory-internal.h
rename to system/memory-internal.h
index c75178a3d6..085e81a9fe 100644
--- a/include/exec/memory-internal.h
+++ b/system/memory-internal.h
@@ -11,12 +11,6 @@
*
*/
-/*
- * This header is for use by exec.c, memory.c and accel/tcg/cputlb.c ONLY,
- * for declarations which are shared between the memory subsystem's
- * internals and the TCG TLB code. Do not include it from elsewhere.
- */
-
#ifndef MEMORY_INTERNAL_H
#define MEMORY_INTERNAL_H
diff --git a/system/memory.c b/system/memory.c
index 6a5d853071..7e2f16f4e9 100644
--- a/system/memory.c
+++ b/system/memory.c
@@ -24,8 +24,6 @@
#include "qemu/qemu-print.h"
#include "qom/object.h"
#include "trace.h"
-
-#include "exec/memory-internal.h"
#include "system/ram_addr.h"
#include "system/kvm.h"
#include "system/runstate.h"
@@ -35,6 +33,8 @@
#include "migration/vmstate.h"
#include "system/address-spaces.h"
+#include "memory-internal.h"
+
//#define DEBUG_UNASSIGNED
static unsigned memory_region_transaction_depth;
diff --git a/system/physmem.c b/system/physmem.c
index 765d195cb0..1bf97a5704 100644
--- a/system/physmem.c
+++ b/system/physmem.c
@@ -66,7 +66,6 @@
#include "qemu/main-loop.h"
#include "system/replay.h"
-#include "exec/memory-internal.h"
#include "system/ram_addr.h"
#include "qemu/pmem.h"
@@ -88,6 +87,8 @@
#include <daxctl/libdaxctl.h>
#endif
+#include "memory-internal.h"
+
//#define DEBUG_SUBPAGE
/* ram_list is read under rcu_read_lock()/rcu_read_unlock(). Writes
diff --git a/MAINTAINERS b/MAINTAINERS
index 18a5381afd..51267f1c78 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -3115,7 +3115,7 @@ F: system/ioport.c
F: system/memory.c
F: system/memory_mapping.c
F: system/physmem.c
-F: include/exec/memory-internal.h
+F: system/memory-internal.h
F: scripts/coccinelle/memory-region-housekeeping.cocci
Memory devices
--
2.43.0
^ permalink raw reply related [flat|nested] 90+ messages in thread
* [PATCH v2 23/42] meson: Introduce top-level libuser_ss and libsystem_ss
2025-03-18 21:31 [PATCH v2 00/42] accel/tcg, codebase: Build once patches Richard Henderson
` (21 preceding siblings ...)
2025-03-18 21:31 ` [PATCH v2 22/42] exec: Restrict memory-internal.h to system/ Richard Henderson
@ 2025-03-18 21:31 ` Richard Henderson
2025-03-18 21:31 ` [PATCH v2 24/42] gdbstub: Move syscalls.c out of common_ss Richard Henderson
` (18 subsequent siblings)
41 siblings, 0 replies; 90+ messages in thread
From: Richard Henderson @ 2025-03-18 21:31 UTC (permalink / raw)
To: qemu-devel; +Cc: pierrick.bouvier, philmd
We already have two subdirectories for which we need
to build files twice, for user vs system modes.
Move this handling to the top level.
This cannot be combined with user_ss or system_ss,
because the formulation has not been extended to support
configuration symbols.
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
gdbstub/meson.build | 32 ++++++++------------------------
meson.build | 22 ++++++++++++++++++++++
tcg/meson.build | 23 ++---------------------
3 files changed, 32 insertions(+), 45 deletions(-)
diff --git a/gdbstub/meson.build b/gdbstub/meson.build
index dff741ddd4..0e8099ae9c 100644
--- a/gdbstub/meson.build
+++ b/gdbstub/meson.build
@@ -4,32 +4,16 @@
# types such as hwaddr.
#
-# We need to build the core gdb code via a library to be able to tweak
-# cflags so:
-
-gdb_user_ss = ss.source_set()
-gdb_system_ss = ss.source_set()
-
# We build two versions of gdbstub, one for each mode
-gdb_user_ss.add(files('gdbstub.c', 'user.c'))
-gdb_system_ss.add(files('gdbstub.c', 'system.c'))
+libuser_ss.add(files(
+ 'gdbstub.c',
+ 'user.c'
+))
-gdb_user_ss = gdb_user_ss.apply({})
-gdb_system_ss = gdb_system_ss.apply({})
-
-libgdb_user = static_library('gdb_user',
- gdb_user_ss.sources() + genh,
- c_args: '-DCONFIG_USER_ONLY',
- build_by_default: false)
-
-libgdb_system = static_library('gdb_system',
- gdb_system_ss.sources() + genh,
- build_by_default: false)
-
-gdb_user = declare_dependency(objects: libgdb_user.extract_all_objects(recursive: false))
-user_ss.add(gdb_user)
-gdb_system = declare_dependency(objects: libgdb_system.extract_all_objects(recursive: false))
-system_ss.add(gdb_system)
+libsystem_ss.add(files(
+ 'gdbstub.c',
+ 'system.c'
+))
common_ss.add(files('syscalls.c'))
diff --git a/meson.build b/meson.build
index 7f75256acf..329e7f056a 100644
--- a/meson.build
+++ b/meson.build
@@ -3666,12 +3666,14 @@ io_ss = ss.source_set()
qmp_ss = ss.source_set()
qom_ss = ss.source_set()
system_ss = ss.source_set()
+libsystem_ss = ss.source_set()
specific_fuzz_ss = ss.source_set()
specific_ss = ss.source_set()
rust_devices_ss = ss.source_set()
stub_ss = ss.source_set()
trace_ss = ss.source_set()
user_ss = ss.source_set()
+libuser_ss = ss.source_set()
util_ss = ss.source_set()
# accel modules
@@ -4049,6 +4051,26 @@ common_ss.add(qom, qemuutil)
common_ss.add_all(when: 'CONFIG_SYSTEM_ONLY', if_true: [system_ss])
common_ss.add_all(when: 'CONFIG_USER_ONLY', if_true: user_ss)
+libuser_ss = libuser_ss.apply({})
+libuser = static_library('user',
+ libuser_ss.sources() + genh,
+ c_args: '-DCONFIG_USER_ONLY',
+ dependencies: libuser_ss.dependencies(),
+ build_by_default: false)
+libuser = declare_dependency(objects: libuser.extract_all_objects(recursive: false),
+ dependencies: libuser_ss.dependencies())
+common_ss.add(when: 'CONFIG_USER_ONLY', if_true: libuser)
+
+libsystem_ss = libsystem_ss.apply({})
+libsystem = static_library('system',
+ libsystem_ss.sources() + genh,
+ c_args: '-DCONFIG_SOFTMMU',
+ dependencies: libsystem_ss.dependencies(),
+ build_by_default: false)
+libsystem = declare_dependency(objects: libsystem.extract_all_objects(recursive: false),
+ dependencies: libsystem_ss.dependencies())
+common_ss.add(when: 'CONFIG_SYSTEM_ONLY', if_true: libsystem)
+
# Note that this library is never used directly (only through extract_objects)
# and is not built by default; therefore, source files not used by the build
# configuration will be in build.ninja, but are never built by default.
diff --git a/tcg/meson.build b/tcg/meson.build
index 69ebb4908a..7df378d773 100644
--- a/tcg/meson.build
+++ b/tcg/meson.build
@@ -27,24 +27,5 @@ if host_os == 'linux'
tcg_ss.add(files('perf.c'))
endif
-tcg_ss = tcg_ss.apply({})
-
-libtcg_user = static_library('tcg_user',
- tcg_ss.sources() + genh,
- dependencies: tcg_ss.dependencies(),
- c_args: '-DCONFIG_USER_ONLY',
- build_by_default: false)
-
-tcg_user = declare_dependency(objects: libtcg_user.extract_all_objects(recursive: false),
- dependencies: tcg_ss.dependencies())
-user_ss.add(tcg_user)
-
-libtcg_system = static_library('tcg_system',
- tcg_ss.sources() + genh,
- dependencies: tcg_ss.dependencies(),
- c_args: '-DCONFIG_SOFTMMU',
- build_by_default: false)
-
-tcg_system = declare_dependency(objects: libtcg_system.extract_all_objects(recursive: false),
- dependencies: tcg_ss.dependencies())
-system_ss.add(tcg_system)
+libuser_ss.add_all(tcg_ss)
+libsystem_ss.add_all(tcg_ss)
--
2.43.0
^ permalink raw reply related [flat|nested] 90+ messages in thread
* [PATCH v2 24/42] gdbstub: Move syscalls.c out of common_ss
2025-03-18 21:31 [PATCH v2 00/42] accel/tcg, codebase: Build once patches Richard Henderson
` (22 preceding siblings ...)
2025-03-18 21:31 ` [PATCH v2 23/42] meson: Introduce top-level libuser_ss and libsystem_ss Richard Henderson
@ 2025-03-18 21:31 ` Richard Henderson
2025-03-18 21:31 ` [PATCH v2 25/42] accel/tcg: Use libuser_ss and libsystem_ss Richard Henderson
` (17 subsequent siblings)
41 siblings, 0 replies; 90+ messages in thread
From: Richard Henderson @ 2025-03-18 21:31 UTC (permalink / raw)
To: qemu-devel; +Cc: pierrick.bouvier, philmd
Copy to libuser_ss and libsystem_ss.
This file uses semihosting/semihost.h, which has separate
implementations with and without CONFIG_USER_ONLY.
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
gdbstub/meson.build | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/gdbstub/meson.build b/gdbstub/meson.build
index 0e8099ae9c..b25db86767 100644
--- a/gdbstub/meson.build
+++ b/gdbstub/meson.build
@@ -7,15 +7,15 @@
# We build two versions of gdbstub, one for each mode
libuser_ss.add(files(
'gdbstub.c',
+ 'syscalls.c',
'user.c'
))
libsystem_ss.add(files(
'gdbstub.c',
+ 'syscalls.c',
'system.c'
))
-common_ss.add(files('syscalls.c'))
-
# The user-target is specialised by the guest
specific_ss.add(when: 'CONFIG_USER_ONLY', if_true: files('user-target.c'))
--
2.43.0
^ permalink raw reply related [flat|nested] 90+ messages in thread
* [PATCH v2 25/42] accel/tcg: Use libuser_ss and libsystem_ss
2025-03-18 21:31 [PATCH v2 00/42] accel/tcg, codebase: Build once patches Richard Henderson
` (23 preceding siblings ...)
2025-03-18 21:31 ` [PATCH v2 24/42] gdbstub: Move syscalls.c out of common_ss Richard Henderson
@ 2025-03-18 21:31 ` Richard Henderson
2025-03-18 21:31 ` [PATCH v2 26/42] semihosting: Move user-only implementation out-of-line Richard Henderson
` (16 subsequent siblings)
41 siblings, 0 replies; 90+ messages in thread
From: Richard Henderson @ 2025-03-18 21:31 UTC (permalink / raw)
To: qemu-devel; +Cc: pierrick.bouvier, philmd
While some of these files are built exactly once, due
to being in only libuser_ss or libsystem_ss, some of
the includes that they depend on require CONFIG_USER_ONLY.
So make use of the common infrastructure to allow that.
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
accel/tcg/meson.build | 17 +++++++++++++----
1 file changed, 13 insertions(+), 4 deletions(-)
diff --git a/accel/tcg/meson.build b/accel/tcg/meson.build
index 185830d0f5..72d4acfe5e 100644
--- a/accel/tcg/meson.build
+++ b/accel/tcg/meson.build
@@ -1,12 +1,21 @@
-common_ss.add(when: 'CONFIG_TCG', if_true: files(
+if not get_option('tcg').allowed()
+ subdir_done()
+endif
+
+tcg_ss = ss.source_set()
+
+tcg_ss.add(files(
'cpu-exec-common.c',
'tcg-runtime.c',
'tcg-runtime-gvec.c',
))
if get_option('plugins')
- common_ss.add(when: 'CONFIG_TCG', if_true: files('plugin-gen.c'))
+ tcg_ss.add(files('plugin-gen.c'))
endif
+libuser_ss.add_all(tcg_ss)
+libsystem_ss.add_all(tcg_ss)
+
tcg_specific_ss = ss.source_set()
tcg_specific_ss.add(files(
'tcg-all.c',
@@ -22,11 +31,11 @@ specific_ss.add(when: ['CONFIG_SYSTEM_ONLY', 'CONFIG_TCG'], if_true: files(
'cputlb.c',
))
-user_ss.add(when: ['CONFIG_TCG'], if_true: files(
+libuser_ss.add(files(
'user-exec-stub.c',
))
-system_ss.add(when: ['CONFIG_TCG'], if_true: files(
+libsystem_ss.add(files(
'icount-common.c',
'monitor.c',
'tcg-accel-ops.c',
--
2.43.0
^ permalink raw reply related [flat|nested] 90+ messages in thread
* [PATCH v2 26/42] semihosting: Move user-only implementation out-of-line
2025-03-18 21:31 [PATCH v2 00/42] accel/tcg, codebase: Build once patches Richard Henderson
` (24 preceding siblings ...)
2025-03-18 21:31 ` [PATCH v2 25/42] accel/tcg: Use libuser_ss and libsystem_ss Richard Henderson
@ 2025-03-18 21:31 ` Richard Henderson
2025-03-19 0:26 ` Pierrick Bouvier
` (2 more replies)
2025-03-18 21:31 ` [PATCH v2 27/42] target/mips: Restrict semihosting tests to system mode Richard Henderson
` (15 subsequent siblings)
41 siblings, 3 replies; 90+ messages in thread
From: Richard Henderson @ 2025-03-18 21:31 UTC (permalink / raw)
To: qemu-devel; +Cc: pierrick.bouvier, philmd
Avoid testing CONFIG_USER_ONLY in semihost.h.
The only function that's required is semihosting_enabled.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/semihosting/semihost.h | 29 ++---------------------------
semihosting/user.c | 15 +++++++++++++++
semihosting/meson.build | 2 ++
3 files changed, 19 insertions(+), 27 deletions(-)
create mode 100644 semihosting/user.c
diff --git a/include/semihosting/semihost.h b/include/semihosting/semihost.h
index 97d2a2ba99..b03e637578 100644
--- a/include/semihosting/semihost.h
+++ b/include/semihosting/semihost.h
@@ -26,32 +26,6 @@ typedef enum SemihostingTarget {
SEMIHOSTING_TARGET_GDB
} SemihostingTarget;
-#ifdef CONFIG_USER_ONLY
-static inline bool semihosting_enabled(bool is_user)
-{
- return true;
-}
-
-static inline SemihostingTarget semihosting_get_target(void)
-{
- return SEMIHOSTING_TARGET_AUTO;
-}
-
-static inline const char *semihosting_get_arg(int i)
-{
- return NULL;
-}
-
-static inline int semihosting_get_argc(void)
-{
- return 0;
-}
-
-static inline const char *semihosting_get_cmdline(void)
-{
- return NULL;
-}
-#else /* !CONFIG_USER_ONLY */
/**
* semihosting_enabled:
* @is_user: true if guest code is in usermode (i.e. not privileged)
@@ -59,17 +33,18 @@ static inline const char *semihosting_get_cmdline(void)
* Return true if guest code is allowed to make semihosting calls.
*/
bool semihosting_enabled(bool is_user);
+
SemihostingTarget semihosting_get_target(void);
const char *semihosting_get_arg(int i);
int semihosting_get_argc(void);
const char *semihosting_get_cmdline(void);
void semihosting_arg_fallback(const char *file, const char *cmd);
+
/* for vl.c hooks */
void qemu_semihosting_enable(void);
int qemu_semihosting_config_options(const char *optstr);
void qemu_semihosting_chardev_init(void);
void qemu_semihosting_console_init(Chardev *);
-#endif /* CONFIG_USER_ONLY */
void qemu_semihosting_guestfd_init(void);
#endif /* SEMIHOST_H */
diff --git a/semihosting/user.c b/semihosting/user.c
new file mode 100644
index 0000000000..9473729beb
--- /dev/null
+++ b/semihosting/user.c
@@ -0,0 +1,15 @@
+/*
+ * Semihosting for user emulation
+ *
+ * Copyright (c) 2019 Linaro Ltd
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#include "qemu/osdep.h"
+#include "semihosting/semihost.h"
+
+bool semihosting_enabled(bool is_user)
+{
+ return true;
+}
diff --git a/semihosting/meson.build b/semihosting/meson.build
index 86f5004bed..ab67f87e4f 100644
--- a/semihosting/meson.build
+++ b/semihosting/meson.build
@@ -15,5 +15,7 @@ system_ss.add(when: ['CONFIG_SEMIHOSTING'], if_true: files(
'stubs-system.c',
))
+user_ss.add(when: 'CONFIG_SEMIHOSTING', if_true: files('user.c'))
+
specific_ss.add(when: ['CONFIG_ARM_COMPATIBLE_SEMIHOSTING'],
if_true: files('arm-compat-semi.c'))
--
2.43.0
^ permalink raw reply related [flat|nested] 90+ messages in thread
* [PATCH v2 27/42] target/mips: Restrict semihosting tests to system mode
2025-03-18 21:31 [PATCH v2 00/42] accel/tcg, codebase: Build once patches Richard Henderson
` (25 preceding siblings ...)
2025-03-18 21:31 ` [PATCH v2 26/42] semihosting: Move user-only implementation out-of-line Richard Henderson
@ 2025-03-18 21:31 ` Richard Henderson
2025-03-19 0:26 ` Pierrick Bouvier
2025-03-18 21:31 ` [PATCH v2 28/42] target/xtensa: " Richard Henderson
` (14 subsequent siblings)
41 siblings, 1 reply; 90+ messages in thread
From: Richard Henderson @ 2025-03-18 21:31 UTC (permalink / raw)
To: qemu-devel; +Cc: pierrick.bouvier, philmd
We do not set CONFIG_SEMIHOSTING in
configs/targets/mips*-linux-user.mak.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/mips/cpu.c | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/target/mips/cpu.c b/target/mips/cpu.c
index b207106dd7..47df563e12 100644
--- a/target/mips/cpu.c
+++ b/target/mips/cpu.c
@@ -32,8 +32,10 @@
#include "exec/exec-all.h"
#include "hw/qdev-properties.h"
#include "hw/qdev-clock.h"
-#include "semihosting/semihost.h"
#include "fpu_helper.h"
+#ifndef CONFIG_USER_ONLY
+#include "semihosting/semihost.h"
+#endif
const char regnames[32][3] = {
"r0", "at", "v0", "v1", "a0", "a1", "a2", "a3",
@@ -415,12 +417,11 @@ static void mips_cpu_reset_hold(Object *obj, ResetType type)
restore_pamask(env);
cs->exception_index = EXCP_NONE;
+#ifndef CONFIG_USER_ONLY
if (semihosting_get_argc()) {
/* UHI interface can be used to obtain argc and argv */
env->active_tc.gpr[4] = -1;
}
-
-#ifndef CONFIG_USER_ONLY
if (kvm_enabled()) {
kvm_mips_reset_vcpu(cpu);
}
--
2.43.0
^ permalink raw reply related [flat|nested] 90+ messages in thread
* [PATCH v2 28/42] target/xtensa: Restrict semihosting tests to system mode
2025-03-18 21:31 [PATCH v2 00/42] accel/tcg, codebase: Build once patches Richard Henderson
` (26 preceding siblings ...)
2025-03-18 21:31 ` [PATCH v2 27/42] target/mips: Restrict semihosting tests to system mode Richard Henderson
@ 2025-03-18 21:31 ` Richard Henderson
2025-03-19 0:27 ` Pierrick Bouvier
2025-03-18 21:31 ` [PATCH v2 29/42] include/exec: Split out watchpoint.h Richard Henderson
` (13 subsequent siblings)
41 siblings, 1 reply; 90+ messages in thread
From: Richard Henderson @ 2025-03-18 21:31 UTC (permalink / raw)
To: qemu-devel; +Cc: pierrick.bouvier, philmd
We do not set CONFIG_SEMIHOSTING in
configs/targets/xtensa*-linux-user.mak.
Do not raise SIGILL for user-only unconditionally.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/xtensa/translate.c | 24 +++++++++++-------------
1 file changed, 11 insertions(+), 13 deletions(-)
diff --git a/target/xtensa/translate.c b/target/xtensa/translate.c
index 4f02cefde3..cb817b3119 100644
--- a/target/xtensa/translate.c
+++ b/target/xtensa/translate.c
@@ -35,14 +35,14 @@
#include "tcg/tcg-op.h"
#include "qemu/log.h"
#include "qemu/qemu-print.h"
-#include "semihosting/semihost.h"
#include "exec/translator.h"
#include "exec/translation-block.h"
-
#include "exec/helper-proto.h"
#include "exec/helper-gen.h"
-
#include "exec/log.h"
+#ifndef CONFIG_USER_ONLY
+#include "semihosting/semihost.h"
+#endif
#define HELPER_H "helper.h"
#include "exec/helper-info.c.inc"
@@ -2241,17 +2241,15 @@ static uint32_t test_exceptions_simcall(DisasContext *dc,
const OpcodeArg arg[],
const uint32_t par[])
{
- bool is_semi = semihosting_enabled(dc->cring != 0);
-#ifdef CONFIG_USER_ONLY
- bool ill = true;
-#else
- /* Between RE.2 and RE.3 simcall opcode's become nop for the hardware. */
- bool ill = dc->config->hw_version <= 250002 && !is_semi;
-#endif
- if (ill || !is_semi) {
- qemu_log_mask(LOG_GUEST_ERROR, "SIMCALL but semihosting is disabled\n");
+#ifndef CONFIG_USER_ONLY
+ if (semihosting_enabled(dc->cring != 0)) {
+ return 0;
}
- return ill ? XTENSA_OP_ILL : 0;
+#endif
+ qemu_log_mask(LOG_GUEST_ERROR, "SIMCALL but semihosting is disabled\n");
+
+ /* Between RE.2 and RE.3 simcall opcode's become nop for the hardware. */
+ return dc->config->hw_version <= 250002 ? XTENSA_OP_ILL : 0;
}
static void translate_simcall(DisasContext *dc, const OpcodeArg arg[],
--
2.43.0
^ permalink raw reply related [flat|nested] 90+ messages in thread
* [PATCH v2 29/42] include/exec: Split out watchpoint.h
2025-03-18 21:31 [PATCH v2 00/42] accel/tcg, codebase: Build once patches Richard Henderson
` (27 preceding siblings ...)
2025-03-18 21:31 ` [PATCH v2 28/42] target/xtensa: " Richard Henderson
@ 2025-03-18 21:31 ` Richard Henderson
2025-03-19 0:30 ` Pierrick Bouvier
2025-03-18 21:31 ` [PATCH v2 30/42] hw/core: Move unconditional files to libsystem_ss, libuser_ss Richard Henderson
` (12 subsequent siblings)
41 siblings, 1 reply; 90+ messages in thread
From: Richard Henderson @ 2025-03-18 21:31 UTC (permalink / raw)
To: qemu-devel; +Cc: pierrick.bouvier, philmd
Relatively few objects in qemu care about watchpoints, so split
out to a new header. Removes an instance of CONFIG_USER_ONLY
from hw/core/cpu.h.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/exec/watchpoint.h | 41 +++++++++++++++++++++++++++++
include/hw/core/cpu.h | 30 ---------------------
accel/tcg/tcg-accel-ops.c | 1 +
system/watchpoint.c | 1 +
target/arm/debug_helper.c | 1 +
target/i386/cpu.c | 1 +
target/i386/machine.c | 2 +-
target/i386/tcg/system/bpt_helper.c | 1 +
target/ppc/cpu.c | 1 +
target/ppc/cpu_init.c | 2 +-
target/riscv/debug.c | 1 +
target/s390x/helper.c | 1 +
target/s390x/tcg/excp_helper.c | 1 +
target/xtensa/dbg_helper.c | 1 +
14 files changed, 53 insertions(+), 32 deletions(-)
create mode 100644 include/exec/watchpoint.h
diff --git a/include/exec/watchpoint.h b/include/exec/watchpoint.h
new file mode 100644
index 0000000000..4b6668826c
--- /dev/null
+++ b/include/exec/watchpoint.h
@@ -0,0 +1,41 @@
+/*
+ * CPU watchpoints
+ *
+ * Copyright (c) 2012 SUSE LINUX Products GmbH
+ * SPDX-License-Identifier: LGPL-2.1-or-later
+ */
+
+#ifndef EXEC_WATCHPOINT_H
+#define EXEC_WATCHPOINT_H
+
+#if defined(CONFIG_USER_ONLY)
+static inline int cpu_watchpoint_insert(CPUState *cpu, vaddr addr, vaddr len,
+ int flags, CPUWatchpoint **watchpoint)
+{
+ return -ENOSYS;
+}
+
+static inline int cpu_watchpoint_remove(CPUState *cpu, vaddr addr,
+ vaddr len, int flags)
+{
+ return -ENOSYS;
+}
+
+static inline void cpu_watchpoint_remove_by_ref(CPUState *cpu,
+ CPUWatchpoint *wp)
+{
+}
+
+static inline void cpu_watchpoint_remove_all(CPUState *cpu, int mask)
+{
+}
+#else
+int cpu_watchpoint_insert(CPUState *cpu, vaddr addr, vaddr len,
+ int flags, CPUWatchpoint **watchpoint);
+int cpu_watchpoint_remove(CPUState *cpu, vaddr addr,
+ vaddr len, int flags);
+void cpu_watchpoint_remove_by_ref(CPUState *cpu, CPUWatchpoint *watchpoint);
+void cpu_watchpoint_remove_all(CPUState *cpu, int mask);
+#endif
+
+#endif /* EXEC_WATCHPOINT_H */
diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h
index 5d11d26556..d1c1fefea3 100644
--- a/include/hw/core/cpu.h
+++ b/include/hw/core/cpu.h
@@ -1109,36 +1109,6 @@ static inline bool cpu_breakpoint_test(CPUState *cpu, vaddr pc, int mask)
return false;
}
-#if defined(CONFIG_USER_ONLY)
-static inline int cpu_watchpoint_insert(CPUState *cpu, vaddr addr, vaddr len,
- int flags, CPUWatchpoint **watchpoint)
-{
- return -ENOSYS;
-}
-
-static inline int cpu_watchpoint_remove(CPUState *cpu, vaddr addr,
- vaddr len, int flags)
-{
- return -ENOSYS;
-}
-
-static inline void cpu_watchpoint_remove_by_ref(CPUState *cpu,
- CPUWatchpoint *wp)
-{
-}
-
-static inline void cpu_watchpoint_remove_all(CPUState *cpu, int mask)
-{
-}
-#else
-int cpu_watchpoint_insert(CPUState *cpu, vaddr addr, vaddr len,
- int flags, CPUWatchpoint **watchpoint);
-int cpu_watchpoint_remove(CPUState *cpu, vaddr addr,
- vaddr len, int flags);
-void cpu_watchpoint_remove_by_ref(CPUState *cpu, CPUWatchpoint *watchpoint);
-void cpu_watchpoint_remove_all(CPUState *cpu, int mask);
-#endif
-
/**
* cpu_get_address_space:
* @cpu: CPU to get address space from
diff --git a/accel/tcg/tcg-accel-ops.c b/accel/tcg/tcg-accel-ops.c
index d9b662efe3..5c88056157 100644
--- a/accel/tcg/tcg-accel-ops.c
+++ b/accel/tcg/tcg-accel-ops.c
@@ -37,6 +37,7 @@
#include "exec/hwaddr.h"
#include "exec/tb-flush.h"
#include "exec/translation-block.h"
+#include "exec/watchpoint.h"
#include "gdbstub/enums.h"
#include "hw/core/cpu.h"
diff --git a/system/watchpoint.c b/system/watchpoint.c
index 08dbd8483d..21d0bb36ca 100644
--- a/system/watchpoint.c
+++ b/system/watchpoint.c
@@ -21,6 +21,7 @@
#include "qemu/error-report.h"
#include "exec/cputlb.h"
#include "exec/target_page.h"
+#include "exec/watchpoint.h"
#include "hw/core/cpu.h"
/* Add a watchpoint. */
diff --git a/target/arm/debug_helper.c b/target/arm/debug_helper.c
index a9a619ba6b..473ee2af38 100644
--- a/target/arm/debug_helper.c
+++ b/target/arm/debug_helper.c
@@ -13,6 +13,7 @@
#include "cpregs.h"
#include "exec/exec-all.h"
#include "exec/helper-proto.h"
+#include "exec/watchpoint.h"
#include "system/tcg.h"
#ifdef CONFIG_TCG
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index dba1b3ffef..af46c7a392 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -35,6 +35,7 @@
#include "standard-headers/asm-x86/kvm_para.h"
#include "hw/qdev-properties.h"
#include "hw/i386/topology.h"
+#include "exec/watchpoint.h"
#ifndef CONFIG_USER_ONLY
#include "system/reset.h"
#include "qapi/qapi-commands-machine-target.h"
diff --git a/target/i386/machine.c b/target/i386/machine.c
index 70f632a36f..6cb561c632 100644
--- a/target/i386/machine.c
+++ b/target/i386/machine.c
@@ -7,7 +7,7 @@
#include "hw/i386/x86.h"
#include "kvm/kvm_i386.h"
#include "hw/xen/xen.h"
-
+#include "exec/watchpoint.h"
#include "system/kvm.h"
#include "system/kvm_xen.h"
#include "system/tcg.h"
diff --git a/target/i386/tcg/system/bpt_helper.c b/target/i386/tcg/system/bpt_helper.c
index be232c1ca9..08ccd3f5e6 100644
--- a/target/i386/tcg/system/bpt_helper.c
+++ b/target/i386/tcg/system/bpt_helper.c
@@ -21,6 +21,7 @@
#include "cpu.h"
#include "exec/exec-all.h"
#include "exec/helper-proto.h"
+#include "exec/watchpoint.h"
#include "tcg/helper-tcg.h"
diff --git a/target/ppc/cpu.c b/target/ppc/cpu.c
index bfcc695de7..4d8faaddee 100644
--- a/target/ppc/cpu.c
+++ b/target/ppc/cpu.c
@@ -22,6 +22,7 @@
#include "cpu-models.h"
#include "cpu-qom.h"
#include "exec/log.h"
+#include "exec/watchpoint.h"
#include "fpu/softfloat-helpers.h"
#include "mmu-hash64.h"
#include "helper_regs.h"
diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c
index 8b590e7f17..7394ffc557 100644
--- a/target/ppc/cpu_init.c
+++ b/target/ppc/cpu_init.c
@@ -40,7 +40,7 @@
#include "qemu/cutils.h"
#include "disas/capstone.h"
#include "fpu/softfloat.h"
-
+#include "exec/watchpoint.h"
#include "helper_regs.h"
#include "internal.h"
#include "spr_common.h"
diff --git a/target/riscv/debug.c b/target/riscv/debug.c
index 9db4048523..fea989afe9 100644
--- a/target/riscv/debug.c
+++ b/target/riscv/debug.c
@@ -30,6 +30,7 @@
#include "trace.h"
#include "exec/exec-all.h"
#include "exec/helper-proto.h"
+#include "exec/watchpoint.h"
#include "system/cpu-timers.h"
/*
diff --git a/target/s390x/helper.c b/target/s390x/helper.c
index c689e11b46..e660c69f60 100644
--- a/target/s390x/helper.c
+++ b/target/s390x/helper.c
@@ -27,6 +27,7 @@
#include "target/s390x/kvm/pv.h"
#include "system/hw_accel.h"
#include "system/runstate.h"
+#include "exec/watchpoint.h"
void s390x_tod_timer(void *opaque)
{
diff --git a/target/s390x/tcg/excp_helper.c b/target/s390x/tcg/excp_helper.c
index ac733f407f..1d51043e88 100644
--- a/target/s390x/tcg/excp_helper.c
+++ b/target/s390x/tcg/excp_helper.c
@@ -24,6 +24,7 @@
#include "exec/helper-proto.h"
#include "exec/cputlb.h"
#include "exec/exec-all.h"
+#include "exec/watchpoint.h"
#include "s390x-internal.h"
#include "tcg_s390x.h"
#ifndef CONFIG_USER_ONLY
diff --git a/target/xtensa/dbg_helper.c b/target/xtensa/dbg_helper.c
index 163a1ffc7b..c4f4298a50 100644
--- a/target/xtensa/dbg_helper.c
+++ b/target/xtensa/dbg_helper.c
@@ -31,6 +31,7 @@
#include "exec/helper-proto.h"
#include "qemu/host-utils.h"
#include "exec/exec-all.h"
+#include "exec/watchpoint.h"
#include "system/address-spaces.h"
void HELPER(wsr_ibreakenable)(CPUXtensaState *env, uint32_t v)
--
2.43.0
^ permalink raw reply related [flat|nested] 90+ messages in thread
* [PATCH v2 30/42] hw/core: Move unconditional files to libsystem_ss, libuser_ss
2025-03-18 21:31 [PATCH v2 00/42] accel/tcg, codebase: Build once patches Richard Henderson
` (28 preceding siblings ...)
2025-03-18 21:31 ` [PATCH v2 29/42] include/exec: Split out watchpoint.h Richard Henderson
@ 2025-03-18 21:31 ` Richard Henderson
2025-03-18 21:31 ` [PATCH v2 31/42] system: Move most files to libsystem_ss Richard Henderson
` (11 subsequent siblings)
41 siblings, 0 replies; 90+ messages in thread
From: Richard Henderson @ 2025-03-18 21:31 UTC (permalink / raw)
To: qemu-devel; +Cc: pierrick.bouvier, philmd
Many of the headers used by these require CONFIG_USER_ONLY.
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
hw/core/meson.build | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/core/meson.build b/hw/core/meson.build
index b5a545a0ed..547de6527c 100644
--- a/hw/core/meson.build
+++ b/hw/core/meson.build
@@ -26,7 +26,7 @@ system_ss.add(when: 'CONFIG_XILINX_AXI', if_true: files('stream.c'))
system_ss.add(when: 'CONFIG_PLATFORM_BUS', if_true: files('sysbus-fdt.c'))
system_ss.add(when: 'CONFIG_EIF', if_true: [files('eif.c'), zlib, libcbor, gnutls])
-system_ss.add(files(
+libsystem_ss.add(files(
'cpu-system.c',
'fw-path-provider.c',
'gpio.c',
@@ -46,7 +46,7 @@ system_ss.add(files(
'vm-change-state-handler.c',
'clock-vmstate.c',
))
-user_ss.add(files(
+libuser_ss.add(files(
'cpu-user.c',
'qdev-user.c',
))
--
2.43.0
^ permalink raw reply related [flat|nested] 90+ messages in thread
* [PATCH v2 31/42] system: Move most files to libsystem_ss
2025-03-18 21:31 [PATCH v2 00/42] accel/tcg, codebase: Build once patches Richard Henderson
` (29 preceding siblings ...)
2025-03-18 21:31 ` [PATCH v2 30/42] hw/core: Move unconditional files to libsystem_ss, libuser_ss Richard Henderson
@ 2025-03-18 21:31 ` Richard Henderson
2025-03-19 0:32 ` Pierrick Bouvier
2025-03-19 7:18 ` Philippe Mathieu-Daudé
2025-03-18 21:31 ` [PATCH v2 32/42] plugins: Move api.c, core.c to libuser_ss, libsystem_ss Richard Henderson
` (10 subsequent siblings)
41 siblings, 2 replies; 90+ messages in thread
From: Richard Henderson @ 2025-03-18 21:31 UTC (permalink / raw)
To: qemu-devel; +Cc: pierrick.bouvier, philmd
Some of the headers used require CONFIG_USER_ONLY.
Do not move vl.c, because it has other include dependencies
that are present in system_ss.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
system/meson.build | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/system/meson.build b/system/meson.build
index 063301c3ad..c2f0082766 100644
--- a/system/meson.build
+++ b/system/meson.build
@@ -4,6 +4,10 @@ specific_ss.add(when: 'CONFIG_SYSTEM_ONLY', if_true: [files(
)])
system_ss.add(files(
+ 'vl.c',
+), sdl, libpmem, libdaxctl)
+
+libsystem_ss.add(files(
'balloon.c',
'bootdevice.c',
'cpus.c',
@@ -23,9 +27,8 @@ system_ss.add(files(
'runstate-hmp-cmds.c',
'runstate.c',
'tpm-hmp-cmds.c',
- 'vl.c',
'watchpoint.c',
-), sdl, libpmem, libdaxctl)
+))
if have_tpm
system_ss.add(files('tpm.c'))
--
2.43.0
^ permalink raw reply related [flat|nested] 90+ messages in thread
* [PATCH v2 32/42] plugins: Move api.c, core.c to libuser_ss, libsystem_ss
2025-03-18 21:31 [PATCH v2 00/42] accel/tcg, codebase: Build once patches Richard Henderson
` (30 preceding siblings ...)
2025-03-18 21:31 ` [PATCH v2 31/42] system: Move most files to libsystem_ss Richard Henderson
@ 2025-03-18 21:31 ` Richard Henderson
2025-03-19 0:32 ` Pierrick Bouvier
2025-03-18 21:31 ` [PATCH v2 33/42] include/exec: Drop ifndef CONFIG_USER_ONLY from cpu-common.h Richard Henderson
` (9 subsequent siblings)
41 siblings, 1 reply; 90+ messages in thread
From: Richard Henderson @ 2025-03-18 21:31 UTC (permalink / raw)
To: qemu-devel; +Cc: pierrick.bouvier, philmd
Headers used by these files require CONFIG_USER_ONLY.
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
plugins/meson.build | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/plugins/meson.build b/plugins/meson.build
index 3be8245a69..5383c7b88b 100644
--- a/plugins/meson.build
+++ b/plugins/meson.build
@@ -61,5 +61,8 @@ endif
user_ss.add(files('user.c', 'api-user.c'))
system_ss.add(files('system.c', 'api-system.c'))
-common_ss.add(files('loader.c', 'api.c', 'core.c'))
+libuser_ss.add(files('api.c', 'core.c'))
+libsystem_ss.add(files('api.c', 'core.c'))
+
+common_ss.add(files('loader.c'))
--
2.43.0
^ permalink raw reply related [flat|nested] 90+ messages in thread
* [PATCH v2 33/42] include/exec: Drop ifndef CONFIG_USER_ONLY from cpu-common.h
2025-03-18 21:31 [PATCH v2 00/42] accel/tcg, codebase: Build once patches Richard Henderson
` (31 preceding siblings ...)
2025-03-18 21:31 ` [PATCH v2 32/42] plugins: Move api.c, core.c to libuser_ss, libsystem_ss Richard Henderson
@ 2025-03-18 21:31 ` Richard Henderson
2025-03-18 21:31 ` [PATCH v2 34/42] include/hw/core: Drop ifndef CONFIG_USER_ONLY from cpu.h Richard Henderson
` (8 subsequent siblings)
41 siblings, 0 replies; 90+ messages in thread
From: Richard Henderson @ 2025-03-18 21:31 UTC (permalink / raw)
To: qemu-devel; +Cc: pierrick.bouvier, philmd
We were hiding a number of declarations from user-only,
although it hurts nothing to allow them.
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/exec/cpu-common.h | 6 ------
1 file changed, 6 deletions(-)
diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h
index be032e1a49..9b83fd7ac8 100644
--- a/include/exec/cpu-common.h
+++ b/include/exec/cpu-common.h
@@ -9,9 +9,7 @@
#define CPU_COMMON_H
#include "exec/vaddr.h"
-#ifndef CONFIG_USER_ONLY
#include "exec/hwaddr.h"
-#endif
#include "hw/core/cpu.h"
#include "tcg/debug-assert.h"
#include "exec/page-protection.h"
@@ -40,8 +38,6 @@ int cpu_get_free_index(void);
void tcg_iommu_init_notifier_list(CPUState *cpu);
void tcg_iommu_free_notifier_list(CPUState *cpu);
-#if !defined(CONFIG_USER_ONLY)
-
enum device_endian {
DEVICE_NATIVE_ENDIAN,
DEVICE_BIG_ENDIAN,
@@ -176,8 +172,6 @@ int ram_block_discard_range(RAMBlock *rb, uint64_t start, size_t length);
int ram_block_discard_guest_memfd_range(RAMBlock *rb, uint64_t start,
size_t length);
-#endif
-
/* Returns: 0 on success, -1 on error */
int cpu_memory_rw_debug(CPUState *cpu, vaddr addr,
void *ptr, size_t len, bool is_write);
--
2.43.0
^ permalink raw reply related [flat|nested] 90+ messages in thread
* [PATCH v2 34/42] include/hw/core: Drop ifndef CONFIG_USER_ONLY from cpu.h
2025-03-18 21:31 [PATCH v2 00/42] accel/tcg, codebase: Build once patches Richard Henderson
` (32 preceding siblings ...)
2025-03-18 21:31 ` [PATCH v2 33/42] include/exec: Drop ifndef CONFIG_USER_ONLY from cpu-common.h Richard Henderson
@ 2025-03-18 21:31 ` Richard Henderson
2025-03-18 21:32 ` [PATCH v2 35/42] include/hw/intc: Remove ifndef CONFIG_USER_ONLY from armv7m_nvic.h Richard Henderson
` (7 subsequent siblings)
41 siblings, 0 replies; 90+ messages in thread
From: Richard Henderson @ 2025-03-18 21:31 UTC (permalink / raw)
To: qemu-devel; +Cc: pierrick.bouvier, philmd
We were hiding a number of declarations from user-only,
although it hurts nothing to allow them.
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/hw/core/cpu.h | 10 ----------
1 file changed, 10 deletions(-)
diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h
index d1c1fefea3..1c63266f07 100644
--- a/include/hw/core/cpu.h
+++ b/include/hw/core/cpu.h
@@ -614,8 +614,6 @@ extern bool mttcg_enabled;
*/
bool cpu_paging_enabled(const CPUState *cpu);
-#if !defined(CONFIG_USER_ONLY)
-
/**
* cpu_get_memory_mapping:
* @cpu: The CPU whose memory mappings are to be obtained.
@@ -676,8 +674,6 @@ int cpu_write_elf32_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
*/
GuestPanicInformation *cpu_get_crash_info(CPUState *cpu);
-#endif /* !CONFIG_USER_ONLY */
-
/**
* CPUDumpFlags:
* @CPU_DUMP_CODE:
@@ -701,7 +697,6 @@ enum CPUDumpFlags {
*/
void cpu_dump_state(CPUState *cpu, FILE *f, int flags);
-#ifndef CONFIG_USER_ONLY
/**
* cpu_get_phys_page_attrs_debug:
* @cpu: The CPU to obtain the physical page address for.
@@ -758,8 +753,6 @@ bool cpu_virtio_is_big_endian(CPUState *cpu);
*/
bool cpu_has_work(CPUState *cpu);
-#endif /* CONFIG_USER_ONLY */
-
/**
* cpu_list_add:
* @cpu: The CPU to be added to the list of CPUs.
@@ -1136,8 +1129,6 @@ const char *target_name(void);
#ifdef COMPILING_PER_TARGET
-#ifndef CONFIG_USER_ONLY
-
extern const VMStateDescription vmstate_cpu_common;
#define VMSTATE_CPU() { \
@@ -1147,7 +1138,6 @@ extern const VMStateDescription vmstate_cpu_common;
.flags = VMS_STRUCT, \
.offset = 0, \
}
-#endif /* !CONFIG_USER_ONLY */
#endif /* COMPILING_PER_TARGET */
--
2.43.0
^ permalink raw reply related [flat|nested] 90+ messages in thread
* [PATCH v2 35/42] include/hw/intc: Remove ifndef CONFIG_USER_ONLY from armv7m_nvic.h
2025-03-18 21:31 [PATCH v2 00/42] accel/tcg, codebase: Build once patches Richard Henderson
` (33 preceding siblings ...)
2025-03-18 21:31 ` [PATCH v2 34/42] include/hw/core: Drop ifndef CONFIG_USER_ONLY from cpu.h Richard Henderson
@ 2025-03-18 21:32 ` Richard Henderson
2025-03-19 0:33 ` Pierrick Bouvier
2025-03-18 21:32 ` [PATCH v2 36/42] include/hw/s390x: Remove ifndef CONFIG_USER_ONLY in css.h Richard Henderson
` (6 subsequent siblings)
41 siblings, 1 reply; 90+ messages in thread
From: Richard Henderson @ 2025-03-18 21:32 UTC (permalink / raw)
To: qemu-devel; +Cc: pierrick.bouvier, philmd
We were hiding a number of declarations from user-only,
although it hurts nothing to allow them. The inlines
for user-only are unused.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/hw/intc/armv7m_nvic.h | 14 --------------
1 file changed, 14 deletions(-)
diff --git a/include/hw/intc/armv7m_nvic.h b/include/hw/intc/armv7m_nvic.h
index 89fe8aedaa..7b9964fe7e 100644
--- a/include/hw/intc/armv7m_nvic.h
+++ b/include/hw/intc/armv7m_nvic.h
@@ -189,21 +189,7 @@ int armv7m_nvic_raw_execution_priority(NVICState *s);
* @secure: the security state to test
* This corresponds to the pseudocode IsReqExecPriNeg().
*/
-#ifndef CONFIG_USER_ONLY
bool armv7m_nvic_neg_prio_requested(NVICState *s, bool secure);
-#else
-static inline bool armv7m_nvic_neg_prio_requested(NVICState *s, bool secure)
-{
- return false;
-}
-#endif
-#ifndef CONFIG_USER_ONLY
bool armv7m_nvic_can_take_pending_exception(NVICState *s);
-#else
-static inline bool armv7m_nvic_can_take_pending_exception(NVICState *s)
-{
- return true;
-}
-#endif
#endif
--
2.43.0
^ permalink raw reply related [flat|nested] 90+ messages in thread
* [PATCH v2 36/42] include/hw/s390x: Remove ifndef CONFIG_USER_ONLY in css.h
2025-03-18 21:31 [PATCH v2 00/42] accel/tcg, codebase: Build once patches Richard Henderson
` (34 preceding siblings ...)
2025-03-18 21:32 ` [PATCH v2 35/42] include/hw/intc: Remove ifndef CONFIG_USER_ONLY from armv7m_nvic.h Richard Henderson
@ 2025-03-18 21:32 ` Richard Henderson
2025-03-18 21:32 ` [PATCH v2 37/42] include/exec: Split out icount.h Richard Henderson
` (5 subsequent siblings)
41 siblings, 0 replies; 90+ messages in thread
From: Richard Henderson @ 2025-03-18 21:32 UTC (permalink / raw)
To: qemu-devel; +Cc: pierrick.bouvier, philmd
We were hiding a number of declarations from user-only,
although it hurts nothing to allow them.
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/hw/s390x/css.h | 2 --
1 file changed, 2 deletions(-)
diff --git a/include/hw/s390x/css.h b/include/hw/s390x/css.h
index cd97e2b707..965545ce73 100644
--- a/include/hw/s390x/css.h
+++ b/include/hw/s390x/css.h
@@ -238,7 +238,6 @@ uint32_t css_get_adapter_id(CssIoAdapterType type, uint8_t isc);
void css_register_io_adapters(CssIoAdapterType type, bool swap, bool maskable,
uint8_t flags, Error **errp);
-#ifndef CONFIG_USER_ONLY
SubchDev *css_find_subch(uint8_t m, uint8_t cssid, uint8_t ssid,
uint16_t schid);
bool css_subch_visible(SubchDev *sch);
@@ -262,7 +261,6 @@ int css_enable_mss(void);
IOInstEnding css_do_rsch(SubchDev *sch);
int css_do_rchp(uint8_t cssid, uint8_t chpid);
bool css_present(uint8_t cssid);
-#endif
extern const PropertyInfo css_devid_ro_propinfo;
--
2.43.0
^ permalink raw reply related [flat|nested] 90+ messages in thread
* [PATCH v2 37/42] include/exec: Split out icount.h
2025-03-18 21:31 [PATCH v2 00/42] accel/tcg, codebase: Build once patches Richard Henderson
` (35 preceding siblings ...)
2025-03-18 21:32 ` [PATCH v2 36/42] include/hw/s390x: Remove ifndef CONFIG_USER_ONLY in css.h Richard Henderson
@ 2025-03-18 21:32 ` Richard Henderson
2025-03-19 0:33 ` Pierrick Bouvier
2025-03-18 21:32 ` [PATCH v2 38/42] include/exec: Protect icount_enabled from poisoned symbols Richard Henderson
` (4 subsequent siblings)
41 siblings, 1 reply; 90+ messages in thread
From: Richard Henderson @ 2025-03-18 21:32 UTC (permalink / raw)
To: qemu-devel; +Cc: pierrick.bouvier, philmd
Split icount stuff from system/cpu-timers.h.
There are 17 files which only require icount.h, 7 that only
require cpu-timers.h, and 7 that require both.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/exec/icount.h | 68 ++++++++++++++++++++++++++++++++
include/system/cpu-timers.h | 58 ---------------------------
accel/tcg/cpu-exec.c | 2 +-
accel/tcg/icount-common.c | 2 +-
accel/tcg/monitor.c | 1 +
accel/tcg/tcg-accel-ops-icount.c | 2 +-
accel/tcg/tcg-accel-ops-mttcg.c | 2 +-
accel/tcg/tcg-accel-ops-rr.c | 2 +-
accel/tcg/tcg-accel-ops.c | 2 +-
accel/tcg/tcg-all.c | 2 +-
accel/tcg/translate-all.c | 2 +-
hw/core/ptimer.c | 2 +-
replay/replay.c | 2 +-
stubs/icount.c | 2 +-
system/cpu-timers.c | 1 +
system/dma-helpers.c | 2 +-
system/vl.c | 1 +
target/arm/helper.c | 1 +
target/riscv/cpu_helper.c | 2 +-
target/riscv/csr.c | 2 +-
target/riscv/debug.c | 1 +
target/riscv/machine.c | 2 +-
target/riscv/pmu.c | 2 +-
util/async.c | 2 +-
util/main-loop.c | 1 +
util/qemu-timer.c | 1 +
26 files changed, 92 insertions(+), 75 deletions(-)
create mode 100644 include/exec/icount.h
diff --git a/include/exec/icount.h b/include/exec/icount.h
new file mode 100644
index 0000000000..4964987ae4
--- /dev/null
+++ b/include/exec/icount.h
@@ -0,0 +1,68 @@
+/*
+ * icount - Instruction Counter API
+ * CPU timers state API
+ *
+ * Copyright 2020 SUSE LLC
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#ifndef EXEC_ICOUNT_H
+#define EXEC_ICOUNT_H
+
+/**
+ * ICountMode: icount enablement state:
+ *
+ * @ICOUNT_DISABLED: Disabled - Do not count executed instructions.
+ * @ICOUNT_PRECISE: Enabled - Fixed conversion of insn to ns via "shift" option
+ * @ICOUNT_ADAPTATIVE: Enabled - Runtime adaptive algorithm to compute shift
+ */
+typedef enum {
+ ICOUNT_DISABLED = 0,
+ ICOUNT_PRECISE,
+ ICOUNT_ADAPTATIVE,
+} ICountMode;
+
+#if defined(CONFIG_TCG) && !defined(CONFIG_USER_ONLY)
+extern ICountMode use_icount;
+#define icount_enabled() (use_icount)
+#else
+#define icount_enabled() ICOUNT_DISABLED
+#endif
+
+/*
+ * Update the icount with the executed instructions. Called by
+ * cpus-tcg vCPU thread so the main-loop can see time has moved forward.
+ */
+void icount_update(CPUState *cpu);
+
+/* get raw icount value */
+int64_t icount_get_raw(void);
+
+/* return the virtual CPU time in ns, based on the instruction counter. */
+int64_t icount_get(void);
+/*
+ * convert an instruction counter value to ns, based on the icount shift.
+ * This shift is set as a fixed value with the icount "shift" option
+ * (precise mode), or it is constantly approximated and corrected at
+ * runtime in adaptive mode.
+ */
+int64_t icount_to_ns(int64_t icount);
+
+/**
+ * icount_configure: configure the icount options, including "shift"
+ * @opts: Options to parse
+ * @errp: pointer to a NULL-initialized error object
+ *
+ * Return: true on success, else false setting @errp with error
+ */
+bool icount_configure(QemuOpts *opts, Error **errp);
+
+/* used by tcg vcpu thread to calc icount budget */
+int64_t icount_round(int64_t count);
+
+/* if the CPUs are idle, start accounting real time to virtual clock. */
+void icount_start_warp_timer(void);
+void icount_account_warp_timer(void);
+void icount_notify_exit(void);
+
+#endif /* EXEC_ICOUNT_H */
diff --git a/include/system/cpu-timers.h b/include/system/cpu-timers.h
index 64ae54f6d6..a1abed0d7a 100644
--- a/include/system/cpu-timers.h
+++ b/include/system/cpu-timers.h
@@ -15,64 +15,6 @@
/* init the whole cpu timers API, including icount, ticks, and cpu_throttle */
void cpu_timers_init(void);
-/* icount - Instruction Counter API */
-
-/**
- * ICountMode: icount enablement state:
- *
- * @ICOUNT_DISABLED: Disabled - Do not count executed instructions.
- * @ICOUNT_PRECISE: Enabled - Fixed conversion of insn to ns via "shift" option
- * @ICOUNT_ADAPTATIVE: Enabled - Runtime adaptive algorithm to compute shift
- */
-typedef enum {
- ICOUNT_DISABLED = 0,
- ICOUNT_PRECISE,
- ICOUNT_ADAPTATIVE,
-} ICountMode;
-
-#if defined(CONFIG_TCG) && !defined(CONFIG_USER_ONLY)
-extern ICountMode use_icount;
-#define icount_enabled() (use_icount)
-#else
-#define icount_enabled() ICOUNT_DISABLED
-#endif
-
-/*
- * Update the icount with the executed instructions. Called by
- * cpus-tcg vCPU thread so the main-loop can see time has moved forward.
- */
-void icount_update(CPUState *cpu);
-
-/* get raw icount value */
-int64_t icount_get_raw(void);
-
-/* return the virtual CPU time in ns, based on the instruction counter. */
-int64_t icount_get(void);
-/*
- * convert an instruction counter value to ns, based on the icount shift.
- * This shift is set as a fixed value with the icount "shift" option
- * (precise mode), or it is constantly approximated and corrected at
- * runtime in adaptive mode.
- */
-int64_t icount_to_ns(int64_t icount);
-
-/**
- * icount_configure: configure the icount options, including "shift"
- * @opts: Options to parse
- * @errp: pointer to a NULL-initialized error object
- *
- * Return: true on success, else false setting @errp with error
- */
-bool icount_configure(QemuOpts *opts, Error **errp);
-
-/* used by tcg vcpu thread to calc icount budget */
-int64_t icount_round(int64_t count);
-
-/* if the CPUs are idle, start accounting real time to virtual clock. */
-void icount_start_warp_timer(void);
-void icount_account_warp_timer(void);
-void icount_notify_exit(void);
-
/*
* CPU Ticks and Clock
*/
diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c
index 372b876604..034c2ded6b 100644
--- a/accel/tcg/cpu-exec.c
+++ b/accel/tcg/cpu-exec.c
@@ -35,7 +35,7 @@
#include "exec/log.h"
#include "qemu/main-loop.h"
#include "exec/cpu-all.h"
-#include "system/cpu-timers.h"
+#include "exec/icount.h"
#include "exec/replay-core.h"
#include "system/tcg.h"
#include "exec/helper-proto-common.h"
diff --git a/accel/tcg/icount-common.c b/accel/tcg/icount-common.c
index 402d3e3f4e..d6471174a3 100644
--- a/accel/tcg/icount-common.c
+++ b/accel/tcg/icount-common.c
@@ -35,7 +35,7 @@
#include "system/replay.h"
#include "system/runstate.h"
#include "hw/core/cpu.h"
-#include "system/cpu-timers.h"
+#include "exec/icount.h"
#include "system/cpu-timers-internal.h"
/*
diff --git a/accel/tcg/monitor.c b/accel/tcg/monitor.c
index eeb38a4d9c..1c182b6bfb 100644
--- a/accel/tcg/monitor.c
+++ b/accel/tcg/monitor.c
@@ -14,6 +14,7 @@
#include "qapi/qapi-commands-machine.h"
#include "monitor/monitor.h"
#include "system/cpu-timers.h"
+#include "exec/icount.h"
#include "system/tcg.h"
#include "tcg/tcg.h"
#include "internal-common.h"
diff --git a/accel/tcg/tcg-accel-ops-icount.c b/accel/tcg/tcg-accel-ops-icount.c
index 27cf1044c7..d0f7b410fa 100644
--- a/accel/tcg/tcg-accel-ops-icount.c
+++ b/accel/tcg/tcg-accel-ops-icount.c
@@ -25,7 +25,7 @@
#include "qemu/osdep.h"
#include "system/replay.h"
-#include "system/cpu-timers.h"
+#include "exec/icount.h"
#include "qemu/main-loop.h"
#include "qemu/guest-random.h"
#include "hw/core/cpu.h"
diff --git a/accel/tcg/tcg-accel-ops-mttcg.c b/accel/tcg/tcg-accel-ops-mttcg.c
index bdcc385ae9..dfcee30947 100644
--- a/accel/tcg/tcg-accel-ops-mttcg.c
+++ b/accel/tcg/tcg-accel-ops-mttcg.c
@@ -26,7 +26,7 @@
#include "qemu/osdep.h"
#include "system/tcg.h"
#include "system/replay.h"
-#include "system/cpu-timers.h"
+#include "exec/icount.h"
#include "qemu/main-loop.h"
#include "qemu/notify.h"
#include "qemu/guest-random.h"
diff --git a/accel/tcg/tcg-accel-ops-rr.c b/accel/tcg/tcg-accel-ops-rr.c
index f62cf24e1d..6eec5c9eee 100644
--- a/accel/tcg/tcg-accel-ops-rr.c
+++ b/accel/tcg/tcg-accel-ops-rr.c
@@ -27,7 +27,7 @@
#include "qemu/lockable.h"
#include "system/tcg.h"
#include "system/replay.h"
-#include "system/cpu-timers.h"
+#include "exec/icount.h"
#include "qemu/main-loop.h"
#include "qemu/notify.h"
#include "qemu/guest-random.h"
diff --git a/accel/tcg/tcg-accel-ops.c b/accel/tcg/tcg-accel-ops.c
index 5c88056157..ccdb781eef 100644
--- a/accel/tcg/tcg-accel-ops.c
+++ b/accel/tcg/tcg-accel-ops.c
@@ -29,7 +29,7 @@
#include "system/accel-ops.h"
#include "system/tcg.h"
#include "system/replay.h"
-#include "system/cpu-timers.h"
+#include "exec/icount.h"
#include "qemu/main-loop.h"
#include "qemu/guest-random.h"
#include "qemu/timer.h"
diff --git a/accel/tcg/tcg-all.c b/accel/tcg/tcg-all.c
index c1a30b0121..7a5b810b88 100644
--- a/accel/tcg/tcg-all.c
+++ b/accel/tcg/tcg-all.c
@@ -26,7 +26,7 @@
#include "qemu/osdep.h"
#include "system/tcg.h"
#include "exec/replay-core.h"
-#include "system/cpu-timers.h"
+#include "exec/icount.h"
#include "tcg/startup.h"
#include "qapi/error.h"
#include "qemu/error-report.h"
diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c
index 167535bcb1..bb161ae61a 100644
--- a/accel/tcg/translate-all.c
+++ b/accel/tcg/translate-all.c
@@ -55,7 +55,7 @@
#include "qemu/cacheinfo.h"
#include "qemu/timer.h"
#include "exec/log.h"
-#include "system/cpu-timers.h"
+#include "exec/icount.h"
#include "system/tcg.h"
#include "qapi/error.h"
#include "accel/tcg/cpu-ops.h"
diff --git a/hw/core/ptimer.c b/hw/core/ptimer.c
index 7f63d17ca1..0aeb10fb53 100644
--- a/hw/core/ptimer.c
+++ b/hw/core/ptimer.c
@@ -11,7 +11,7 @@
#include "migration/vmstate.h"
#include "qemu/host-utils.h"
#include "exec/replay-core.h"
-#include "system/cpu-timers.h"
+#include "exec/icount.h"
#include "system/qtest.h"
#include "block/aio.h"
#include "hw/clock.h"
diff --git a/replay/replay.c b/replay/replay.c
index 3adc387b3d..a3e24c967a 100644
--- a/replay/replay.c
+++ b/replay/replay.c
@@ -11,7 +11,7 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
-#include "system/cpu-timers.h"
+#include "exec/icount.h"
#include "system/replay.h"
#include "system/runstate.h"
#include "replay-internal.h"
diff --git a/stubs/icount.c b/stubs/icount.c
index edbf60cbfa..ceb73b4fc2 100644
--- a/stubs/icount.c
+++ b/stubs/icount.c
@@ -1,6 +1,6 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
-#include "system/cpu-timers.h"
+#include "exec/icount.h"
/* icount - Instruction Counter API */
diff --git a/system/cpu-timers.c b/system/cpu-timers.c
index 23dd82b465..cb35fa62b8 100644
--- a/system/cpu-timers.c
+++ b/system/cpu-timers.c
@@ -36,6 +36,7 @@
#include "hw/core/cpu.h"
#include "system/cpu-timers.h"
#include "system/cpu-timers-internal.h"
+#include "exec/icount.h"
/* clock and ticks */
diff --git a/system/dma-helpers.c b/system/dma-helpers.c
index 6bad75876f..0d592f6468 100644
--- a/system/dma-helpers.c
+++ b/system/dma-helpers.c
@@ -13,7 +13,7 @@
#include "trace.h"
#include "qemu/thread.h"
#include "qemu/main-loop.h"
-#include "system/cpu-timers.h"
+#include "exec/icount.h"
#include "qemu/range.h"
/* #define DEBUG_IOMMU */
diff --git a/system/vl.c b/system/vl.c
index ec93988a03..c17945c493 100644
--- a/system/vl.c
+++ b/system/vl.c
@@ -89,6 +89,7 @@
#include "audio/audio.h"
#include "system/cpus.h"
#include "system/cpu-timers.h"
+#include "exec/icount.h"
#include "migration/colo.h"
#include "migration/postcopy-ram.h"
#include "system/kvm.h"
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 0454b06a6c..becbbbd0d8 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -24,6 +24,7 @@
#include "exec/translation-block.h"
#include "hw/irq.h"
#include "system/cpu-timers.h"
+#include "exec/icount.h"
#include "system/kvm.h"
#include "system/tcg.h"
#include "qapi/error.h"
diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c
index 6c4391d96b..0dd8645994 100644
--- a/target/riscv/cpu_helper.c
+++ b/target/riscv/cpu_helper.c
@@ -31,7 +31,7 @@
#include "accel/tcg/cpu-ops.h"
#include "trace.h"
#include "semihosting/common-semi.h"
-#include "system/cpu-timers.h"
+#include "exec/icount.h"
#include "cpu_bits.h"
#include "debug.h"
#include "pmp.h"
diff --git a/target/riscv/csr.c b/target/riscv/csr.c
index 49566d3c08..be4aebb9b2 100644
--- a/target/riscv/csr.c
+++ b/target/riscv/csr.c
@@ -27,7 +27,7 @@
#include "exec/exec-all.h"
#include "exec/cputlb.h"
#include "exec/tb-flush.h"
-#include "system/cpu-timers.h"
+#include "exec/icount.h"
#include "qemu/guest-random.h"
#include "qapi/error.h"
#include <stdbool.h>
diff --git a/target/riscv/debug.c b/target/riscv/debug.c
index fea989afe9..7fc9e121e1 100644
--- a/target/riscv/debug.c
+++ b/target/riscv/debug.c
@@ -32,6 +32,7 @@
#include "exec/helper-proto.h"
#include "exec/watchpoint.h"
#include "system/cpu-timers.h"
+#include "exec/icount.h"
/*
* The following M-mode trigger CSRs are implemented:
diff --git a/target/riscv/machine.c b/target/riscv/machine.c
index 889e2b6570..a1f70cc955 100644
--- a/target/riscv/machine.c
+++ b/target/riscv/machine.c
@@ -21,7 +21,7 @@
#include "qemu/error-report.h"
#include "system/kvm.h"
#include "migration/cpu.h"
-#include "system/cpu-timers.h"
+#include "exec/icount.h"
#include "debug.h"
static bool pmp_needed(void *opaque)
diff --git a/target/riscv/pmu.c b/target/riscv/pmu.c
index 0408f96e6a..a68809eef3 100644
--- a/target/riscv/pmu.c
+++ b/target/riscv/pmu.c
@@ -22,7 +22,7 @@
#include "qemu/timer.h"
#include "cpu.h"
#include "pmu.h"
-#include "system/cpu-timers.h"
+#include "exec/icount.h"
#include "system/device_tree.h"
#define RISCV_TIMEBASE_FREQ 1000000000 /* 1Ghz */
diff --git a/util/async.c b/util/async.c
index 863416dee9..2719c629ae 100644
--- a/util/async.c
+++ b/util/async.c
@@ -35,7 +35,7 @@
#include "block/raw-aio.h"
#include "qemu/coroutine_int.h"
#include "qemu/coroutine-tls.h"
-#include "system/cpu-timers.h"
+#include "exec/icount.h"
#include "trace.h"
/***********************************************************/
diff --git a/util/main-loop.c b/util/main-loop.c
index acad8c2e6c..42bd75c193 100644
--- a/util/main-loop.c
+++ b/util/main-loop.c
@@ -27,6 +27,7 @@
#include "qemu/cutils.h"
#include "qemu/timer.h"
#include "system/cpu-timers.h"
+#include "exec/icount.h"
#include "system/replay.h"
#include "qemu/main-loop.h"
#include "block/aio.h"
diff --git a/util/qemu-timer.c b/util/qemu-timer.c
index 788466fe22..1fb48be281 100644
--- a/util/qemu-timer.c
+++ b/util/qemu-timer.c
@@ -27,6 +27,7 @@
#include "qemu/timer.h"
#include "qemu/lockable.h"
#include "system/cpu-timers.h"
+#include "exec/icount.h"
#include "system/replay.h"
#include "system/cpus.h"
--
2.43.0
^ permalink raw reply related [flat|nested] 90+ messages in thread
* [PATCH v2 38/42] include/exec: Protect icount_enabled from poisoned symbols
2025-03-18 21:31 [PATCH v2 00/42] accel/tcg, codebase: Build once patches Richard Henderson
` (36 preceding siblings ...)
2025-03-18 21:32 ` [PATCH v2 37/42] include/exec: Split out icount.h Richard Henderson
@ 2025-03-18 21:32 ` Richard Henderson
2025-03-19 0:42 ` Pierrick Bouvier
2025-03-18 21:32 ` [PATCH v2 39/42] include/system: Remove ifndef CONFIG_USER_ONLY in qtest.h Richard Henderson
` (3 subsequent siblings)
41 siblings, 1 reply; 90+ messages in thread
From: Richard Henderson @ 2025-03-18 21:32 UTC (permalink / raw)
To: qemu-devel; +Cc: pierrick.bouvier, philmd
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/exec/icount.h | 10 +++++++++-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/include/exec/icount.h b/include/exec/icount.h
index 4964987ae4..7a26b40084 100644
--- a/include/exec/icount.h
+++ b/include/exec/icount.h
@@ -22,13 +22,21 @@ typedef enum {
ICOUNT_ADAPTATIVE,
} ICountMode;
-#if defined(CONFIG_TCG) && !defined(CONFIG_USER_ONLY)
+#ifdef CONFIG_TCG
extern ICountMode use_icount;
#define icount_enabled() (use_icount)
#else
#define icount_enabled() ICOUNT_DISABLED
#endif
+/* Protect the CONFIG_USER_ONLY test vs poisoning. */
+#if defined(COMPILING_PER_TARGET) || defined(COMPILING_SYSTEM_VS_USER)
+# ifdef CONFIG_USER_ONLY
+# undef icount_enabled
+# define icount_enabled() ICOUNT_DISABLED
+# endif
+#endif
+
/*
* Update the icount with the executed instructions. Called by
* cpus-tcg vCPU thread so the main-loop can see time has moved forward.
--
2.43.0
^ permalink raw reply related [flat|nested] 90+ messages in thread
* [PATCH v2 39/42] include/system: Remove ifndef CONFIG_USER_ONLY in qtest.h
2025-03-18 21:31 [PATCH v2 00/42] accel/tcg, codebase: Build once patches Richard Henderson
` (37 preceding siblings ...)
2025-03-18 21:32 ` [PATCH v2 38/42] include/exec: Protect icount_enabled from poisoned symbols Richard Henderson
@ 2025-03-18 21:32 ` Richard Henderson
2025-03-19 0:43 ` Pierrick Bouvier
2025-03-19 7:26 ` Philippe Mathieu-Daudé
2025-03-18 21:32 ` [PATCH v2 40/42] include/qemu: Remove ifndef CONFIG_USER_ONLY from accel.h Richard Henderson
` (2 subsequent siblings)
41 siblings, 2 replies; 90+ messages in thread
From: Richard Henderson @ 2025-03-18 21:32 UTC (permalink / raw)
To: qemu-devel; +Cc: pierrick.bouvier, philmd
This is include/system, so CONFIG_USER_ONLY will never be true.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/system/qtest.h | 2 --
1 file changed, 2 deletions(-)
diff --git a/include/system/qtest.h b/include/system/qtest.h
index 6ddddc501b..84b1f8c6ee 100644
--- a/include/system/qtest.h
+++ b/include/system/qtest.h
@@ -23,7 +23,6 @@ static inline bool qtest_enabled(void)
return qtest_allowed;
}
-#ifndef CONFIG_USER_ONLY
void G_GNUC_PRINTF(2, 3) qtest_sendf(CharBackend *chr, const char *fmt, ...);
void qtest_set_command_cb(bool (*pc_cb)(CharBackend *chr, gchar **words));
bool qtest_driver(void);
@@ -33,6 +32,5 @@ void qtest_server_init(const char *qtest_chrdev, const char *qtest_log, Error **
void qtest_server_set_send_handler(void (*send)(void *, const char *),
void *opaque);
void qtest_server_inproc_recv(void *opaque, const char *buf);
-#endif
#endif
--
2.43.0
^ permalink raw reply related [flat|nested] 90+ messages in thread
* [PATCH v2 40/42] include/qemu: Remove ifndef CONFIG_USER_ONLY from accel.h
2025-03-18 21:31 [PATCH v2 00/42] accel/tcg, codebase: Build once patches Richard Henderson
` (38 preceding siblings ...)
2025-03-18 21:32 ` [PATCH v2 39/42] include/system: Remove ifndef CONFIG_USER_ONLY in qtest.h Richard Henderson
@ 2025-03-18 21:32 ` Richard Henderson
2025-03-18 21:32 ` [PATCH v2 41/42] target/riscv: Remove ifndef CONFIG_USER_ONLY from cpu_cfg.h Richard Henderson
2025-03-18 21:32 ` [PATCH v2 42/42] meson: Only allow CONFIG_USER_ONLY from certain source sets Richard Henderson
41 siblings, 0 replies; 90+ messages in thread
From: Richard Henderson @ 2025-03-18 21:32 UTC (permalink / raw)
To: qemu-devel; +Cc: pierrick.bouvier, philmd
While setup_post and has_memory will not be used for
CONFIG_USER_ONLY, let the struct have constant layout.
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/qemu/accel.h | 10 ++++------
1 file changed, 4 insertions(+), 6 deletions(-)
diff --git a/include/qemu/accel.h b/include/qemu/accel.h
index 972a849a2b..fbd3d897fe 100644
--- a/include/qemu/accel.h
+++ b/include/qemu/accel.h
@@ -38,13 +38,13 @@ typedef struct AccelClass {
const char *name;
int (*init_machine)(MachineState *ms);
-#ifndef CONFIG_USER_ONLY
+ bool (*cpu_common_realize)(CPUState *cpu, Error **errp);
+ void (*cpu_common_unrealize)(CPUState *cpu);
+
+ /* system related hooks */
void (*setup_post)(MachineState *ms, AccelState *accel);
bool (*has_memory)(MachineState *ms, AddressSpace *as,
hwaddr start_addr, hwaddr size);
-#endif
- bool (*cpu_common_realize)(CPUState *cpu, Error **errp);
- void (*cpu_common_unrealize)(CPUState *cpu);
/* gdbstub related hooks */
int (*gdbstub_supported_sstep_flags)(void);
@@ -78,12 +78,10 @@ const char *current_accel_name(void);
void accel_init_interfaces(AccelClass *ac);
-#ifndef CONFIG_USER_ONLY
int accel_init_machine(AccelState *accel, MachineState *ms);
/* Called just before os_setup_post (ie just before drop OS privs) */
void accel_setup_post(MachineState *ms);
-#endif /* !CONFIG_USER_ONLY */
/**
* accel_cpu_instance_init:
--
2.43.0
^ permalink raw reply related [flat|nested] 90+ messages in thread
* [PATCH v2 41/42] target/riscv: Remove ifndef CONFIG_USER_ONLY from cpu_cfg.h
2025-03-18 21:31 [PATCH v2 00/42] accel/tcg, codebase: Build once patches Richard Henderson
` (39 preceding siblings ...)
2025-03-18 21:32 ` [PATCH v2 40/42] include/qemu: Remove ifndef CONFIG_USER_ONLY from accel.h Richard Henderson
@ 2025-03-18 21:32 ` Richard Henderson
2025-03-19 1:41 ` Alistair Francis
2025-03-18 21:32 ` [PATCH v2 42/42] meson: Only allow CONFIG_USER_ONLY from certain source sets Richard Henderson
41 siblings, 1 reply; 90+ messages in thread
From: Richard Henderson @ 2025-03-18 21:32 UTC (permalink / raw)
To: qemu-devel; +Cc: pierrick.bouvier, philmd
While RISCVCPUConfig.satp_mode is unused for user-only,
this header is used from disas/riscv.h, whose users are
only built once. The savings of 4 bytes isn't worth it.
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/riscv/cpu_cfg.h | 2 --
1 file changed, 2 deletions(-)
diff --git a/target/riscv/cpu_cfg.h b/target/riscv/cpu_cfg.h
index 8a843482cc..cfe371b829 100644
--- a/target/riscv/cpu_cfg.h
+++ b/target/riscv/cpu_cfg.h
@@ -196,9 +196,7 @@ struct RISCVCPUConfig {
bool short_isa_string;
-#ifndef CONFIG_USER_ONLY
RISCVSATPMap satp_mode;
-#endif
};
typedef struct RISCVCPUConfig RISCVCPUConfig;
--
2.43.0
^ permalink raw reply related [flat|nested] 90+ messages in thread
* [PATCH v2 42/42] meson: Only allow CONFIG_USER_ONLY from certain source sets
2025-03-18 21:31 [PATCH v2 00/42] accel/tcg, codebase: Build once patches Richard Henderson
` (40 preceding siblings ...)
2025-03-18 21:32 ` [PATCH v2 41/42] target/riscv: Remove ifndef CONFIG_USER_ONLY from cpu_cfg.h Richard Henderson
@ 2025-03-18 21:32 ` Richard Henderson
2025-03-19 0:44 ` Pierrick Bouvier
41 siblings, 1 reply; 90+ messages in thread
From: Richard Henderson @ 2025-03-18 21:32 UTC (permalink / raw)
To: qemu-devel; +Cc: pierrick.bouvier, philmd
Poison CONFIG_USER_ONLY and CONFIG_SOFTMMU unless
the compilation unit is in specific_ss, libuser_ss,
or libsystem_ss. This is intended to prevent files
being incorrectly added to common_ss.
Remove #ifndef CONFIG_USER_ONLY / #error / #endif blocks.
All they do is trigger the poison error.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/exec/poison.h | 5 +++++
include/hw/hw.h | 4 ----
include/system/confidential-guest-support.h | 4 ----
include/system/replay.h | 4 ----
include/system/xen.h | 4 ----
meson.build | 6 ++++--
6 files changed, 9 insertions(+), 18 deletions(-)
diff --git a/include/exec/poison.h b/include/exec/poison.h
index 8ed04b3108..a6ffe4577f 100644
--- a/include/exec/poison.h
+++ b/include/exec/poison.h
@@ -67,4 +67,9 @@
#pragma GCC poison CONFIG_WHPX
#pragma GCC poison CONFIG_XEN
+#ifndef COMPILING_SYSTEM_VS_USER
+#pragma GCC poison CONFIG_USER_ONLY
+#pragma GCC poison CONFIG_SOFTMMU
+#endif
+
#endif
diff --git a/include/hw/hw.h b/include/hw/hw.h
index 045c1c8b09..1b33d12b7f 100644
--- a/include/hw/hw.h
+++ b/include/hw/hw.h
@@ -1,10 +1,6 @@
#ifndef QEMU_HW_H
#define QEMU_HW_H
-#ifdef CONFIG_USER_ONLY
-#error Cannot include hw/hw.h from user emulation
-#endif
-
G_NORETURN void hw_error(const char *fmt, ...) G_GNUC_PRINTF(1, 2);
#endif
diff --git a/include/system/confidential-guest-support.h b/include/system/confidential-guest-support.h
index b68c4bebbc..ea46b50c56 100644
--- a/include/system/confidential-guest-support.h
+++ b/include/system/confidential-guest-support.h
@@ -18,10 +18,6 @@
#ifndef QEMU_CONFIDENTIAL_GUEST_SUPPORT_H
#define QEMU_CONFIDENTIAL_GUEST_SUPPORT_H
-#ifdef CONFIG_USER_ONLY
-#error Cannot include system/confidential-guest-support.h from user emulation
-#endif
-
#include "qom/object.h"
#define TYPE_CONFIDENTIAL_GUEST_SUPPORT "confidential-guest-support"
diff --git a/include/system/replay.h b/include/system/replay.h
index 8926d8cf4b..1c87c97fdd 100644
--- a/include/system/replay.h
+++ b/include/system/replay.h
@@ -11,10 +11,6 @@
#ifndef SYSTEM_REPLAY_H
#define SYSTEM_REPLAY_H
-#ifdef CONFIG_USER_ONLY
-#error Cannot include this header from user emulation
-#endif
-
#include "exec/replay-core.h"
#include "qapi/qapi-types-misc.h"
#include "qapi/qapi-types-run-state.h"
diff --git a/include/system/xen.h b/include/system/xen.h
index 5f41915732..c2f283d1c2 100644
--- a/include/system/xen.h
+++ b/include/system/xen.h
@@ -10,10 +10,6 @@
#ifndef SYSTEM_XEN_H
#define SYSTEM_XEN_H
-#ifdef CONFIG_USER_ONLY
-#error Cannot include system/xen.h from user emulation
-#endif
-
#include "exec/cpu-common.h"
#ifdef COMPILING_PER_TARGET
diff --git a/meson.build b/meson.build
index 329e7f056a..b4d65a75e5 100644
--- a/meson.build
+++ b/meson.build
@@ -4054,7 +4054,8 @@ common_ss.add_all(when: 'CONFIG_USER_ONLY', if_true: user_ss)
libuser_ss = libuser_ss.apply({})
libuser = static_library('user',
libuser_ss.sources() + genh,
- c_args: '-DCONFIG_USER_ONLY',
+ c_args: ['-DCONFIG_USER_ONLY',
+ '-DCOMPILING_SYSTEM_VS_USER'],
dependencies: libuser_ss.dependencies(),
build_by_default: false)
libuser = declare_dependency(objects: libuser.extract_all_objects(recursive: false),
@@ -4064,7 +4065,8 @@ common_ss.add(when: 'CONFIG_USER_ONLY', if_true: libuser)
libsystem_ss = libsystem_ss.apply({})
libsystem = static_library('system',
libsystem_ss.sources() + genh,
- c_args: '-DCONFIG_SOFTMMU',
+ c_args: ['-DCONFIG_SOFTMMU',
+ '-DCOMPILING_SYSTEM_VS_USER'],
dependencies: libsystem_ss.dependencies(),
build_by_default: false)
libsystem = declare_dependency(objects: libsystem.extract_all_objects(recursive: false),
--
2.43.0
^ permalink raw reply related [flat|nested] 90+ messages in thread
* Re: [PATCH v2 03/42] accel/tcg: Fix cpu_ld*_code_mmu for user mode
2025-03-18 21:31 ` [PATCH v2 03/42] accel/tcg: Fix cpu_ld*_code_mmu for user mode Richard Henderson
@ 2025-03-18 23:52 ` Pierrick Bouvier
2025-03-19 1:05 ` Richard Henderson
2025-03-19 1:09 ` Pierrick Bouvier
1 sibling, 1 reply; 90+ messages in thread
From: Pierrick Bouvier @ 2025-03-18 23:52 UTC (permalink / raw)
To: Richard Henderson, qemu-devel; +Cc: philmd
On 3/18/25 14:31, Richard Henderson wrote:
> These routines are buggy in multiple ways:
> - Use of target-endian loads, then a bswap that
> depends on the host endiannness.
The code is very similar to do_ld*_mmu functions, so it's subtle to notice.
Was the endianness bug due to the fact we use oi (MemOpIdx) directly
instead of get_memop(oi) (MemOp)?
It seems to be the main difference with do_ld*_mmu functions.
> - A non-unwinding code load must set_helper_retaddr 1,
> which is magic within adjust_signal_pc.
> - cpu_ldq_code_mmu used MMU_DATA_LOAD
>
> The bugs are hidden because all current uses of cpu_ld*_code_mmu
> are from system mode.
>
> Fixes: 2899062614a ("accel/tcg: Add cpu_ld*_code_mmu")
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> accel/tcg/user-exec.c | 41 ++++-------------------------------------
> 1 file changed, 4 insertions(+), 37 deletions(-)
>
> diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c
> index 2322181b15..629a1c9ce6 100644
> --- a/accel/tcg/user-exec.c
> +++ b/accel/tcg/user-exec.c
> @@ -1257,58 +1257,25 @@ uint64_t cpu_ldq_code(CPUArchState *env, abi_ptr ptr)
> uint8_t cpu_ldb_code_mmu(CPUArchState *env, abi_ptr addr,
> MemOpIdx oi, uintptr_t ra)
> {
> - void *haddr;
> - uint8_t ret;
> -
> - haddr = cpu_mmu_lookup(env_cpu(env), addr, oi, ra, MMU_INST_FETCH);
> - ret = ldub_p(haddr);
> - clear_helper_retaddr();
> - return ret;
> + return do_ld1_mmu(env_cpu(env), addr, oi, ra ? ra : 1, MMU_INST_FETCH);
> }
>
> uint16_t cpu_ldw_code_mmu(CPUArchState *env, abi_ptr addr,
> MemOpIdx oi, uintptr_t ra)
> {
> - void *haddr;
> - uint16_t ret;
> -
> - haddr = cpu_mmu_lookup(env_cpu(env), addr, oi, ra, MMU_INST_FETCH);
> - ret = lduw_p(haddr);
> - clear_helper_retaddr();
> - if (get_memop(oi) & MO_BSWAP) {
> - ret = bswap16(ret);
> - }
> - return ret;
> + return do_ld2_mmu(env_cpu(env), addr, oi, ra ? ra : 1, MMU_INST_FETCH);
> }
>
> uint32_t cpu_ldl_code_mmu(CPUArchState *env, abi_ptr addr,
> MemOpIdx oi, uintptr_t ra)
> {
> - void *haddr;
> - uint32_t ret;
> -
> - haddr = cpu_mmu_lookup(env_cpu(env), addr, oi, ra, MMU_INST_FETCH);
> - ret = ldl_p(haddr);
> - clear_helper_retaddr();
> - if (get_memop(oi) & MO_BSWAP) {
> - ret = bswap32(ret);
> - }
> - return ret;
> + return do_ld4_mmu(env_cpu(env), addr, oi, ra ? ra : 1, MMU_INST_FETCH);
> }
>
> uint64_t cpu_ldq_code_mmu(CPUArchState *env, abi_ptr addr,
> MemOpIdx oi, uintptr_t ra)
> {
> - void *haddr;
> - uint64_t ret;
> -
> - haddr = cpu_mmu_lookup(env_cpu(env), addr, oi, ra, MMU_DATA_LOAD);
> - ret = ldq_p(haddr);
> - clear_helper_retaddr();
> - if (get_memop(oi) & MO_BSWAP) {
> - ret = bswap64(ret);
> - }
> - return ret;
> + return do_ld8_mmu(env_cpu(env), addr, oi, ra ? ra : 1, MMU_INST_FETCH);
> }
>
> #include "ldst_common.c.inc"
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
^ permalink raw reply [flat|nested] 90+ messages in thread
* Re: [PATCH v2 06/42] include/exec: Split out cpu-mmu-index.h
2025-03-18 21:31 ` [PATCH v2 06/42] include/exec: Split out cpu-mmu-index.h Richard Henderson
@ 2025-03-19 0:02 ` Pierrick Bouvier
2025-03-19 1:16 ` Richard Henderson
2025-04-02 11:26 ` Philippe Mathieu-Daudé
1 sibling, 1 reply; 90+ messages in thread
From: Pierrick Bouvier @ 2025-03-19 0:02 UTC (permalink / raw)
To: Richard Henderson, qemu-devel; +Cc: philmd
On 3/18/25 14:31, Richard Henderson wrote:
> The implementation of cpu_mmu_index was split between cpu-common.h
> and cpu-all.h, depending on CONFIG_USER_ONLY. We already have the
> plumbing common to user and system mode. Using MMU_USER_IDX
> requires the cpu.h for a specific target, and so is restricted to
> when we're compiling per-target.
>
A side question: Why is MMU_USER_IDX different depending on architecture?
I'm trying to understand why (and by what) previous indexes are reserved
when MMU_USER_IDX is not zero.
> Include the new header only where needed.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> include/exec/cpu-all.h | 6 ------
> include/exec/cpu-common.h | 20 ------------------
> include/exec/cpu-mmu-index.h | 39 +++++++++++++++++++++++++++++++++++
> include/exec/cpu_ldst.h | 1 +
> semihosting/uaccess.c | 1 +
> target/arm/gdbstub64.c | 3 +++
> target/hppa/mem_helper.c | 1 +
> target/i386/tcg/translate.c | 1 +
> target/loongarch/cpu_helper.c | 1 +
> target/microblaze/helper.c | 1 +
> target/microblaze/mmu.c | 1 +
> target/openrisc/translate.c | 1 +
> target/sparc/cpu.c | 1 +
> target/sparc/mmu_helper.c | 1 +
> target/tricore/helper.c | 1 +
> target/xtensa/mmu_helper.c | 1 +
> 16 files changed, 54 insertions(+), 26 deletions(-)
> create mode 100644 include/exec/cpu-mmu-index.h
>
> diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h
> index 902ca1f3c7..6108351f58 100644
> --- a/include/exec/cpu-all.h
> +++ b/include/exec/cpu-all.h
> @@ -48,8 +48,6 @@ CPUArchState *cpu_copy(CPUArchState *env);
>
> #ifdef CONFIG_USER_ONLY
>
> -static inline int cpu_mmu_index(CPUState *cs, bool ifetch);
> -
> /*
> * Allow some level of source compatibility with softmmu. We do not
> * support any of the more exotic features, so only invalid pages may
> @@ -59,10 +57,6 @@ static inline int cpu_mmu_index(CPUState *cs, bool ifetch);
> #define TLB_MMIO (1 << (TARGET_PAGE_BITS_MIN - 2))
> #define TLB_WATCHPOINT 0
>
> -static inline int cpu_mmu_index(CPUState *cs, bool ifetch)
> -{
> - return MMU_USER_IDX;
> -}
> #else
>
> /*
> diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h
> index 3771b2130c..be032e1a49 100644
> --- a/include/exec/cpu-common.h
> +++ b/include/exec/cpu-common.h
> @@ -272,24 +272,4 @@ static inline CPUState *env_cpu(CPUArchState *env)
> return (CPUState *)env_cpu_const(env);
> }
>
> -#ifndef CONFIG_USER_ONLY
> -/**
> - * cpu_mmu_index:
> - * @env: The cpu environment
> - * @ifetch: True for code access, false for data access.
> - *
> - * Return the core mmu index for the current translation regime.
> - * This function is used by generic TCG code paths.
> - *
> - * The user-only version of this function is inline in cpu-all.h,
> - * where it always returns MMU_USER_IDX.
> - */
> -static inline int cpu_mmu_index(CPUState *cs, bool ifetch)
> -{
> - int ret = cs->cc->mmu_index(cs, ifetch);
> - tcg_debug_assert(ret >= 0 && ret < NB_MMU_MODES);
> - return ret;
> -}
> -#endif /* !CONFIG_USER_ONLY */
> -
> #endif /* CPU_COMMON_H */
> diff --git a/include/exec/cpu-mmu-index.h b/include/exec/cpu-mmu-index.h
> new file mode 100644
> index 0000000000..b46e622048
> --- /dev/null
> +++ b/include/exec/cpu-mmu-index.h
> @@ -0,0 +1,39 @@
> +/*
> + * cpu_mmu_index()
> + *
> + * Copyright (c) 2003 Fabrice Bellard
> + *
> + * SPDX-License-Identifier: LGPL-2.1+
> + */
> +
> +#ifndef EXEC_CPU_MMU_INDEX_H
> +#define EXEC_CPU_MMU_INDEX_H
> +
> +#include "hw/core/cpu.h"
> +#include "tcg/debug-assert.h"
> +#ifdef COMPILING_PER_TARGET
> +#include "cpu.h"
> +#endif
> +
> +/**
> + * cpu_mmu_index:
> + * @env: The cpu environment
> + * @ifetch: True for code access, false for data access.
> + *
> + * Return the core mmu index for the current translation regime.
> + * This function is used by generic TCG code paths.
> + */
> +static inline int cpu_mmu_index(CPUState *cs, bool ifetch)
> +{
> +#ifdef COMPILING_PER_TARGET
> +# ifdef CONFIG_USER_ONLY
> + return MMU_USER_IDX;
> +# endif
> +#endif
> +
> + int ret = cs->cc->mmu_index(cs, ifetch);
> + tcg_debug_assert(ret >= 0 && ret < NB_MMU_MODES);
> + return ret;
> +}
> +
> +#endif /* EXEC_CPU_MMU_INDEX_H */
> diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h
> index 1fbdbe59ae..0b10d840fe 100644
> --- a/include/exec/cpu_ldst.h
> +++ b/include/exec/cpu_ldst.h
> @@ -67,6 +67,7 @@
> #endif
>
> #include "exec/cpu-ldst-common.h"
> +#include "exec/cpu-mmu-index.h"
> #include "exec/abi_ptr.h"
>
> #if defined(CONFIG_USER_ONLY)
> diff --git a/semihosting/uaccess.c b/semihosting/uaccess.c
> index 382a366ce3..a957891166 100644
> --- a/semihosting/uaccess.c
> +++ b/semihosting/uaccess.c
> @@ -9,6 +9,7 @@
>
> #include "qemu/osdep.h"
> #include "exec/cpu-all.h"
> +#include "exec/cpu-mmu-index.h"
> #include "exec/exec-all.h"
> #include "semihosting/uaccess.h"
>
> diff --git a/target/arm/gdbstub64.c b/target/arm/gdbstub64.c
> index 1a4dbec567..a9d8352b76 100644
> --- a/target/arm/gdbstub64.c
> +++ b/target/arm/gdbstub64.c
> @@ -27,6 +27,9 @@
> #include <sys/prctl.h>
> #include "mte_user_helper.h"
> #endif
> +#ifdef CONFIG_TCG
> +#include "exec/cpu-mmu-index.h"
> +#endif
>
> int aarch64_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
> {
> diff --git a/target/hppa/mem_helper.c b/target/hppa/mem_helper.c
> index fb1d93ef1f..510786518d 100644
> --- a/target/hppa/mem_helper.c
> +++ b/target/hppa/mem_helper.c
> @@ -22,6 +22,7 @@
> #include "cpu.h"
> #include "exec/exec-all.h"
> #include "exec/cputlb.h"
> +#include "exec/cpu-mmu-index.h"
> #include "exec/page-protection.h"
> #include "exec/helper-proto.h"
> #include "hw/core/cpu.h"
> diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c
> index a8935f487a..20a5c69795 100644
> --- a/target/i386/tcg/translate.c
> +++ b/target/i386/tcg/translate.c
> @@ -20,6 +20,7 @@
>
> #include "qemu/host-utils.h"
> #include "cpu.h"
> +#include "exec/cpu-mmu-index.h"
> #include "exec/exec-all.h"
> #include "exec/translation-block.h"
> #include "tcg/tcg-op.h"
> diff --git a/target/loongarch/cpu_helper.c b/target/loongarch/cpu_helper.c
> index 930466ca48..8662fb36ed 100644
> --- a/target/loongarch/cpu_helper.c
> +++ b/target/loongarch/cpu_helper.c
> @@ -8,6 +8,7 @@
>
> #include "qemu/osdep.h"
> #include "cpu.h"
> +#include "exec/cpu-mmu-index.h"
> #include "internals.h"
> #include "cpu-csr.h"
>
> diff --git a/target/microblaze/helper.c b/target/microblaze/helper.c
> index 27fc929bee..996514ffe8 100644
> --- a/target/microblaze/helper.c
> +++ b/target/microblaze/helper.c
> @@ -21,6 +21,7 @@
> #include "qemu/osdep.h"
> #include "cpu.h"
> #include "exec/cputlb.h"
> +#include "exec/cpu-mmu-index.h"
> #include "exec/page-protection.h"
> #include "qemu/host-utils.h"
> #include "exec/log.h"
> diff --git a/target/microblaze/mmu.c b/target/microblaze/mmu.c
> index f8587d5ac4..987ac9e3a7 100644
> --- a/target/microblaze/mmu.c
> +++ b/target/microblaze/mmu.c
> @@ -22,6 +22,7 @@
> #include "qemu/log.h"
> #include "cpu.h"
> #include "exec/cputlb.h"
> +#include "exec/cpu-mmu-index.h"
> #include "exec/page-protection.h"
>
> static unsigned int tlb_decode_size(unsigned int f)
> diff --git a/target/openrisc/translate.c b/target/openrisc/translate.c
> index 7a6af183ae..5b437959ac 100644
> --- a/target/openrisc/translate.c
> +++ b/target/openrisc/translate.c
> @@ -20,6 +20,7 @@
>
> #include "qemu/osdep.h"
> #include "cpu.h"
> +#include "exec/cpu-mmu-index.h"
> #include "exec/exec-all.h"
> #include "tcg/tcg-op.h"
> #include "qemu/log.h"
> diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c
> index 5716120117..1bf00407af 100644
> --- a/target/sparc/cpu.c
> +++ b/target/sparc/cpu.c
> @@ -22,6 +22,7 @@
> #include "cpu.h"
> #include "qemu/module.h"
> #include "qemu/qemu-print.h"
> +#include "exec/cpu-mmu-index.h"
> #include "exec/exec-all.h"
> #include "exec/translation-block.h"
> #include "hw/qdev-properties.h"
> diff --git a/target/sparc/mmu_helper.c b/target/sparc/mmu_helper.c
> index 7548d01777..4a0cedd9e2 100644
> --- a/target/sparc/mmu_helper.c
> +++ b/target/sparc/mmu_helper.c
> @@ -21,6 +21,7 @@
> #include "qemu/log.h"
> #include "cpu.h"
> #include "exec/cputlb.h"
> +#include "exec/cpu-mmu-index.h"
> #include "exec/page-protection.h"
> #include "qemu/qemu-print.h"
> #include "trace.h"
> diff --git a/target/tricore/helper.c b/target/tricore/helper.c
> index a64412e6bd..be3d97af78 100644
> --- a/target/tricore/helper.c
> +++ b/target/tricore/helper.c
> @@ -20,6 +20,7 @@
> #include "hw/registerfields.h"
> #include "cpu.h"
> #include "exec/cputlb.h"
> +#include "exec/cpu-mmu-index.h"
> #include "exec/page-protection.h"
> #include "fpu/softfloat-helpers.h"
> #include "qemu/qemu-print.h"
> diff --git a/target/xtensa/mmu_helper.c b/target/xtensa/mmu_helper.c
> index 63be741a42..96140c89c7 100644
> --- a/target/xtensa/mmu_helper.c
> +++ b/target/xtensa/mmu_helper.c
> @@ -33,6 +33,7 @@
> #include "exec/helper-proto.h"
> #include "qemu/host-utils.h"
> #include "exec/cputlb.h"
> +#include "exec/cpu-mmu-index.h"
> #include "exec/exec-all.h"
> #include "exec/page-protection.h"
>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
^ permalink raw reply [flat|nested] 90+ messages in thread
* Re: [PATCH v2 11/42] accel/tcg: Perform aligned atomic reads in translator_ld
2025-03-18 21:31 ` [PATCH v2 11/42] accel/tcg: Perform aligned atomic reads in translator_ld Richard Henderson
@ 2025-03-19 0:05 ` Alistair Francis
2025-03-19 0:15 ` Pierrick Bouvier
` (2 subsequent siblings)
3 siblings, 0 replies; 90+ messages in thread
From: Alistair Francis @ 2025-03-19 0:05 UTC (permalink / raw)
To: Richard Henderson; +Cc: qemu-devel, pierrick.bouvier, philmd
On Wed, Mar 19, 2025 at 7:36 AM Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> Perform aligned atomic reads in translator_ld, if possible.
> According to
>
> https://lore.kernel.org/qemu-devel/20240607101403.1109-1-jim.shu@sifive.com/
>
> this is required for RISC-V Ziccif.
Thanks Richard!!
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> accel/tcg/translator.c | 42 ++++++++++++++++++++++++++++++++++++++----
> 1 file changed, 38 insertions(+), 4 deletions(-)
>
> diff --git a/accel/tcg/translator.c b/accel/tcg/translator.c
> index ef1538b4fc..157be33bf6 100644
> --- a/accel/tcg/translator.c
> +++ b/accel/tcg/translator.c
> @@ -265,12 +265,14 @@ static bool translator_ld(CPUArchState *env, DisasContextBase *db,
>
> if (likely(((base ^ last) & TARGET_PAGE_MASK) == 0)) {
> /* Entire read is from the first page. */
> - memcpy(dest, host + (pc - base), len);
> - return true;
> + goto do_read;
> }
>
> if (unlikely(((base ^ pc) & TARGET_PAGE_MASK) == 0)) {
> - /* Read begins on the first page and extends to the second. */
> + /*
> + * Read begins on the first page and extends to the second.
> + * The unaligned read is never atomic.
> + */
> size_t len0 = -(pc | TARGET_PAGE_MASK);
> memcpy(dest, host + (pc - base), len0);
> pc += len0;
> @@ -329,7 +331,39 @@ static bool translator_ld(CPUArchState *env, DisasContextBase *db,
> host = db->host_addr[1];
> }
>
> - memcpy(dest, host + (pc - base), len);
> + do_read:
> + /*
> + * Assume aligned reads should be atomic, if possible.
> + * We're not in a position to jump out with EXCP_ATOMIC.
> + */
> + host += pc - base;
> + switch (len) {
> + case 2:
> + if (QEMU_IS_ALIGNED(pc, 2)) {
> + uint16_t t = qatomic_read((uint16_t *)host);
> + stw_he_p(dest, t);
> + return true;
> + }
> + break;
> + case 4:
> + if (QEMU_IS_ALIGNED(pc, 4)) {
> + uint32_t t = qatomic_read((uint32_t *)host);
> + stl_he_p(dest, t);
> + return true;
> + }
> + break;
> +#ifdef CONFIG_ATOMIC64
> + case 8:
> + if (QEMU_IS_ALIGNED(pc, 8)) {
> + uint64_t t = qatomic_read__nocheck((uint64_t *)host);
> + stq_he_p(dest, t);
> + return true;
> + }
> + break;
> +#endif
> + }
> + /* Unaligned or partial read from the second page is not atomic. */
> + memcpy(dest, host, len);
> return true;
> }
>
> --
> 2.43.0
>
>
^ permalink raw reply [flat|nested] 90+ messages in thread
* Re: [PATCH v2 11/42] accel/tcg: Perform aligned atomic reads in translator_ld
2025-03-18 21:31 ` [PATCH v2 11/42] accel/tcg: Perform aligned atomic reads in translator_ld Richard Henderson
2025-03-19 0:05 ` Alistair Francis
@ 2025-03-19 0:15 ` Pierrick Bouvier
2025-03-19 1:28 ` Richard Henderson
2025-03-19 17:18 ` Pierrick Bouvier
2025-04-01 6:18 ` Philippe Mathieu-Daudé
3 siblings, 1 reply; 90+ messages in thread
From: Pierrick Bouvier @ 2025-03-19 0:15 UTC (permalink / raw)
To: Richard Henderson, qemu-devel; +Cc: philmd
On 3/18/25 14:31, Richard Henderson wrote:
> Perform aligned atomic reads in translator_ld, if possible.
> According to
>
> https://lore.kernel.org/qemu-devel/20240607101403.1109-1-jim.shu@sifive.com/
>
> this is required for RISC-V Ziccif.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> accel/tcg/translator.c | 42 ++++++++++++++++++++++++++++++++++++++----
> 1 file changed, 38 insertions(+), 4 deletions(-)
>
> diff --git a/accel/tcg/translator.c b/accel/tcg/translator.c
> index ef1538b4fc..157be33bf6 100644
> --- a/accel/tcg/translator.c
> +++ b/accel/tcg/translator.c
> @@ -265,12 +265,14 @@ static bool translator_ld(CPUArchState *env, DisasContextBase *db,
>
> if (likely(((base ^ last) & TARGET_PAGE_MASK) == 0)) {
> /* Entire read is from the first page. */
> - memcpy(dest, host + (pc - base), len);
> - return true;
> + goto do_read;
> }
>
> if (unlikely(((base ^ pc) & TARGET_PAGE_MASK) == 0)) {
> - /* Read begins on the first page and extends to the second. */
> + /*
> + * Read begins on the first page and extends to the second.
> + * The unaligned read is never atomic.
> + */
> size_t len0 = -(pc | TARGET_PAGE_MASK);
> memcpy(dest, host + (pc - base), len0);
> pc += len0;
> @@ -329,7 +331,39 @@ static bool translator_ld(CPUArchState *env, DisasContextBase *db,
> host = db->host_addr[1];
> }
>
> - memcpy(dest, host + (pc - base), len);
> + do_read:
> + /*
> + * Assume aligned reads should be atomic, if possible.
> + * We're not in a position to jump out with EXCP_ATOMIC.
> + */
> + host += pc - base;
> + switch (len) {
Should we have a case for:
case 1:
uint8_t t = *(uint8_t *)host;
stb_he_p(dest, t);
return true;
To skip the memcpy for a single byte?
> + case 2:
> + if (QEMU_IS_ALIGNED(pc, 2)) {
> + uint16_t t = qatomic_read((uint16_t *)host);
> + stw_he_p(dest, t);
> + return true;
> + }
> + break;
> + case 4:
> + if (QEMU_IS_ALIGNED(pc, 4)) {
> + uint32_t t = qatomic_read((uint32_t *)host);
> + stl_he_p(dest, t);
> + return true;
> + }
> + break;
> +#ifdef CONFIG_ATOMIC64
> + case 8:
> + if (QEMU_IS_ALIGNED(pc, 8)) {
> + uint64_t t = qatomic_read__nocheck((uint64_t *)host);
> + stq_he_p(dest, t);
> + return true;
> + }
> + break;
> +#endif
> + }
> + /* Unaligned or partial read from the second page is not atomic. */
> + memcpy(dest, host, len);
> return true;
> }
>
^ permalink raw reply [flat|nested] 90+ messages in thread
* Re: [PATCH v2 12/42] accel/tcg: Use cpu_ld*_code_mmu in translator.c
2025-03-18 21:31 ` [PATCH v2 12/42] accel/tcg: Use cpu_ld*_code_mmu in translator.c Richard Henderson
@ 2025-03-19 0:23 ` Pierrick Bouvier
2025-03-21 0:48 ` Richard Henderson
0 siblings, 1 reply; 90+ messages in thread
From: Pierrick Bouvier @ 2025-03-19 0:23 UTC (permalink / raw)
To: Richard Henderson, qemu-devel; +Cc: philmd
On 3/18/25 14:31, Richard Henderson wrote:
> Cache the mmu index in DisasContextBase.
> Perform the read on host endianness, which lets us
> share code with the translator_ld fast path.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> include/exec/translator.h | 1 +
> accel/tcg/translator.c | 58 ++++++++++++++++++---------------------
> 2 files changed, 28 insertions(+), 31 deletions(-)
>
> diff --git a/include/exec/translator.h b/include/exec/translator.h
> index d70942a10f..205dd85bba 100644
> --- a/include/exec/translator.h
> +++ b/include/exec/translator.h
> @@ -73,6 +73,7 @@ struct DisasContextBase {
> int max_insns;
> bool plugin_enabled;
> bool fake_insn;
> + uint8_t code_mmuidx;
> struct TCGOp *insn_start;
> void *host_addr[2];
>
> diff --git a/accel/tcg/translator.c b/accel/tcg/translator.c
> index 157be33bf6..6fd9237298 100644
> --- a/accel/tcg/translator.c
> +++ b/accel/tcg/translator.c
> @@ -11,10 +11,10 @@
> #include "qemu/log.h"
> #include "qemu/error-report.h"
> #include "exec/exec-all.h"
> +#include "exec/cpu-ldst-common.h"
> +#include "exec/cpu-mmu-index.h"
> #include "exec/translator.h"
> -#include "exec/cpu_ldst.h"
> #include "exec/plugin-gen.h"
> -#include "exec/cpu_ldst.h"
> #include "exec/tswap.h"
> #include "tcg/tcg-op-common.h"
> #include "internal-target.h"
> @@ -142,6 +142,7 @@ void translator_loop(CPUState *cpu, TranslationBlock *tb, int *max_insns,
> db->host_addr[1] = NULL;
> db->record_start = 0;
> db->record_len = 0;
> + db->code_mmuidx = cpu_mmu_index(cpu, true);
>
> ops->init_disas_context(db, cpu);
> tcg_debug_assert(db->is_jmp == DISAS_NEXT); /* no early exit */
> @@ -457,55 +458,50 @@ bool translator_st(const DisasContextBase *db, void *dest,
>
> uint8_t translator_ldub(CPUArchState *env, DisasContextBase *db, vaddr pc)
> {
> - uint8_t raw;
> + uint8_t val;
>
> - if (!translator_ld(env, db, &raw, pc, sizeof(raw))) {
> - raw = cpu_ldub_code(env, pc);
> - record_save(db, pc, &raw, sizeof(raw));
> + if (!translator_ld(env, db, &val, pc, sizeof(val))) {
> + MemOpIdx oi = make_memop_idx(MO_UB, db->code_mmuidx);
> + val = cpu_ldb_code_mmu(env, pc, oi, 0);
> + record_save(db, pc, &val, sizeof(val));
> }
> - return raw;
> + return val;
> }
>
> uint16_t translator_lduw(CPUArchState *env, DisasContextBase *db, vaddr pc)
> {
> - uint16_t raw, tgt;
> + uint16_t val;
>
> - if (translator_ld(env, db, &raw, pc, sizeof(raw))) {
> - tgt = tswap16(raw);
> - } else {
> - tgt = cpu_lduw_code(env, pc);
> - raw = tswap16(tgt);
> - record_save(db, pc, &raw, sizeof(raw));
> + if (!translator_ld(env, db, &val, pc, sizeof(val))) {
> + MemOpIdx oi = make_memop_idx(MO_UW, db->code_mmuidx);
> + val = cpu_ldw_code_mmu(env, pc, oi, 0);
> + record_save(db, pc, &val, sizeof(val));
> }
> - return tgt;
> + return tswap16(val);
> }
>
> uint32_t translator_ldl(CPUArchState *env, DisasContextBase *db, vaddr pc)
> {
> - uint32_t raw, tgt;
> + uint32_t val;
>
> - if (translator_ld(env, db, &raw, pc, sizeof(raw))) {
> - tgt = tswap32(raw);
> - } else {
> - tgt = cpu_ldl_code(env, pc);
> - raw = tswap32(tgt);
> - record_save(db, pc, &raw, sizeof(raw));
> + if (!translator_ld(env, db, &val, pc, sizeof(val))) {
> + MemOpIdx oi = make_memop_idx(MO_UL, db->code_mmuidx);
> + val = cpu_ldl_code_mmu(env, pc, oi, 0);
> + record_save(db, pc, &val, sizeof(val));
> }
> - return tgt;
> + return tswap32(val);
> }
>
> uint64_t translator_ldq(CPUArchState *env, DisasContextBase *db, vaddr pc)
> {
> - uint64_t raw, tgt;
> + uint64_t val;
>
> - if (translator_ld(env, db, &raw, pc, sizeof(raw))) {
> - tgt = tswap64(raw);
> - } else {
> - tgt = cpu_ldq_code(env, pc);
> - raw = tswap64(tgt);
> - record_save(db, pc, &raw, sizeof(raw));
> + if (!translator_ld(env, db, &val, pc, sizeof(val))) {
> + MemOpIdx oi = make_memop_idx(MO_UQ, db->code_mmuidx);
> + val = cpu_ldq_code_mmu(env, pc, oi, 0);
> + record_save(db, pc, &val, sizeof(val));
> }
> - return tgt;
> + return tswap64(val);
> }
>
> void translator_fake_ld(DisasContextBase *db, const void *data, size_t len)
If I understand correctly, cpu_ldq_code_mmu performs the tswap call we
used to before. However, we now call it again when returning the final
value, leading to tswap(tswap(val)).
Is that expected?
^ permalink raw reply [flat|nested] 90+ messages in thread
* Re: [PATCH v2 26/42] semihosting: Move user-only implementation out-of-line
2025-03-18 21:31 ` [PATCH v2 26/42] semihosting: Move user-only implementation out-of-line Richard Henderson
@ 2025-03-19 0:26 ` Pierrick Bouvier
2025-03-19 7:16 ` Philippe Mathieu-Daudé
2025-03-31 22:01 ` Pierrick Bouvier
2 siblings, 0 replies; 90+ messages in thread
From: Pierrick Bouvier @ 2025-03-19 0:26 UTC (permalink / raw)
To: Richard Henderson, qemu-devel; +Cc: philmd
On 3/18/25 14:31, Richard Henderson wrote:
> Avoid testing CONFIG_USER_ONLY in semihost.h.
> The only function that's required is semihosting_enabled.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> include/semihosting/semihost.h | 29 ++---------------------------
> semihosting/user.c | 15 +++++++++++++++
> semihosting/meson.build | 2 ++
> 3 files changed, 19 insertions(+), 27 deletions(-)
> create mode 100644 semihosting/user.c
>
> diff --git a/include/semihosting/semihost.h b/include/semihosting/semihost.h
> index 97d2a2ba99..b03e637578 100644
> --- a/include/semihosting/semihost.h
> +++ b/include/semihosting/semihost.h
> @@ -26,32 +26,6 @@ typedef enum SemihostingTarget {
> SEMIHOSTING_TARGET_GDB
> } SemihostingTarget;
>
> -#ifdef CONFIG_USER_ONLY
> -static inline bool semihosting_enabled(bool is_user)
> -{
> - return true;
> -}
> -
> -static inline SemihostingTarget semihosting_get_target(void)
> -{
> - return SEMIHOSTING_TARGET_AUTO;
> -}
> -
> -static inline const char *semihosting_get_arg(int i)
> -{
> - return NULL;
> -}
> -
> -static inline int semihosting_get_argc(void)
> -{
> - return 0;
> -}
> -
> -static inline const char *semihosting_get_cmdline(void)
> -{
> - return NULL;
> -}
> -#else /* !CONFIG_USER_ONLY */
> /**
> * semihosting_enabled:
> * @is_user: true if guest code is in usermode (i.e. not privileged)
> @@ -59,17 +33,18 @@ static inline const char *semihosting_get_cmdline(void)
> * Return true if guest code is allowed to make semihosting calls.
> */
> bool semihosting_enabled(bool is_user);
> +
> SemihostingTarget semihosting_get_target(void);
> const char *semihosting_get_arg(int i);
> int semihosting_get_argc(void);
> const char *semihosting_get_cmdline(void);
> void semihosting_arg_fallback(const char *file, const char *cmd);
> +
> /* for vl.c hooks */
> void qemu_semihosting_enable(void);
> int qemu_semihosting_config_options(const char *optstr);
> void qemu_semihosting_chardev_init(void);
> void qemu_semihosting_console_init(Chardev *);
> -#endif /* CONFIG_USER_ONLY */
> void qemu_semihosting_guestfd_init(void);
>
> #endif /* SEMIHOST_H */
> diff --git a/semihosting/user.c b/semihosting/user.c
> new file mode 100644
> index 0000000000..9473729beb
> --- /dev/null
> +++ b/semihosting/user.c
> @@ -0,0 +1,15 @@
> +/*
> + * Semihosting for user emulation
> + *
> + * Copyright (c) 2019 Linaro Ltd
> + *
> + * SPDX-License-Identifier: GPL-2.0-or-later
> + */
> +
> +#include "qemu/osdep.h"
> +#include "semihosting/semihost.h"
> +
> +bool semihosting_enabled(bool is_user)
> +{
> + return true;
> +}
> diff --git a/semihosting/meson.build b/semihosting/meson.build
> index 86f5004bed..ab67f87e4f 100644
> --- a/semihosting/meson.build
> +++ b/semihosting/meson.build
> @@ -15,5 +15,7 @@ system_ss.add(when: ['CONFIG_SEMIHOSTING'], if_true: files(
> 'stubs-system.c',
> ))
>
> +user_ss.add(when: 'CONFIG_SEMIHOSTING', if_true: files('user.c'))
> +
> specific_ss.add(when: ['CONFIG_ARM_COMPATIBLE_SEMIHOSTING'],
> if_true: files('arm-compat-semi.c'))
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
^ permalink raw reply [flat|nested] 90+ messages in thread
* Re: [PATCH v2 27/42] target/mips: Restrict semihosting tests to system mode
2025-03-18 21:31 ` [PATCH v2 27/42] target/mips: Restrict semihosting tests to system mode Richard Henderson
@ 2025-03-19 0:26 ` Pierrick Bouvier
0 siblings, 0 replies; 90+ messages in thread
From: Pierrick Bouvier @ 2025-03-19 0:26 UTC (permalink / raw)
To: Richard Henderson, qemu-devel; +Cc: philmd
On 3/18/25 14:31, Richard Henderson wrote:
> We do not set CONFIG_SEMIHOSTING in
> configs/targets/mips*-linux-user.mak.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> target/mips/cpu.c | 7 ++++---
> 1 file changed, 4 insertions(+), 3 deletions(-)
>
> diff --git a/target/mips/cpu.c b/target/mips/cpu.c
> index b207106dd7..47df563e12 100644
> --- a/target/mips/cpu.c
> +++ b/target/mips/cpu.c
> @@ -32,8 +32,10 @@
> #include "exec/exec-all.h"
> #include "hw/qdev-properties.h"
> #include "hw/qdev-clock.h"
> -#include "semihosting/semihost.h"
> #include "fpu_helper.h"
> +#ifndef CONFIG_USER_ONLY
> +#include "semihosting/semihost.h"
> +#endif
>
> const char regnames[32][3] = {
> "r0", "at", "v0", "v1", "a0", "a1", "a2", "a3",
> @@ -415,12 +417,11 @@ static void mips_cpu_reset_hold(Object *obj, ResetType type)
> restore_pamask(env);
> cs->exception_index = EXCP_NONE;
>
> +#ifndef CONFIG_USER_ONLY
> if (semihosting_get_argc()) {
> /* UHI interface can be used to obtain argc and argv */
> env->active_tc.gpr[4] = -1;
> }
> -
> -#ifndef CONFIG_USER_ONLY
> if (kvm_enabled()) {
> kvm_mips_reset_vcpu(cpu);
> }
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
^ permalink raw reply [flat|nested] 90+ messages in thread
* Re: [PATCH v2 28/42] target/xtensa: Restrict semihosting tests to system mode
2025-03-18 21:31 ` [PATCH v2 28/42] target/xtensa: " Richard Henderson
@ 2025-03-19 0:27 ` Pierrick Bouvier
0 siblings, 0 replies; 90+ messages in thread
From: Pierrick Bouvier @ 2025-03-19 0:27 UTC (permalink / raw)
To: Richard Henderson, qemu-devel; +Cc: philmd
On 3/18/25 14:31, Richard Henderson wrote:
> We do not set CONFIG_SEMIHOSTING in
> configs/targets/xtensa*-linux-user.mak.
>
> Do not raise SIGILL for user-only unconditionally.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> target/xtensa/translate.c | 24 +++++++++++-------------
> 1 file changed, 11 insertions(+), 13 deletions(-)
>
> diff --git a/target/xtensa/translate.c b/target/xtensa/translate.c
> index 4f02cefde3..cb817b3119 100644
> --- a/target/xtensa/translate.c
> +++ b/target/xtensa/translate.c
> @@ -35,14 +35,14 @@
> #include "tcg/tcg-op.h"
> #include "qemu/log.h"
> #include "qemu/qemu-print.h"
> -#include "semihosting/semihost.h"
> #include "exec/translator.h"
> #include "exec/translation-block.h"
> -
> #include "exec/helper-proto.h"
> #include "exec/helper-gen.h"
> -
> #include "exec/log.h"
> +#ifndef CONFIG_USER_ONLY
> +#include "semihosting/semihost.h"
> +#endif
>
> #define HELPER_H "helper.h"
> #include "exec/helper-info.c.inc"
> @@ -2241,17 +2241,15 @@ static uint32_t test_exceptions_simcall(DisasContext *dc,
> const OpcodeArg arg[],
> const uint32_t par[])
> {
> - bool is_semi = semihosting_enabled(dc->cring != 0);
> -#ifdef CONFIG_USER_ONLY
> - bool ill = true;
> -#else
> - /* Between RE.2 and RE.3 simcall opcode's become nop for the hardware. */
> - bool ill = dc->config->hw_version <= 250002 && !is_semi;
> -#endif
> - if (ill || !is_semi) {
> - qemu_log_mask(LOG_GUEST_ERROR, "SIMCALL but semihosting is disabled\n");
> +#ifndef CONFIG_USER_ONLY
> + if (semihosting_enabled(dc->cring != 0)) {
> + return 0;
> }
> - return ill ? XTENSA_OP_ILL : 0;
> +#endif
> + qemu_log_mask(LOG_GUEST_ERROR, "SIMCALL but semihosting is disabled\n");
> +
> + /* Between RE.2 and RE.3 simcall opcode's become nop for the hardware. */
> + return dc->config->hw_version <= 250002 ? XTENSA_OP_ILL : 0;
> }
>
> static void translate_simcall(DisasContext *dc, const OpcodeArg arg[],
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
^ permalink raw reply [flat|nested] 90+ messages in thread
* Re: [PATCH v2 29/42] include/exec: Split out watchpoint.h
2025-03-18 21:31 ` [PATCH v2 29/42] include/exec: Split out watchpoint.h Richard Henderson
@ 2025-03-19 0:30 ` Pierrick Bouvier
2025-03-19 1:33 ` Richard Henderson
0 siblings, 1 reply; 90+ messages in thread
From: Pierrick Bouvier @ 2025-03-19 0:30 UTC (permalink / raw)
To: Richard Henderson, qemu-devel; +Cc: philmd
On 3/18/25 14:31, Richard Henderson wrote:
> Relatively few objects in qemu care about watchpoints, so split
> out to a new header. Removes an instance of CONFIG_USER_ONLY
> from hw/core/cpu.h.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> include/exec/watchpoint.h | 41 +++++++++++++++++++++++++++++
> include/hw/core/cpu.h | 30 ---------------------
> accel/tcg/tcg-accel-ops.c | 1 +
> system/watchpoint.c | 1 +
> target/arm/debug_helper.c | 1 +
> target/i386/cpu.c | 1 +
> target/i386/machine.c | 2 +-
> target/i386/tcg/system/bpt_helper.c | 1 +
> target/ppc/cpu.c | 1 +
> target/ppc/cpu_init.c | 2 +-
> target/riscv/debug.c | 1 +
> target/s390x/helper.c | 1 +
> target/s390x/tcg/excp_helper.c | 1 +
> target/xtensa/dbg_helper.c | 1 +
> 14 files changed, 53 insertions(+), 32 deletions(-)
> create mode 100644 include/exec/watchpoint.h
>
> diff --git a/include/exec/watchpoint.h b/include/exec/watchpoint.h
> new file mode 100644
> index 0000000000..4b6668826c
> --- /dev/null
> +++ b/include/exec/watchpoint.h
> @@ -0,0 +1,41 @@
> +/*
> + * CPU watchpoints
> + *
> + * Copyright (c) 2012 SUSE LINUX Products GmbH
> + * SPDX-License-Identifier: LGPL-2.1-or-later
> + */
> +
> +#ifndef EXEC_WATCHPOINT_H
> +#define EXEC_WATCHPOINT_H
> +
> +#if defined(CONFIG_USER_ONLY)
> +static inline int cpu_watchpoint_insert(CPUState *cpu, vaddr addr, vaddr len,
> + int flags, CPUWatchpoint **watchpoint)
> +{
> + return -ENOSYS;
> +}
> +
> +static inline int cpu_watchpoint_remove(CPUState *cpu, vaddr addr,
> + vaddr len, int flags)
> +{
> + return -ENOSYS;
> +}
> +
> +static inline void cpu_watchpoint_remove_by_ref(CPUState *cpu,
> + CPUWatchpoint *wp)
> +{
> +}
> +
> +static inline void cpu_watchpoint_remove_all(CPUState *cpu, int mask)
> +{
> +}
> +#else
> +int cpu_watchpoint_insert(CPUState *cpu, vaddr addr, vaddr len,
> + int flags, CPUWatchpoint **watchpoint);
> +int cpu_watchpoint_remove(CPUState *cpu, vaddr addr,
> + vaddr len, int flags);
> +void cpu_watchpoint_remove_by_ref(CPUState *cpu, CPUWatchpoint *watchpoint);
> +void cpu_watchpoint_remove_all(CPUState *cpu, int mask);
> +#endif
> +
> +#endif /* EXEC_WATCHPOINT_H */
> diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h
> index 5d11d26556..d1c1fefea3 100644
> --- a/include/hw/core/cpu.h
> +++ b/include/hw/core/cpu.h
> @@ -1109,36 +1109,6 @@ static inline bool cpu_breakpoint_test(CPUState *cpu, vaddr pc, int mask)
> return false;
> }
>
> -#if defined(CONFIG_USER_ONLY)
> -static inline int cpu_watchpoint_insert(CPUState *cpu, vaddr addr, vaddr len,
> - int flags, CPUWatchpoint **watchpoint)
> -{
> - return -ENOSYS;
> -}
> -
> -static inline int cpu_watchpoint_remove(CPUState *cpu, vaddr addr,
> - vaddr len, int flags)
> -{
> - return -ENOSYS;
> -}
> -
> -static inline void cpu_watchpoint_remove_by_ref(CPUState *cpu,
> - CPUWatchpoint *wp)
> -{
> -}
> -
> -static inline void cpu_watchpoint_remove_all(CPUState *cpu, int mask)
> -{
> -}
> -#else
> -int cpu_watchpoint_insert(CPUState *cpu, vaddr addr, vaddr len,
> - int flags, CPUWatchpoint **watchpoint);
> -int cpu_watchpoint_remove(CPUState *cpu, vaddr addr,
> - vaddr len, int flags);
> -void cpu_watchpoint_remove_by_ref(CPUState *cpu, CPUWatchpoint *watchpoint);
> -void cpu_watchpoint_remove_all(CPUState *cpu, int mask);
> -#endif
> -
> /**
> * cpu_get_address_space:
> * @cpu: CPU to get address space from
> diff --git a/accel/tcg/tcg-accel-ops.c b/accel/tcg/tcg-accel-ops.c
> index d9b662efe3..5c88056157 100644
> --- a/accel/tcg/tcg-accel-ops.c
> +++ b/accel/tcg/tcg-accel-ops.c
> @@ -37,6 +37,7 @@
> #include "exec/hwaddr.h"
> #include "exec/tb-flush.h"
> #include "exec/translation-block.h"
> +#include "exec/watchpoint.h"
> #include "gdbstub/enums.h"
>
> #include "hw/core/cpu.h"
> diff --git a/system/watchpoint.c b/system/watchpoint.c
> index 08dbd8483d..21d0bb36ca 100644
> --- a/system/watchpoint.c
> +++ b/system/watchpoint.c
> @@ -21,6 +21,7 @@
> #include "qemu/error-report.h"
> #include "exec/cputlb.h"
> #include "exec/target_page.h"
> +#include "exec/watchpoint.h"
> #include "hw/core/cpu.h"
>
> /* Add a watchpoint. */
> diff --git a/target/arm/debug_helper.c b/target/arm/debug_helper.c
> index a9a619ba6b..473ee2af38 100644
> --- a/target/arm/debug_helper.c
> +++ b/target/arm/debug_helper.c
> @@ -13,6 +13,7 @@
> #include "cpregs.h"
> #include "exec/exec-all.h"
> #include "exec/helper-proto.h"
> +#include "exec/watchpoint.h"
> #include "system/tcg.h"
>
> #ifdef CONFIG_TCG
> diff --git a/target/i386/cpu.c b/target/i386/cpu.c
> index dba1b3ffef..af46c7a392 100644
> --- a/target/i386/cpu.c
> +++ b/target/i386/cpu.c
> @@ -35,6 +35,7 @@
> #include "standard-headers/asm-x86/kvm_para.h"
> #include "hw/qdev-properties.h"
> #include "hw/i386/topology.h"
> +#include "exec/watchpoint.h"
> #ifndef CONFIG_USER_ONLY
> #include "system/reset.h"
> #include "qapi/qapi-commands-machine-target.h"
> diff --git a/target/i386/machine.c b/target/i386/machine.c
> index 70f632a36f..6cb561c632 100644
> --- a/target/i386/machine.c
> +++ b/target/i386/machine.c
> @@ -7,7 +7,7 @@
> #include "hw/i386/x86.h"
> #include "kvm/kvm_i386.h"
> #include "hw/xen/xen.h"
> -
> +#include "exec/watchpoint.h"
> #include "system/kvm.h"
> #include "system/kvm_xen.h"
> #include "system/tcg.h"
> diff --git a/target/i386/tcg/system/bpt_helper.c b/target/i386/tcg/system/bpt_helper.c
> index be232c1ca9..08ccd3f5e6 100644
> --- a/target/i386/tcg/system/bpt_helper.c
> +++ b/target/i386/tcg/system/bpt_helper.c
> @@ -21,6 +21,7 @@
> #include "cpu.h"
> #include "exec/exec-all.h"
> #include "exec/helper-proto.h"
> +#include "exec/watchpoint.h"
> #include "tcg/helper-tcg.h"
>
>
> diff --git a/target/ppc/cpu.c b/target/ppc/cpu.c
> index bfcc695de7..4d8faaddee 100644
> --- a/target/ppc/cpu.c
> +++ b/target/ppc/cpu.c
> @@ -22,6 +22,7 @@
> #include "cpu-models.h"
> #include "cpu-qom.h"
> #include "exec/log.h"
> +#include "exec/watchpoint.h"
> #include "fpu/softfloat-helpers.h"
> #include "mmu-hash64.h"
> #include "helper_regs.h"
> diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c
> index 8b590e7f17..7394ffc557 100644
> --- a/target/ppc/cpu_init.c
> +++ b/target/ppc/cpu_init.c
> @@ -40,7 +40,7 @@
> #include "qemu/cutils.h"
> #include "disas/capstone.h"
> #include "fpu/softfloat.h"
> -
> +#include "exec/watchpoint.h"
> #include "helper_regs.h"
> #include "internal.h"
> #include "spr_common.h"
> diff --git a/target/riscv/debug.c b/target/riscv/debug.c
> index 9db4048523..fea989afe9 100644
> --- a/target/riscv/debug.c
> +++ b/target/riscv/debug.c
> @@ -30,6 +30,7 @@
> #include "trace.h"
> #include "exec/exec-all.h"
> #include "exec/helper-proto.h"
> +#include "exec/watchpoint.h"
> #include "system/cpu-timers.h"
>
> /*
> diff --git a/target/s390x/helper.c b/target/s390x/helper.c
> index c689e11b46..e660c69f60 100644
> --- a/target/s390x/helper.c
> +++ b/target/s390x/helper.c
> @@ -27,6 +27,7 @@
> #include "target/s390x/kvm/pv.h"
> #include "system/hw_accel.h"
> #include "system/runstate.h"
> +#include "exec/watchpoint.h"
>
> void s390x_tod_timer(void *opaque)
> {
> diff --git a/target/s390x/tcg/excp_helper.c b/target/s390x/tcg/excp_helper.c
> index ac733f407f..1d51043e88 100644
> --- a/target/s390x/tcg/excp_helper.c
> +++ b/target/s390x/tcg/excp_helper.c
> @@ -24,6 +24,7 @@
> #include "exec/helper-proto.h"
> #include "exec/cputlb.h"
> #include "exec/exec-all.h"
> +#include "exec/watchpoint.h"
> #include "s390x-internal.h"
> #include "tcg_s390x.h"
> #ifndef CONFIG_USER_ONLY
> diff --git a/target/xtensa/dbg_helper.c b/target/xtensa/dbg_helper.c
> index 163a1ffc7b..c4f4298a50 100644
> --- a/target/xtensa/dbg_helper.c
> +++ b/target/xtensa/dbg_helper.c
> @@ -31,6 +31,7 @@
> #include "exec/helper-proto.h"
> #include "qemu/host-utils.h"
> #include "exec/exec-all.h"
> +#include "exec/watchpoint.h"
> #include "system/address-spaces.h"
>
> void HELPER(wsr_ibreakenable)(CPUXtensaState *env, uint32_t v)
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
To push further, it could be worth to remove inline stubs, put
definitions in common-user/watchpoint.c, and add this file to user_ss.
^ permalink raw reply [flat|nested] 90+ messages in thread
* Re: [PATCH v2 31/42] system: Move most files to libsystem_ss
2025-03-18 21:31 ` [PATCH v2 31/42] system: Move most files to libsystem_ss Richard Henderson
@ 2025-03-19 0:32 ` Pierrick Bouvier
2025-03-19 7:18 ` Philippe Mathieu-Daudé
1 sibling, 0 replies; 90+ messages in thread
From: Pierrick Bouvier @ 2025-03-19 0:32 UTC (permalink / raw)
To: Richard Henderson, qemu-devel; +Cc: philmd
On 3/18/25 14:31, Richard Henderson wrote:
> Some of the headers used require CONFIG_USER_ONLY.
> Do not move vl.c, because it has other include dependencies
> that are present in system_ss.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> system/meson.build | 7 +++++--
> 1 file changed, 5 insertions(+), 2 deletions(-)
>
> diff --git a/system/meson.build b/system/meson.build
> index 063301c3ad..c2f0082766 100644
> --- a/system/meson.build
> +++ b/system/meson.build
> @@ -4,6 +4,10 @@ specific_ss.add(when: 'CONFIG_SYSTEM_ONLY', if_true: [files(
> )])
>
> system_ss.add(files(
> + 'vl.c',
> +), sdl, libpmem, libdaxctl)
> +
> +libsystem_ss.add(files(
> 'balloon.c',
> 'bootdevice.c',
> 'cpus.c',
> @@ -23,9 +27,8 @@ system_ss.add(files(
> 'runstate-hmp-cmds.c',
> 'runstate.c',
> 'tpm-hmp-cmds.c',
> - 'vl.c',
> 'watchpoint.c',
> -), sdl, libpmem, libdaxctl)
> +))
>
> if have_tpm
> system_ss.add(files('tpm.c'))
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
^ permalink raw reply [flat|nested] 90+ messages in thread
* Re: [PATCH v2 32/42] plugins: Move api.c, core.c to libuser_ss, libsystem_ss
2025-03-18 21:31 ` [PATCH v2 32/42] plugins: Move api.c, core.c to libuser_ss, libsystem_ss Richard Henderson
@ 2025-03-19 0:32 ` Pierrick Bouvier
0 siblings, 0 replies; 90+ messages in thread
From: Pierrick Bouvier @ 2025-03-19 0:32 UTC (permalink / raw)
To: Richard Henderson, qemu-devel; +Cc: philmd
On 3/18/25 14:31, Richard Henderson wrote:
> Headers used by these files require CONFIG_USER_ONLY.
>
> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> plugins/meson.build | 5 ++++-
> 1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/plugins/meson.build b/plugins/meson.build
> index 3be8245a69..5383c7b88b 100644
> --- a/plugins/meson.build
> +++ b/plugins/meson.build
> @@ -61,5 +61,8 @@ endif
> user_ss.add(files('user.c', 'api-user.c'))
> system_ss.add(files('system.c', 'api-system.c'))
>
> -common_ss.add(files('loader.c', 'api.c', 'core.c'))
> +libuser_ss.add(files('api.c', 'core.c'))
> +libsystem_ss.add(files('api.c', 'core.c'))
> +
> +common_ss.add(files('loader.c'))
>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
^ permalink raw reply [flat|nested] 90+ messages in thread
* Re: [PATCH v2 35/42] include/hw/intc: Remove ifndef CONFIG_USER_ONLY from armv7m_nvic.h
2025-03-18 21:32 ` [PATCH v2 35/42] include/hw/intc: Remove ifndef CONFIG_USER_ONLY from armv7m_nvic.h Richard Henderson
@ 2025-03-19 0:33 ` Pierrick Bouvier
0 siblings, 0 replies; 90+ messages in thread
From: Pierrick Bouvier @ 2025-03-19 0:33 UTC (permalink / raw)
To: Richard Henderson, qemu-devel; +Cc: philmd
On 3/18/25 14:32, Richard Henderson wrote:
> We were hiding a number of declarations from user-only,
> although it hurts nothing to allow them. The inlines
> for user-only are unused.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> include/hw/intc/armv7m_nvic.h | 14 --------------
> 1 file changed, 14 deletions(-)
>
> diff --git a/include/hw/intc/armv7m_nvic.h b/include/hw/intc/armv7m_nvic.h
> index 89fe8aedaa..7b9964fe7e 100644
> --- a/include/hw/intc/armv7m_nvic.h
> +++ b/include/hw/intc/armv7m_nvic.h
> @@ -189,21 +189,7 @@ int armv7m_nvic_raw_execution_priority(NVICState *s);
> * @secure: the security state to test
> * This corresponds to the pseudocode IsReqExecPriNeg().
> */
> -#ifndef CONFIG_USER_ONLY
> bool armv7m_nvic_neg_prio_requested(NVICState *s, bool secure);
> -#else
> -static inline bool armv7m_nvic_neg_prio_requested(NVICState *s, bool secure)
> -{
> - return false;
> -}
> -#endif
> -#ifndef CONFIG_USER_ONLY
> bool armv7m_nvic_can_take_pending_exception(NVICState *s);
> -#else
> -static inline bool armv7m_nvic_can_take_pending_exception(NVICState *s)
> -{
> - return true;
> -}
> -#endif
>
> #endif
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
^ permalink raw reply [flat|nested] 90+ messages in thread
* Re: [PATCH v2 37/42] include/exec: Split out icount.h
2025-03-18 21:32 ` [PATCH v2 37/42] include/exec: Split out icount.h Richard Henderson
@ 2025-03-19 0:33 ` Pierrick Bouvier
2025-03-19 7:21 ` Philippe Mathieu-Daudé
0 siblings, 1 reply; 90+ messages in thread
From: Pierrick Bouvier @ 2025-03-19 0:33 UTC (permalink / raw)
To: Richard Henderson, qemu-devel; +Cc: philmd
On 3/18/25 14:32, Richard Henderson wrote:
> Split icount stuff from system/cpu-timers.h.
> There are 17 files which only require icount.h, 7 that only
> require cpu-timers.h, and 7 that require both.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> include/exec/icount.h | 68 ++++++++++++++++++++++++++++++++
> include/system/cpu-timers.h | 58 ---------------------------
> accel/tcg/cpu-exec.c | 2 +-
> accel/tcg/icount-common.c | 2 +-
> accel/tcg/monitor.c | 1 +
> accel/tcg/tcg-accel-ops-icount.c | 2 +-
> accel/tcg/tcg-accel-ops-mttcg.c | 2 +-
> accel/tcg/tcg-accel-ops-rr.c | 2 +-
> accel/tcg/tcg-accel-ops.c | 2 +-
> accel/tcg/tcg-all.c | 2 +-
> accel/tcg/translate-all.c | 2 +-
> hw/core/ptimer.c | 2 +-
> replay/replay.c | 2 +-
> stubs/icount.c | 2 +-
> system/cpu-timers.c | 1 +
> system/dma-helpers.c | 2 +-
> system/vl.c | 1 +
> target/arm/helper.c | 1 +
> target/riscv/cpu_helper.c | 2 +-
> target/riscv/csr.c | 2 +-
> target/riscv/debug.c | 1 +
> target/riscv/machine.c | 2 +-
> target/riscv/pmu.c | 2 +-
> util/async.c | 2 +-
> util/main-loop.c | 1 +
> util/qemu-timer.c | 1 +
> 26 files changed, 92 insertions(+), 75 deletions(-)
> create mode 100644 include/exec/icount.h
>
> diff --git a/include/exec/icount.h b/include/exec/icount.h
> new file mode 100644
> index 0000000000..4964987ae4
> --- /dev/null
> +++ b/include/exec/icount.h
> @@ -0,0 +1,68 @@
> +/*
> + * icount - Instruction Counter API
> + * CPU timers state API
> + *
> + * Copyright 2020 SUSE LLC
> + * SPDX-License-Identifier: GPL-2.0-or-later
> + */
> +
> +#ifndef EXEC_ICOUNT_H
> +#define EXEC_ICOUNT_H
> +
> +/**
> + * ICountMode: icount enablement state:
> + *
> + * @ICOUNT_DISABLED: Disabled - Do not count executed instructions.
> + * @ICOUNT_PRECISE: Enabled - Fixed conversion of insn to ns via "shift" option
> + * @ICOUNT_ADAPTATIVE: Enabled - Runtime adaptive algorithm to compute shift
> + */
> +typedef enum {
> + ICOUNT_DISABLED = 0,
> + ICOUNT_PRECISE,
> + ICOUNT_ADAPTATIVE,
> +} ICountMode;
> +
> +#if defined(CONFIG_TCG) && !defined(CONFIG_USER_ONLY)
> +extern ICountMode use_icount;
> +#define icount_enabled() (use_icount)
> +#else
> +#define icount_enabled() ICOUNT_DISABLED
> +#endif
> +
> +/*
> + * Update the icount with the executed instructions. Called by
> + * cpus-tcg vCPU thread so the main-loop can see time has moved forward.
> + */
> +void icount_update(CPUState *cpu);
> +
> +/* get raw icount value */
> +int64_t icount_get_raw(void);
> +
> +/* return the virtual CPU time in ns, based on the instruction counter. */
> +int64_t icount_get(void);
> +/*
> + * convert an instruction counter value to ns, based on the icount shift.
> + * This shift is set as a fixed value with the icount "shift" option
> + * (precise mode), or it is constantly approximated and corrected at
> + * runtime in adaptive mode.
> + */
> +int64_t icount_to_ns(int64_t icount);
> +
> +/**
> + * icount_configure: configure the icount options, including "shift"
> + * @opts: Options to parse
> + * @errp: pointer to a NULL-initialized error object
> + *
> + * Return: true on success, else false setting @errp with error
> + */
> +bool icount_configure(QemuOpts *opts, Error **errp);
> +
> +/* used by tcg vcpu thread to calc icount budget */
> +int64_t icount_round(int64_t count);
> +
> +/* if the CPUs are idle, start accounting real time to virtual clock. */
> +void icount_start_warp_timer(void);
> +void icount_account_warp_timer(void);
> +void icount_notify_exit(void);
> +
> +#endif /* EXEC_ICOUNT_H */
> diff --git a/include/system/cpu-timers.h b/include/system/cpu-timers.h
> index 64ae54f6d6..a1abed0d7a 100644
> --- a/include/system/cpu-timers.h
> +++ b/include/system/cpu-timers.h
> @@ -15,64 +15,6 @@
> /* init the whole cpu timers API, including icount, ticks, and cpu_throttle */
> void cpu_timers_init(void);
>
> -/* icount - Instruction Counter API */
> -
> -/**
> - * ICountMode: icount enablement state:
> - *
> - * @ICOUNT_DISABLED: Disabled - Do not count executed instructions.
> - * @ICOUNT_PRECISE: Enabled - Fixed conversion of insn to ns via "shift" option
> - * @ICOUNT_ADAPTATIVE: Enabled - Runtime adaptive algorithm to compute shift
> - */
> -typedef enum {
> - ICOUNT_DISABLED = 0,
> - ICOUNT_PRECISE,
> - ICOUNT_ADAPTATIVE,
> -} ICountMode;
> -
> -#if defined(CONFIG_TCG) && !defined(CONFIG_USER_ONLY)
> -extern ICountMode use_icount;
> -#define icount_enabled() (use_icount)
> -#else
> -#define icount_enabled() ICOUNT_DISABLED
> -#endif
> -
> -/*
> - * Update the icount with the executed instructions. Called by
> - * cpus-tcg vCPU thread so the main-loop can see time has moved forward.
> - */
> -void icount_update(CPUState *cpu);
> -
> -/* get raw icount value */
> -int64_t icount_get_raw(void);
> -
> -/* return the virtual CPU time in ns, based on the instruction counter. */
> -int64_t icount_get(void);
> -/*
> - * convert an instruction counter value to ns, based on the icount shift.
> - * This shift is set as a fixed value with the icount "shift" option
> - * (precise mode), or it is constantly approximated and corrected at
> - * runtime in adaptive mode.
> - */
> -int64_t icount_to_ns(int64_t icount);
> -
> -/**
> - * icount_configure: configure the icount options, including "shift"
> - * @opts: Options to parse
> - * @errp: pointer to a NULL-initialized error object
> - *
> - * Return: true on success, else false setting @errp with error
> - */
> -bool icount_configure(QemuOpts *opts, Error **errp);
> -
> -/* used by tcg vcpu thread to calc icount budget */
> -int64_t icount_round(int64_t count);
> -
> -/* if the CPUs are idle, start accounting real time to virtual clock. */
> -void icount_start_warp_timer(void);
> -void icount_account_warp_timer(void);
> -void icount_notify_exit(void);
> -
> /*
> * CPU Ticks and Clock
> */
> diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c
> index 372b876604..034c2ded6b 100644
> --- a/accel/tcg/cpu-exec.c
> +++ b/accel/tcg/cpu-exec.c
> @@ -35,7 +35,7 @@
> #include "exec/log.h"
> #include "qemu/main-loop.h"
> #include "exec/cpu-all.h"
> -#include "system/cpu-timers.h"
> +#include "exec/icount.h"
> #include "exec/replay-core.h"
> #include "system/tcg.h"
> #include "exec/helper-proto-common.h"
> diff --git a/accel/tcg/icount-common.c b/accel/tcg/icount-common.c
> index 402d3e3f4e..d6471174a3 100644
> --- a/accel/tcg/icount-common.c
> +++ b/accel/tcg/icount-common.c
> @@ -35,7 +35,7 @@
> #include "system/replay.h"
> #include "system/runstate.h"
> #include "hw/core/cpu.h"
> -#include "system/cpu-timers.h"
> +#include "exec/icount.h"
> #include "system/cpu-timers-internal.h"
>
> /*
> diff --git a/accel/tcg/monitor.c b/accel/tcg/monitor.c
> index eeb38a4d9c..1c182b6bfb 100644
> --- a/accel/tcg/monitor.c
> +++ b/accel/tcg/monitor.c
> @@ -14,6 +14,7 @@
> #include "qapi/qapi-commands-machine.h"
> #include "monitor/monitor.h"
> #include "system/cpu-timers.h"
> +#include "exec/icount.h"
> #include "system/tcg.h"
> #include "tcg/tcg.h"
> #include "internal-common.h"
> diff --git a/accel/tcg/tcg-accel-ops-icount.c b/accel/tcg/tcg-accel-ops-icount.c
> index 27cf1044c7..d0f7b410fa 100644
> --- a/accel/tcg/tcg-accel-ops-icount.c
> +++ b/accel/tcg/tcg-accel-ops-icount.c
> @@ -25,7 +25,7 @@
>
> #include "qemu/osdep.h"
> #include "system/replay.h"
> -#include "system/cpu-timers.h"
> +#include "exec/icount.h"
> #include "qemu/main-loop.h"
> #include "qemu/guest-random.h"
> #include "hw/core/cpu.h"
> diff --git a/accel/tcg/tcg-accel-ops-mttcg.c b/accel/tcg/tcg-accel-ops-mttcg.c
> index bdcc385ae9..dfcee30947 100644
> --- a/accel/tcg/tcg-accel-ops-mttcg.c
> +++ b/accel/tcg/tcg-accel-ops-mttcg.c
> @@ -26,7 +26,7 @@
> #include "qemu/osdep.h"
> #include "system/tcg.h"
> #include "system/replay.h"
> -#include "system/cpu-timers.h"
> +#include "exec/icount.h"
> #include "qemu/main-loop.h"
> #include "qemu/notify.h"
> #include "qemu/guest-random.h"
> diff --git a/accel/tcg/tcg-accel-ops-rr.c b/accel/tcg/tcg-accel-ops-rr.c
> index f62cf24e1d..6eec5c9eee 100644
> --- a/accel/tcg/tcg-accel-ops-rr.c
> +++ b/accel/tcg/tcg-accel-ops-rr.c
> @@ -27,7 +27,7 @@
> #include "qemu/lockable.h"
> #include "system/tcg.h"
> #include "system/replay.h"
> -#include "system/cpu-timers.h"
> +#include "exec/icount.h"
> #include "qemu/main-loop.h"
> #include "qemu/notify.h"
> #include "qemu/guest-random.h"
> diff --git a/accel/tcg/tcg-accel-ops.c b/accel/tcg/tcg-accel-ops.c
> index 5c88056157..ccdb781eef 100644
> --- a/accel/tcg/tcg-accel-ops.c
> +++ b/accel/tcg/tcg-accel-ops.c
> @@ -29,7 +29,7 @@
> #include "system/accel-ops.h"
> #include "system/tcg.h"
> #include "system/replay.h"
> -#include "system/cpu-timers.h"
> +#include "exec/icount.h"
> #include "qemu/main-loop.h"
> #include "qemu/guest-random.h"
> #include "qemu/timer.h"
> diff --git a/accel/tcg/tcg-all.c b/accel/tcg/tcg-all.c
> index c1a30b0121..7a5b810b88 100644
> --- a/accel/tcg/tcg-all.c
> +++ b/accel/tcg/tcg-all.c
> @@ -26,7 +26,7 @@
> #include "qemu/osdep.h"
> #include "system/tcg.h"
> #include "exec/replay-core.h"
> -#include "system/cpu-timers.h"
> +#include "exec/icount.h"
> #include "tcg/startup.h"
> #include "qapi/error.h"
> #include "qemu/error-report.h"
> diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c
> index 167535bcb1..bb161ae61a 100644
> --- a/accel/tcg/translate-all.c
> +++ b/accel/tcg/translate-all.c
> @@ -55,7 +55,7 @@
> #include "qemu/cacheinfo.h"
> #include "qemu/timer.h"
> #include "exec/log.h"
> -#include "system/cpu-timers.h"
> +#include "exec/icount.h"
> #include "system/tcg.h"
> #include "qapi/error.h"
> #include "accel/tcg/cpu-ops.h"
> diff --git a/hw/core/ptimer.c b/hw/core/ptimer.c
> index 7f63d17ca1..0aeb10fb53 100644
> --- a/hw/core/ptimer.c
> +++ b/hw/core/ptimer.c
> @@ -11,7 +11,7 @@
> #include "migration/vmstate.h"
> #include "qemu/host-utils.h"
> #include "exec/replay-core.h"
> -#include "system/cpu-timers.h"
> +#include "exec/icount.h"
> #include "system/qtest.h"
> #include "block/aio.h"
> #include "hw/clock.h"
> diff --git a/replay/replay.c b/replay/replay.c
> index 3adc387b3d..a3e24c967a 100644
> --- a/replay/replay.c
> +++ b/replay/replay.c
> @@ -11,7 +11,7 @@
>
> #include "qemu/osdep.h"
> #include "qapi/error.h"
> -#include "system/cpu-timers.h"
> +#include "exec/icount.h"
> #include "system/replay.h"
> #include "system/runstate.h"
> #include "replay-internal.h"
> diff --git a/stubs/icount.c b/stubs/icount.c
> index edbf60cbfa..ceb73b4fc2 100644
> --- a/stubs/icount.c
> +++ b/stubs/icount.c
> @@ -1,6 +1,6 @@
> #include "qemu/osdep.h"
> #include "qapi/error.h"
> -#include "system/cpu-timers.h"
> +#include "exec/icount.h"
>
> /* icount - Instruction Counter API */
>
> diff --git a/system/cpu-timers.c b/system/cpu-timers.c
> index 23dd82b465..cb35fa62b8 100644
> --- a/system/cpu-timers.c
> +++ b/system/cpu-timers.c
> @@ -36,6 +36,7 @@
> #include "hw/core/cpu.h"
> #include "system/cpu-timers.h"
> #include "system/cpu-timers-internal.h"
> +#include "exec/icount.h"
>
> /* clock and ticks */
>
> diff --git a/system/dma-helpers.c b/system/dma-helpers.c
> index 6bad75876f..0d592f6468 100644
> --- a/system/dma-helpers.c
> +++ b/system/dma-helpers.c
> @@ -13,7 +13,7 @@
> #include "trace.h"
> #include "qemu/thread.h"
> #include "qemu/main-loop.h"
> -#include "system/cpu-timers.h"
> +#include "exec/icount.h"
> #include "qemu/range.h"
>
> /* #define DEBUG_IOMMU */
> diff --git a/system/vl.c b/system/vl.c
> index ec93988a03..c17945c493 100644
> --- a/system/vl.c
> +++ b/system/vl.c
> @@ -89,6 +89,7 @@
> #include "audio/audio.h"
> #include "system/cpus.h"
> #include "system/cpu-timers.h"
> +#include "exec/icount.h"
> #include "migration/colo.h"
> #include "migration/postcopy-ram.h"
> #include "system/kvm.h"
> diff --git a/target/arm/helper.c b/target/arm/helper.c
> index 0454b06a6c..becbbbd0d8 100644
> --- a/target/arm/helper.c
> +++ b/target/arm/helper.c
> @@ -24,6 +24,7 @@
> #include "exec/translation-block.h"
> #include "hw/irq.h"
> #include "system/cpu-timers.h"
> +#include "exec/icount.h"
> #include "system/kvm.h"
> #include "system/tcg.h"
> #include "qapi/error.h"
> diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c
> index 6c4391d96b..0dd8645994 100644
> --- a/target/riscv/cpu_helper.c
> +++ b/target/riscv/cpu_helper.c
> @@ -31,7 +31,7 @@
> #include "accel/tcg/cpu-ops.h"
> #include "trace.h"
> #include "semihosting/common-semi.h"
> -#include "system/cpu-timers.h"
> +#include "exec/icount.h"
> #include "cpu_bits.h"
> #include "debug.h"
> #include "pmp.h"
> diff --git a/target/riscv/csr.c b/target/riscv/csr.c
> index 49566d3c08..be4aebb9b2 100644
> --- a/target/riscv/csr.c
> +++ b/target/riscv/csr.c
> @@ -27,7 +27,7 @@
> #include "exec/exec-all.h"
> #include "exec/cputlb.h"
> #include "exec/tb-flush.h"
> -#include "system/cpu-timers.h"
> +#include "exec/icount.h"
> #include "qemu/guest-random.h"
> #include "qapi/error.h"
> #include <stdbool.h>
> diff --git a/target/riscv/debug.c b/target/riscv/debug.c
> index fea989afe9..7fc9e121e1 100644
> --- a/target/riscv/debug.c
> +++ b/target/riscv/debug.c
> @@ -32,6 +32,7 @@
> #include "exec/helper-proto.h"
> #include "exec/watchpoint.h"
> #include "system/cpu-timers.h"
> +#include "exec/icount.h"
>
> /*
> * The following M-mode trigger CSRs are implemented:
> diff --git a/target/riscv/machine.c b/target/riscv/machine.c
> index 889e2b6570..a1f70cc955 100644
> --- a/target/riscv/machine.c
> +++ b/target/riscv/machine.c
> @@ -21,7 +21,7 @@
> #include "qemu/error-report.h"
> #include "system/kvm.h"
> #include "migration/cpu.h"
> -#include "system/cpu-timers.h"
> +#include "exec/icount.h"
> #include "debug.h"
>
> static bool pmp_needed(void *opaque)
> diff --git a/target/riscv/pmu.c b/target/riscv/pmu.c
> index 0408f96e6a..a68809eef3 100644
> --- a/target/riscv/pmu.c
> +++ b/target/riscv/pmu.c
> @@ -22,7 +22,7 @@
> #include "qemu/timer.h"
> #include "cpu.h"
> #include "pmu.h"
> -#include "system/cpu-timers.h"
> +#include "exec/icount.h"
> #include "system/device_tree.h"
>
> #define RISCV_TIMEBASE_FREQ 1000000000 /* 1Ghz */
> diff --git a/util/async.c b/util/async.c
> index 863416dee9..2719c629ae 100644
> --- a/util/async.c
> +++ b/util/async.c
> @@ -35,7 +35,7 @@
> #include "block/raw-aio.h"
> #include "qemu/coroutine_int.h"
> #include "qemu/coroutine-tls.h"
> -#include "system/cpu-timers.h"
> +#include "exec/icount.h"
> #include "trace.h"
>
> /***********************************************************/
> diff --git a/util/main-loop.c b/util/main-loop.c
> index acad8c2e6c..42bd75c193 100644
> --- a/util/main-loop.c
> +++ b/util/main-loop.c
> @@ -27,6 +27,7 @@
> #include "qemu/cutils.h"
> #include "qemu/timer.h"
> #include "system/cpu-timers.h"
> +#include "exec/icount.h"
> #include "system/replay.h"
> #include "qemu/main-loop.h"
> #include "block/aio.h"
> diff --git a/util/qemu-timer.c b/util/qemu-timer.c
> index 788466fe22..1fb48be281 100644
> --- a/util/qemu-timer.c
> +++ b/util/qemu-timer.c
> @@ -27,6 +27,7 @@
> #include "qemu/timer.h"
> #include "qemu/lockable.h"
> #include "system/cpu-timers.h"
> +#include "exec/icount.h"
> #include "system/replay.h"
> #include "system/cpus.h"
>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
^ permalink raw reply [flat|nested] 90+ messages in thread
* Re: [PATCH v2 38/42] include/exec: Protect icount_enabled from poisoned symbols
2025-03-18 21:32 ` [PATCH v2 38/42] include/exec: Protect icount_enabled from poisoned symbols Richard Henderson
@ 2025-03-19 0:42 ` Pierrick Bouvier
2025-03-19 1:41 ` Richard Henderson
0 siblings, 1 reply; 90+ messages in thread
From: Pierrick Bouvier @ 2025-03-19 0:42 UTC (permalink / raw)
To: Richard Henderson, qemu-devel; +Cc: philmd
On 3/18/25 14:32, Richard Henderson wrote:
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> include/exec/icount.h | 10 +++++++++-
> 1 file changed, 9 insertions(+), 1 deletion(-)
>
> diff --git a/include/exec/icount.h b/include/exec/icount.h
> index 4964987ae4..7a26b40084 100644
> --- a/include/exec/icount.h
> +++ b/include/exec/icount.h
> @@ -22,13 +22,21 @@ typedef enum {
> ICOUNT_ADAPTATIVE,
> } ICountMode;
>
> -#if defined(CONFIG_TCG) && !defined(CONFIG_USER_ONLY)
> +#ifdef CONFIG_TCG
> extern ICountMode use_icount;
> #define icount_enabled() (use_icount)
> #else
> #define icount_enabled() ICOUNT_DISABLED
> #endif
>
> +/* Protect the CONFIG_USER_ONLY test vs poisoning. */
> +#if defined(COMPILING_PER_TARGET) || defined(COMPILING_SYSTEM_VS_USER)
> +# ifdef CONFIG_USER_ONLY
> +# undef icount_enabled
> +# define icount_enabled() ICOUNT_DISABLED
> +# endif
> +#endif
> +
> /*
> * Update the icount with the executed instructions. Called by
> * cpus-tcg vCPU thread so the main-loop can see time has moved forward.
I understand the shortcut taken here, but I'm not sure we want to start
having specifics for COMPILING_SYSTEM_VS_USER, out of the poison file.
In this case, we can change icount_enabled() to a function, implement it
in accel/tcg/icount-common.c (which is system only), and add a stub for
user mode in accel/tcg/icount-user.c (or common-user/icount.c),
returning ICOUNT_DISABLED, or 0, more simply.
^ permalink raw reply [flat|nested] 90+ messages in thread
* Re: [PATCH v2 39/42] include/system: Remove ifndef CONFIG_USER_ONLY in qtest.h
2025-03-18 21:32 ` [PATCH v2 39/42] include/system: Remove ifndef CONFIG_USER_ONLY in qtest.h Richard Henderson
@ 2025-03-19 0:43 ` Pierrick Bouvier
2025-03-19 7:26 ` Philippe Mathieu-Daudé
1 sibling, 0 replies; 90+ messages in thread
From: Pierrick Bouvier @ 2025-03-19 0:43 UTC (permalink / raw)
To: Richard Henderson, qemu-devel; +Cc: philmd
On 3/18/25 14:32, Richard Henderson wrote:
> This is include/system, so CONFIG_USER_ONLY will never be true.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> include/system/qtest.h | 2 --
> 1 file changed, 2 deletions(-)
>
> diff --git a/include/system/qtest.h b/include/system/qtest.h
> index 6ddddc501b..84b1f8c6ee 100644
> --- a/include/system/qtest.h
> +++ b/include/system/qtest.h
> @@ -23,7 +23,6 @@ static inline bool qtest_enabled(void)
> return qtest_allowed;
> }
>
> -#ifndef CONFIG_USER_ONLY
> void G_GNUC_PRINTF(2, 3) qtest_sendf(CharBackend *chr, const char *fmt, ...);
> void qtest_set_command_cb(bool (*pc_cb)(CharBackend *chr, gchar **words));
> bool qtest_driver(void);
> @@ -33,6 +32,5 @@ void qtest_server_init(const char *qtest_chrdev, const char *qtest_log, Error **
> void qtest_server_set_send_handler(void (*send)(void *, const char *),
> void *opaque);
> void qtest_server_inproc_recv(void *opaque, const char *buf);
> -#endif
>
> #endif
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
^ permalink raw reply [flat|nested] 90+ messages in thread
* Re: [PATCH v2 42/42] meson: Only allow CONFIG_USER_ONLY from certain source sets
2025-03-18 21:32 ` [PATCH v2 42/42] meson: Only allow CONFIG_USER_ONLY from certain source sets Richard Henderson
@ 2025-03-19 0:44 ` Pierrick Bouvier
0 siblings, 0 replies; 90+ messages in thread
From: Pierrick Bouvier @ 2025-03-19 0:44 UTC (permalink / raw)
To: Richard Henderson, qemu-devel; +Cc: philmd
On 3/18/25 14:32, Richard Henderson wrote:
> Poison CONFIG_USER_ONLY and CONFIG_SOFTMMU unless
> the compilation unit is in specific_ss, libuser_ss,
> or libsystem_ss. This is intended to prevent files
> being incorrectly added to common_ss.
>
> Remove #ifndef CONFIG_USER_ONLY / #error / #endif blocks.
> All they do is trigger the poison error.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> include/exec/poison.h | 5 +++++
> include/hw/hw.h | 4 ----
> include/system/confidential-guest-support.h | 4 ----
> include/system/replay.h | 4 ----
> include/system/xen.h | 4 ----
> meson.build | 6 ++++--
> 6 files changed, 9 insertions(+), 18 deletions(-)
>
> diff --git a/include/exec/poison.h b/include/exec/poison.h
> index 8ed04b3108..a6ffe4577f 100644
> --- a/include/exec/poison.h
> +++ b/include/exec/poison.h
> @@ -67,4 +67,9 @@
> #pragma GCC poison CONFIG_WHPX
> #pragma GCC poison CONFIG_XEN
>
> +#ifndef COMPILING_SYSTEM_VS_USER
> +#pragma GCC poison CONFIG_USER_ONLY
> +#pragma GCC poison CONFIG_SOFTMMU
> +#endif
> +
> #endif
> diff --git a/include/hw/hw.h b/include/hw/hw.h
> index 045c1c8b09..1b33d12b7f 100644
> --- a/include/hw/hw.h
> +++ b/include/hw/hw.h
> @@ -1,10 +1,6 @@
> #ifndef QEMU_HW_H
> #define QEMU_HW_H
>
> -#ifdef CONFIG_USER_ONLY
> -#error Cannot include hw/hw.h from user emulation
> -#endif
> -
> G_NORETURN void hw_error(const char *fmt, ...) G_GNUC_PRINTF(1, 2);
>
> #endif
> diff --git a/include/system/confidential-guest-support.h b/include/system/confidential-guest-support.h
> index b68c4bebbc..ea46b50c56 100644
> --- a/include/system/confidential-guest-support.h
> +++ b/include/system/confidential-guest-support.h
> @@ -18,10 +18,6 @@
> #ifndef QEMU_CONFIDENTIAL_GUEST_SUPPORT_H
> #define QEMU_CONFIDENTIAL_GUEST_SUPPORT_H
>
> -#ifdef CONFIG_USER_ONLY
> -#error Cannot include system/confidential-guest-support.h from user emulation
> -#endif
> -
> #include "qom/object.h"
>
> #define TYPE_CONFIDENTIAL_GUEST_SUPPORT "confidential-guest-support"
> diff --git a/include/system/replay.h b/include/system/replay.h
> index 8926d8cf4b..1c87c97fdd 100644
> --- a/include/system/replay.h
> +++ b/include/system/replay.h
> @@ -11,10 +11,6 @@
> #ifndef SYSTEM_REPLAY_H
> #define SYSTEM_REPLAY_H
>
> -#ifdef CONFIG_USER_ONLY
> -#error Cannot include this header from user emulation
> -#endif
> -
> #include "exec/replay-core.h"
> #include "qapi/qapi-types-misc.h"
> #include "qapi/qapi-types-run-state.h"
> diff --git a/include/system/xen.h b/include/system/xen.h
> index 5f41915732..c2f283d1c2 100644
> --- a/include/system/xen.h
> +++ b/include/system/xen.h
> @@ -10,10 +10,6 @@
> #ifndef SYSTEM_XEN_H
> #define SYSTEM_XEN_H
>
> -#ifdef CONFIG_USER_ONLY
> -#error Cannot include system/xen.h from user emulation
> -#endif
> -
> #include "exec/cpu-common.h"
>
> #ifdef COMPILING_PER_TARGET
> diff --git a/meson.build b/meson.build
> index 329e7f056a..b4d65a75e5 100644
> --- a/meson.build
> +++ b/meson.build
> @@ -4054,7 +4054,8 @@ common_ss.add_all(when: 'CONFIG_USER_ONLY', if_true: user_ss)
> libuser_ss = libuser_ss.apply({})
> libuser = static_library('user',
> libuser_ss.sources() + genh,
> - c_args: '-DCONFIG_USER_ONLY',
> + c_args: ['-DCONFIG_USER_ONLY',
> + '-DCOMPILING_SYSTEM_VS_USER'],
> dependencies: libuser_ss.dependencies(),
> build_by_default: false)
> libuser = declare_dependency(objects: libuser.extract_all_objects(recursive: false),
> @@ -4064,7 +4065,8 @@ common_ss.add(when: 'CONFIG_USER_ONLY', if_true: libuser)
> libsystem_ss = libsystem_ss.apply({})
> libsystem = static_library('system',
> libsystem_ss.sources() + genh,
> - c_args: '-DCONFIG_SOFTMMU',
> + c_args: ['-DCONFIG_SOFTMMU',
> + '-DCOMPILING_SYSTEM_VS_USER'],
> dependencies: libsystem_ss.dependencies(),
> build_by_default: false)
> libsystem = declare_dependency(objects: libsystem.extract_all_objects(recursive: false),
That's a nice addition.
I'll benefit from that for hw/arm, where I have a few blocks to cleanup
as well.
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
^ permalink raw reply [flat|nested] 90+ messages in thread
* Re: [PATCH v2 03/42] accel/tcg: Fix cpu_ld*_code_mmu for user mode
2025-03-18 23:52 ` Pierrick Bouvier
@ 2025-03-19 1:05 ` Richard Henderson
2025-03-19 1:08 ` Pierrick Bouvier
0 siblings, 1 reply; 90+ messages in thread
From: Richard Henderson @ 2025-03-19 1:05 UTC (permalink / raw)
To: Pierrick Bouvier, qemu-devel; +Cc: philmd
On 3/18/25 16:52, Pierrick Bouvier wrote:
> On 3/18/25 14:31, Richard Henderson wrote:
>> These routines are buggy in multiple ways:
>> - Use of target-endian loads, then a bswap that
>> depends on the host endiannness.
>
> The code is very similar to do_ld*_mmu functions, so it's subtle to notice.
>
> Was the endianness bug due to the fact we use oi (MemOpIdx) directly instead of
> get_memop(oi) (MemOp)?
No, it was due to ...
>> - ret = lduw_p(haddr);
>> - ret = ldl_p(haddr);
>> - ret = ldq_p(haddr);
... these being target-endian macros.
What was intended, once upon a time, was ldl_he_p etc,
so that the load was host-endian. But using the atomicity
routines is even better.
r~
^ permalink raw reply [flat|nested] 90+ messages in thread
* Re: [PATCH v2 03/42] accel/tcg: Fix cpu_ld*_code_mmu for user mode
2025-03-19 1:05 ` Richard Henderson
@ 2025-03-19 1:08 ` Pierrick Bouvier
0 siblings, 0 replies; 90+ messages in thread
From: Pierrick Bouvier @ 2025-03-19 1:08 UTC (permalink / raw)
To: Richard Henderson, qemu-devel; +Cc: philmd
On 3/18/25 18:05, Richard Henderson wrote:
> On 3/18/25 16:52, Pierrick Bouvier wrote:
>> On 3/18/25 14:31, Richard Henderson wrote:
>>> These routines are buggy in multiple ways:
>>> - Use of target-endian loads, then a bswap that
>>> depends on the host endiannness.
>>
>> The code is very similar to do_ld*_mmu functions, so it's subtle to notice.
>>
>> Was the endianness bug due to the fact we use oi (MemOpIdx) directly instead of
>> get_memop(oi) (MemOp)?
>
> No, it was due to ...
>
>>> - ret = lduw_p(haddr);
>>> - ret = ldl_p(haddr);
>>> - ret = ldq_p(haddr);
>
> ... these being target-endian macros.
>
> What was intended, once upon a time, was ldl_he_p etc,
> so that the load was host-endian. But using the atomicity
> routines is even better.
>
Oh right, I missed the load_atom_* for size > 1, as I was looking at
do_ld1_mmu, which uses ldub_p.
Thanks
>
> r~
^ permalink raw reply [flat|nested] 90+ messages in thread
* Re: [PATCH v2 03/42] accel/tcg: Fix cpu_ld*_code_mmu for user mode
2025-03-18 21:31 ` [PATCH v2 03/42] accel/tcg: Fix cpu_ld*_code_mmu for user mode Richard Henderson
2025-03-18 23:52 ` Pierrick Bouvier
@ 2025-03-19 1:09 ` Pierrick Bouvier
1 sibling, 0 replies; 90+ messages in thread
From: Pierrick Bouvier @ 2025-03-19 1:09 UTC (permalink / raw)
To: Richard Henderson, qemu-devel; +Cc: philmd
On 3/18/25 14:31, Richard Henderson wrote:
> These routines are buggy in multiple ways:
> - Use of target-endian loads, then a bswap that
> depends on the host endiannness.
> - A non-unwinding code load must set_helper_retaddr 1,
> which is magic within adjust_signal_pc.
> - cpu_ldq_code_mmu used MMU_DATA_LOAD
>
> The bugs are hidden because all current uses of cpu_ld*_code_mmu
> are from system mode.
>
> Fixes: 2899062614a ("accel/tcg: Add cpu_ld*_code_mmu")
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> accel/tcg/user-exec.c | 41 ++++-------------------------------------
> 1 file changed, 4 insertions(+), 37 deletions(-)
>
> diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c
> index 2322181b15..629a1c9ce6 100644
> --- a/accel/tcg/user-exec.c
> +++ b/accel/tcg/user-exec.c
> @@ -1257,58 +1257,25 @@ uint64_t cpu_ldq_code(CPUArchState *env, abi_ptr ptr)
> uint8_t cpu_ldb_code_mmu(CPUArchState *env, abi_ptr addr,
> MemOpIdx oi, uintptr_t ra)
> {
> - void *haddr;
> - uint8_t ret;
> -
> - haddr = cpu_mmu_lookup(env_cpu(env), addr, oi, ra, MMU_INST_FETCH);
> - ret = ldub_p(haddr);
> - clear_helper_retaddr();
> - return ret;
> + return do_ld1_mmu(env_cpu(env), addr, oi, ra ? ra : 1, MMU_INST_FETCH);
> }
>
> uint16_t cpu_ldw_code_mmu(CPUArchState *env, abi_ptr addr,
> MemOpIdx oi, uintptr_t ra)
> {
> - void *haddr;
> - uint16_t ret;
> -
> - haddr = cpu_mmu_lookup(env_cpu(env), addr, oi, ra, MMU_INST_FETCH);
> - ret = lduw_p(haddr);
> - clear_helper_retaddr();
> - if (get_memop(oi) & MO_BSWAP) {
> - ret = bswap16(ret);
> - }
> - return ret;
> + return do_ld2_mmu(env_cpu(env), addr, oi, ra ? ra : 1, MMU_INST_FETCH);
> }
>
> uint32_t cpu_ldl_code_mmu(CPUArchState *env, abi_ptr addr,
> MemOpIdx oi, uintptr_t ra)
> {
> - void *haddr;
> - uint32_t ret;
> -
> - haddr = cpu_mmu_lookup(env_cpu(env), addr, oi, ra, MMU_INST_FETCH);
> - ret = ldl_p(haddr);
> - clear_helper_retaddr();
> - if (get_memop(oi) & MO_BSWAP) {
> - ret = bswap32(ret);
> - }
> - return ret;
> + return do_ld4_mmu(env_cpu(env), addr, oi, ra ? ra : 1, MMU_INST_FETCH);
> }
>
> uint64_t cpu_ldq_code_mmu(CPUArchState *env, abi_ptr addr,
> MemOpIdx oi, uintptr_t ra)
> {
> - void *haddr;
> - uint64_t ret;
> -
> - haddr = cpu_mmu_lookup(env_cpu(env), addr, oi, ra, MMU_DATA_LOAD);
> - ret = ldq_p(haddr);
> - clear_helper_retaddr();
> - if (get_memop(oi) & MO_BSWAP) {
> - ret = bswap64(ret);
> - }
> - return ret;
> + return do_ld8_mmu(env_cpu(env), addr, oi, ra ? ra : 1, MMU_INST_FETCH);
> }
>
> #include "ldst_common.c.inc"
Already given with my first question, but more clear to repeat it here:
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
^ permalink raw reply [flat|nested] 90+ messages in thread
* Re: [PATCH v2 06/42] include/exec: Split out cpu-mmu-index.h
2025-03-19 0:02 ` Pierrick Bouvier
@ 2025-03-19 1:16 ` Richard Henderson
2025-03-19 17:16 ` Pierrick Bouvier
0 siblings, 1 reply; 90+ messages in thread
From: Richard Henderson @ 2025-03-19 1:16 UTC (permalink / raw)
To: Pierrick Bouvier, qemu-devel; +Cc: philmd
On 3/18/25 17:02, Pierrick Bouvier wrote:
> On 3/18/25 14:31, Richard Henderson wrote:
>> The implementation of cpu_mmu_index was split between cpu-common.h
>> and cpu-all.h, depending on CONFIG_USER_ONLY. We already have the
>> plumbing common to user and system mode. Using MMU_USER_IDX
>> requires the cpu.h for a specific target, and so is restricted to
>> when we're compiling per-target.
>>
>
> A side question: Why is MMU_USER_IDX different depending on architecture?
> I'm trying to understand why (and by what) previous indexes are reserved when MMU_USER_IDX
> is not zero.
Depends on the translator, but often: cpu_mmu_index may be encoded into tb_flags, and the
translator *also* uses this encoding to determine the priv state. So if, in user-only
mode, we fail to encode MMU_USER_IDX into tb_flags, we'll get incorrect priv checks in the
translator and fail to raise SIGILL for privledged operations.
Depending on the target, the mmu_index space may be quite complicated, with various
meanings assigned to various bits. Thus "0" may not be reasonable for MMU_USER_IDX.
See, for instance, enum ARMMMUIdx or ppc hreg_compute_hflags_value().
(Both of which, amusingly, use MMU_USER_IDX 0; neither here nor there.)
r~
^ permalink raw reply [flat|nested] 90+ messages in thread
* Re: [PATCH v2 11/42] accel/tcg: Perform aligned atomic reads in translator_ld
2025-03-19 0:15 ` Pierrick Bouvier
@ 2025-03-19 1:28 ` Richard Henderson
2025-03-19 17:18 ` Pierrick Bouvier
0 siblings, 1 reply; 90+ messages in thread
From: Richard Henderson @ 2025-03-19 1:28 UTC (permalink / raw)
To: Pierrick Bouvier, qemu-devel; +Cc: philmd
On 3/18/25 17:15, Pierrick Bouvier wrote:
>> @@ -329,7 +331,39 @@ static bool translator_ld(CPUArchState *env, DisasContextBase *db,
>> host = db->host_addr[1];
>> }
>> - memcpy(dest, host + (pc - base), len);
>> + do_read:
>> + /*
>> + * Assume aligned reads should be atomic, if possible.
>> + * We're not in a position to jump out with EXCP_ATOMIC.
>> + */
>> + host += pc - base;
>> + switch (len) {
>
> Should we have a case for:
> case 1:
> uint8_t t = *(uint8_t *)host;
> stb_he_p(dest, t);
> return true;
>
> To skip the memcpy for a single byte?
I guess only the i386 translator is going to be issuing byte code loads. I wonder if it's
measurable? My gut reaction is that it isn't.
r~
^ permalink raw reply [flat|nested] 90+ messages in thread
* Re: [PATCH v2 29/42] include/exec: Split out watchpoint.h
2025-03-19 0:30 ` Pierrick Bouvier
@ 2025-03-19 1:33 ` Richard Henderson
0 siblings, 0 replies; 90+ messages in thread
From: Richard Henderson @ 2025-03-19 1:33 UTC (permalink / raw)
To: Pierrick Bouvier, qemu-devel; +Cc: philmd
On 3/18/25 17:30, Pierrick Bouvier wrote:
>> include/exec/watchpoint.h | 41 +++++++++++++++++++++++++++++
>> include/hw/core/cpu.h | 30 ---------------------
>> accel/tcg/tcg-accel-ops.c | 1 +
>> system/watchpoint.c | 1 +
>> target/arm/debug_helper.c | 1 +
>> target/i386/cpu.c | 1 +
>> target/i386/machine.c | 2 +-
>> target/i386/tcg/system/bpt_helper.c | 1 +
>> target/ppc/cpu.c | 1 +
>> target/ppc/cpu_init.c | 2 +-
>> target/riscv/debug.c | 1 +
>> target/s390x/helper.c | 1 +
>> target/s390x/tcg/excp_helper.c | 1 +
>> target/xtensa/dbg_helper.c | 1 +
>> 14 files changed, 53 insertions(+), 32 deletions(-)
...
> To push further, it could be worth to remove inline stubs, put definitions in common-user/
> watchpoint.c, and add this file to user_ss.
I thought about it, and even had it that way at one point.
But every single usage was within a file that is already
target specific, or system-only.
r~
^ permalink raw reply [flat|nested] 90+ messages in thread
* Re: [PATCH v2 38/42] include/exec: Protect icount_enabled from poisoned symbols
2025-03-19 0:42 ` Pierrick Bouvier
@ 2025-03-19 1:41 ` Richard Henderson
0 siblings, 0 replies; 90+ messages in thread
From: Richard Henderson @ 2025-03-19 1:41 UTC (permalink / raw)
To: Pierrick Bouvier, qemu-devel; +Cc: philmd
On 3/18/25 17:42, Pierrick Bouvier wrote:
> On 3/18/25 14:32, Richard Henderson wrote:
>> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
>> ---
>> include/exec/icount.h | 10 +++++++++-
>> 1 file changed, 9 insertions(+), 1 deletion(-)
>>
>> diff --git a/include/exec/icount.h b/include/exec/icount.h
>> index 4964987ae4..7a26b40084 100644
>> --- a/include/exec/icount.h
>> +++ b/include/exec/icount.h
>> @@ -22,13 +22,21 @@ typedef enum {
>> ICOUNT_ADAPTATIVE,
>> } ICountMode;
>> -#if defined(CONFIG_TCG) && !defined(CONFIG_USER_ONLY)
>> +#ifdef CONFIG_TCG
>> extern ICountMode use_icount;
>> #define icount_enabled() (use_icount)
>> #else
>> #define icount_enabled() ICOUNT_DISABLED
>> #endif
>> +/* Protect the CONFIG_USER_ONLY test vs poisoning. */
>> +#if defined(COMPILING_PER_TARGET) || defined(COMPILING_SYSTEM_VS_USER)
>> +# ifdef CONFIG_USER_ONLY
>> +# undef icount_enabled
>> +# define icount_enabled() ICOUNT_DISABLED
>> +# endif
>> +#endif
>> +
>> /*
>> * Update the icount with the executed instructions. Called by
>> * cpus-tcg vCPU thread so the main-loop can see time has moved forward.
>
> I understand the shortcut taken here, but I'm not sure we want to start having specifics
> for COMPILING_SYSTEM_VS_USER, out of the poison file.
>
> In this case, we can change icount_enabled() to a function, implement it in accel/tcg/
> icount-common.c (which is system only), and add a stub for user mode in accel/tcg/icount-
> user.c (or common-user/icount.c), returning ICOUNT_DISABLED, or 0, more simply.
(1) If I were to do anything it would not be adding a function, but
making use_icount a universal variable.
(2) There are a few uses where if (!icount_enabled()) needs to
evaluate to false for user-mode, so that dead code elimination happens.
Otherwise we then have to introduce extra stubs, etc, etc, etc.
r~
^ permalink raw reply [flat|nested] 90+ messages in thread
* Re: [PATCH v2 41/42] target/riscv: Remove ifndef CONFIG_USER_ONLY from cpu_cfg.h
2025-03-18 21:32 ` [PATCH v2 41/42] target/riscv: Remove ifndef CONFIG_USER_ONLY from cpu_cfg.h Richard Henderson
@ 2025-03-19 1:41 ` Alistair Francis
0 siblings, 0 replies; 90+ messages in thread
From: Alistair Francis @ 2025-03-19 1:41 UTC (permalink / raw)
To: Richard Henderson; +Cc: qemu-devel, pierrick.bouvier, philmd
On Wed, Mar 19, 2025 at 7:39 AM Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> While RISCVCPUConfig.satp_mode is unused for user-only,
> this header is used from disas/riscv.h, whose users are
> only built once. The savings of 4 bytes isn't worth it.
>
> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> target/riscv/cpu_cfg.h | 2 --
> 1 file changed, 2 deletions(-)
>
> diff --git a/target/riscv/cpu_cfg.h b/target/riscv/cpu_cfg.h
> index 8a843482cc..cfe371b829 100644
> --- a/target/riscv/cpu_cfg.h
> +++ b/target/riscv/cpu_cfg.h
> @@ -196,9 +196,7 @@ struct RISCVCPUConfig {
>
> bool short_isa_string;
>
> -#ifndef CONFIG_USER_ONLY
> RISCVSATPMap satp_mode;
> -#endif
> };
>
> typedef struct RISCVCPUConfig RISCVCPUConfig;
> --
> 2.43.0
>
>
^ permalink raw reply [flat|nested] 90+ messages in thread
* Re: [PATCH v2 26/42] semihosting: Move user-only implementation out-of-line
2025-03-18 21:31 ` [PATCH v2 26/42] semihosting: Move user-only implementation out-of-line Richard Henderson
2025-03-19 0:26 ` Pierrick Bouvier
@ 2025-03-19 7:16 ` Philippe Mathieu-Daudé
2025-03-21 0:50 ` Richard Henderson
2025-03-31 22:01 ` Pierrick Bouvier
2 siblings, 1 reply; 90+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-03-19 7:16 UTC (permalink / raw)
To: Richard Henderson, qemu-devel; +Cc: pierrick.bouvier
On 18/3/25 22:31, Richard Henderson wrote:
> Avoid testing CONFIG_USER_ONLY in semihost.h.
> The only function that's required is semihosting_enabled.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> include/semihosting/semihost.h | 29 ++---------------------------
> semihosting/user.c | 15 +++++++++++++++
> semihosting/meson.build | 2 ++
> 3 files changed, 19 insertions(+), 27 deletions(-)
> create mode 100644 semihosting/user.c
> diff --git a/semihosting/user.c b/semihosting/user.c
> new file mode 100644
> index 0000000000..9473729beb
> --- /dev/null
> +++ b/semihosting/user.c
> @@ -0,0 +1,15 @@
> +/*
> + * Semihosting for user emulation
> + *
> + * Copyright (c) 2019 Linaro Ltd
> + *
> + * SPDX-License-Identifier: GPL-2.0-or-later
> + */
> +
> +#include "qemu/osdep.h"
> +#include "semihosting/semihost.h"
> +
> +bool semihosting_enabled(bool is_user)
> +{
While moving this code, we could also add:
assert(is_user);
> + return true;
> +}
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
^ permalink raw reply [flat|nested] 90+ messages in thread
* Re: [PATCH v2 31/42] system: Move most files to libsystem_ss
2025-03-18 21:31 ` [PATCH v2 31/42] system: Move most files to libsystem_ss Richard Henderson
2025-03-19 0:32 ` Pierrick Bouvier
@ 2025-03-19 7:18 ` Philippe Mathieu-Daudé
1 sibling, 0 replies; 90+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-03-19 7:18 UTC (permalink / raw)
To: Richard Henderson, qemu-devel; +Cc: pierrick.bouvier
On 18/3/25 22:31, Richard Henderson wrote:
> Some of the headers used require CONFIG_USER_ONLY.
> Do not move vl.c, because it has other include dependencies
> that are present in system_ss.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> system/meson.build | 7 +++++--
> 1 file changed, 5 insertions(+), 2 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
^ permalink raw reply [flat|nested] 90+ messages in thread
* Re: [PATCH v2 37/42] include/exec: Split out icount.h
2025-03-19 0:33 ` Pierrick Bouvier
@ 2025-03-19 7:21 ` Philippe Mathieu-Daudé
2025-03-21 0:56 ` Richard Henderson
0 siblings, 1 reply; 90+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-03-19 7:21 UTC (permalink / raw)
To: Pierrick Bouvier, Richard Henderson, qemu-devel
On 19/3/25 01:33, Pierrick Bouvier wrote:
> On 3/18/25 14:32, Richard Henderson wrote:
>> Split icount stuff from system/cpu-timers.h.
>> There are 17 files which only require icount.h, 7 that only
>> require cpu-timers.h, and 7 that require both.
>>
>> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
>> ---
>> include/exec/icount.h | 68 ++++++++++++++++++++++++++++++++
-> include/accel/tcg/icount.h
>> include/system/cpu-timers.h | 58 ---------------------------
>> accel/tcg/cpu-exec.c | 2 +-
>> accel/tcg/icount-common.c | 2 +-
>> accel/tcg/monitor.c | 1 +
>> accel/tcg/tcg-accel-ops-icount.c | 2 +-
>> accel/tcg/tcg-accel-ops-mttcg.c | 2 +-
>> accel/tcg/tcg-accel-ops-rr.c | 2 +-
>> accel/tcg/tcg-accel-ops.c | 2 +-
>> accel/tcg/tcg-all.c | 2 +-
>> accel/tcg/translate-all.c | 2 +-
^ permalink raw reply [flat|nested] 90+ messages in thread
* Re: [PATCH v2 39/42] include/system: Remove ifndef CONFIG_USER_ONLY in qtest.h
2025-03-18 21:32 ` [PATCH v2 39/42] include/system: Remove ifndef CONFIG_USER_ONLY in qtest.h Richard Henderson
2025-03-19 0:43 ` Pierrick Bouvier
@ 2025-03-19 7:26 ` Philippe Mathieu-Daudé
2025-03-19 17:25 ` Pierrick Bouvier
1 sibling, 1 reply; 90+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-03-19 7:26 UTC (permalink / raw)
To: Richard Henderson, qemu-devel; +Cc: pierrick.bouvier
On 18/3/25 22:32, Richard Henderson wrote:
> This is include/system, so CONFIG_USER_ONLY will never be true.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> include/system/qtest.h | 2 --
> 1 file changed, 2 deletions(-)
>
> diff --git a/include/system/qtest.h b/include/system/qtest.h
> index 6ddddc501b..84b1f8c6ee 100644
> --- a/include/system/qtest.h
> +++ b/include/system/qtest.h
> @@ -23,7 +23,6 @@ static inline bool qtest_enabled(void)
> return qtest_allowed;
> }
IIRC the problem I had here were uses in common ARM cpus code.
i.e.:
target/arm/cpu.c:1786: if (tcg_enabled() || qtest_enabled()) {
target/arm/cpu64.c:765: if (tcg_enabled() || qtest_enabled()) {
I'll recheck how code evolved in your branch.
^ permalink raw reply [flat|nested] 90+ messages in thread
* Re: [PATCH v2 06/42] include/exec: Split out cpu-mmu-index.h
2025-03-19 1:16 ` Richard Henderson
@ 2025-03-19 17:16 ` Pierrick Bouvier
2025-03-20 14:58 ` Richard Henderson
0 siblings, 1 reply; 90+ messages in thread
From: Pierrick Bouvier @ 2025-03-19 17:16 UTC (permalink / raw)
To: Richard Henderson, qemu-devel; +Cc: philmd
On 3/18/25 18:16, Richard Henderson wrote:
> On 3/18/25 17:02, Pierrick Bouvier wrote:
>> On 3/18/25 14:31, Richard Henderson wrote:
>>> The implementation of cpu_mmu_index was split between cpu-common.h
>>> and cpu-all.h, depending on CONFIG_USER_ONLY. We already have the
>>> plumbing common to user and system mode. Using MMU_USER_IDX
>>> requires the cpu.h for a specific target, and so is restricted to
>>> when we're compiling per-target.
>>>
>>
>> A side question: Why is MMU_USER_IDX different depending on architecture?
>> I'm trying to understand why (and by what) previous indexes are reserved when MMU_USER_IDX
>> is not zero.
>
> Depends on the translator, but often: cpu_mmu_index may be encoded into tb_flags, and the
> translator *also* uses this encoding to determine the priv state. So if, in user-only
> mode, we fail to encode MMU_USER_IDX into tb_flags, we'll get incorrect priv checks in the
> translator and fail to raise SIGILL for privledged operations.
>
> Depending on the target, the mmu_index space may be quite complicated, with various
> meanings assigned to various bits. Thus "0" may not be reasonable for MMU_USER_IDX.
>
> See, for instance, enum ARMMMUIdx or ppc hreg_compute_hflags_value().
> (Both of which, amusingly, use MMU_USER_IDX 0; neither here nor there.)
>
Thanks for your answer.
If I understand correctly, this is simply an (arbitrary) choice related
to each target architecture implemented in QEMU, and it does not match
any property of a *real* cpu. Is that correct?
In other words, it could have been implemented in a way that
MMU_USER_IDX is the same for all arch, but it hasn't been done this way.
Is that correct?
I'm not looking for modifying anything related to this, just want to
make sure I get it right.
>
> r~
^ permalink raw reply [flat|nested] 90+ messages in thread
* Re: [PATCH v2 11/42] accel/tcg: Perform aligned atomic reads in translator_ld
2025-03-19 1:28 ` Richard Henderson
@ 2025-03-19 17:18 ` Pierrick Bouvier
0 siblings, 0 replies; 90+ messages in thread
From: Pierrick Bouvier @ 2025-03-19 17:18 UTC (permalink / raw)
To: Richard Henderson, qemu-devel; +Cc: philmd
On 3/18/25 18:28, Richard Henderson wrote:
> On 3/18/25 17:15, Pierrick Bouvier wrote:
>>> @@ -329,7 +331,39 @@ static bool translator_ld(CPUArchState *env, DisasContextBase *db,
>>> host = db->host_addr[1];
>>> }
>>> - memcpy(dest, host + (pc - base), len);
>>> + do_read:
>>> + /*
>>> + * Assume aligned reads should be atomic, if possible.
>>> + * We're not in a position to jump out with EXCP_ATOMIC.
>>> + */
>>> + host += pc - base;
>>> + switch (len) {
>>
>> Should we have a case for:
>> case 1:
>> uint8_t t = *(uint8_t *)host;
>> stb_he_p(dest, t);
>> return true;
>>
>> To skip the memcpy for a single byte?
>
> I guess only the i386 translator is going to be issuing byte code loads. I wonder if it's
> measurable? My gut reaction is that it isn't.
>
If we see a memcpy at this spot in a profiling one day, it will always
be time to revisit.
For now, it's ok for me. Just wonder why the case for len == 1 was not
explicitely added.
>
> r~
^ permalink raw reply [flat|nested] 90+ messages in thread
* Re: [PATCH v2 11/42] accel/tcg: Perform aligned atomic reads in translator_ld
2025-03-18 21:31 ` [PATCH v2 11/42] accel/tcg: Perform aligned atomic reads in translator_ld Richard Henderson
2025-03-19 0:05 ` Alistair Francis
2025-03-19 0:15 ` Pierrick Bouvier
@ 2025-03-19 17:18 ` Pierrick Bouvier
2025-04-01 6:18 ` Philippe Mathieu-Daudé
3 siblings, 0 replies; 90+ messages in thread
From: Pierrick Bouvier @ 2025-03-19 17:18 UTC (permalink / raw)
To: Richard Henderson, qemu-devel; +Cc: philmd
On 3/18/25 14:31, Richard Henderson wrote:
> Perform aligned atomic reads in translator_ld, if possible.
> According to
>
> https://lore.kernel.org/qemu-devel/20240607101403.1109-1-jim.shu@sifive.com/
>
> this is required for RISC-V Ziccif.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> accel/tcg/translator.c | 42 ++++++++++++++++++++++++++++++++++++++----
> 1 file changed, 38 insertions(+), 4 deletions(-)
>
> diff --git a/accel/tcg/translator.c b/accel/tcg/translator.c
> index ef1538b4fc..157be33bf6 100644
> --- a/accel/tcg/translator.c
> +++ b/accel/tcg/translator.c
> @@ -265,12 +265,14 @@ static bool translator_ld(CPUArchState *env, DisasContextBase *db,
>
> if (likely(((base ^ last) & TARGET_PAGE_MASK) == 0)) {
> /* Entire read is from the first page. */
> - memcpy(dest, host + (pc - base), len);
> - return true;
> + goto do_read;
> }
>
> if (unlikely(((base ^ pc) & TARGET_PAGE_MASK) == 0)) {
> - /* Read begins on the first page and extends to the second. */
> + /*
> + * Read begins on the first page and extends to the second.
> + * The unaligned read is never atomic.
> + */
> size_t len0 = -(pc | TARGET_PAGE_MASK);
> memcpy(dest, host + (pc - base), len0);
> pc += len0;
> @@ -329,7 +331,39 @@ static bool translator_ld(CPUArchState *env, DisasContextBase *db,
> host = db->host_addr[1];
> }
>
> - memcpy(dest, host + (pc - base), len);
> + do_read:
> + /*
> + * Assume aligned reads should be atomic, if possible.
> + * We're not in a position to jump out with EXCP_ATOMIC.
> + */
> + host += pc - base;
> + switch (len) {
> + case 2:
> + if (QEMU_IS_ALIGNED(pc, 2)) {
> + uint16_t t = qatomic_read((uint16_t *)host);
> + stw_he_p(dest, t);
> + return true;
> + }
> + break;
> + case 4:
> + if (QEMU_IS_ALIGNED(pc, 4)) {
> + uint32_t t = qatomic_read((uint32_t *)host);
> + stl_he_p(dest, t);
> + return true;
> + }
> + break;
> +#ifdef CONFIG_ATOMIC64
> + case 8:
> + if (QEMU_IS_ALIGNED(pc, 8)) {
> + uint64_t t = qatomic_read__nocheck((uint64_t *)host);
> + stq_he_p(dest, t);
> + return true;
> + }
> + break;
> +#endif
> + }
> + /* Unaligned or partial read from the second page is not atomic. */
> + memcpy(dest, host, len);
> return true;
> }
>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
^ permalink raw reply [flat|nested] 90+ messages in thread
* Re: [PATCH v2 39/42] include/system: Remove ifndef CONFIG_USER_ONLY in qtest.h
2025-03-19 7:26 ` Philippe Mathieu-Daudé
@ 2025-03-19 17:25 ` Pierrick Bouvier
0 siblings, 0 replies; 90+ messages in thread
From: Pierrick Bouvier @ 2025-03-19 17:25 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, Richard Henderson, qemu-devel
On 3/19/25 00:26, Philippe Mathieu-Daudé wrote:
> On 18/3/25 22:32, Richard Henderson wrote:
>> This is include/system, so CONFIG_USER_ONLY will never be true.
>>
>> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
>> ---
>> include/system/qtest.h | 2 --
>> 1 file changed, 2 deletions(-)
>>
>> diff --git a/include/system/qtest.h b/include/system/qtest.h
>> index 6ddddc501b..84b1f8c6ee 100644
>> --- a/include/system/qtest.h
>> +++ b/include/system/qtest.h
>> @@ -23,7 +23,6 @@ static inline bool qtest_enabled(void)
>> return qtest_allowed;
>> }
>
> IIRC the problem I had here were uses in common ARM cpus code.
>
> i.e.:
> target/arm/cpu.c:1786: if (tcg_enabled() || qtest_enabled()) {
> target/arm/cpu64.c:765: if (tcg_enabled() || qtest_enabled()) {
>
> I'll recheck how code evolved in your branch.
qtest_enabled() visibility is not affected by this patch, so there
should not be any change.
Only the others functions now expose their prototype.
^ permalink raw reply [flat|nested] 90+ messages in thread
* Re: [PATCH v2 06/42] include/exec: Split out cpu-mmu-index.h
2025-03-19 17:16 ` Pierrick Bouvier
@ 2025-03-20 14:58 ` Richard Henderson
2025-03-20 15:13 ` Pierrick Bouvier
0 siblings, 1 reply; 90+ messages in thread
From: Richard Henderson @ 2025-03-20 14:58 UTC (permalink / raw)
To: Pierrick Bouvier, qemu-devel; +Cc: philmd
On 3/19/25 10:16, Pierrick Bouvier wrote:
> If I understand correctly, this is simply an (arbitrary) choice related to each target
> architecture implemented in QEMU, and it does not match any property of a *real* cpu. Is
> that correct?
Correct.
> In other words, it could have been implemented in a way that MMU_USER_IDX is the same for
> all arch, but it hasn't been done this way. Is that correct?
>
> I'm not looking for modifying anything related to this, just want to make sure I get it
> right.
With minor effort, perhaps.
Take loongarch64 for example. The system register field CRMD.PVL contains the priv level,
where 0 is most priv and 3 is least. Simply extracting the field is the easiest
implementation, so MMU_USER_IDX == 3.
If there were some requirement that MMU_USER_IDX be 0, then obviously we could rearrange,
but so far there is not.
r~
^ permalink raw reply [flat|nested] 90+ messages in thread
* Re: [PATCH v2 06/42] include/exec: Split out cpu-mmu-index.h
2025-03-20 14:58 ` Richard Henderson
@ 2025-03-20 15:13 ` Pierrick Bouvier
0 siblings, 0 replies; 90+ messages in thread
From: Pierrick Bouvier @ 2025-03-20 15:13 UTC (permalink / raw)
To: Richard Henderson, qemu-devel; +Cc: philmd
On 3/20/25 07:58, Richard Henderson wrote:
> On 3/19/25 10:16, Pierrick Bouvier wrote:
>> If I understand correctly, this is simply an (arbitrary) choice related to each target
>> architecture implemented in QEMU, and it does not match any property of a *real* cpu. Is
>> that correct?
>
> Correct.
>
>> In other words, it could have been implemented in a way that MMU_USER_IDX is the same for
>> all arch, but it hasn't been done this way. Is that correct?
>>
>> I'm not looking for modifying anything related to this, just want to make sure I get it
>> right.
>
> With minor effort, perhaps.
>
> Take loongarch64 for example. The system register field CRMD.PVL contains the priv level,
> where 0 is most priv and 3 is least. Simply extracting the field is the easiest
> implementation, so MMU_USER_IDX == 3.
>
> If there were some requirement that MMU_USER_IDX be 0, then obviously we could rearrange,
> but so far there is not.
>
Thanks Richard, that's all clear for me now.
>
> r~
^ permalink raw reply [flat|nested] 90+ messages in thread
* Re: [PATCH v2 12/42] accel/tcg: Use cpu_ld*_code_mmu in translator.c
2025-03-19 0:23 ` Pierrick Bouvier
@ 2025-03-21 0:48 ` Richard Henderson
2025-03-21 18:03 ` Pierrick Bouvier
0 siblings, 1 reply; 90+ messages in thread
From: Richard Henderson @ 2025-03-21 0:48 UTC (permalink / raw)
To: Pierrick Bouvier, qemu-devel; +Cc: philmd
On 3/18/25 17:23, Pierrick Bouvier wrote:
>> uint64_t translator_ldq(CPUArchState *env, DisasContextBase *db, vaddr pc)
>> {
>> - uint64_t raw, tgt;
>> + uint64_t val;
>> - if (translator_ld(env, db, &raw, pc, sizeof(raw))) {
>> - tgt = tswap64(raw);
>> - } else {
>> - tgt = cpu_ldq_code(env, pc);
>> - raw = tswap64(tgt);
>> - record_save(db, pc, &raw, sizeof(raw));
>> + if (!translator_ld(env, db, &val, pc, sizeof(val))) {
>> + MemOpIdx oi = make_memop_idx(MO_UQ, db->code_mmuidx);
>> + val = cpu_ldq_code_mmu(env, pc, oi, 0);
>> + record_save(db, pc, &val, sizeof(val));
>> }
>> - return tgt;
>> + return tswap64(val);
>> }
>> void translator_fake_ld(DisasContextBase *db, const void *data, size_t len)
>
> If I understand correctly, cpu_ldq_code_mmu performs the tswap call we used to before.
Incorrect: cpu_ldq_code_mmu has no tswap.
It has a conditional bswap, if MO_BSWAP is set, but that's not true for the MO_UQ used
here. Therefore both the direct load in translator_ld and the cpu_ld*_code_mmu function
call both produce host-endian values.
Therefore the tswap at the end correctly swaps host to target-endianness.
r~
^ permalink raw reply [flat|nested] 90+ messages in thread
* Re: [PATCH v2 26/42] semihosting: Move user-only implementation out-of-line
2025-03-19 7:16 ` Philippe Mathieu-Daudé
@ 2025-03-21 0:50 ` Richard Henderson
0 siblings, 0 replies; 90+ messages in thread
From: Richard Henderson @ 2025-03-21 0:50 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel; +Cc: pierrick.bouvier
On 3/19/25 00:16, Philippe Mathieu-Daudé wrote:
> On 18/3/25 22:31, Richard Henderson wrote:
>> Avoid testing CONFIG_USER_ONLY in semihost.h.
>> The only function that's required is semihosting_enabled.
>>
>> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
>> ---
>> include/semihosting/semihost.h | 29 ++---------------------------
>> semihosting/user.c | 15 +++++++++++++++
>> semihosting/meson.build | 2 ++
>> 3 files changed, 19 insertions(+), 27 deletions(-)
>> create mode 100644 semihosting/user.c
>
>
>> diff --git a/semihosting/user.c b/semihosting/user.c
>> new file mode 100644
>> index 0000000000..9473729beb
>> --- /dev/null
>> +++ b/semihosting/user.c
>> @@ -0,0 +1,15 @@
>> +/*
>> + * Semihosting for user emulation
>> + *
>> + * Copyright (c) 2019 Linaro Ltd
>> + *
>> + * SPDX-License-Identifier: GPL-2.0-or-later
>> + */
>> +
>> +#include "qemu/osdep.h"
>> +#include "semihosting/semihost.h"
>> +
>> +bool semihosting_enabled(bool is_user)
>> +{
>
> While moving this code, we could also add:
>
> assert(is_user);
I have added this as a separate patch.
r~
^ permalink raw reply [flat|nested] 90+ messages in thread
* Re: [PATCH v2 37/42] include/exec: Split out icount.h
2025-03-19 7:21 ` Philippe Mathieu-Daudé
@ 2025-03-21 0:56 ` Richard Henderson
0 siblings, 0 replies; 90+ messages in thread
From: Richard Henderson @ 2025-03-21 0:56 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, Pierrick Bouvier, qemu-devel
On 3/19/25 00:21, Philippe Mathieu-Daudé wrote:
> On 19/3/25 01:33, Pierrick Bouvier wrote:
>> On 3/18/25 14:32, Richard Henderson wrote:
>>> Split icount stuff from system/cpu-timers.h.
>>> There are 17 files which only require icount.h, 7 that only
>>> require cpu-timers.h, and 7 that require both.
>>>
>>> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
>>> ---
>>> include/exec/icount.h | 68 ++++++++++++++++++++++++++++++++
>
> -> include/accel/tcg/icount.h
I don't think this is the best idea, because of
hw/core/ptimer.c | 2 +-
system/cpu-timers.c | 1 +
system/dma-helpers.c | 2 +-
system/vl.c | 1 +
util/async.c | 2 +-
util/main-loop.c | 1 +
util/qemu-timer.c | 1 +
these uses.
r~
^ permalink raw reply [flat|nested] 90+ messages in thread
* Re: [PATCH v2 12/42] accel/tcg: Use cpu_ld*_code_mmu in translator.c
2025-03-21 0:48 ` Richard Henderson
@ 2025-03-21 18:03 ` Pierrick Bouvier
0 siblings, 0 replies; 90+ messages in thread
From: Pierrick Bouvier @ 2025-03-21 18:03 UTC (permalink / raw)
To: Richard Henderson, qemu-devel; +Cc: philmd
On 3/20/25 17:48, Richard Henderson wrote:
> On 3/18/25 17:23, Pierrick Bouvier wrote:
>>> uint64_t translator_ldq(CPUArchState *env, DisasContextBase *db, vaddr pc)
>>> {
>>> - uint64_t raw, tgt;
>>> + uint64_t val;
>>> - if (translator_ld(env, db, &raw, pc, sizeof(raw))) {
>>> - tgt = tswap64(raw);
>>> - } else {
>>> - tgt = cpu_ldq_code(env, pc);
>>> - raw = tswap64(tgt);
>>> - record_save(db, pc, &raw, sizeof(raw));
>>> + if (!translator_ld(env, db, &val, pc, sizeof(val))) {
>>> + MemOpIdx oi = make_memop_idx(MO_UQ, db->code_mmuidx);
>>> + val = cpu_ldq_code_mmu(env, pc, oi, 0);
>>> + record_save(db, pc, &val, sizeof(val));
>>> }
>>> - return tgt;
>>> + return tswap64(val);
>>> }
>>> void translator_fake_ld(DisasContextBase *db, const void *data, size_t len)
>>
>> If I understand correctly, cpu_ldq_code_mmu performs the tswap call we used to before.
>
> Incorrect: cpu_ldq_code_mmu has no tswap.
>
> It has a conditional bswap, if MO_BSWAP is set, but that's not true for the MO_UQ used
> here. Therefore both the direct load in translator_ld and the cpu_ld*_code_mmu function
> call both produce host-endian values.
>
> Therefore the tswap at the end correctly swaps host to target-endianness.
>
Oh right, missed that.
>
> r~
^ permalink raw reply [flat|nested] 90+ messages in thread
* Re: [PATCH v2 26/42] semihosting: Move user-only implementation out-of-line
2025-03-18 21:31 ` [PATCH v2 26/42] semihosting: Move user-only implementation out-of-line Richard Henderson
2025-03-19 0:26 ` Pierrick Bouvier
2025-03-19 7:16 ` Philippe Mathieu-Daudé
@ 2025-03-31 22:01 ` Pierrick Bouvier
2 siblings, 0 replies; 90+ messages in thread
From: Pierrick Bouvier @ 2025-03-31 22:01 UTC (permalink / raw)
To: Richard Henderson, qemu-devel; +Cc: philmd
[-- Attachment #1: Type: text/plain, Size: 645 bytes --]
On 3/18/25 14:31, Richard Henderson wrote:
> Avoid testing CONFIG_USER_ONLY in semihost.h.
> The only function that's required is semihosting_enabled.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This breaks bsd-user,
CONFIG_SEMIHOSTING is not defined in configs/targets/*bsd-user*, thus
the user stub is not included.
Since in user mode we always return true, we can simply add the stub
inconditionnally for all the user binaries.
See here for details and a patch fixing it [1] (also attached to this
email).
[1]
https://github.com/pbo-linaro/qemu/commit/d105112e11e521ff82b328be5f8fdc2af38aa75b
Regards,
Pierrick
[-- Attachment #2: 0001-FIX-semihosting-always-include-user-definition-for-s.patch --]
[-- Type: text/x-patch, Size: 1442 bytes --]
From d105112e11e521ff82b328be5f8fdc2af38aa75b Mon Sep 17 00:00:00 2001
From: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Date: Mon, 31 Mar 2025 14:39:30 -0700
Subject: [PATCH] FIX semihosting: always include user definition for
semihosting_enabled
CONFIG_SEMIHOSTING is not defined in configs/targets/*bsd-user*, thus
the user stub is not included.
Since in user mode we always return true, we can simply add the stub
inconditionnally for all the user binaries.
ld: error: undefined symbol: semihosting_enabled
>>> referenced by translate-a64.c:2855
>>> libqemu-aarch64-bsd-user.a.p/target_arm_tcg_translate-a64.c.o
>>> referenced by translate.c:1138
>>> libqemu-aarch64-bsd-user.a.p/target_arm_tcg_translate.c.o
>>> referenced by translate.c:4814
>>> libqemu-aarch64-bsd-user.a.p/target_arm_tcg_translate.c.o
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
---
semihosting/meson.build | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/semihosting/meson.build b/semihosting/meson.build
index ab67f87e4f0..1f5cfb3ba72 100644
--- a/semihosting/meson.build
+++ b/semihosting/meson.build
@@ -15,7 +15,7 @@ system_ss.add(when: ['CONFIG_SEMIHOSTING'], if_true: files(
'stubs-system.c',
))
-user_ss.add(when: 'CONFIG_SEMIHOSTING', if_true: files('user.c'))
+user_ss.add(files('user.c'))
specific_ss.add(when: ['CONFIG_ARM_COMPATIBLE_SEMIHOSTING'],
if_true: files('arm-compat-semi.c'))
--
2.39.5
^ permalink raw reply related [flat|nested] 90+ messages in thread
* Re: [PATCH v2 15/42] include/exec: Split out mmap-lock.h
2025-03-18 21:31 ` [PATCH v2 15/42] include/exec: Split out mmap-lock.h Richard Henderson
@ 2025-03-31 22:05 ` Pierrick Bouvier
2025-03-31 22:07 ` Pierrick Bouvier
0 siblings, 1 reply; 90+ messages in thread
From: Pierrick Bouvier @ 2025-03-31 22:05 UTC (permalink / raw)
To: Richard Henderson, qemu-devel; +Cc: philmd
[-- Attachment #1: Type: text/plain, Size: 493 bytes --]
On 3/18/25 14:31, Richard Henderson wrote:
> Split out mmap_lock, et al from page-protection.h
> to a new header.
>
> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This breaks bsd-user which needs some extra includes as well.
See here for details and a patch fixing it [1] (also attached to this
email).
[1]
https://github.com/pbo-linaro/qemu/commit/86581aa3a01b62f1cd7797fc9df6fbc98be565ef
Regards,
Pierrick
[-- Attachment #2: 0001-FIX-bsd-user-missing-include-mmap-lock.h.patch --]
[-- Type: text/x-patch, Size: 1044 bytes --]
From 86581aa3a01b62f1cd7797fc9df6fbc98be565ef Mon Sep 17 00:00:00 2001
From: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Date: Mon, 31 Mar 2025 14:28:05 -0700
Subject: [PATCH] FIX bsd-user: missing include mmap-lock.h
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
---
bsd-user/bsd-mem.h | 1 +
bsd-user/mmap.c | 1 +
2 files changed, 2 insertions(+)
diff --git a/bsd-user/bsd-mem.h b/bsd-user/bsd-mem.h
index 90ca0e33775..1be906c5914 100644
--- a/bsd-user/bsd-mem.h
+++ b/bsd-user/bsd-mem.h
@@ -56,6 +56,7 @@
#include <fcntl.h>
#include "qemu-bsd.h"
+#include "exec/mmap-lock.h"
#include "exec/page-protection.h"
#include "user/page-protection.h"
diff --git a/bsd-user/mmap.c b/bsd-user/mmap.c
index 3f0df79c375..47e317517cb 100644
--- a/bsd-user/mmap.c
+++ b/bsd-user/mmap.c
@@ -17,6 +17,7 @@
* along with this program; if not, see <http://www.gnu.org/licenses/>.
*/
#include "qemu/osdep.h"
+#include "exec/mmap-lock.h"
#include "exec/page-protection.h"
#include "user/page-protection.h"
--
2.39.5
^ permalink raw reply related [flat|nested] 90+ messages in thread
* Re: [PATCH v2 15/42] include/exec: Split out mmap-lock.h
2025-03-31 22:05 ` Pierrick Bouvier
@ 2025-03-31 22:07 ` Pierrick Bouvier
0 siblings, 0 replies; 90+ messages in thread
From: Pierrick Bouvier @ 2025-03-31 22:07 UTC (permalink / raw)
To: Richard Henderson, qemu-devel; +Cc: philmd
On 3/31/25 15:05, Pierrick Bouvier wrote:
> On 3/18/25 14:31, Richard Henderson wrote:
>> Split out mmap_lock, et al from page-protection.h
>> to a new header.
>>
>> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
>> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
>
> This breaks bsd-user which needs some extra includes as well.
>
> See here for details and a patch fixing it [1] (also attached to this
> email).
>
> [1]
> https://github.com/pbo-linaro/qemu/commit/86581aa3a01b62f1cd7797fc9df6fbc98be565ef
>
> Regards,
> Pierrick
I guess you're more than familiar with building BSD variants, but just
in case, an easy reproducer can be found here [1].
[1]
https://github.com/pbo-linaro/qemu-ci/blob/ae92b220f699cd366e596bfd31f3a52a4e325bbe/.github/workflows/build.yml#L161
Regards,
Pierrick
^ permalink raw reply [flat|nested] 90+ messages in thread
* Re: [PATCH v2 11/42] accel/tcg: Perform aligned atomic reads in translator_ld
2025-03-18 21:31 ` [PATCH v2 11/42] accel/tcg: Perform aligned atomic reads in translator_ld Richard Henderson
` (2 preceding siblings ...)
2025-03-19 17:18 ` Pierrick Bouvier
@ 2025-04-01 6:18 ` Philippe Mathieu-Daudé
3 siblings, 0 replies; 90+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-04-01 6:18 UTC (permalink / raw)
To: Richard Henderson, qemu-devel
Cc: pierrick.bouvier, Jim Shu, Frank Chang, qemu-riscv
Cc'ing Jim & Frank
On 18/3/25 22:31, Richard Henderson wrote:
> Perform aligned atomic reads in translator_ld, if possible.
> According to
>
> https://lore.kernel.org/qemu-devel/20240607101403.1109-1-jim.shu@sifive.com/
>
> this is required for RISC-V Ziccif.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> accel/tcg/translator.c | 42 ++++++++++++++++++++++++++++++++++++++----
> 1 file changed, 38 insertions(+), 4 deletions(-)
>
> diff --git a/accel/tcg/translator.c b/accel/tcg/translator.c
> index ef1538b4fc..157be33bf6 100644
> --- a/accel/tcg/translator.c
> +++ b/accel/tcg/translator.c
> @@ -265,12 +265,14 @@ static bool translator_ld(CPUArchState *env, DisasContextBase *db,
>
> if (likely(((base ^ last) & TARGET_PAGE_MASK) == 0)) {
> /* Entire read is from the first page. */
> - memcpy(dest, host + (pc - base), len);
> - return true;
> + goto do_read;
> }
>
> if (unlikely(((base ^ pc) & TARGET_PAGE_MASK) == 0)) {
> - /* Read begins on the first page and extends to the second. */
> + /*
> + * Read begins on the first page and extends to the second.
> + * The unaligned read is never atomic.
> + */
> size_t len0 = -(pc | TARGET_PAGE_MASK);
> memcpy(dest, host + (pc - base), len0);
> pc += len0;
> @@ -329,7 +331,39 @@ static bool translator_ld(CPUArchState *env, DisasContextBase *db,
> host = db->host_addr[1];
> }
>
> - memcpy(dest, host + (pc - base), len);
> + do_read:
> + /*
> + * Assume aligned reads should be atomic, if possible.
> + * We're not in a position to jump out with EXCP_ATOMIC.
> + */
> + host += pc - base;
> + switch (len) {
> + case 2:
> + if (QEMU_IS_ALIGNED(pc, 2)) {
> + uint16_t t = qatomic_read((uint16_t *)host);
> + stw_he_p(dest, t);
> + return true;
> + }
> + break;
> + case 4:
> + if (QEMU_IS_ALIGNED(pc, 4)) {
> + uint32_t t = qatomic_read((uint32_t *)host);
> + stl_he_p(dest, t);
> + return true;
> + }
> + break;
> +#ifdef CONFIG_ATOMIC64
> + case 8:
> + if (QEMU_IS_ALIGNED(pc, 8)) {
> + uint64_t t = qatomic_read__nocheck((uint64_t *)host);
> + stq_he_p(dest, t);
> + return true;
> + }
> + break;
> +#endif
> + }
> + /* Unaligned or partial read from the second page is not atomic. */
> + memcpy(dest, host, len);
> return true;
> }
>
^ permalink raw reply [flat|nested] 90+ messages in thread
* Re: [PATCH v2 09/42] include/exec: Inline *_data memory operations
2025-03-18 21:31 ` [PATCH v2 09/42] include/exec: Inline *_data " Richard Henderson
@ 2025-04-01 6:24 ` Philippe Mathieu-Daudé
2025-04-01 17:56 ` Richard Henderson
0 siblings, 1 reply; 90+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-04-01 6:24 UTC (permalink / raw)
To: Richard Henderson, qemu-devel; +Cc: pierrick.bouvier
On 18/3/25 22:31, Richard Henderson wrote:
> These need to be per-target for 'abi_ptr'. Expand inline to
> the *_data_ra api with ra == 0.
>
> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> include/exec/cpu_ldst.h | 123 ++++++++++++++++++++++++++++++------
> accel/tcg/ldst_common.c.inc | 89 --------------------------
> 2 files changed, 104 insertions(+), 108 deletions(-)
>
> diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h
> index a2a90c7554..d084da0b5f 100644
> --- a/include/exec/cpu_ldst.h
> +++ b/include/exec/cpu_ldst.h
> @@ -74,25 +74,6 @@
> #include "user/guest-host.h"
> #endif /* CONFIG_USER_ONLY */
>
> -uint32_t cpu_ldub_data(CPUArchState *env, abi_ptr ptr);
> -int cpu_ldsb_data(CPUArchState *env, abi_ptr ptr);
> -uint32_t cpu_lduw_be_data(CPUArchState *env, abi_ptr ptr);
> -int cpu_ldsw_be_data(CPUArchState *env, abi_ptr ptr);
> -uint32_t cpu_ldl_be_data(CPUArchState *env, abi_ptr ptr);
> -uint64_t cpu_ldq_be_data(CPUArchState *env, abi_ptr ptr);
> -uint32_t cpu_lduw_le_data(CPUArchState *env, abi_ptr ptr);
> -int cpu_ldsw_le_data(CPUArchState *env, abi_ptr ptr);
> -uint32_t cpu_ldl_le_data(CPUArchState *env, abi_ptr ptr);
> -uint64_t cpu_ldq_le_data(CPUArchState *env, abi_ptr ptr);
> -
> -void cpu_stb_data(CPUArchState *env, abi_ptr ptr, uint32_t val);
> -void cpu_stw_be_data(CPUArchState *env, abi_ptr ptr, uint32_t val);
> -void cpu_stl_be_data(CPUArchState *env, abi_ptr ptr, uint32_t val);
> -void cpu_stq_be_data(CPUArchState *env, abi_ptr ptr, uint64_t val);
> -void cpu_stw_le_data(CPUArchState *env, abi_ptr ptr, uint32_t val);
> -void cpu_stl_le_data(CPUArchState *env, abi_ptr ptr, uint32_t val);
> -void cpu_stq_le_data(CPUArchState *env, abi_ptr ptr, uint64_t val);
> -
> static inline uint32_t
> cpu_ldub_mmuidx_ra(CPUArchState *env, abi_ptr addr, int mmu_idx, uintptr_t ra)
> {
> @@ -342,6 +323,110 @@ cpu_stq_le_data_ra(CPUArchState *env, abi_ptr addr, uint64_t val, uintptr_t ra)
> cpu_stq_le_mmuidx_ra(env, addr, val, mmu_index, ra);
> }
>
> +/*--------------------------*/
> +
> +static inline uint32_t
Pre-existing, but why don't we use 'unsigned int' like for the signed
variants, or the plain int8_t type?
> +cpu_ldub_data(CPUArchState *env, abi_ptr addr)
> +{
> + return cpu_ldub_data_ra(env, addr, 0);
> +}
> +
> +static inline int
> +cpu_ldsb_data(CPUArchState *env, abi_ptr addr)
> +{
> + return (int8_t)cpu_ldub_data(env, addr);
> +}
> +
> +static inline uint32_t
> +cpu_lduw_be_data(CPUArchState *env, abi_ptr addr)
> +{
> + return cpu_lduw_be_data_ra(env, addr, 0);
> +}
> +
> +static inline int
> +cpu_ldsw_be_data(CPUArchState *env, abi_ptr addr)
> +{
> + return (int16_t)cpu_lduw_be_data(env, addr);
> +}
> +
> +static inline uint32_t
> +cpu_ldl_be_data(CPUArchState *env, abi_ptr addr)
> +{
> + return cpu_ldl_be_data_ra(env, addr, 0);
> +}
> +
> +static inline uint64_t
> +cpu_ldq_be_data(CPUArchState *env, abi_ptr addr)
> +{
> + return cpu_ldq_be_data_ra(env, addr, 0);
> +}
> +
> +static inline uint32_t
> +cpu_lduw_le_data(CPUArchState *env, abi_ptr addr)
> +{
> + return cpu_lduw_le_data_ra(env, addr, 0);
> +}
> +
> +static inline int
> +cpu_ldsw_le_data(CPUArchState *env, abi_ptr addr)
> +{
> + return (int16_t)cpu_lduw_le_data(env, addr);
> +}
> +
> +static inline uint32_t
> +cpu_ldl_le_data(CPUArchState *env, abi_ptr addr)
> +{
> + return cpu_ldl_le_data_ra(env, addr, 0);
> +}
> +
> +static inline uint64_t
> +cpu_ldq_le_data(CPUArchState *env, abi_ptr addr)
> +{
> + return cpu_ldq_le_data_ra(env, addr, 0);
> +}
> +
> +static inline void
> +cpu_stb_data(CPUArchState *env, abi_ptr addr, uint32_t val)
> +{
> + cpu_stb_data_ra(env, addr, val, 0);
> +}
> +
> +static inline void
> +cpu_stw_be_data(CPUArchState *env, abi_ptr addr, uint32_t val)
> +{
> + cpu_stw_be_data_ra(env, addr, val, 0);
> +}
> +
> +static inline void
> +cpu_stl_be_data(CPUArchState *env, abi_ptr addr, uint32_t val)
> +{
> + cpu_stl_be_data_ra(env, addr, val, 0);
> +}
> +
> +static inline void
> +cpu_stq_be_data(CPUArchState *env, abi_ptr addr, uint64_t val)
> +{
> + cpu_stq_be_data_ra(env, addr, val, 0);
> +}
> +
> +static inline void
> +cpu_stw_le_data(CPUArchState *env, abi_ptr addr, uint32_t val)
> +{
> + cpu_stw_le_data_ra(env, addr, val, 0);
> +}
> +
> +static inline void
> +cpu_stl_le_data(CPUArchState *env, abi_ptr addr, uint32_t val)
> +{
> + cpu_stl_le_data_ra(env, addr, val, 0);
> +}
> +
> +static inline void
> +cpu_stq_le_data(CPUArchState *env, abi_ptr addr, uint64_t val)
> +{
> + cpu_stq_le_data_ra(env, addr, val, 0);
> +}
^ permalink raw reply [flat|nested] 90+ messages in thread
* Re: [PATCH v2 09/42] include/exec: Inline *_data memory operations
2025-04-01 6:24 ` Philippe Mathieu-Daudé
@ 2025-04-01 17:56 ` Richard Henderson
0 siblings, 0 replies; 90+ messages in thread
From: Richard Henderson @ 2025-04-01 17:56 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel; +Cc: pierrick.bouvier
On 4/1/25 01:24, Philippe Mathieu-Daudé wrote:
> On 18/3/25 22:31, Richard Henderson wrote:
>> These need to be per-target for 'abi_ptr'. Expand inline to
>> the *_data_ra api with ra == 0.
>>
>> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
>> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
>> ---
>> include/exec/cpu_ldst.h | 123 ++++++++++++++++++++++++++++++------
>> accel/tcg/ldst_common.c.inc | 89 --------------------------
>> 2 files changed, 104 insertions(+), 108 deletions(-)
>>
>> diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h
>> index a2a90c7554..d084da0b5f 100644
>> --- a/include/exec/cpu_ldst.h
>> +++ b/include/exec/cpu_ldst.h
>> @@ -74,25 +74,6 @@
>> #include "user/guest-host.h"
>> #endif /* CONFIG_USER_ONLY */
>> -uint32_t cpu_ldub_data(CPUArchState *env, abi_ptr ptr);
>> -int cpu_ldsb_data(CPUArchState *env, abi_ptr ptr);
>> -uint32_t cpu_lduw_be_data(CPUArchState *env, abi_ptr ptr);
>> -int cpu_ldsw_be_data(CPUArchState *env, abi_ptr ptr);
>> -uint32_t cpu_ldl_be_data(CPUArchState *env, abi_ptr ptr);
>> -uint64_t cpu_ldq_be_data(CPUArchState *env, abi_ptr ptr);
>> -uint32_t cpu_lduw_le_data(CPUArchState *env, abi_ptr ptr);
>> -int cpu_ldsw_le_data(CPUArchState *env, abi_ptr ptr);
>> -uint32_t cpu_ldl_le_data(CPUArchState *env, abi_ptr ptr);
>> -uint64_t cpu_ldq_le_data(CPUArchState *env, abi_ptr ptr);
>> -
>> -void cpu_stb_data(CPUArchState *env, abi_ptr ptr, uint32_t val);
>> -void cpu_stw_be_data(CPUArchState *env, abi_ptr ptr, uint32_t val);
>> -void cpu_stl_be_data(CPUArchState *env, abi_ptr ptr, uint32_t val);
>> -void cpu_stq_be_data(CPUArchState *env, abi_ptr ptr, uint64_t val);
>> -void cpu_stw_le_data(CPUArchState *env, abi_ptr ptr, uint32_t val);
>> -void cpu_stl_le_data(CPUArchState *env, abi_ptr ptr, uint32_t val);
>> -void cpu_stq_le_data(CPUArchState *env, abi_ptr ptr, uint64_t val);
>> -
>> static inline uint32_t
>> cpu_ldub_mmuidx_ra(CPUArchState *env, abi_ptr addr, int mmu_idx, uintptr_t ra)
>> {
>> @@ -342,6 +323,110 @@ cpu_stq_le_data_ra(CPUArchState *env, abi_ptr addr, uint64_t val,
>> uintptr_t ra)
>> cpu_stq_le_mmuidx_ra(env, addr, val, mmu_index, ra);
>> }
>> +/*--------------------------*/
>> +
>> +static inline uint32_t
>
> Pre-existing, but why don't we use 'unsigned int' like for the signed
> variants, or the plain int8_t type?
It's the original type used by the api.
You'd never change this. If you want to audit all of the uses vs the api change, you'd
update to one of the newer function groups.
r~
^ permalink raw reply [flat|nested] 90+ messages in thread
* Re: [PATCH v2 06/42] include/exec: Split out cpu-mmu-index.h
2025-03-18 21:31 ` [PATCH v2 06/42] include/exec: Split out cpu-mmu-index.h Richard Henderson
2025-03-19 0:02 ` Pierrick Bouvier
@ 2025-04-02 11:26 ` Philippe Mathieu-Daudé
2025-04-02 18:33 ` Richard Henderson
1 sibling, 1 reply; 90+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-04-02 11:26 UTC (permalink / raw)
To: Richard Henderson, qemu-devel; +Cc: pierrick.bouvier
Hi Richard,
On 18/3/25 22:31, Richard Henderson wrote:
> The implementation of cpu_mmu_index was split between cpu-common.h
> and cpu-all.h, depending on CONFIG_USER_ONLY. We already have the
> plumbing common to user and system mode. Using MMU_USER_IDX
> requires the cpu.h for a specific target, and so is restricted to
> when we're compiling per-target.
>
> Include the new header only where needed.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> include/exec/cpu-all.h | 6 ------
> include/exec/cpu-common.h | 20 ------------------
> include/exec/cpu-mmu-index.h | 39 +++++++++++++++++++++++++++++++++++
> include/exec/cpu_ldst.h | 1 +
> semihosting/uaccess.c | 1 +
> target/arm/gdbstub64.c | 3 +++
> target/hppa/mem_helper.c | 1 +
> target/i386/tcg/translate.c | 1 +
> target/loongarch/cpu_helper.c | 1 +
> target/microblaze/helper.c | 1 +
> target/microblaze/mmu.c | 1 +
> target/openrisc/translate.c | 1 +
> target/sparc/cpu.c | 1 +
> target/sparc/mmu_helper.c | 1 +
> target/tricore/helper.c | 1 +
> target/xtensa/mmu_helper.c | 1 +
> 16 files changed, 54 insertions(+), 26 deletions(-)
> create mode 100644 include/exec/cpu-mmu-index.h
> diff --git a/include/exec/cpu-mmu-index.h b/include/exec/cpu-mmu-index.h
> new file mode 100644
> index 0000000000..b46e622048
> --- /dev/null
> +++ b/include/exec/cpu-mmu-index.h
> @@ -0,0 +1,39 @@
> +/*
> + * cpu_mmu_index()
> + *
> + * Copyright (c) 2003 Fabrice Bellard
> + *
> + * SPDX-License-Identifier: LGPL-2.1+
> + */
> +
> +#ifndef EXEC_CPU_MMU_INDEX_H
> +#define EXEC_CPU_MMU_INDEX_H
> +
> +#include "hw/core/cpu.h"
> +#include "tcg/debug-assert.h"
> +#ifdef COMPILING_PER_TARGET
> +#include "cpu.h"
IIUC we only need "cpu.h" on user emulation. Maybe use:
#if defined(COMPILING_PER_TARGET) && defined(CONFIG_USER_ONLY)
?
> +#endif
> +
> +/**
> + * cpu_mmu_index:
> + * @env: The cpu environment
> + * @ifetch: True for code access, false for data access.
> + *
> + * Return the core mmu index for the current translation regime.
> + * This function is used by generic TCG code paths.
> + */
> +static inline int cpu_mmu_index(CPUState *cs, bool ifetch)
> +{
> +#ifdef COMPILING_PER_TARGET
> +# ifdef CONFIG_USER_ONLY
> + return MMU_USER_IDX;
> +# endif
> +#endif
> +
> + int ret = cs->cc->mmu_index(cs, ifetch);
> + tcg_debug_assert(ret >= 0 && ret < NB_MMU_MODES);
> + return ret;
> +}
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
^ permalink raw reply [flat|nested] 90+ messages in thread
* Re: [PATCH v2 06/42] include/exec: Split out cpu-mmu-index.h
2025-04-02 11:26 ` Philippe Mathieu-Daudé
@ 2025-04-02 18:33 ` Richard Henderson
2025-04-02 20:14 ` Philippe Mathieu-Daudé
0 siblings, 1 reply; 90+ messages in thread
From: Richard Henderson @ 2025-04-02 18:33 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel; +Cc: pierrick.bouvier
On 4/2/25 04:26, Philippe Mathieu-Daudé wrote:
> Hi Richard,
>
> On 18/3/25 22:31, Richard Henderson wrote:
>> The implementation of cpu_mmu_index was split between cpu-common.h
>> and cpu-all.h, depending on CONFIG_USER_ONLY. We already have the
>> plumbing common to user and system mode. Using MMU_USER_IDX
>> requires the cpu.h for a specific target, and so is restricted to
>> when we're compiling per-target.
>>
>> Include the new header only where needed.
>>
>> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
>> ---
>> include/exec/cpu-all.h | 6 ------
>> include/exec/cpu-common.h | 20 ------------------
>> include/exec/cpu-mmu-index.h | 39 +++++++++++++++++++++++++++++++++++
>> include/exec/cpu_ldst.h | 1 +
>> semihosting/uaccess.c | 1 +
>> target/arm/gdbstub64.c | 3 +++
>> target/hppa/mem_helper.c | 1 +
>> target/i386/tcg/translate.c | 1 +
>> target/loongarch/cpu_helper.c | 1 +
>> target/microblaze/helper.c | 1 +
>> target/microblaze/mmu.c | 1 +
>> target/openrisc/translate.c | 1 +
>> target/sparc/cpu.c | 1 +
>> target/sparc/mmu_helper.c | 1 +
>> target/tricore/helper.c | 1 +
>> target/xtensa/mmu_helper.c | 1 +
>> 16 files changed, 54 insertions(+), 26 deletions(-)
>> create mode 100644 include/exec/cpu-mmu-index.h
>
>
>> diff --git a/include/exec/cpu-mmu-index.h b/include/exec/cpu-mmu-index.h
>> new file mode 100644
>> index 0000000000..b46e622048
>> --- /dev/null
>> +++ b/include/exec/cpu-mmu-index.h
>> @@ -0,0 +1,39 @@
>> +/*
>> + * cpu_mmu_index()
>> + *
>> + * Copyright (c) 2003 Fabrice Bellard
>> + *
>> + * SPDX-License-Identifier: LGPL-2.1+
>> + */
>> +
>> +#ifndef EXEC_CPU_MMU_INDEX_H
>> +#define EXEC_CPU_MMU_INDEX_H
>> +
>> +#include "hw/core/cpu.h"
>> +#include "tcg/debug-assert.h"
>> +#ifdef COMPILING_PER_TARGET
>> +#include "cpu.h"
>
> IIUC we only need "cpu.h" on user emulation. Maybe use:
>
> #if defined(COMPILING_PER_TARGET) && defined(CONFIG_USER_ONLY)
Can't.
>> +#ifdef COMPILING_PER_TARGET
>> +# ifdef CONFIG_USER_ONLY
It would have to be this nesting, for the poisoning.
r~
^ permalink raw reply [flat|nested] 90+ messages in thread
* Re: [PATCH v2 06/42] include/exec: Split out cpu-mmu-index.h
2025-04-02 18:33 ` Richard Henderson
@ 2025-04-02 20:14 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 90+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-04-02 20:14 UTC (permalink / raw)
To: Richard Henderson, qemu-devel; +Cc: pierrick.bouvier
On 2/4/25 20:33, Richard Henderson wrote:
> On 4/2/25 04:26, Philippe Mathieu-Daudé wrote:
>> Hi Richard,
>>
>> On 18/3/25 22:31, Richard Henderson wrote:
>>> The implementation of cpu_mmu_index was split between cpu-common.h
>>> and cpu-all.h, depending on CONFIG_USER_ONLY. We already have the
>>> plumbing common to user and system mode. Using MMU_USER_IDX
>>> requires the cpu.h for a specific target, and so is restricted to
>>> when we're compiling per-target.
>>>
>>> Include the new header only where needed.
>>>
>>> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
>>> ---
>>> include/exec/cpu-all.h | 6 ------
>>> include/exec/cpu-common.h | 20 ------------------
>>> include/exec/cpu-mmu-index.h | 39 +++++++++++++++++++++++++++++++++++
>>> include/exec/cpu_ldst.h | 1 +
>>> semihosting/uaccess.c | 1 +
>>> target/arm/gdbstub64.c | 3 +++
>>> target/hppa/mem_helper.c | 1 +
>>> target/i386/tcg/translate.c | 1 +
>>> target/loongarch/cpu_helper.c | 1 +
>>> target/microblaze/helper.c | 1 +
>>> target/microblaze/mmu.c | 1 +
>>> target/openrisc/translate.c | 1 +
>>> target/sparc/cpu.c | 1 +
>>> target/sparc/mmu_helper.c | 1 +
>>> target/tricore/helper.c | 1 +
>>> target/xtensa/mmu_helper.c | 1 +
>>> 16 files changed, 54 insertions(+), 26 deletions(-)
>>> create mode 100644 include/exec/cpu-mmu-index.h
>>
>>
>>> diff --git a/include/exec/cpu-mmu-index.h b/include/exec/cpu-mmu-index.h
>>> new file mode 100644
>>> index 0000000000..b46e622048
>>> --- /dev/null
>>> +++ b/include/exec/cpu-mmu-index.h
>>> @@ -0,0 +1,39 @@
>>> +/*
>>> + * cpu_mmu_index()
>>> + *
>>> + * Copyright (c) 2003 Fabrice Bellard
>>> + *
>>> + * SPDX-License-Identifier: LGPL-2.1+
>>> + */
>>> +
>>> +#ifndef EXEC_CPU_MMU_INDEX_H
>>> +#define EXEC_CPU_MMU_INDEX_H
>>> +
>>> +#include "hw/core/cpu.h"
>>> +#include "tcg/debug-assert.h"
>>> +#ifdef COMPILING_PER_TARGET
>>> +#include "cpu.h"
>>
>> IIUC we only need "cpu.h" on user emulation. Maybe use:
>>
>> #if defined(COMPILING_PER_TARGET) && defined(CONFIG_USER_ONLY)
>
> Can't.
>
>>> +#ifdef COMPILING_PER_TARGET
>>> +# ifdef CONFIG_USER_ONLY
>
> It would have to be this nesting, for the poisoning.
Fine then, so we avoid including the huge "cpu.h" when not necessary.
^ permalink raw reply [flat|nested] 90+ messages in thread
end of thread, other threads:[~2025-04-02 20:14 UTC | newest]
Thread overview: 90+ messages (download: mbox.gz follow: Atom feed
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2025-03-18 21:31 [PATCH v2 00/42] accel/tcg, codebase: Build once patches Richard Henderson
2025-03-18 21:31 ` [PATCH v2 01/42] accel/tcg: Build user-exec-stub.c once Richard Henderson
2025-03-18 21:31 ` [PATCH v2 02/42] accel/tcg: Build plugin-gen.c once Richard Henderson
2025-03-18 21:31 ` [PATCH v2 03/42] accel/tcg: Fix cpu_ld*_code_mmu for user mode Richard Henderson
2025-03-18 23:52 ` Pierrick Bouvier
2025-03-19 1:05 ` Richard Henderson
2025-03-19 1:08 ` Pierrick Bouvier
2025-03-19 1:09 ` Pierrick Bouvier
2025-03-18 21:31 ` [PATCH v2 04/42] include/exec: Use vaddr for *_mmu guest memory access routines Richard Henderson
2025-03-18 21:31 ` [PATCH v2 05/42] include/exec: Split out cpu-ldst-common.h Richard Henderson
2025-03-18 21:31 ` [PATCH v2 06/42] include/exec: Split out cpu-mmu-index.h Richard Henderson
2025-03-19 0:02 ` Pierrick Bouvier
2025-03-19 1:16 ` Richard Henderson
2025-03-19 17:16 ` Pierrick Bouvier
2025-03-20 14:58 ` Richard Henderson
2025-03-20 15:13 ` Pierrick Bouvier
2025-04-02 11:26 ` Philippe Mathieu-Daudé
2025-04-02 18:33 ` Richard Henderson
2025-04-02 20:14 ` Philippe Mathieu-Daudé
2025-03-18 21:31 ` [PATCH v2 07/42] include/exec: Inline *_mmuidx_ra memory operations Richard Henderson
2025-03-18 21:31 ` [PATCH v2 08/42] include/exec: Inline *_data_ra " Richard Henderson
2025-03-18 21:31 ` [PATCH v2 09/42] include/exec: Inline *_data " Richard Henderson
2025-04-01 6:24 ` Philippe Mathieu-Daudé
2025-04-01 17:56 ` Richard Henderson
2025-03-18 21:31 ` [PATCH v2 10/42] include/exec: Inline *_code " Richard Henderson
2025-03-18 21:31 ` [PATCH v2 11/42] accel/tcg: Perform aligned atomic reads in translator_ld Richard Henderson
2025-03-19 0:05 ` Alistair Francis
2025-03-19 0:15 ` Pierrick Bouvier
2025-03-19 1:28 ` Richard Henderson
2025-03-19 17:18 ` Pierrick Bouvier
2025-03-19 17:18 ` Pierrick Bouvier
2025-04-01 6:18 ` Philippe Mathieu-Daudé
2025-03-18 21:31 ` [PATCH v2 12/42] accel/tcg: Use cpu_ld*_code_mmu in translator.c Richard Henderson
2025-03-19 0:23 ` Pierrick Bouvier
2025-03-21 0:48 ` Richard Henderson
2025-03-21 18:03 ` Pierrick Bouvier
2025-03-18 21:31 ` [PATCH v2 13/42] accel/tcg: Implement translator_ld*_end Richard Henderson
2025-03-18 21:31 ` [PATCH v2 14/42] accel/tcg: Remove mmap_lock/unlock from watchpoint.c Richard Henderson
2025-03-18 21:31 ` [PATCH v2 15/42] include/exec: Split out mmap-lock.h Richard Henderson
2025-03-31 22:05 ` Pierrick Bouvier
2025-03-31 22:07 ` Pierrick Bouvier
2025-03-18 21:31 ` [PATCH v2 16/42] include/system: Move exec/memory.h to system/memory.h Richard Henderson
2025-03-18 21:31 ` [PATCH v2 17/42] include/system: Move exec/address-spaces.h to system/address-spaces.h Richard Henderson
2025-03-18 21:31 ` [PATCH v2 18/42] include/system: Move exec/ioport.h to system/ioport.h Richard Henderson
2025-03-18 21:31 ` [PATCH v2 19/42] include/system: Move exec/ram_addr.h to system/ram_addr.h Richard Henderson
2025-03-18 21:31 ` [PATCH v2 20/42] include/system: Move exec/ramblock.h to system/ramblock.h Richard Henderson
2025-03-18 21:31 ` [PATCH v2 21/42] accel/tcg: Remove unnecesary inclusion of memory-internal.h in cputlb.c Richard Henderson
2025-03-18 21:31 ` [PATCH v2 22/42] exec: Restrict memory-internal.h to system/ Richard Henderson
2025-03-18 21:31 ` [PATCH v2 23/42] meson: Introduce top-level libuser_ss and libsystem_ss Richard Henderson
2025-03-18 21:31 ` [PATCH v2 24/42] gdbstub: Move syscalls.c out of common_ss Richard Henderson
2025-03-18 21:31 ` [PATCH v2 25/42] accel/tcg: Use libuser_ss and libsystem_ss Richard Henderson
2025-03-18 21:31 ` [PATCH v2 26/42] semihosting: Move user-only implementation out-of-line Richard Henderson
2025-03-19 0:26 ` Pierrick Bouvier
2025-03-19 7:16 ` Philippe Mathieu-Daudé
2025-03-21 0:50 ` Richard Henderson
2025-03-31 22:01 ` Pierrick Bouvier
2025-03-18 21:31 ` [PATCH v2 27/42] target/mips: Restrict semihosting tests to system mode Richard Henderson
2025-03-19 0:26 ` Pierrick Bouvier
2025-03-18 21:31 ` [PATCH v2 28/42] target/xtensa: " Richard Henderson
2025-03-19 0:27 ` Pierrick Bouvier
2025-03-18 21:31 ` [PATCH v2 29/42] include/exec: Split out watchpoint.h Richard Henderson
2025-03-19 0:30 ` Pierrick Bouvier
2025-03-19 1:33 ` Richard Henderson
2025-03-18 21:31 ` [PATCH v2 30/42] hw/core: Move unconditional files to libsystem_ss, libuser_ss Richard Henderson
2025-03-18 21:31 ` [PATCH v2 31/42] system: Move most files to libsystem_ss Richard Henderson
2025-03-19 0:32 ` Pierrick Bouvier
2025-03-19 7:18 ` Philippe Mathieu-Daudé
2025-03-18 21:31 ` [PATCH v2 32/42] plugins: Move api.c, core.c to libuser_ss, libsystem_ss Richard Henderson
2025-03-19 0:32 ` Pierrick Bouvier
2025-03-18 21:31 ` [PATCH v2 33/42] include/exec: Drop ifndef CONFIG_USER_ONLY from cpu-common.h Richard Henderson
2025-03-18 21:31 ` [PATCH v2 34/42] include/hw/core: Drop ifndef CONFIG_USER_ONLY from cpu.h Richard Henderson
2025-03-18 21:32 ` [PATCH v2 35/42] include/hw/intc: Remove ifndef CONFIG_USER_ONLY from armv7m_nvic.h Richard Henderson
2025-03-19 0:33 ` Pierrick Bouvier
2025-03-18 21:32 ` [PATCH v2 36/42] include/hw/s390x: Remove ifndef CONFIG_USER_ONLY in css.h Richard Henderson
2025-03-18 21:32 ` [PATCH v2 37/42] include/exec: Split out icount.h Richard Henderson
2025-03-19 0:33 ` Pierrick Bouvier
2025-03-19 7:21 ` Philippe Mathieu-Daudé
2025-03-21 0:56 ` Richard Henderson
2025-03-18 21:32 ` [PATCH v2 38/42] include/exec: Protect icount_enabled from poisoned symbols Richard Henderson
2025-03-19 0:42 ` Pierrick Bouvier
2025-03-19 1:41 ` Richard Henderson
2025-03-18 21:32 ` [PATCH v2 39/42] include/system: Remove ifndef CONFIG_USER_ONLY in qtest.h Richard Henderson
2025-03-19 0:43 ` Pierrick Bouvier
2025-03-19 7:26 ` Philippe Mathieu-Daudé
2025-03-19 17:25 ` Pierrick Bouvier
2025-03-18 21:32 ` [PATCH v2 40/42] include/qemu: Remove ifndef CONFIG_USER_ONLY from accel.h Richard Henderson
2025-03-18 21:32 ` [PATCH v2 41/42] target/riscv: Remove ifndef CONFIG_USER_ONLY from cpu_cfg.h Richard Henderson
2025-03-19 1:41 ` Alistair Francis
2025-03-18 21:32 ` [PATCH v2 42/42] meson: Only allow CONFIG_USER_ONLY from certain source sets Richard Henderson
2025-03-19 0:44 ` Pierrick Bouvier
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