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From: Nicholas Piggin <npiggin@gmail.com>
To: qemu-devel@nongnu.org
Cc: "Nicholas Piggin" <npiggin@gmail.com>,
	qemu-ppc@nongnu.org, "Cédric Le Goater" <clg@redhat.com>
Subject: [PULL 03/12] pnv/xive: Fix possible undefined shift error in group size calculation
Date: Fri, 21 Mar 2025 16:24:07 +1000	[thread overview]
Message-ID: <20250321062421.116129-4-npiggin@gmail.com> (raw)
In-Reply-To: <20250321062421.116129-1-npiggin@gmail.com>

Coverity discovered a potential shift overflow in group size calculation
in the case of a guest error. Add checks and logs to ensure a issues are
caught.

Make the group and crowd error checking code more similar to one another
while here.

Resolves: Coverity CID 1593724
Fixes: 9cb7f6ebed60 ("ppc/xive2: Support group-matching when looking for target")
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
 hw/intc/xive.c  | 27 ++++++++++++++++++++++++---
 hw/intc/xive2.c | 19 ++++++++++++++-----
 2 files changed, 38 insertions(+), 8 deletions(-)

diff --git a/hw/intc/xive.c b/hw/intc/xive.c
index e86f274932..3eb28c2265 100644
--- a/hw/intc/xive.c
+++ b/hw/intc/xive.c
@@ -1662,12 +1662,20 @@ uint32_t xive_get_vpgroup_size(uint32_t nvp_index)
      * (starting with the least significant bits) in the NVP index
      * gives the size of the group.
      */
-    return 1 << (ctz32(~nvp_index) + 1);
+    int first_zero = cto32(nvp_index);
+    if (first_zero >= 31) {
+        qemu_log_mask(LOG_GUEST_ERROR, "XIVE: Invalid group index 0x%08x",
+                                       nvp_index);
+        return 0;
+    }
+
+    return 1U << (first_zero + 1);
 }
 
 static uint8_t xive_get_group_level(bool crowd, bool ignore,
                                     uint32_t nvp_blk, uint32_t nvp_index)
 {
+    int first_zero;
     uint8_t level;
 
     if (!ignore) {
@@ -1675,12 +1683,25 @@ static uint8_t xive_get_group_level(bool crowd, bool ignore,
         return 0;
     }
 
-    level = (ctz32(~nvp_index) + 1) & 0b1111;
+    first_zero = cto32(nvp_index);
+    if (first_zero >= 31) {
+        qemu_log_mask(LOG_GUEST_ERROR, "XIVE: Invalid group index 0x%08x",
+                                       nvp_index);
+        return 0;
+    }
+
+    level = (first_zero + 1) & 0b1111;
     if (crowd) {
         uint32_t blk;
 
         /* crowd level is bit position of first 0 from the right in nvp_blk */
-        blk = ctz32(~nvp_blk) + 1;
+        first_zero = cto32(nvp_blk);
+        if (first_zero >= 31) {
+            qemu_log_mask(LOG_GUEST_ERROR, "XIVE: Invalid crowd block 0x%08x",
+                                           nvp_blk);
+            return 0;
+        }
+        blk = first_zero + 1;
 
         /*
          * Supported crowd sizes are 2^1, 2^2, and 2^4. 2^3 is not supported.
diff --git a/hw/intc/xive2.c b/hw/intc/xive2.c
index f8ef615487..311b42e15d 100644
--- a/hw/intc/xive2.c
+++ b/hw/intc/xive2.c
@@ -1153,13 +1153,15 @@ static bool xive2_vp_match_mask(uint32_t cam1, uint32_t cam2,
 
 static uint8_t xive2_get_vp_block_mask(uint32_t nvt_blk, bool crowd)
 {
-    uint8_t size, block_mask = 0b1111;
+    uint8_t block_mask = 0b1111;
 
     /* 3 supported crowd sizes: 2, 4, 16 */
     if (crowd) {
-        size = xive_get_vpgroup_size(nvt_blk);
-        if (size == 8) {
-            qemu_log_mask(LOG_GUEST_ERROR, "XIVE: Invalid crowd size of 8n");
+        uint32_t size = xive_get_vpgroup_size(nvt_blk);
+
+        if (size != 2 && size != 4 && size != 16) {
+            qemu_log_mask(LOG_GUEST_ERROR, "XIVE: Invalid crowd size of %d",
+                                           size);
             return block_mask;
         }
         block_mask &= ~(size - 1);
@@ -1172,7 +1174,14 @@ static uint32_t xive2_get_vp_index_mask(uint32_t nvt_index, bool cam_ignore)
     uint32_t index_mask = 0xFFFFFF; /* 24 bits */
 
     if (cam_ignore) {
-        index_mask &= ~(xive_get_vpgroup_size(nvt_index) - 1);
+        uint32_t size = xive_get_vpgroup_size(nvt_index);
+
+        if (size < 2) {
+            qemu_log_mask(LOG_GUEST_ERROR, "XIVE: Invalid group size of %d",
+                                           size);
+            return index_mask;
+        }
+        index_mask &= ~(size - 1);
     }
     return index_mask;
 }
-- 
2.47.1



  parent reply	other threads:[~2025-03-21  6:28 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-03-21  6:24 [PULL 00/12] ppc-for-10.0-2 queue Nicholas Piggin
2025-03-21  6:24 ` [PULL 01/12] ppc/spapr: Fix RTAS stopped state Nicholas Piggin
2025-03-21  6:24 ` [PULL 02/12] ppc/xive: Fix typo in crowd block level calculation Nicholas Piggin
2025-03-21  6:24 ` Nicholas Piggin [this message]
2025-03-21  6:24 ` [PULL 04/12] ppc/xive2: Fix logical / bitwise comparison typo Nicholas Piggin
2025-03-21  6:24 ` [PULL 05/12] ppc/spapr: Fix possible pa_features memory overflow Nicholas Piggin
2025-03-21  6:24 ` [PULL 06/12] ppc/pnv: Move the PNOR LPC address into struct PnvPnor Nicholas Piggin
2025-03-21  6:24 ` [PULL 07/12] ppc/pnv: Fix system symbols in HOMER structure definitions Nicholas Piggin
2025-03-21  6:24 ` [PULL 08/12] ppc/amigaone: Check blk_pwrite return value Nicholas Piggin
2025-03-21  6:24 ` [PULL 09/12] ppc/amigaone: Constify default_env Nicholas Piggin
2025-03-21  6:24 ` [PULL 10/12] ppc/spapr: fix default cpu for pre-9.0 machines Nicholas Piggin
2025-03-21  6:24 ` [PULL 11/12] target/ppc: Fix facility interrupt checks for VSX Nicholas Piggin
2025-03-21  6:24 ` [PULL 12/12] target/ppc: Fix e200 duplicate SPRs Nicholas Piggin
2025-03-23 22:29 ` [PULL 00/12] ppc-for-10.0-2 queue Stefan Hajnoczi

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