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From: Dapeng Mi <dapeng1.mi@linux.intel.com>
To: Paolo Bonzini <pbonzini@redhat.com>,
	Sean Christopherson <seanjc@google.com>
Cc: qemu-devel@nongnu.org, kvm@vger.kernel.org,
	Zhao Liu <zhao1.liu@intel.com>, Zide Chen <zide.chen@intel.com>,
	Xiaoyao Li <xiaoyao.li@intel.com>,
	Dongli Zhang <dongli.zhang@oracle.com>,
	Mingwei Zhang <mizhang@google.com>,
	Das Sandipan <Sandipan.Das@amd.com>,
	Shukla Manali <Manali.Shukla@amd.com>,
	Dapeng Mi <dapeng1.mi@intel.com>,
	Dapeng Mi <dapeng1.mi@linux.intel.com>
Subject: [PATCH 3/3] target/i386: Support VMX_VM_EXIT_SAVE_IA32_PERF_GLOBAL_CTRL
Date: Mon, 24 Mar 2025 12:37:12 +0000	[thread overview]
Message-ID: <20250324123712.34096-4-dapeng1.mi@linux.intel.com> (raw)
In-Reply-To: <20250324123712.34096-1-dapeng1.mi@linux.intel.com>

Since Sapphire Rapids starts, VMX instrocude a new bit
SAVE_IA32_PERF_GLOBAL_CTRL in VMCS VM-EXIT control field to manage if
vmx can save guest PERF_GLOBAL_CTRL MSR.

This patch enables this feature.

Signed-off-by: Dapeng Mi <dapeng1.mi@linux.intel.com>
---
 target/i386/cpu.c | 12 ++++++++----
 target/i386/cpu.h |  1 +
 2 files changed, 9 insertions(+), 4 deletions(-)

diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 1b64ceaaba..317ccc8b0a 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -1481,7 +1481,8 @@ FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
             "vmx-exit-save-efer", "vmx-exit-load-efer",
                 "vmx-exit-save-preemption-timer", "vmx-exit-clear-bndcfgs",
             NULL, "vmx-exit-clear-rtit-ctl", NULL, NULL,
-            NULL, "vmx-exit-load-pkrs", NULL, "vmx-exit-secondary-ctls",
+            NULL, "vmx-exit-load-pkrs", "vmx-exit-save-perf-global-ctrl",
+            "vmx-exit-secondary-ctls",
         },
         .msr = {
             .index = MSR_IA32_VMX_TRUE_EXIT_CTLS,
@@ -4212,7 +4213,8 @@ static const X86CPUDefinition builtin_x86_defs[] = {
             VMX_VM_EXIT_LOAD_IA32_PERF_GLOBAL_CTRL |
             VMX_VM_EXIT_ACK_INTR_ON_EXIT | VMX_VM_EXIT_SAVE_IA32_PAT |
             VMX_VM_EXIT_LOAD_IA32_PAT | VMX_VM_EXIT_SAVE_IA32_EFER |
-            VMX_VM_EXIT_LOAD_IA32_EFER | VMX_VM_EXIT_SAVE_VMX_PREEMPTION_TIMER,
+            VMX_VM_EXIT_LOAD_IA32_EFER | VMX_VM_EXIT_SAVE_VMX_PREEMPTION_TIMER |
+            VMX_VM_EXIT_SAVE_IA32_PERF_GLOBAL_CTRL,
         .features[FEAT_VMX_MISC] =
             MSR_VMX_MISC_STORE_LMA | MSR_VMX_MISC_ACTIVITY_HLT |
             MSR_VMX_MISC_VMWRITE_VMEXIT,
@@ -4368,7 +4370,8 @@ static const X86CPUDefinition builtin_x86_defs[] = {
             VMX_VM_EXIT_LOAD_IA32_PERF_GLOBAL_CTRL |
             VMX_VM_EXIT_ACK_INTR_ON_EXIT | VMX_VM_EXIT_SAVE_IA32_PAT |
             VMX_VM_EXIT_LOAD_IA32_PAT | VMX_VM_EXIT_SAVE_IA32_EFER |
-            VMX_VM_EXIT_LOAD_IA32_EFER | VMX_VM_EXIT_SAVE_VMX_PREEMPTION_TIMER,
+            VMX_VM_EXIT_LOAD_IA32_EFER | VMX_VM_EXIT_SAVE_VMX_PREEMPTION_TIMER |
+            VMX_VM_EXIT_SAVE_IA32_PERF_GLOBAL_CTRL,
         .features[FEAT_VMX_MISC] =
             MSR_VMX_MISC_STORE_LMA | MSR_VMX_MISC_ACTIVITY_HLT |
             MSR_VMX_MISC_VMWRITE_VMEXIT,
@@ -4511,7 +4514,8 @@ static const X86CPUDefinition builtin_x86_defs[] = {
             VMX_VM_EXIT_LOAD_IA32_PERF_GLOBAL_CTRL |
             VMX_VM_EXIT_ACK_INTR_ON_EXIT | VMX_VM_EXIT_SAVE_IA32_PAT |
             VMX_VM_EXIT_LOAD_IA32_PAT | VMX_VM_EXIT_SAVE_IA32_EFER |
-            VMX_VM_EXIT_LOAD_IA32_EFER | VMX_VM_EXIT_SAVE_VMX_PREEMPTION_TIMER,
+            VMX_VM_EXIT_LOAD_IA32_EFER | VMX_VM_EXIT_SAVE_VMX_PREEMPTION_TIMER |
+            VMX_VM_EXIT_SAVE_IA32_PERF_GLOBAL_CTRL,
         .features[FEAT_VMX_MISC] =
             MSR_VMX_MISC_STORE_LMA | MSR_VMX_MISC_ACTIVITY_HLT |
             MSR_VMX_MISC_VMWRITE_VMEXIT,
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index 76f24446a5..ad387e6ee7 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -1312,6 +1312,7 @@ uint64_t x86_cpu_get_supported_feature_word(X86CPU *cpu, FeatureWord w);
 #define VMX_VM_EXIT_PT_CONCEAL_PIP                  0x01000000
 #define VMX_VM_EXIT_CLEAR_IA32_RTIT_CTL             0x02000000
 #define VMX_VM_EXIT_LOAD_IA32_PKRS                  0x20000000
+#define VMX_VM_EXIT_SAVE_IA32_PERF_GLOBAL_CTRL      0x40000000
 #define VMX_VM_EXIT_ACTIVATE_SECONDARY_CONTROLS     0x80000000
 
 #define VMX_VM_ENTRY_LOAD_DEBUG_CONTROLS            0x00000004
-- 
2.40.1



  parent reply	other threads:[~2025-03-24  7:09 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-03-24 12:37 [PATCH 0/3] Enable x86 mediated vPMU Dapeng Mi
2025-03-24 12:37 ` [PATCH 1/3] kvm: Introduce kvm_arch_pre_create_vcpu() Dapeng Mi
2025-03-24 12:37 ` [PATCH 2/3] target/i386: Call KVM_CAP_PMU_CAPABILITY iotcl to enable/disable PMU Dapeng Mi
2025-03-26  6:46   ` Dongli Zhang
2025-03-27  0:44     ` Mi, Dapeng
2025-03-27  2:15       ` Mingwei Zhang
2025-03-27  3:47         ` Mi, Dapeng
2025-03-24 12:37 ` Dapeng Mi [this message]
2025-04-27  8:54   ` [PATCH 3/3] target/i386: Support VMX_VM_EXIT_SAVE_IA32_PERF_GLOBAL_CTRL Zhao Liu
2025-04-27  9:42     ` Mi, Dapeng

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