qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Eduardo Habkost" <eduardo@habkost.net>,
	"Pierrick Bouvier" <pierrick.bouvier@linaro.org>,
	"Zhao Liu" <zhao1.liu@intel.com>,
	"Marcel Apfelbaum" <marcel.apfelbaum@gmail.com>,
	"Philippe Mathieu-Daudé" <philmd@linaro.org>,
	"Yanan Wang" <wangyanan55@huawei.com>,
	"Jiaxun Yang" <jiaxun.yang@flygoat.com>,
	"Aurelien Jarno" <aurelien@aurel32.net>,
	"Aleksandar Rikalo" <arikalo@gmail.com>,
	"Alex Bennée" <alex.bennee@linaro.org>,
	"Anton Johansson" <anjo@rev.ng>,
	"Richard Henderson" <richard.henderson@linaro.org>
Subject: [PATCH-for-10.1 2/8] target/mips: Declare CPU QOM types using DEFINE_TYPES() macro
Date: Tue, 25 Mar 2025 16:40:52 +0100	[thread overview]
Message-ID: <20250325154058.92735-3-philmd@linaro.org> (raw)
In-Reply-To: <20250325154058.92735-1-philmd@linaro.org>

When multiple QOM types are registered in the same file,
it is simpler to use the the DEFINE_TYPES() macro. In
particular because type array declared with such macro
are easier to review.

In few commits we are going to add more types, so replace
the type_register_static() to ease further reviews.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/mips/cpu.c | 23 +++++++++++++----------
 1 file changed, 13 insertions(+), 10 deletions(-)

diff --git a/target/mips/cpu.c b/target/mips/cpu.c
index b207106dd79..097554fd8ae 100644
--- a/target/mips/cpu.c
+++ b/target/mips/cpu.c
@@ -597,17 +597,21 @@ static void mips_cpu_class_init(ObjectClass *c, void *data)
 #endif /* CONFIG_TCG */
 }
 
-static const TypeInfo mips_cpu_type_info = {
-    .name = TYPE_MIPS_CPU,
-    .parent = TYPE_CPU,
-    .instance_size = sizeof(MIPSCPU),
-    .instance_align = __alignof(MIPSCPU),
-    .instance_init = mips_cpu_initfn,
-    .abstract = true,
-    .class_size = sizeof(MIPSCPUClass),
-    .class_init = mips_cpu_class_init,
+static const TypeInfo mips_cpu_types[] = {
+    {
+        .name           = TYPE_MIPS_CPU,
+        .parent         = TYPE_CPU,
+        .instance_size  = sizeof(MIPSCPU),
+        .instance_align = __alignof(MIPSCPU),
+        .instance_init  = mips_cpu_initfn,
+        .abstract       = true,
+        .class_size     = sizeof(MIPSCPUClass),
+        .class_init     = mips_cpu_class_init,
+    }
 };
 
+DEFINE_TYPES(mips_cpu_types)
+
 static void mips_cpu_cpudef_class_init(ObjectClass *oc, void *data)
 {
     MIPSCPUClass *mcc = MIPS_CPU_CLASS(oc);
@@ -632,7 +636,6 @@ static void mips_cpu_register_types(void)
 {
     int i;
 
-    type_register_static(&mips_cpu_type_info);
     for (i = 0; i < mips_defs_number; i++) {
         mips_register_cpudef_type(&mips_defs[i]);
     }
-- 
2.47.1



  parent reply	other threads:[~2025-03-25 15:41 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-03-25 15:40 [PATCH-for-10.1 0/8] target/mips: Make 'cpu-qom.h' target agnostic Philippe Mathieu-Daudé
2025-03-25 15:40 ` [PATCH-for-10.1 1/8] cpus: Open code OBJECT_DECLARE_TYPE() in OBJECT_DECLARE_CPU_TYPE() Philippe Mathieu-Daudé
2025-03-25 15:40 ` Philippe Mathieu-Daudé [this message]
2025-03-26 15:21   ` [PATCH-for-10.1 2/8] target/mips: Declare CPU QOM types using DEFINE_TYPES() macro Pierrick Bouvier
2025-03-25 15:40 ` [PATCH-for-10.1 3/8] target/mips: Make MIPS_CPU common to new MIPS32_CPU / MIPS64_CPU types Philippe Mathieu-Daudé
2025-03-26 15:24   ` Pierrick Bouvier
2025-03-25 15:40 ` [PATCH-for-10.1 4/8] target/mips: Prefix MMU API with 'mips_' Philippe Mathieu-Daudé
2025-03-26 15:24   ` Pierrick Bouvier
2025-03-25 15:40 ` [PATCH-for-10.1 5/8] target/mips: Replace ldtul_p() -> ldn_p(sizeof(target_ulong)) Philippe Mathieu-Daudé
2025-03-26 15:24   ` Pierrick Bouvier
2025-03-25 15:40 ` [PATCH-for-10.1 6/8] target/mips: Introduce mips_cpu_is_64bit() helper Philippe Mathieu-Daudé
2025-03-26 15:26   ` Pierrick Bouvier
2025-03-26 18:22   ` Richard Henderson
2025-03-27 17:05     ` Philippe Mathieu-Daudé
2025-03-25 15:40 ` [PATCH-for-10.1 7/8] target/mips: Get CPU register size using mips_cpu_is_64bit() Philippe Mathieu-Daudé
2025-03-26 15:28   ` Pierrick Bouvier
2025-03-25 15:40 ` [PATCH-for-10.1 8/8] target/mips: Introduce mips_env_64bit_enabled() helper Philippe Mathieu-Daudé
2025-03-26 15:29   ` Pierrick Bouvier
2025-03-26 18:26   ` Richard Henderson
2025-03-26 16:50 ` [PATCH-for-10.1 0/8] target/mips: Make 'cpu-qom.h' target agnostic Anton Johansson via

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20250325154058.92735-3-philmd@linaro.org \
    --to=philmd@linaro.org \
    --cc=alex.bennee@linaro.org \
    --cc=anjo@rev.ng \
    --cc=arikalo@gmail.com \
    --cc=aurelien@aurel32.net \
    --cc=eduardo@habkost.net \
    --cc=jiaxun.yang@flygoat.com \
    --cc=marcel.apfelbaum@gmail.com \
    --cc=pierrick.bouvier@linaro.org \
    --cc=qemu-devel@nongnu.org \
    --cc=richard.henderson@linaro.org \
    --cc=wangyanan55@huawei.com \
    --cc=zhao1.liu@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).