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From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Eduardo Habkost" <eduardo@habkost.net>,
	"Pierrick Bouvier" <pierrick.bouvier@linaro.org>,
	"Zhao Liu" <zhao1.liu@intel.com>,
	"Marcel Apfelbaum" <marcel.apfelbaum@gmail.com>,
	"Philippe Mathieu-Daudé" <philmd@linaro.org>,
	"Yanan Wang" <wangyanan55@huawei.com>,
	"Jiaxun Yang" <jiaxun.yang@flygoat.com>,
	"Aurelien Jarno" <aurelien@aurel32.net>,
	"Aleksandar Rikalo" <arikalo@gmail.com>,
	"Alex Bennée" <alex.bennee@linaro.org>,
	"Anton Johansson" <anjo@rev.ng>
Subject: [PATCH-for-10.1 5/8] target/mips: Replace ldtul_p() -> ldn_p(sizeof(target_ulong))
Date: Tue, 25 Mar 2025 16:40:55 +0100	[thread overview]
Message-ID: <20250325154058.92735-6-philmd@linaro.org> (raw)
In-Reply-To: <20250325154058.92735-1-philmd@linaro.org>

Replace the single ldtul_p() call by a generic ldn_p() one.
No logical change.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 target/mips/gdbstub.c | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/target/mips/gdbstub.c b/target/mips/gdbstub.c
index 169d47416a6..b9fc667373e 100644
--- a/target/mips/gdbstub.c
+++ b/target/mips/gdbstub.c
@@ -79,12 +79,13 @@ int mips_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
 {
     CPUMIPSState *env = cpu_env(cs);
     target_ulong tmp;
+    size_t regsize = sizeof(tmp);
 
-    tmp = ldtul_p(mem_buf);
+    tmp = ldn_p(mem_buf, regsize);
 
     if (n < 32) {
         env->active_tc.gpr[n] = tmp;
-        return sizeof(target_ulong);
+        return regsize;
     }
     if (env->CP0_Config1 & (1 << CP0C1_FP) && n >= 38 && n < 72) {
         switch (n) {
@@ -104,7 +105,7 @@ int mips_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
             }
             break;
         }
-        return sizeof(target_ulong);
+        return regsize;
     }
     switch (n) {
     case 32:
@@ -144,5 +145,5 @@ int mips_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
         break;
     }
 
-    return sizeof(target_ulong);
+    return regsize;
 }
-- 
2.47.1



  parent reply	other threads:[~2025-03-25 15:42 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-03-25 15:40 [PATCH-for-10.1 0/8] target/mips: Make 'cpu-qom.h' target agnostic Philippe Mathieu-Daudé
2025-03-25 15:40 ` [PATCH-for-10.1 1/8] cpus: Open code OBJECT_DECLARE_TYPE() in OBJECT_DECLARE_CPU_TYPE() Philippe Mathieu-Daudé
2025-03-25 15:40 ` [PATCH-for-10.1 2/8] target/mips: Declare CPU QOM types using DEFINE_TYPES() macro Philippe Mathieu-Daudé
2025-03-26 15:21   ` Pierrick Bouvier
2025-03-25 15:40 ` [PATCH-for-10.1 3/8] target/mips: Make MIPS_CPU common to new MIPS32_CPU / MIPS64_CPU types Philippe Mathieu-Daudé
2025-03-26 15:24   ` Pierrick Bouvier
2025-03-25 15:40 ` [PATCH-for-10.1 4/8] target/mips: Prefix MMU API with 'mips_' Philippe Mathieu-Daudé
2025-03-26 15:24   ` Pierrick Bouvier
2025-03-25 15:40 ` Philippe Mathieu-Daudé [this message]
2025-03-26 15:24   ` [PATCH-for-10.1 5/8] target/mips: Replace ldtul_p() -> ldn_p(sizeof(target_ulong)) Pierrick Bouvier
2025-03-25 15:40 ` [PATCH-for-10.1 6/8] target/mips: Introduce mips_cpu_is_64bit() helper Philippe Mathieu-Daudé
2025-03-26 15:26   ` Pierrick Bouvier
2025-03-26 18:22   ` Richard Henderson
2025-03-27 17:05     ` Philippe Mathieu-Daudé
2025-03-25 15:40 ` [PATCH-for-10.1 7/8] target/mips: Get CPU register size using mips_cpu_is_64bit() Philippe Mathieu-Daudé
2025-03-26 15:28   ` Pierrick Bouvier
2025-03-25 15:40 ` [PATCH-for-10.1 8/8] target/mips: Introduce mips_env_64bit_enabled() helper Philippe Mathieu-Daudé
2025-03-26 15:29   ` Pierrick Bouvier
2025-03-26 18:26   ` Richard Henderson
2025-03-26 16:50 ` [PATCH-for-10.1 0/8] target/mips: Make 'cpu-qom.h' target agnostic Anton Johansson via

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