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From: Nicholas Piggin <npiggin@gmail.com>
To: qemu-ppc@nongnu.org
Cc: Nicholas Piggin <npiggin@gmail.com>,
	qemu-devel@nongnu.org,
	Richard Henderson <richard.henderson@linaro.org>
Subject: [RFC PATCH 3/3] target/ppc: Allow goto-tb on fixed real mode translations
Date: Tue,  1 Apr 2025 01:54:23 +1000	[thread overview]
Message-ID: <20250331155423.619451-4-npiggin@gmail.com> (raw)
In-Reply-To: <20250331155423.619451-1-npiggin@gmail.com>

Fixed translations (mapping and protections unchanged) do not have
to restrict TB chaining to within a target page.

Hypervisor-real mode is a fixed translation.

TODO: Supervisor-real mode in spapr should also be a fixed translation.
---
 target/ppc/translate.c | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/target/ppc/translate.c b/target/ppc/translate.c
index 5e610bf29a5..4b4440c8a16 100644
--- a/target/ppc/translate.c
+++ b/target/ppc/translate.c
@@ -183,6 +183,7 @@ struct DisasContext {
     bool sf_mode;
     bool has_cfar;
     bool has_bhrb;
+    bool ifetch_fixed_xlate;
 #endif
     bool fpu_enabled;
     bool altivec_enabled;
@@ -3656,6 +3657,18 @@ static inline bool use_goto_tb(DisasContext *ctx, target_ulong dest)
     if (unlikely(ctx->singlestep_enabled)) {
         return false;
     }
+
+#if defined(TARGET_PPC64)
+    /* XXX: make translator_use_goto_tb take a 'fixed map' bool */
+    /* Suppress goto_tb if requested. */
+    if (ctx->ifetch_fixed_xlate) {
+        if (tb_cflags(ctx->base.tb) & CF_NO_GOTO_TB) {
+            return false;
+        }
+        return true;
+    }
+#endif
+
     return translator_use_goto_tb(&ctx->base, dest);
 }
 
@@ -6545,6 +6558,7 @@ static void ppc_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cs)
     ctx->sf_mode = (hflags >> HFLAGS_64) & 1;
     ctx->has_cfar = !!(env->flags & POWERPC_FLAG_CFAR);
     ctx->has_bhrb = !!(env->flags & POWERPC_FLAG_BHRB);
+    ctx->ifetch_fixed_xlate = ((hflags >> HFLAGS_IMMU_IDX) & 7) == 3;
 #endif
     ctx->lazy_tlb_flush = env->mmu_model == POWERPC_MMU_32B
         || env->mmu_model & POWERPC_MMU_64;
@@ -6627,6 +6641,12 @@ static void ppc_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs)
         gen_invalid(ctx);
     }
 
+#if defined(TARGET_PPC64)
+    if (ctx->ifetch_fixed_xlate) {
+        return;
+    }
+#endif
+
     /* End the TB when crossing a page boundary. */
     if (ctx->base.is_jmp == DISAS_NEXT && !(pc & ~TARGET_PAGE_MASK)) {
         ctx->base.is_jmp = DISAS_TOO_MANY;
-- 
2.47.1



  parent reply	other threads:[~2025-03-31 15:55 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-03-31 15:54 [RFC PATCH 0/3] translation performance improvements Nicholas Piggin
2025-03-31 15:54 ` [RFC PATCH 1/3] accel/tcg: Option to permit incoherent translation block cache vs stores Nicholas Piggin
2025-03-31 19:51   ` Richard Henderson
2025-04-01  8:34     ` Nicholas Piggin
2025-04-01  8:42       ` Philippe Mathieu-Daudé
2025-03-31 15:54 ` [RFC PATCH 2/3] target/ppc: define TARGET_HAS_LAZY_ICACHE Nicholas Piggin
2025-03-31 15:54 ` Nicholas Piggin [this message]
2025-03-31 19:40 ` [RFC PATCH 0/3] translation performance improvements Richard Henderson
2025-04-01  8:33   ` Nicholas Piggin

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