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From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Richard Henderson" <richard.henderson@linaro.org>,
	"Philippe Mathieu-Daudé" <philmd@linaro.org>,
	"Pierrick Bouvier" <pierrick.bouvier@linaro.org>
Subject: [PULL 05/23] hw/core/cpu: Use size_t for memory_rw_debug len argument
Date: Mon, 31 Mar 2025 21:48:03 +0200	[thread overview]
Message-ID: <20250331194822.77309-6-philmd@linaro.org> (raw)
In-Reply-To: <20250331194822.77309-1-philmd@linaro.org>

From: Richard Henderson <richard.henderson@linaro.org>

Match the prototype of cpu_memory_rw_debug().

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20250325224403.4011975-4-richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 include/hw/core/cpu.h     | 2 +-
 target/sparc/cpu.h        | 2 +-
 target/sparc/mmu_helper.c | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h
index 5d11d26556a..abd8764e834 100644
--- a/include/hw/core/cpu.h
+++ b/include/hw/core/cpu.h
@@ -154,7 +154,7 @@ struct CPUClass {
 
     int (*mmu_index)(CPUState *cpu, bool ifetch);
     int (*memory_rw_debug)(CPUState *cpu, vaddr addr,
-                           uint8_t *buf, int len, bool is_write);
+                           uint8_t *buf, size_t len, bool is_write);
     void (*dump_state)(CPUState *cpu, FILE *, int flags);
     void (*query_cpu_fast)(CPUState *cpu, CpuInfoFast *value);
     int64_t (*get_arch_id)(CPUState *cpu);
diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h
index 462bcb6c0e6..68f8c21e7cb 100644
--- a/target/sparc/cpu.h
+++ b/target/sparc/cpu.h
@@ -604,7 +604,7 @@ void dump_mmu(CPUSPARCState *env);
 
 #if !defined(TARGET_SPARC64) && !defined(CONFIG_USER_ONLY)
 int sparc_cpu_memory_rw_debug(CPUState *cpu, vaddr addr,
-                              uint8_t *buf, int len, bool is_write);
+                              uint8_t *buf, size_t len, bool is_write);
 #endif
 
 /* translate.c */
diff --git a/target/sparc/mmu_helper.c b/target/sparc/mmu_helper.c
index 7548d01777c..3821cd91ec7 100644
--- a/target/sparc/mmu_helper.c
+++ b/target/sparc/mmu_helper.c
@@ -389,7 +389,7 @@ void dump_mmu(CPUSPARCState *env)
  * that the sparc ABI is followed.
  */
 int sparc_cpu_memory_rw_debug(CPUState *cs, vaddr address,
-                              uint8_t *buf, int len, bool is_write)
+                              uint8_t *buf, size_t len, bool is_write)
 {
     CPUSPARCState *env = cpu_env(cs);
     target_ulong addr = address;
-- 
2.47.1



  parent reply	other threads:[~2025-03-31 19:52 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-03-31 19:47 [PULL 00/23] Misc HW fixes for 2025-03-31 Philippe Mathieu-Daudé
2025-03-31 19:47 ` [PULL 01/23] hw/arm/armv7m: Expose and access System Control Space as little endian Philippe Mathieu-Daudé
2025-03-31 19:48 ` [PULL 02/23] hw/arm/imx8mp-evk: Fix reference count of SoC object Philippe Mathieu-Daudé
2025-03-31 19:48 ` [PULL 03/23] hw/arm/fsl-imx8mp: Derive struct FslImx8mpState from TYPE_SYS_BUS_DEVICE Philippe Mathieu-Daudé
2025-03-31 19:48 ` [PULL 04/23] hw/arm/fsl-imx8mp: Remove unused define Philippe Mathieu-Daudé
2025-03-31 19:48 ` Philippe Mathieu-Daudé [this message]
2025-03-31 19:48 ` [PULL 06/23] hw/block/m25p80: Categorize and add description Philippe Mathieu-Daudé
2025-03-31 19:48 ` [PULL 07/23] hw/display/dm163: Add description Philippe Mathieu-Daudé
2025-03-31 19:48 ` [PULL 08/23] hw/dma/i82374: Categorize and add description Philippe Mathieu-Daudé
2025-03-31 19:48 ` [PULL 09/23] hw/mips: Mark the "mipssim" machine as deprecated Philippe Mathieu-Daudé
2025-03-31 19:48 ` [PULL 10/23] hw/rtc/goldfish: keep time offset when resetting Philippe Mathieu-Daudé
2025-03-31 19:48 ` [PULL 11/23] hw/misc/pll: Do not expose as user-creatable Philippe Mathieu-Daudé
2025-03-31 19:48 ` [PULL 12/23] hw/nvram/xlnx-efuse: " Philippe Mathieu-Daudé
2025-03-31 19:48 ` [PULL 13/23] hw/scsi/lsi53c895a: fix memory leak in lsi_scsi_realize() Philippe Mathieu-Daudé
2025-03-31 19:48 ` [PULL 14/23] hw/sd/sdhci: free irq on exit Philippe Mathieu-Daudé
2025-03-31 19:48 ` [PULL 15/23] hw/char/bcm2835_aux: Fix incorrect interrupt ID when RX disabled Philippe Mathieu-Daudé
2025-03-31 19:48 ` [PULL 16/23] hw/ufs: free irq on exit Philippe Mathieu-Daudé
2025-03-31 19:48 ` [PULL 17/23] hw/pci-host/designware: Fix ATU_UPPER_TARGET register access Philippe Mathieu-Daudé
2025-03-31 19:48 ` [PULL 18/23] target/hppa: Remove duplicated CPU_RESOLVING_TYPE definition Philippe Mathieu-Daudé
2025-03-31 19:48 ` [PULL 19/23] target/avr: Fix buffer read in avr_print_insn Philippe Mathieu-Daudé
2025-03-31 19:48 ` [PULL 20/23] target/sparc: Log unimplemented ASI load/store accesses Philippe Mathieu-Daudé
2025-03-31 19:48 ` [PULL 21/23] target/mips: Revert TARGET_PAGE_BITS_VARY Philippe Mathieu-Daudé
2025-03-31 19:48 ` [PULL 22/23] target/mips: Require even maskbits in update_pagemask Philippe Mathieu-Daudé
2025-03-31 19:48 ` [PULL 23/23] target/mips: Simplify and fix update_pagemask Philippe Mathieu-Daudé

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