From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Steven Lee" <steven_lee@aspeedtech.com>,
"Peter Maydell" <peter.maydell@linaro.org>,
"Jamin Lin" <jamin_lin@aspeedtech.com>,
"Troy Lee" <leetroy@gmail.com>, "Joel Stanley" <joel@jms.id.au>,
"Cédric Le Goater" <clg@kaod.org>,
qemu-arm@nongnu.org,
"Andrew Jeffery" <andrew@codeconstruct.com.au>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>
Subject: [PATCH-for-10.0 2/2] hw/misc/aspeed_scu: Correct minimum access size for AST2500 / AST2600
Date: Tue, 1 Apr 2025 01:04:44 +0200 [thread overview]
Message-ID: <20250331230444.88295-3-philmd@linaro.org> (raw)
In-Reply-To: <20250331230444.88295-1-philmd@linaro.org>
From: Joel Stanley <joel@jms.id.au>
Guest code was performing a byte load to the SCU MMIO region, leading
to the guest code crashing (it should be using proper accessors, but
that is not Qemu's bug). Hardware and the documentation[1] both agree
that byte loads are okay, so change all of the aspeed SCU devices to
accept a minimum access size of 1.
[1] See the 'ARM Address Space Mapping' table in the ASPEED docs. This
is section 6.1 in the ast2400 and ast2700, and 7.1 in the ast2500 and
ast2600 datasheets.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2636
Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Troy Lee <leetroy@gmail.com>
Message-ID: <20241118021820.4928-1-joel@jms.id.au>
[PMD: Rebased, only including SCU changes]
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
hw/misc/aspeed_scu.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/misc/aspeed_scu.c b/hw/misc/aspeed_scu.c
index 6703f3f9691..1af1a35a081 100644
--- a/hw/misc/aspeed_scu.c
+++ b/hw/misc/aspeed_scu.c
@@ -443,7 +443,7 @@ static const MemoryRegionOps aspeed_ast2500_scu_ops = {
.endianness = DEVICE_LITTLE_ENDIAN,
.impl.min_access_size = 4,
.impl.max_access_size = 4,
- .valid.min_access_size = 4,
+ .valid.min_access_size = 1,
.valid.max_access_size = 4,
.valid.unaligned = false,
};
@@ -787,7 +787,7 @@ static const MemoryRegionOps aspeed_ast2600_scu_ops = {
.endianness = DEVICE_LITTLE_ENDIAN,
.impl.min_access_size = 4,
.impl.max_access_size = 4,
- .valid.min_access_size = 4,
+ .valid.min_access_size = 1,
.valid.max_access_size = 4,
.valid.unaligned = false,
};
--
2.47.1
next prev parent reply other threads:[~2025-03-31 23:05 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-31 23:04 [PATCH-for-10.0 0/2] hw/misc/aspeed_scu: Correct minimum access size for AST2500 / AST2600 Philippe Mathieu-Daudé
2025-03-31 23:04 ` [PATCH-for-10.0 1/2] hw/misc/aspeed_scu: Set MemoryRegionOps::impl::access_size to 32-bit Philippe Mathieu-Daudé
2025-04-01 1:07 ` Andrew Jeffery
2025-03-31 23:04 ` Philippe Mathieu-Daudé [this message]
2025-04-01 1:09 ` [PATCH-for-10.0 2/2] hw/misc/aspeed_scu: Correct minimum access size for AST2500 / AST2600 Andrew Jeffery
2025-04-01 9:43 ` [PATCH-for-10.0 0/2] " Cédric Le Goater
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