From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Gustavo Romero" <gustavo.romero@linaro.org>,
"Pierrick Bouvier" <pierrick.bouvier@linaro.org>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Richard Henderson" <richard.henderson@linaro.org>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>
Subject: [PATCH-for-10.1 11/24] target/m68k: Restrict SoftMMU mmu_index() to TCG
Date: Tue, 1 Apr 2025 10:09:24 +0200 [thread overview]
Message-ID: <20250401080938.32278-12-philmd@linaro.org> (raw)
In-Reply-To: <20250401080938.32278-1-philmd@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
target/m68k/cpu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/m68k/cpu.c b/target/m68k/cpu.c
index 0065e1c1ca5..4409d8941ce 100644
--- a/target/m68k/cpu.c
+++ b/target/m68k/cpu.c
@@ -592,6 +592,7 @@ static const TCGCPUOps m68k_tcg_ops = {
.initialize = m68k_tcg_init,
.translate_code = m68k_translate_code,
.restore_state_to_opc = m68k_restore_state_to_opc,
+ .mmu_index = m68k_cpu_mmu_index,
#ifndef CONFIG_USER_ONLY
.tlb_fill = m68k_cpu_tlb_fill,
@@ -615,7 +616,6 @@ static void m68k_cpu_class_init(ObjectClass *c, void *data)
&mcc->parent_phases);
cc->class_by_name = m68k_cpu_class_by_name;
- cc->mmu_index = m68k_cpu_mmu_index;
cc->dump_state = m68k_cpu_dump_state;
cc->set_pc = m68k_cpu_set_pc;
cc->get_pc = m68k_cpu_get_pc;
--
2.47.1
next prev parent reply other threads:[~2025-04-01 8:14 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-04-01 8:09 [PATCH-for-10.1 00/24] cpus: Restrict SoftMMU mmu_index() to TCG Philippe Mathieu-Daudé
2025-04-01 8:09 ` [PATCH-for-10.1 01/24] hw/core/cpu: Update CPUClass::mmu_index docstring Philippe Mathieu-Daudé
2025-04-03 16:41 ` Richard Henderson
2025-04-01 8:09 ` [PATCH-for-10.1 02/24] accel/tcg: Introduce TCGCPUOps::mmu_index() callback Philippe Mathieu-Daudé
2025-04-03 16:42 ` Richard Henderson
2025-04-01 8:09 ` [PATCH-for-10.1 03/24] target/alpha: Restrict SoftMMU mmu_index() to TCG Philippe Mathieu-Daudé
2025-04-01 8:09 ` [PATCH-for-10.1 04/24] target/arm: " Philippe Mathieu-Daudé
2025-04-01 8:09 ` [PATCH-for-10.1 05/24] target/avr: " Philippe Mathieu-Daudé
2025-04-01 8:09 ` [PATCH-for-10.1 06/24] target/hppa: " Philippe Mathieu-Daudé
2025-04-01 8:09 ` [PATCH-for-10.1 07/24] target/i386: Remove unused cpu_(ldub, stb)_kernel macros Philippe Mathieu-Daudé
2025-04-01 8:09 ` [PATCH-for-10.1 08/24] target/i386: Restrict cpu_mmu_index_kernel() to TCG Philippe Mathieu-Daudé
2025-04-01 8:09 ` [PATCH-for-10.1 09/24] target/i386: Restrict SoftMMU mmu_index() " Philippe Mathieu-Daudé
2025-04-01 8:09 ` [PATCH-for-10.1 10/24] target/loongarch: " Philippe Mathieu-Daudé
2025-04-01 8:09 ` Philippe Mathieu-Daudé [this message]
2025-04-01 8:09 ` [PATCH-for-10.1 12/24] target/microblaze: " Philippe Mathieu-Daudé
2025-04-01 8:09 ` [PATCH-for-10.1 13/24] target/mips: " Philippe Mathieu-Daudé
2025-04-01 8:09 ` [PATCH-for-10.1 14/24] target/openrisc: " Philippe Mathieu-Daudé
2025-04-01 8:09 ` [PATCH-for-10.1 15/24] target/ppc: " Philippe Mathieu-Daudé
2025-04-01 8:09 ` [PATCH-for-10.1 16/24] target/riscv: " Philippe Mathieu-Daudé
2025-04-01 8:09 ` [PATCH-for-10.1 17/24] target/rx: " Philippe Mathieu-Daudé
2025-04-01 8:09 ` [PATCH-for-10.1 18/24] target/s390x: " Philippe Mathieu-Daudé
2025-04-01 8:09 ` [PATCH-for-10.1 19/24] target/sh4: " Philippe Mathieu-Daudé
2025-04-01 8:09 ` [PATCH-for-10.1 20/24] target/sparc: " Philippe Mathieu-Daudé
2025-04-01 8:09 ` [PATCH-for-10.1 21/24] target/tricore: " Philippe Mathieu-Daudé
2025-04-01 8:09 ` [PATCH-for-10.1 22/24] target/xtensa: " Philippe Mathieu-Daudé
2025-04-01 8:09 ` [PATCH-for-10.1 23/24] hw/core/cpu: Remove CPUClass::mmu_index() Philippe Mathieu-Daudé
2025-04-02 3:50 ` Philippe Mathieu-Daudé
2025-04-03 16:42 ` Richard Henderson
2025-04-01 8:09 ` [PATCH-for-10.1 24/24] exec: Restrict cpu-mmu-index.h to accel/tcg/ Philippe Mathieu-Daudé
2025-04-01 17:52 ` [PATCH-for-10.1 00/24] cpus: Restrict SoftMMU mmu_index() to TCG Richard Henderson
2025-04-03 17:21 ` Richard Henderson
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