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* [PULL 0/2] aspeed queue
@ 2025-04-01 12:13 Cédric Le Goater
  2025-04-01 12:13 ` [PULL 1/2] hw/misc/aspeed_scu: Set MemoryRegionOps::impl::access_size to 32-bit Cédric Le Goater
  2025-04-01 12:13 ` [PULL 2/2] hw/misc/aspeed_scu: Correct minimum access size for AST2500 / AST2600 Cédric Le Goater
  0 siblings, 2 replies; 3+ messages in thread
From: Cédric Le Goater @ 2025-04-01 12:13 UTC (permalink / raw)
  To: qemu-arm, qemu-devel; +Cc: Cédric Le Goater

The following changes since commit 0f15892acaf3f50ecc20c6dad4b3ebdd701aa93e:

  Merge tag 'pull-riscv-to-apply-20250328' of https://github.com/alistair23/qemu into staging (2025-03-28 08:06:53 -0400)

are available in the Git repository at:

  https://github.com/legoater/qemu/ tags/pull-aspeed-20250401

for you to fetch changes up to 20ab88a9066bcacc28acbd7cbe2c617d90bfb27e:

  hw/misc/aspeed_scu: Correct minimum access size for AST2500 / AST2600 (2025-04-01 11:29:25 +0200)

----------------------------------------------------------------
aspeed queue:

* Fixed SCU access size on AST2500 and AST2600 SoCs

----------------------------------------------------------------
Joel Stanley (1):
      hw/misc/aspeed_scu: Correct minimum access size for AST2500 / AST2600

Philippe Mathieu-Daudé (1):
      hw/misc/aspeed_scu: Set MemoryRegionOps::impl::access_size to 32-bit

 hw/misc/aspeed_scu.c | 16 ++++++++++++++--
 1 file changed, 14 insertions(+), 2 deletions(-)



^ permalink raw reply	[flat|nested] 3+ messages in thread

* [PULL 1/2] hw/misc/aspeed_scu: Set MemoryRegionOps::impl::access_size to 32-bit
  2025-04-01 12:13 [PULL 0/2] aspeed queue Cédric Le Goater
@ 2025-04-01 12:13 ` Cédric Le Goater
  2025-04-01 12:13 ` [PULL 2/2] hw/misc/aspeed_scu: Correct minimum access size for AST2500 / AST2600 Cédric Le Goater
  1 sibling, 0 replies; 3+ messages in thread
From: Cédric Le Goater @ 2025-04-01 12:13 UTC (permalink / raw)
  To: qemu-arm, qemu-devel
  Cc: Philippe Mathieu-Daudé, Andrew Jeffery,
	Cédric Le Goater

From: Philippe Mathieu-Daudé <philmd@linaro.org>

All MemoryRegionOps::read/write() handlers switch over a 32-bit
aligned value, because converted using TO_REG(), which is defined
as:

  #define TO_REG(offset) ((offset) >> 2)

So all implementations are 32-bit.
Set min/max access_size accordingly.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Link: https://lore.kernel.org/qemu-devel/20250331230444.88295-2-philmd@linaro.org
Signed-off-by: Cédric Le Goater <clg@redhat.com>
---
 hw/misc/aspeed_scu.c | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/hw/misc/aspeed_scu.c b/hw/misc/aspeed_scu.c
index 76cfd9167161..6703f3f96914 100644
--- a/hw/misc/aspeed_scu.c
+++ b/hw/misc/aspeed_scu.c
@@ -427,6 +427,10 @@ static const MemoryRegionOps aspeed_ast2400_scu_ops = {
     .read = aspeed_scu_read,
     .write = aspeed_ast2400_scu_write,
     .endianness = DEVICE_LITTLE_ENDIAN,
+    .impl = {
+        .min_access_size = 4,
+        .max_access_size = 4,
+    },
     .valid = {
         .min_access_size = 1,
         .max_access_size = 4,
@@ -437,6 +441,8 @@ static const MemoryRegionOps aspeed_ast2500_scu_ops = {
     .read = aspeed_scu_read,
     .write = aspeed_ast2500_scu_write,
     .endianness = DEVICE_LITTLE_ENDIAN,
+    .impl.min_access_size = 4,
+    .impl.max_access_size = 4,
     .valid.min_access_size = 4,
     .valid.max_access_size = 4,
     .valid.unaligned = false,
@@ -779,6 +785,8 @@ static const MemoryRegionOps aspeed_ast2600_scu_ops = {
     .read = aspeed_ast2600_scu_read,
     .write = aspeed_ast2600_scu_write,
     .endianness = DEVICE_LITTLE_ENDIAN,
+    .impl.min_access_size = 4,
+    .impl.max_access_size = 4,
     .valid.min_access_size = 4,
     .valid.max_access_size = 4,
     .valid.unaligned = false,
@@ -906,6 +914,8 @@ static const MemoryRegionOps aspeed_ast2700_scu_ops = {
     .read = aspeed_ast2700_scu_read,
     .write = aspeed_ast2700_scu_write,
     .endianness = DEVICE_LITTLE_ENDIAN,
+    .impl.min_access_size = 4,
+    .impl.max_access_size = 4,
     .valid.min_access_size = 1,
     .valid.max_access_size = 8,
     .valid.unaligned = false,
@@ -1028,6 +1038,8 @@ static const MemoryRegionOps aspeed_ast2700_scuio_ops = {
     .read = aspeed_ast2700_scuio_read,
     .write = aspeed_ast2700_scuio_write,
     .endianness = DEVICE_LITTLE_ENDIAN,
+    .impl.min_access_size = 4,
+    .impl.max_access_size = 4,
     .valid.min_access_size = 1,
     .valid.max_access_size = 8,
     .valid.unaligned = false,
-- 
2.49.0



^ permalink raw reply related	[flat|nested] 3+ messages in thread

* [PULL 2/2] hw/misc/aspeed_scu: Correct minimum access size for AST2500 / AST2600
  2025-04-01 12:13 [PULL 0/2] aspeed queue Cédric Le Goater
  2025-04-01 12:13 ` [PULL 1/2] hw/misc/aspeed_scu: Set MemoryRegionOps::impl::access_size to 32-bit Cédric Le Goater
@ 2025-04-01 12:13 ` Cédric Le Goater
  1 sibling, 0 replies; 3+ messages in thread
From: Cédric Le Goater @ 2025-04-01 12:13 UTC (permalink / raw)
  To: qemu-arm, qemu-devel
  Cc: Joel Stanley, Troy Lee, Philippe Mathieu-Daudé,
	Andrew Jeffery, Cédric Le Goater

From: Joel Stanley <joel@jms.id.au>

Guest code was performing a byte load to the SCU MMIO region, leading
to the guest code crashing (it should be using proper accessors, but
that is not Qemu's bug). Hardware and the documentation[1] both agree
that byte loads are okay, so change all of the aspeed SCU devices to
accept a minimum access size of 1.

[1] See the 'ARM Address Space Mapping' table in the ASPEED docs. This
is section 6.1 in the ast2400 and ast2700, and 7.1 in the ast2500 and
ast2600 datasheets.

Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2636
Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Troy Lee <leetroy@gmail.com>
Message-ID: <20241118021820.4928-1-joel@jms.id.au>
[PMD: Rebased, only including SCU changes]
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Link: https://lore.kernel.org/qemu-devel/20250331230444.88295-3-philmd@linaro.org
Signed-off-by: Cédric Le Goater <clg@redhat.com>
---
 hw/misc/aspeed_scu.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/hw/misc/aspeed_scu.c b/hw/misc/aspeed_scu.c
index 6703f3f96914..1af1a35a081c 100644
--- a/hw/misc/aspeed_scu.c
+++ b/hw/misc/aspeed_scu.c
@@ -443,7 +443,7 @@ static const MemoryRegionOps aspeed_ast2500_scu_ops = {
     .endianness = DEVICE_LITTLE_ENDIAN,
     .impl.min_access_size = 4,
     .impl.max_access_size = 4,
-    .valid.min_access_size = 4,
+    .valid.min_access_size = 1,
     .valid.max_access_size = 4,
     .valid.unaligned = false,
 };
@@ -787,7 +787,7 @@ static const MemoryRegionOps aspeed_ast2600_scu_ops = {
     .endianness = DEVICE_LITTLE_ENDIAN,
     .impl.min_access_size = 4,
     .impl.max_access_size = 4,
-    .valid.min_access_size = 4,
+    .valid.min_access_size = 1,
     .valid.max_access_size = 4,
     .valid.unaligned = false,
 };
-- 
2.49.0



^ permalink raw reply related	[flat|nested] 3+ messages in thread

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Thread overview: 3+ messages (download: mbox.gz follow: Atom feed
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2025-04-01 12:13 [PULL 0/2] aspeed queue Cédric Le Goater
2025-04-01 12:13 ` [PULL 1/2] hw/misc/aspeed_scu: Set MemoryRegionOps::impl::access_size to 32-bit Cédric Le Goater
2025-04-01 12:13 ` [PULL 2/2] hw/misc/aspeed_scu: Correct minimum access size for AST2500 / AST2600 Cédric Le Goater

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