From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: Richard Henderson <richard.henderson@linaro.org>, qemu-devel@nongnu.org
Subject: [PATCH-for-10.1 26/43] hw/core/cpu: Remove CPUClass::mmu_index()
Date: Wed, 2 Apr 2025 23:03:11 +0200 [thread overview]
Message-ID: <20250402210328.52897-27-philmd@linaro.org> (raw)
In-Reply-To: <20250402210328.52897-1-philmd@linaro.org>
All targets have been converted to TCGCPUOps::mmu_index(),
remove the now unused CPUClass::mmu_index().
Since this handler is now mandatory, add an assertion in
tcg_exec_realizefn().
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
include/exec/cpu-mmu-index.h | 4 +---
include/hw/core/cpu.h | 2 --
accel/tcg/cpu-exec.c | 1 +
3 files changed, 2 insertions(+), 5 deletions(-)
diff --git a/include/exec/cpu-mmu-index.h b/include/exec/cpu-mmu-index.h
index 651526e9f97..a87b6f7c4b7 100644
--- a/include/exec/cpu-mmu-index.h
+++ b/include/exec/cpu-mmu-index.h
@@ -32,9 +32,7 @@ static inline int cpu_mmu_index(CPUState *cs, bool ifetch)
# endif
#endif
- const TCGCPUOps *tcg_ops = cs->cc->tcg_ops;
- int ret = tcg_ops->mmu_index ? tcg_ops->mmu_index(cs, ifetch)
- : cs->cc->mmu_index(cs, ifetch);
+ int ret = cs->cc->tcg_ops->mmu_index(cs, ifetch);
tcg_debug_assert(ret >= 0 && ret < NB_MMU_MODES);
return ret;
}
diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h
index 60b7abaf49b..10b6b25b344 100644
--- a/include/hw/core/cpu.h
+++ b/include/hw/core/cpu.h
@@ -104,7 +104,6 @@ struct SysemuCPUOps;
* instantiatable CPU type.
* @parse_features: Callback to parse command line arguments.
* @reset_dump_flags: #CPUDumpFlags to use for reset logging.
- * @mmu_index: Callback for choosing softmmu mmu index.
* @memory_rw_debug: Callback for GDB memory access.
* @dump_state: Callback for dumping state.
* @query_cpu_fast:
@@ -151,7 +150,6 @@ struct CPUClass {
ObjectClass *(*class_by_name)(const char *cpu_model);
void (*parse_features)(const char *typename, char *str, Error **errp);
- int (*mmu_index)(CPUState *cpu, bool ifetch);
int (*memory_rw_debug)(CPUState *cpu, vaddr addr,
uint8_t *buf, size_t len, bool is_write);
void (*dump_state)(CPUState *cpu, FILE *, int flags);
diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c
index 6c6098955f0..5ced3879ac4 100644
--- a/accel/tcg/cpu-exec.c
+++ b/accel/tcg/cpu-exec.c
@@ -1076,6 +1076,7 @@ bool tcg_exec_realizefn(CPUState *cpu, Error **errp)
assert(tcg_ops->cpu_exec_interrupt);
#endif /* !CONFIG_USER_ONLY */
assert(tcg_ops->translate_code);
+ assert(tcg_ops->mmu_index);
tcg_ops->initialize();
tcg_target_initialized = true;
}
--
2.47.1
next prev parent reply other threads:[~2025-04-02 21:07 UTC|newest]
Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-04-02 21:02 [PATCH-for-10.1 00/43] tcg: philmd's queue Philippe Mathieu-Daudé
2025-04-02 21:02 ` [PATCH-for-10.1 01/43] tcg: Declare TARGET_INSN_START_EXTRA_WORDS in 'cpu-param.h' Philippe Mathieu-Daudé
2025-04-03 21:29 ` Philippe Mathieu-Daudé
2025-04-03 21:43 ` Philippe Mathieu-Daudé
2025-04-02 21:02 ` [PATCH-for-10.1 02/43] tcg: Always define TARGET_INSN_START_EXTRA_WORDS Philippe Mathieu-Daudé
2025-04-02 21:02 ` [PATCH-for-10.1 03/43] hw/core/cpu: Update CPUClass::mmu_index docstring Philippe Mathieu-Daudé
2025-04-02 21:02 ` [PATCH-for-10.1 04/43] accel/tcg: Introduce TCGCPUOps::mmu_index() callback Philippe Mathieu-Daudé
2025-04-02 21:02 ` [PATCH-for-10.1 05/43] target/alpha: Restrict SoftMMU mmu_index() to TCG Philippe Mathieu-Daudé
2025-04-02 21:02 ` [PATCH-for-10.1 06/43] target/arm: " Philippe Mathieu-Daudé
2025-04-02 21:02 ` [PATCH-for-10.1 07/43] target/avr: " Philippe Mathieu-Daudé
2025-04-02 21:02 ` [PATCH-for-10.1 08/43] target/hppa: " Philippe Mathieu-Daudé
2025-04-02 21:02 ` [PATCH-for-10.1 09/43] target/i386: Remove unused cpu_(ldub, stb)_kernel macros Philippe Mathieu-Daudé
2025-04-02 21:02 ` [PATCH-for-10.1 10/43] target/i386: Restrict cpu_mmu_index_kernel() to TCG Philippe Mathieu-Daudé
2025-04-02 21:02 ` [PATCH-for-10.1 11/43] target/i386: Restrict SoftMMU mmu_index() " Philippe Mathieu-Daudé
2025-04-02 21:02 ` [PATCH-for-10.1 12/43] target/loongarch: " Philippe Mathieu-Daudé
2025-04-02 21:02 ` [PATCH-for-10.1 13/43] target/m68k: " Philippe Mathieu-Daudé
2025-04-02 21:02 ` [PATCH-for-10.1 14/43] target/microblaze: " Philippe Mathieu-Daudé
2025-04-02 21:03 ` [PATCH-for-10.1 15/43] target/mips: " Philippe Mathieu-Daudé
2025-04-02 21:03 ` [PATCH-for-10.1 16/43] target/openrisc: " Philippe Mathieu-Daudé
2025-04-02 21:03 ` [PATCH-for-10.1 17/43] target/ppc: " Philippe Mathieu-Daudé
2025-04-02 23:08 ` Philippe Mathieu-Daudé
2025-04-02 21:03 ` [PATCH-for-10.1 18/43] target/riscv: " Philippe Mathieu-Daudé
2025-04-02 21:03 ` [PATCH-for-10.1 19/43] target/rx: Fix copy/paste typo (riscv -> rx) Philippe Mathieu-Daudé
2025-04-02 21:03 ` [PATCH-for-10.1 20/43] target/rx: Restrict SoftMMU mmu_index() to TCG Philippe Mathieu-Daudé
2025-04-02 21:03 ` [PATCH-for-10.1 21/43] target/s390x: " Philippe Mathieu-Daudé
2025-04-02 23:11 ` Philippe Mathieu-Daudé
2025-04-02 21:03 ` [PATCH-for-10.1 22/43] target/sh4: " Philippe Mathieu-Daudé
2025-04-02 21:03 ` [PATCH-for-10.1 23/43] target/sparc: " Philippe Mathieu-Daudé
2025-04-02 21:03 ` [PATCH-for-10.1 24/43] target/tricore: " Philippe Mathieu-Daudé
2025-04-02 21:03 ` [PATCH-for-10.1 25/43] target/xtensa: " Philippe Mathieu-Daudé
2025-04-02 21:03 ` Philippe Mathieu-Daudé [this message]
2025-04-02 21:03 ` [PATCH-for-10.1 27/43] exec: Restrict cpu-mmu-index.h to accel/tcg/ Philippe Mathieu-Daudé
2025-04-02 21:03 ` [PATCH-for-10.1 28/43] exec: Restrict 'cpu-ldst-common.h' " Philippe Mathieu-Daudé
2025-04-02 21:03 ` [PATCH-for-10.1 29/43] exec: Restrict 'cpu_ldst.h' " Philippe Mathieu-Daudé
2025-04-02 21:03 ` [PATCH-for-10.1 30/43] exec: Do not include 'accel/tcg/cpu-ldst.h' in 'exec-all.h' Philippe Mathieu-Daudé
2025-04-02 21:03 ` [PATCH-for-10.1 31/43] tcg: Always define TCG_GUEST_DEFAULT_MO Philippe Mathieu-Daudé
2025-04-02 21:03 ` [PATCH-for-10.1 32/43] tcg: Simplify tcg_req_mo() macro Philippe Mathieu-Daudé
2025-04-02 21:03 ` [PATCH-for-10.1 33/43] tcg: Define guest_default_memory_order in TCGCPUOps Philippe Mathieu-Daudé
2025-04-02 21:03 ` [PATCH-for-10.1 34/43] tcg: Remove use of TCG_GUEST_DEFAULT_MO in tb_gen_code() Philippe Mathieu-Daudé
2025-04-02 21:03 ` [PATCH-for-10.1 35/43] tcg: Propagate CPUState argument to cpu_req_mo() Philippe Mathieu-Daudé
2025-04-02 21:03 ` [PATCH-for-10.1 36/43] tcg: Have tcg_req_mo() use TCGCPUOps::guest_default_memory_order Philippe Mathieu-Daudé
2025-04-02 21:03 ` [PATCH-for-10.1 37/43] tcg: Remove the TCG_GUEST_DEFAULT_MO definition globally Philippe Mathieu-Daudé
2025-04-02 21:03 ` [PATCH-for-10.1 38/43] tcg: Move cpu_req_mo() macro to target-agnostic 'backend-ldst.h' Philippe Mathieu-Daudé
2025-04-02 21:03 ` [PATCH-for-10.1 39/43] tcg: Move qemu_tcg_mttcg_enabled() to 'system/tcg.h' Philippe Mathieu-Daudé
2025-04-02 21:03 ` [PATCH-for-10.1 40/43] tcg: Convert TCGState::mttcg_enabled to TriState Philippe Mathieu-Daudé
2025-04-02 21:03 ` [PATCH-for-10.1 41/43] tcg: Factor mttcg_init() out Philippe Mathieu-Daudé
2025-04-02 21:03 ` [PATCH-for-10.1 42/43] tcg: Convert TARGET_SUPPORTS_MTTCG to TCGCPUOps::mttcg_supported field Philippe Mathieu-Daudé
2025-04-02 21:03 ` [PATCH-for-10.1 43/43] target/arm: Update comment around cpu_untagged_addr() Philippe Mathieu-Daudé
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