qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: Richard Henderson <richard.henderson@linaro.org>, qemu-devel@nongnu.org
Subject: [PATCH-for-10.1 41/43] tcg: Factor mttcg_init() out
Date: Wed,  2 Apr 2025 23:03:26 +0200	[thread overview]
Message-ID: <20250402210328.52897-42-philmd@linaro.org> (raw)
In-Reply-To: <20250402210328.52897-1-philmd@linaro.org>

Keep MTTCG initialization code out of tcg_init_machine().

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 accel/tcg/tcg-all.c | 50 +++++++++++++++++++++++++--------------------
 1 file changed, 28 insertions(+), 22 deletions(-)

diff --git a/accel/tcg/tcg-all.c b/accel/tcg/tcg-all.c
index ae3a137e87f..df0453c9add 100644
--- a/accel/tcg/tcg-all.c
+++ b/accel/tcg/tcg-all.c
@@ -69,29 +69,8 @@ bool qemu_tcg_mttcg_enabled(void)
     return mttcg_enabled;
 }
 
-#endif /* !CONFIG_USER_ONLY */
-
-static void tcg_accel_instance_init(Object *obj)
+static void mttcg_init(TCGState *s)
 {
-    TCGState *s = TCG_STATE(obj);
-
-    /* If debugging enabled, default "auto on", otherwise off. */
-#if defined(CONFIG_DEBUG_TCG) && !defined(CONFIG_USER_ONLY)
-    s->splitwx_enabled = -1;
-#else
-    s->splitwx_enabled = 0;
-#endif
-}
-
-bool one_insn_per_tb;
-
-static int tcg_init_machine(MachineState *ms)
-{
-    TCGState *s = TCG_STATE(current_accel());
-#ifdef CONFIG_USER_ONLY
-    unsigned max_cpus = 1;
-#else
-    unsigned max_cpus = ms->smp.max_cpus;
 #ifdef TARGET_SUPPORTS_MTTCG
     bool mttcg_supported = true;
 #else
@@ -122,6 +101,33 @@ static int tcg_init_machine(MachineState *ms)
                     "you may get unexpected results");
     }
     mttcg_enabled = s->mttcg_enabled;
+}
+
+#endif /* !CONFIG_USER_ONLY */
+
+static void tcg_accel_instance_init(Object *obj)
+{
+    TCGState *s = TCG_STATE(obj);
+
+    /* If debugging enabled, default "auto on", otherwise off. */
+#if defined(CONFIG_DEBUG_TCG) && !defined(CONFIG_USER_ONLY)
+    s->splitwx_enabled = -1;
+#else
+    s->splitwx_enabled = 0;
+#endif
+}
+
+bool one_insn_per_tb;
+
+static int tcg_init_machine(MachineState *ms)
+{
+    TCGState *s = TCG_STATE(current_accel());
+#ifdef CONFIG_USER_ONLY
+    unsigned max_cpus = 1;
+#else
+    unsigned max_cpus = ms->smp.max_cpus;
+
+    mttcg_init(s);
 #endif
 
     tcg_allowed = true;
-- 
2.47.1



  parent reply	other threads:[~2025-04-02 21:10 UTC|newest]

Thread overview: 48+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-04-02 21:02 [PATCH-for-10.1 00/43] tcg: philmd's queue Philippe Mathieu-Daudé
2025-04-02 21:02 ` [PATCH-for-10.1 01/43] tcg: Declare TARGET_INSN_START_EXTRA_WORDS in 'cpu-param.h' Philippe Mathieu-Daudé
2025-04-03 21:29   ` Philippe Mathieu-Daudé
2025-04-03 21:43     ` Philippe Mathieu-Daudé
2025-04-02 21:02 ` [PATCH-for-10.1 02/43] tcg: Always define TARGET_INSN_START_EXTRA_WORDS Philippe Mathieu-Daudé
2025-04-02 21:02 ` [PATCH-for-10.1 03/43] hw/core/cpu: Update CPUClass::mmu_index docstring Philippe Mathieu-Daudé
2025-04-02 21:02 ` [PATCH-for-10.1 04/43] accel/tcg: Introduce TCGCPUOps::mmu_index() callback Philippe Mathieu-Daudé
2025-04-02 21:02 ` [PATCH-for-10.1 05/43] target/alpha: Restrict SoftMMU mmu_index() to TCG Philippe Mathieu-Daudé
2025-04-02 21:02 ` [PATCH-for-10.1 06/43] target/arm: " Philippe Mathieu-Daudé
2025-04-02 21:02 ` [PATCH-for-10.1 07/43] target/avr: " Philippe Mathieu-Daudé
2025-04-02 21:02 ` [PATCH-for-10.1 08/43] target/hppa: " Philippe Mathieu-Daudé
2025-04-02 21:02 ` [PATCH-for-10.1 09/43] target/i386: Remove unused cpu_(ldub, stb)_kernel macros Philippe Mathieu-Daudé
2025-04-02 21:02 ` [PATCH-for-10.1 10/43] target/i386: Restrict cpu_mmu_index_kernel() to TCG Philippe Mathieu-Daudé
2025-04-02 21:02 ` [PATCH-for-10.1 11/43] target/i386: Restrict SoftMMU mmu_index() " Philippe Mathieu-Daudé
2025-04-02 21:02 ` [PATCH-for-10.1 12/43] target/loongarch: " Philippe Mathieu-Daudé
2025-04-02 21:02 ` [PATCH-for-10.1 13/43] target/m68k: " Philippe Mathieu-Daudé
2025-04-02 21:02 ` [PATCH-for-10.1 14/43] target/microblaze: " Philippe Mathieu-Daudé
2025-04-02 21:03 ` [PATCH-for-10.1 15/43] target/mips: " Philippe Mathieu-Daudé
2025-04-02 21:03 ` [PATCH-for-10.1 16/43] target/openrisc: " Philippe Mathieu-Daudé
2025-04-02 21:03 ` [PATCH-for-10.1 17/43] target/ppc: " Philippe Mathieu-Daudé
2025-04-02 23:08   ` Philippe Mathieu-Daudé
2025-04-02 21:03 ` [PATCH-for-10.1 18/43] target/riscv: " Philippe Mathieu-Daudé
2025-04-02 21:03 ` [PATCH-for-10.1 19/43] target/rx: Fix copy/paste typo (riscv -> rx) Philippe Mathieu-Daudé
2025-04-02 21:03 ` [PATCH-for-10.1 20/43] target/rx: Restrict SoftMMU mmu_index() to TCG Philippe Mathieu-Daudé
2025-04-02 21:03 ` [PATCH-for-10.1 21/43] target/s390x: " Philippe Mathieu-Daudé
2025-04-02 23:11   ` Philippe Mathieu-Daudé
2025-04-02 21:03 ` [PATCH-for-10.1 22/43] target/sh4: " Philippe Mathieu-Daudé
2025-04-02 21:03 ` [PATCH-for-10.1 23/43] target/sparc: " Philippe Mathieu-Daudé
2025-04-02 21:03 ` [PATCH-for-10.1 24/43] target/tricore: " Philippe Mathieu-Daudé
2025-04-02 21:03 ` [PATCH-for-10.1 25/43] target/xtensa: " Philippe Mathieu-Daudé
2025-04-02 21:03 ` [PATCH-for-10.1 26/43] hw/core/cpu: Remove CPUClass::mmu_index() Philippe Mathieu-Daudé
2025-04-02 21:03 ` [PATCH-for-10.1 27/43] exec: Restrict cpu-mmu-index.h to accel/tcg/ Philippe Mathieu-Daudé
2025-04-02 21:03 ` [PATCH-for-10.1 28/43] exec: Restrict 'cpu-ldst-common.h' " Philippe Mathieu-Daudé
2025-04-02 21:03 ` [PATCH-for-10.1 29/43] exec: Restrict 'cpu_ldst.h' " Philippe Mathieu-Daudé
2025-04-02 21:03 ` [PATCH-for-10.1 30/43] exec: Do not include 'accel/tcg/cpu-ldst.h' in 'exec-all.h' Philippe Mathieu-Daudé
2025-04-02 21:03 ` [PATCH-for-10.1 31/43] tcg: Always define TCG_GUEST_DEFAULT_MO Philippe Mathieu-Daudé
2025-04-02 21:03 ` [PATCH-for-10.1 32/43] tcg: Simplify tcg_req_mo() macro Philippe Mathieu-Daudé
2025-04-02 21:03 ` [PATCH-for-10.1 33/43] tcg: Define guest_default_memory_order in TCGCPUOps Philippe Mathieu-Daudé
2025-04-02 21:03 ` [PATCH-for-10.1 34/43] tcg: Remove use of TCG_GUEST_DEFAULT_MO in tb_gen_code() Philippe Mathieu-Daudé
2025-04-02 21:03 ` [PATCH-for-10.1 35/43] tcg: Propagate CPUState argument to cpu_req_mo() Philippe Mathieu-Daudé
2025-04-02 21:03 ` [PATCH-for-10.1 36/43] tcg: Have tcg_req_mo() use TCGCPUOps::guest_default_memory_order Philippe Mathieu-Daudé
2025-04-02 21:03 ` [PATCH-for-10.1 37/43] tcg: Remove the TCG_GUEST_DEFAULT_MO definition globally Philippe Mathieu-Daudé
2025-04-02 21:03 ` [PATCH-for-10.1 38/43] tcg: Move cpu_req_mo() macro to target-agnostic 'backend-ldst.h' Philippe Mathieu-Daudé
2025-04-02 21:03 ` [PATCH-for-10.1 39/43] tcg: Move qemu_tcg_mttcg_enabled() to 'system/tcg.h' Philippe Mathieu-Daudé
2025-04-02 21:03 ` [PATCH-for-10.1 40/43] tcg: Convert TCGState::mttcg_enabled to TriState Philippe Mathieu-Daudé
2025-04-02 21:03 ` Philippe Mathieu-Daudé [this message]
2025-04-02 21:03 ` [PATCH-for-10.1 42/43] tcg: Convert TARGET_SUPPORTS_MTTCG to TCGCPUOps::mttcg_supported field Philippe Mathieu-Daudé
2025-04-02 21:03 ` [PATCH-for-10.1 43/43] target/arm: Update comment around cpu_untagged_addr() Philippe Mathieu-Daudé

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20250402210328.52897-42-philmd@linaro.org \
    --to=philmd@linaro.org \
    --cc=qemu-devel@nongnu.org \
    --cc=richard.henderson@linaro.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).