From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Alex Bennée" <alex.bennee@linaro.org>,
"Pierrick Bouvier" <pierrick.bouvier@linaro.org>,
"Richard Henderson" <richard.henderson@linaro.org>,
"Markus Armbruster" <armbru@redhat.com>
Subject: [RFC PATCH-for-10.1 33/39] hw/core/machine: Allow dynamic registration of valid CPU types
Date: Fri, 4 Apr 2025 01:58:15 +0200 [thread overview]
Message-ID: <20250403235821.9909-34-philmd@linaro.org> (raw)
In-Reply-To: <20250403235821.9909-1-philmd@linaro.org>
Add MachineClass::valid_cpu_types_list, a dynamic list of strings.
CPU types can be registered with machine_class_add_valid_cpu_type().
Suggested-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
include/hw/boards.h | 8 ++++++++
hw/core/machine.c | 28 ++++++++++++++++++++++++++++
2 files changed, 36 insertions(+)
diff --git a/include/hw/boards.h b/include/hw/boards.h
index b1bbf3c34d4..92a13b0dc32 100644
--- a/include/hw/boards.h
+++ b/include/hw/boards.h
@@ -57,6 +57,13 @@ void machine_set_cache_topo_level(MachineState *ms, CacheLevelAndType cache,
bool machine_check_smp_cache(const MachineState *ms, Error **errp);
void machine_memory_devices_init(MachineState *ms, hwaddr base, uint64_t size);
+/**
+ * machine_class_add_valid_cpu_type: Add type to list of valid CPUs
+ * @mc: Machine class
+ * @type: CPU type to allow (should be a subtype of TYPE_CPU)
+ */
+void machine_class_add_valid_cpu_type(MachineClass *mc, const char *type);
+
/**
* machine_class_allow_dynamic_sysbus_dev: Add type to list of valid devices
* @mc: Machine class
@@ -307,6 +314,7 @@ struct MachineClass {
bool ignore_memory_transaction_failures;
int numa_mem_align_shift;
const char * const *valid_cpu_types;
+ strList *valid_cpu_types_list;
strList *allowed_dynamic_sysbus_devices;
bool auto_enable_numa_with_memhp;
bool auto_enable_numa_with_memdev;
diff --git a/hw/core/machine.c b/hw/core/machine.c
index f52a4f2273b..5993c6e38d5 100644
--- a/hw/core/machine.c
+++ b/hw/core/machine.c
@@ -1538,6 +1538,11 @@ const char *machine_class_default_cpu_type(MachineClass *mc)
return mc->default_cpu_type;
}
+void machine_class_add_valid_cpu_type(MachineClass *mc, const char *type)
+{
+ QAPI_LIST_PREPEND(mc->valid_cpu_types_list, g_strdup(type));
+}
+
static bool is_cpu_type_supported(const MachineState *machine, Error **errp)
{
MachineClass *mc = MACHINE_GET_CLASS(machine);
@@ -1581,6 +1586,29 @@ static bool is_cpu_type_supported(const MachineState *machine, Error **errp)
return false;
}
}
+ if (mc->valid_cpu_types_list) {
+ bool valid = false;
+ unsigned count = 0;
+ strList *wl;
+
+ for (wl = mc->valid_cpu_types_list; !valid && wl; wl = wl->next) {
+ valid |= !!object_class_dynamic_cast(oc, wl->value);
+ count++;
+ }
+
+ if (!valid) {
+ g_autofree char *requested = cpu_model_from_type(machine->cpu_type);
+ error_setg(errp, "Invalid CPU model: %s", requested);
+ error_append_hint(errp, "The valid models are: ");
+ for (wl = mc->valid_cpu_types_list; wl; wl = wl->next) {
+ g_autofree char *model = cpu_model_from_type(wl->value);
+ error_append_hint(errp, "%s%s", model, --count ? ", " : "");
+ }
+ error_append_hint(errp, "\n");
+
+ return false;
+ }
+ }
/* Check if CPU type is deprecated and warn if so */
cc = CPU_CLASS(oc);
--
2.47.1
next prev parent reply other threads:[~2025-04-04 0:05 UTC|newest]
Thread overview: 68+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-04-03 23:57 [RFC PATCH-for-10.1 00/39] single-binary: Make hw/arm/ common Philippe Mathieu-Daudé
2025-04-03 23:57 ` [RFC PATCH-for-10.1 01/39] target/arm: Implement per-binary TargetInfo structures Philippe Mathieu-Daudé
2025-04-04 18:16 ` Pierrick Bouvier
2025-04-03 23:57 ` [RFC PATCH-for-10.1 02/39] target/arm: Register TYPE_BINARY_QEMU_SYSTEM_ARM/AARCH64 interfaces Philippe Mathieu-Daudé
2025-04-03 23:57 ` [RFC PATCH-for-10.1 03/39] target/arm: Filter CPU types for binary Philippe Mathieu-Daudé
2025-04-04 18:17 ` Pierrick Bouvier
2025-04-03 23:57 ` [RFC PATCH-for-10.1 04/39] hw/arm: Filter machine " Philippe Mathieu-Daudé
2025-04-03 23:57 ` [RFC PATCH-for-10.1 05/39] hw/arm/aspeed: " Philippe Mathieu-Daudé
2025-04-03 23:57 ` [RFC PATCH-for-10.1 06/39] hw/arm/aspeed: Build objects once Philippe Mathieu-Daudé
2025-04-03 23:57 ` [RFC PATCH-for-10.1 07/39] hw/arm/raspi: Filter machine types for binary Philippe Mathieu-Daudé
2025-04-03 23:57 ` [RFC PATCH-for-10.1 08/39] hw/arm/raspi: Build objects once Philippe Mathieu-Daudé
2025-04-03 23:57 ` [RFC PATCH-for-10.1 09/39] target/arm/cpregs: Include missing 'target/arm/cpu.h' header Philippe Mathieu-Daudé
2025-04-03 23:57 ` [RFC PATCH-for-10.1 10/39] hw/arm/boot: Include missing 'system/memory.h' header Philippe Mathieu-Daudé
2025-04-03 23:57 ` [RFC PATCH-for-10.1 11/39] hw/arm: Use full "target/arm/cpu.h" path to include target's "cpu.h" Philippe Mathieu-Daudé
2025-04-04 18:20 ` Pierrick Bouvier
2025-04-04 21:53 ` Philippe Mathieu-Daudé
2025-04-05 1:03 ` Pierrick Bouvier
2025-04-05 14:27 ` Philippe Mathieu-Daudé
2025-04-07 17:13 ` Pierrick Bouvier
2025-04-03 23:57 ` [RFC PATCH-for-10.1 12/39] target/arm/cpu-features: Include missing 'cpu.h' header Philippe Mathieu-Daudé
2025-04-03 23:57 ` [RFC PATCH-for-10.1 13/39] target/arm/qmp: " Philippe Mathieu-Daudé
2025-04-03 23:57 ` [RFC PATCH-for-10.1 14/39] target/arm/kvm: Include missing 'cpu-qom.h' header Philippe Mathieu-Daudé
2025-04-03 23:57 ` [RFC PATCH-for-10.1 15/39] target/arm/hvf: " Philippe Mathieu-Daudé
2025-04-03 23:57 ` [RFC PATCH-for-10.1 16/39] hw/arm: Remove unnecessary 'cpu.h' header Philippe Mathieu-Daudé
2025-04-03 23:57 ` [RFC PATCH-for-10.1 17/39] target/arm: Restrict inclusion of 'multiprocessing.h' Philippe Mathieu-Daudé
2025-04-03 23:58 ` [RFC PATCH-for-10.1 18/39] target/arm: Move some definitions from 'cpu.h' to 'multiprocessing.h' Philippe Mathieu-Daudé
2025-04-03 23:58 ` [RFC PATCH-for-10.1 19/39] hw/arm: Include missing 'target/arm/gtimer.h' header Philippe Mathieu-Daudé
2025-04-03 23:58 ` [RFC PATCH-for-10.1 20/39] target/arm: Extract PSCI definitions to 'psci.h' Philippe Mathieu-Daudé
2025-04-04 18:21 ` Pierrick Bouvier
2025-04-04 21:54 ` Philippe Mathieu-Daudé
2025-04-05 1:03 ` Pierrick Bouvier
2025-04-05 14:43 ` Philippe Mathieu-Daudé
2025-04-07 17:25 ` Pierrick Bouvier
2025-04-03 23:58 ` [RFC PATCH-for-10.1 21/39] target/arm: Extract feature definitions to 'cpu_has_feature.h' header Philippe Mathieu-Daudé
2025-04-03 23:58 ` [RFC PATCH-for-10.1 22/39] target/arm: Add arm_cpu_has_feature() helper Philippe Mathieu-Daudé
2025-04-03 23:58 ` [RFC PATCH-for-10.1 23/39] hw/arm/realview: Replace arm_feature() -> arm_cpu_has_feature() Philippe Mathieu-Daudé
2025-04-03 23:58 ` [RFC PATCH-for-10.1 24/39] hw/arm/virt-acpi: " Philippe Mathieu-Daudé
2025-04-03 23:58 ` [RFC PATCH-for-10.1 25/39] hw/arm: Build virt-acpi-build.c once Philippe Mathieu-Daudé
2025-04-03 23:58 ` [RFC PATCH-for-10.1 26/39] system/hvf: Avoid including 'cpu.h' Philippe Mathieu-Daudé
2025-05-06 14:14 ` Philippe Mathieu-Daudé
2025-05-06 15:00 ` Pierrick Bouvier
2025-04-03 23:58 ` [RFC PATCH-for-10.1 27/39] system/hvf: Expose hvf_enabled() to common code Philippe Mathieu-Daudé
2025-04-04 18:23 ` Pierrick Bouvier
2025-04-04 21:56 ` Philippe Mathieu-Daudé
2025-04-05 1:05 ` Pierrick Bouvier
2025-04-03 23:58 ` [RFC PATCH-for-10.1 28/39] exec: Do not poison hardware accelerators Philippe Mathieu-Daudé
2025-04-04 18:25 ` Pierrick Bouvier
2025-04-04 22:00 ` Philippe Mathieu-Daudé
2025-04-05 1:07 ` Pierrick Bouvier
2025-04-03 23:58 ` [RFC PATCH-for-10.1 29/39] hw/arm: Build sbsa-ref.c once Philippe Mathieu-Daudé
2025-04-03 23:58 ` [RFC PATCH-for-10.1 30/39] target/arm: Replace target_ulong -> hwaddr in ARMMMUFaultInfo Philippe Mathieu-Daudé
2025-04-03 23:58 ` [RFC PATCH-for-10.1 31/39] target/arm: Replace target_ulong -> uint64_t for HWBreakpoint Philippe Mathieu-Daudé
2025-04-03 23:58 ` [RFC PATCH-for-10.1 32/39] target/arm: Replace target_ulong -> vaddr for CPUWatchpoint Philippe Mathieu-Daudé
2025-04-03 23:58 ` Philippe Mathieu-Daudé [this message]
2025-04-03 23:58 ` [RFC PATCH-for-10.1 34/39] hw/arm/virt: Register valid CPU types dynamically Philippe Mathieu-Daudé
2025-04-03 23:58 ` [RFC PATCH-for-10.1 35/39] hw/arm/virt: Replace TARGET_AARCH64 -> target_long_bits() Philippe Mathieu-Daudé
2025-04-04 18:28 ` Pierrick Bouvier
2025-04-04 22:05 ` Philippe Mathieu-Daudé
2025-04-05 1:10 ` Pierrick Bouvier
2025-04-03 23:58 ` [RFC PATCH-for-10.1 36/39] target/arm: Expose Aarch64 helpers indistinctly Philippe Mathieu-Daudé
2025-04-03 23:58 ` [RFC PATCH-for-10.1 37/39] hw/arm: Build virt.c once Philippe Mathieu-Daudé
2025-04-03 23:58 ` [RFC PATCH-for-10.1 38/39] hw/arm: Move xen files to arm_common_ss[] Philippe Mathieu-Daudé
2025-04-04 14:40 ` Philippe Mathieu-Daudé
2025-04-03 23:58 ` [RFC PATCH-for-10.1 39/39] hw/arm/meson: Remove arm_ss[] source set Philippe Mathieu-Daudé
2025-04-04 17:12 ` [RFC PATCH-for-10.1 00/39] single-binary: Make hw/arm/ common Pierrick Bouvier
2025-04-04 18:04 ` Philippe Mathieu-Daudé
2025-04-04 18:30 ` Pierrick Bouvier
2025-04-04 18:33 ` Pierrick Bouvier
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20250403235821.9909-34-philmd@linaro.org \
--to=philmd@linaro.org \
--cc=alex.bennee@linaro.org \
--cc=armbru@redhat.com \
--cc=pierrick.bouvier@linaro.org \
--cc=qemu-devel@nongnu.org \
--cc=richard.henderson@linaro.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).