From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Peter Maydell" <peter.maydell@linaro.org>,
qemu-arm@nongnu.org, "Alex Bennée" <alex.bennee@linaro.org>,
"Gustavo Romero" <gustavo.romero@linaro.org>,
"Laurent Vivier" <laurent@vivier.eu>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>
Subject: [PATCH-for-10.1 8/9] linux-user/arm: Implement MTE stubs for 32-bit user emulation
Date: Sat, 5 Apr 2025 00:35:20 +0200 [thread overview]
Message-ID: <20250404223521.38781-9-philmd@linaro.org> (raw)
In-Reply-To: <20250404223521.38781-1-philmd@linaro.org>
We want to build MTE code once, but on linux-user it calls
arm_set_mte_tcf0() which is only defined for Aarch64.
Expose the declaration on 32-bit ARM by renaming
aarch64/mte_user_helper.h -> arm/mte_user_helper.h, then
add a stub in arm/mte_user_helper.c.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
linux-user/aarch64/mte_user_helper.h | 27 +---------------------
linux-user/arm/mte_user_helper.h | 34 ++++++++++++++++++++++++++++
linux-user/arm/mte_user_helper.c | 13 +++++++++++
linux-user/arm/meson.build | 2 ++
4 files changed, 50 insertions(+), 26 deletions(-)
create mode 100644 linux-user/arm/mte_user_helper.h
create mode 100644 linux-user/arm/mte_user_helper.c
diff --git a/linux-user/aarch64/mte_user_helper.h b/linux-user/aarch64/mte_user_helper.h
index 0c53abda222..63f63abff62 100644
--- a/linux-user/aarch64/mte_user_helper.h
+++ b/linux-user/aarch64/mte_user_helper.h
@@ -6,29 +6,4 @@
* SPDX-License-Identifier: LGPL-2.1-or-later
*/
-#ifndef AARCH64_MTE_USER_HELPER_H
-#define AARCH64_MTE USER_HELPER_H
-
-#include "user/abitypes.h"
-
-#ifndef PR_MTE_TCF_SHIFT
-# define PR_MTE_TCF_SHIFT 1
-# define PR_MTE_TCF_NONE (0UL << PR_MTE_TCF_SHIFT)
-# define PR_MTE_TCF_SYNC (1UL << PR_MTE_TCF_SHIFT)
-# define PR_MTE_TCF_ASYNC (2UL << PR_MTE_TCF_SHIFT)
-# define PR_MTE_TCF_MASK (3UL << PR_MTE_TCF_SHIFT)
-# define PR_MTE_TAG_SHIFT 3
-# define PR_MTE_TAG_MASK (0xffffUL << PR_MTE_TAG_SHIFT)
-#endif
-
-/**
- * arm_set_mte_tcf0 - Set TCF0 field in SCTLR_EL1 register
- * @env: The CPU environment
- * @value: The value to be set for the Tag Check Fault in EL0 field.
- *
- * Only SYNC and ASYNC modes can be selected. If ASYMM mode is given, the SYNC
- * mode is selected instead. So, there is no way to set the ASYMM mode.
- */
-void arm_set_mte_tcf0(CPUArchState *env, abi_long value);
-
-#endif /* AARCH64_MTE_USER_HELPER_H */
+#include "../arm/mte_user_helper.h"
diff --git a/linux-user/arm/mte_user_helper.h b/linux-user/arm/mte_user_helper.h
new file mode 100644
index 00000000000..0c53abda222
--- /dev/null
+++ b/linux-user/arm/mte_user_helper.h
@@ -0,0 +1,34 @@
+/*
+ * ARM MemTag convenience functions.
+ *
+ * This code is licensed under the GNU GPL v2 or later.
+ *
+ * SPDX-License-Identifier: LGPL-2.1-or-later
+ */
+
+#ifndef AARCH64_MTE_USER_HELPER_H
+#define AARCH64_MTE USER_HELPER_H
+
+#include "user/abitypes.h"
+
+#ifndef PR_MTE_TCF_SHIFT
+# define PR_MTE_TCF_SHIFT 1
+# define PR_MTE_TCF_NONE (0UL << PR_MTE_TCF_SHIFT)
+# define PR_MTE_TCF_SYNC (1UL << PR_MTE_TCF_SHIFT)
+# define PR_MTE_TCF_ASYNC (2UL << PR_MTE_TCF_SHIFT)
+# define PR_MTE_TCF_MASK (3UL << PR_MTE_TCF_SHIFT)
+# define PR_MTE_TAG_SHIFT 3
+# define PR_MTE_TAG_MASK (0xffffUL << PR_MTE_TAG_SHIFT)
+#endif
+
+/**
+ * arm_set_mte_tcf0 - Set TCF0 field in SCTLR_EL1 register
+ * @env: The CPU environment
+ * @value: The value to be set for the Tag Check Fault in EL0 field.
+ *
+ * Only SYNC and ASYNC modes can be selected. If ASYMM mode is given, the SYNC
+ * mode is selected instead. So, there is no way to set the ASYMM mode.
+ */
+void arm_set_mte_tcf0(CPUArchState *env, abi_long value);
+
+#endif /* AARCH64_MTE_USER_HELPER_H */
diff --git a/linux-user/arm/mte_user_helper.c b/linux-user/arm/mte_user_helper.c
new file mode 100644
index 00000000000..6fd19dc1073
--- /dev/null
+++ b/linux-user/arm/mte_user_helper.c
@@ -0,0 +1,13 @@
+/*
+ * ARM ARM MemTag user emulation stubs.
+ *
+ * SPDX-License-Identifier: LGPL-2.1-or-later
+ */
+
+#include "qemu/osdep.h"
+#include "mte_user_helper.h"
+
+void arm_set_mte_tcf0(CPUArchState *env, abi_long value)
+{
+ g_assert_not_reached();
+}
diff --git a/linux-user/arm/meson.build b/linux-user/arm/meson.build
index 348ffb810d7..95e8c078e29 100644
--- a/linux-user/arm/meson.build
+++ b/linux-user/arm/meson.build
@@ -24,3 +24,5 @@ vdso_le_inc = gen_vdso.process('vdso-le.so',
linux_user_ss.add(when: 'TARGET_ARM', if_true: [
vdso_be8_inc, vdso_be32_inc, vdso_le_inc
])
+
+linux_user_ss.add(when: 'TARGET_ARM', if_true: [files('mte_user_helper.c')])
--
2.47.1
next prev parent reply other threads:[~2025-04-04 22:37 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-04-04 22:35 [PATCH-for-10.1 0/9] target/arm: Remove some TARGET_AARCH64 uses (MTE & gdbstub) Philippe Mathieu-Daudé
2025-04-04 22:35 ` [PATCH-for-10.1 1/9] target/arm: Remove uses of TARGET_AARCH64 in arch_dump.c Philippe Mathieu-Daudé
2025-04-05 16:00 ` Richard Henderson
2025-04-04 22:35 ` [PATCH-for-10.1 2/9] target/arm: Remove use of TARGET_AARCH64 in dump.c Philippe Mathieu-Daudé
2025-04-05 16:00 ` Richard Henderson
2025-04-04 22:35 ` [PATCH-for-10.1 3/9] target/arm: Remove use of TARGET_AARCH64 in arm_cpu_initfn() Philippe Mathieu-Daudé
2025-04-05 16:14 ` Richard Henderson
2025-04-04 22:35 ` [PATCH-for-10.1 4/9] target/arm/mte: Include missing headers for GETPC() Philippe Mathieu-Daudé
2025-04-05 16:14 ` Richard Henderson
2025-04-04 22:35 ` [PATCH-for-10.1 5/9] target/arm/mte: Reduce address_with_allocation_tag() scope Philippe Mathieu-Daudé
2025-04-05 16:15 ` Richard Henderson
2025-04-04 22:35 ` [PATCH-for-10.1 6/9] target/arm/mte: Rename 'mte_helper.h' as generic 'mte.h' Philippe Mathieu-Daudé
2025-04-05 16:16 ` Richard Henderson
2025-04-04 22:35 ` [PATCH-for-10.1 7/9] target/arm/mte: Restrict MTE declarations Philippe Mathieu-Daudé
2025-04-05 16:33 ` Richard Henderson
2025-04-04 22:35 ` Philippe Mathieu-Daudé [this message]
2025-04-04 22:35 ` [PATCH-for-10.1 9/9] target/arm: Build Aarch64 gdbstub helpers indistinctly Philippe Mathieu-Daudé
2025-04-05 16:32 ` Richard Henderson
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