[PATCH 2/2] hw/usb/hcd-dwc3: Set erstba-hi-lo property

[Guenter Roeck <linux@roeck-us.net>]

The dwc3 hardware requires the ERSTBA address to be written in
high-low order.

From information found in the Linux kernel:

[Synopsys]- The host controller was design to support ERST setting
during the RUN state. But since there is a limitation in controller
in supporting separate ERSTBA_HI and ERSTBA_LO programming,
It is supported when the ERSTBA is programmed in 64bit,
or in 32 bit mode ERSTBA_HI before ERSTBA_LO

[Synopsys]- The internal initialization of event ring fetches
the "Event Ring Segment Table Entry" based on the indication of
ERSTBA_LO written.

Inform the XHCI core to expect ERSTBA to be written in high-low order.

Signed-off-by: Guenter Roeck <linux@roeck-us.net>
---
 hw/usb/hcd-dwc3.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/hw/usb/hcd-dwc3.c b/hw/usb/hcd-dwc3.c
index 0bceee2712..6783d55526 100644
--- a/hw/usb/hcd-dwc3.c
+++ b/hw/usb/hcd-dwc3.c
@@ -603,6 +603,7 @@ static void usb_dwc3_realize(DeviceState *dev, Error **errp)
     SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
     Error *err = NULL;
 
+    qdev_prop_set_bit(DEVICE(&s->sysbus_xhci), "erstba-hi-lo", true);
     sysbus_realize(SYS_BUS_DEVICE(&s->sysbus_xhci), &err);
     if (err) {
         error_propagate(errp, err);
-- 
2.45.2