From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Richard Henderson" <richard.henderson@linaro.org>,
"Brian Cain" <brian.cain@oss.qualcomm.com>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>
Subject: [PATCH-for-10.1 v4 04/16] target/hexagon: Add memory order definition
Date: Sat, 5 Apr 2025 18:13:08 +0200 [thread overview]
Message-ID: <20250405161320.76854-5-philmd@linaro.org> (raw)
In-Reply-To: <20250405161320.76854-1-philmd@linaro.org>
From: Brian Cain <brian.cain@oss.qualcomm.com>
Signed-off-by: Brian Cain <brian.cain@oss.qualcomm.com>
Message-ID: <20250404025203.335025-7-brian.cain@oss.qualcomm.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
target/hexagon/cpu-param.h | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/target/hexagon/cpu-param.h b/target/hexagon/cpu-param.h
index 635d509e743..22bffa78816 100644
--- a/target/hexagon/cpu-param.h
+++ b/target/hexagon/cpu-param.h
@@ -25,4 +25,9 @@
#define TARGET_INSN_START_EXTRA_WORDS 0
+/*
+ * Hexagon processors have a strong memory model.
+ */
+#define TCG_GUEST_DEFAULT_MO (TCG_MO_ALL)
+
#endif
--
2.47.1
next prev parent reply other threads:[~2025-04-05 16:16 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-04-05 16:13 [PATCH-for-10.1 v4 00/16] tcg: philmd's queue Philippe Mathieu-Daudé
2025-04-05 16:13 ` [PATCH-for-10.1 v4 01/16] target/riscv: Remove AccelCPUClass::cpu_class_init need Philippe Mathieu-Daudé
2025-04-05 16:13 ` [PATCH-for-10.1 v4 02/16] target/i386: " Philippe Mathieu-Daudé
2025-04-05 16:13 ` [PATCH-for-10.1 v4 03/16] accel: Remove AccelCPUClass::cpu_class_init() callback Philippe Mathieu-Daudé
2025-04-05 16:13 ` Philippe Mathieu-Daudé [this message]
2025-04-05 16:13 ` [PATCH-for-10.1 v4 05/16] tcg: Always define TCG_GUEST_DEFAULT_MO Philippe Mathieu-Daudé
2025-04-05 16:13 ` [PATCH-for-10.1 v4 06/16] tcg: Simplify tcg_req_mo() macro Philippe Mathieu-Daudé
2025-04-05 16:13 ` [PATCH-for-10.1 v4 07/16] tcg: Define guest_default_memory_order in TCGCPUOps Philippe Mathieu-Daudé
2025-04-05 16:13 ` [PATCH-for-10.1 v4 08/16] tcg: Remove use of TCG_GUEST_DEFAULT_MO in tb_gen_code() Philippe Mathieu-Daudé
2025-04-05 16:13 ` [PATCH-for-10.1 v4 09/16] tcg: Propagate CPUState argument to cpu_req_mo() Philippe Mathieu-Daudé
2025-04-05 16:13 ` [PATCH-for-10.1 v4 10/16] tcg: Have tcg_req_mo() use TCGCPUOps::guest_default_memory_order Philippe Mathieu-Daudé
2025-04-05 16:13 ` [PATCH-for-10.1 v4 11/16] tcg: Remove the TCG_GUEST_DEFAULT_MO definition globally Philippe Mathieu-Daudé
2025-04-05 16:13 ` [PATCH-for-10.1 v4 12/16] tcg: Move cpu_req_mo() macro to target-agnostic 'backend-ldst.h' Philippe Mathieu-Daudé
2025-04-05 16:13 ` [PATCH-for-10.1 v4 13/16] tcg: Move qemu_tcg_mttcg_enabled() to 'system/tcg.h' Philippe Mathieu-Daudé
2025-04-05 16:13 ` [PATCH-for-10.1 v4 14/16] tcg: Convert TCGState::mttcg_enabled to TriState Philippe Mathieu-Daudé
2025-04-05 16:13 ` [PATCH-for-10.1 v4 15/16] tcg: Factor mttcg_init() out Philippe Mathieu-Daudé
2025-04-05 16:13 ` [PATCH-for-10.1 v4 16/16] tcg: Convert TARGET_SUPPORTS_MTTCG to TCGCPUOps::mttcg_supported field Philippe Mathieu-Daudé
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