[PATCH v2 0/1] Fix endless translation loop of riscv

[Ziqiao Kong <ziqiaokong@gmail.com>]

Sorry for sending this again as I found previous patch series does not
work on riscv32 due to target_ulong is not le64. Please ignore my
previous v1 patch. Below is the original cover letter to illustrate the
purpose of the patch:

Hello! I'm Ziqiao Kong, the maintainer of Unicorn Engine, a fork of
QEMU. When I port Unicorn Engine to s390x, I notice there is a bug in
the implementation of RISCV MMU. It uses qemu_map_ram_ptr to get a
pointer and reads it directly, instead of bswap or address_space_ldl,
which causes an endless translation loop on big endian systems like
s390x I'm working on. Therefore, a quick fix to this is to call
cpu_to_le64 for cmpxchg as this patch shows.

This patch passes our unit tests and the error is somewhat obvious
(unhandled endianness discrepancy). Therefore, I'm rather confident
that QEMU aslo needs this patch. Given the changes are small and don't
impact most popular little endian platforms, I think this fits into
trivial patches.


Ziqiao Kong (1):
  target/riscv: fix endless translation loop on big endian systems

 target/riscv/cpu_helper.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

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2.34.1