Re: [PATCH] vfio/igd: Check host PCI address when probing

[Alex Williamson <alex.williamson@redhat.com>]

On Wed, 16 Apr 2025 01:36:15 +0800
Tomita Moeko <tomitamoeko@gmail.com> wrote:
> 
> The generation register also exists on discrete GPUs. In the new xe
> driver [1], the Battlemage discrete GPU shares the same logic reading
> GMD_ID_DISPLAY register. The driver itself uses is_dgfx bit mapped to
> device id. In QEMU, we need to know whether the device is a supported
> IGD device first before applying the IGD-specific quirk, especially
> for legacy mode.
> 
> The most feasible way is to check if kernel exposes VFIO_REGION_SUBTYPE_
> INTEL_IGD_OPREGION on that device I think, as only IGD has OpRegion.
> 
> i915 driver [2] and Arrow Lake datasheet [3] shows that Intel has
> removed the BDSM register by making the DSM range part of BAR2 since
> Meteor Lake and onwards. QEMU only need to quirk on the register for
> IGD devices until Raptor Lake, meaning that the device list is fixed
> for now.
> 
> By the way, for legacy mode, I think we should only support it until
> Gen 9, as Intel only provide VBIOS or CSM support until that generation,
> and seabios cannot handle 64 bit BDSM register. I'm also wondering if
> VGA really works on newer generations.

If it's a VGA class device, it really should, but without CSM I could
see why you have doubts.
 
> Maybe we can continue with current igd_gen, but implement a logic like:
>     if (!intel graphics)
>         return;
>     if (!has VFIO_REGION_SUBTYPE_INTEL_IGD_OPREGION)
>         return;
>     setup_opregion();  // make x-igd-opregion automatically enabled?
>     if (gen <= 9)
>         setup_legacy_mode();
>     if (gen >= 6 && gen <=9)
>         setup_32bit_bdsm():
>     else if (gen >= 9 && gen <= 12)
>         setup_64bit_bdsm();
>     // ...
>     // optional quirks like lpc bridge id
> 
> A table can also be used to precisely track all the gen 6-12 devices.

This seems reasonable to me.

> Attached a config space dump of Intel A770 discrete GPU for reference
> 
> 03:00.0 VGA compatible controller: Intel Corporation DG2 [Arc A770] (rev 08) (prog-if 00 [VGA controller])
> 	Subsystem: Intel Corporation Device 1020
> 	Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> 	Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> 	Latency: 0, Cache Line Size: 64 bytes
> 	Interrupt: pin ? routed to IRQ 181
> 	IOMMU group: 19
> 	Region 0: Memory at 81000000 (64-bit, non-prefetchable) [size=16M]
> 	Region 2: Memory at 6000000000 (64-bit, prefetchable) [size=16G]
> 	Expansion ROM at 82000000 [disabled] [size=2M]
> 	Capabilities: [40] Vendor Specific Information: Len=0c <?>
> 	Capabilities: [70] Express (v2) Endpoint, IntMsgNum 0
> 		DevCap:	MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> 			ExtTag+ AttnBtn- AttnInd- PwrInd- RBE+ FLReset+ SlotPowerLimit 0W TEE-IO-
> 		DevCtl:	CorrErr- NonFatalErr- FatalErr- UnsupReq-
> 			RlxdOrd+ ExtTag+ PhantFunc- AuxPwr- NoSnoop+ FLReset-
> 			MaxPayload 128 bytes, MaxReadReq 128 bytes
> 		DevSta:	CorrErr- NonFatalErr- FatalErr- UnsupReq+ AuxPwr- TransPend-
> 		LnkCap:	Port #0, Speed 2.5GT/s, Width x1, ASPM L0s L1, Exit Latency L0s <64ns, L1 <1us

Hmm, hardware bug?  Surely the A770 is not a Gen1, x1 device.
Something is going on with the interrupt pin above too.  At least it
claims FLReset+ above, does it work reliably though?  Seems like there
are various reports of Arc GPUs not working well with assignment due to
reset issues.  Thanks,

Alex

> 			ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp+
> 		LnkCtl:	ASPM Disabled; RCB 64 bytes, LnkDisable- CommClk-
> 			ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> 		LnkSta:	Speed 2.5GT/s, Width x1
> 			TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> 		DevCap2: Completion Timeout: Range B, TimeoutDis+ NROPrPrP- LTR+
> 			 10BitTagComp+ 10BitTagReq+ OBFF Not Supported, ExtFmt+ EETLPPrefix-
> 			 EmergencyPowerReduction Not Supported, EmergencyPowerReductionInit-
> 			 FRS- TPHComp- ExtTPHComp-
> 			 AtomicOpsCap: 32bit- 64bit- 128bitCAS-
> 		DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-
> 			 AtomicOpsCtl: ReqEn-
> 			 IDOReq- IDOCompl- LTR+ EmergencyPowerReductionReq-
> 			 10BitTagReq- OBFF Disabled, EETLPPrefixBlk-
> 		LnkCap2: Supported Link Speeds: 2.5GT/s, Crosslink- Retimer- 2Retimers- DRS-
> 		LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> 			 Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> 			 Compliance Preset/De-emphasis: -6dB de-emphasis, 0dB preshoot
> 		LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete- EqualizationPhase1-
> 			 EqualizationPhase2- EqualizationPhase3- LinkEqualizationRequest-
> 			 Retimer- 2Retimers- CrosslinkRes: unsupported
> 	Capabilities: [ac] MSI: Enable+ Count=1/1 Maskable+ 64bit+
> 		Address: 00000000fee008b8  Data: 0000
> 		Masking: 00000000  Pending: 00000000
> 	Capabilities: [d0] Power Management version 3
> 		Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold-)
> 		Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
> 	Capabilities: [100 v1] Alternative Routing-ID Interpretation (ARI)
> 		ARICap:	MFVC- ACS-, Next Function: 0
> 		ARICtl:	MFVC- ACS-, Function Group: 0
> 	Capabilities: [420 v1] Physical Resizable BAR
> 		BAR 2: current size: 16GB, supported: 256MB 512MB 1GB 2GB 4GB 8GB 16GB
> 	Capabilities: [400 v1] Latency Tolerance Reporting
> 		Max snoop latency: 15728640ns
> 		Max no snoop latency: 15728640ns
> 	Kernel driver in use: i915
> 	Kernel modules: i915, xe