* [RFC PATCH v2 00/11] single-binary: Make hw/arm/ common
@ 2025-04-18 0:50 Philippe Mathieu-Daudé
2025-04-18 0:50 ` [RFC PATCH v2 01/11] qapi: Rename TargetInfo structure as BinaryTargetInfo Philippe Mathieu-Daudé
` (10 more replies)
0 siblings, 11 replies; 36+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-04-18 0:50 UTC (permalink / raw)
To: Pierrick Bouvier, qemu-devel; +Cc: Anton Johansson, Richard Henderson
Since v1:
- Dropped unrelated / irrelevant patches
- Addressed Pierrick comments
- Added R-b tag
- Only considering machines, not CPUs.
Hi,
At this point this series is mostly a draft for Pierrick.
After introducing the generic TargetInfo API [*], we implement
the ARM variants, then use the API to remove target-specific code,
allowing to eventually remove the target-specific arm_ss[] source
set in meson.build, having all objects in arm_common_ss[].
Regards,
Phil.
Available here, based on tcg-next:
https://gitlab.com/philmd/qemu/-/tags/single-binary-hw-arm-rfc-v2
Philippe Mathieu-Daudé (11):
qapi: Rename TargetInfo structure as BinaryTargetInfo
qemu: Convert target_name() to TargetInfo API
system/vl: Filter machine list available for a particular target
binary
hw/arm: Register TYPE_TARGET_ARM/AARCH64_CPU QOM interfaces
hw/arm: Filter machine types for qemu-system-aarch64 binary
hw/arm: Filter machine types for qemu-system-arm binary
hw/core: Allow ARM/Aarch64 binaries to use the 'none' machine
config/target: Implement per-binary TargetInfo structure (ARM)
config/target: Implement per-binary TargetInfo structure (Aarch64)
hw/arm/aspeed: Build objects once
hw/arm/raspi: Build objects once
meson.build | 9 +++
qapi/machine.json | 12 ++--
include/hw/boards.h | 1 +
include/hw/core/cpu.h | 2 -
include/qemu/target_info-impl.h | 26 +++++++
include/qemu/target_info-qom.h | 18 +++++
include/qemu/target_info.h | 27 +++++++
configs/targets/aarch64-softmmu.c | 22 ++++++
configs/targets/arm-softmmu.c | 22 ++++++
cpu-target.c | 5 --
hw/arm/aspeed.c | 114 ++++++++++++++++++++++++++++--
hw/arm/b-l475e-iot01a.c | 5 ++
hw/arm/bananapi_m2u.c | 5 ++
hw/arm/bcm2836.c | 4 --
hw/arm/collie.c | 5 ++
hw/arm/cubieboard.c | 5 ++
hw/arm/digic_boards.c | 5 ++
hw/arm/exynos4_boards.c | 10 +++
hw/arm/fby35.c | 5 ++
hw/arm/highbank.c | 10 +++
hw/arm/imx25_pdk.c | 5 ++
hw/arm/imx8mp-evk.c | 4 ++
hw/arm/integratorcp.c | 5 ++
hw/arm/kzm.c | 5 ++
hw/arm/mcimx6ul-evk.c | 5 ++
hw/arm/mcimx7d-sabre.c | 5 ++
hw/arm/microbit.c | 5 ++
hw/arm/mps2-tz.c | 20 ++++++
hw/arm/mps2.c | 20 ++++++
hw/arm/mps3r.c | 5 ++
hw/arm/msf2-som.c | 5 ++
hw/arm/musca.c | 10 +++
hw/arm/musicpal.c | 5 ++
hw/arm/netduino2.c | 5 ++
hw/arm/netduinoplus2.c | 5 ++
hw/arm/npcm7xx_boards.c | 25 +++++++
hw/arm/npcm8xx_boards.c | 4 ++
hw/arm/olimex-stm32-h405.c | 5 ++
hw/arm/omap_sx1.c | 10 +++
hw/arm/orangepi.c | 5 ++
hw/arm/raspi.c | 27 +++++--
hw/arm/raspi4b.c | 4 ++
hw/arm/realview.c | 20 ++++++
hw/arm/sabrelite.c | 5 ++
hw/arm/sbsa-ref.c | 4 ++
hw/arm/stellaris.c | 10 +++
hw/arm/stm32vldiscovery.c | 5 ++
hw/arm/versatilepb.c | 10 +++
hw/arm/vexpress.c | 10 +++
hw/arm/virt.c | 5 ++
hw/arm/xilinx_zynq.c | 5 ++
hw/arm/xlnx-versal-virt.c | 4 ++
hw/arm/xlnx-zcu102.c | 4 ++
hw/core/machine-qmp-cmds.c | 5 +-
hw/core/null-machine.c | 5 ++
plugins/loader.c | 2 +-
system/vl.c | 16 ++++-
target_info-qom.c | 24 +++++++
target_info-stub.c | 19 +++++
target_info.c | 21 ++++++
hw/arm/meson.build | 12 ++--
61 files changed, 652 insertions(+), 35 deletions(-)
create mode 100644 include/qemu/target_info-impl.h
create mode 100644 include/qemu/target_info-qom.h
create mode 100644 include/qemu/target_info.h
create mode 100644 configs/targets/aarch64-softmmu.c
create mode 100644 configs/targets/arm-softmmu.c
create mode 100644 target_info-qom.c
create mode 100644 target_info-stub.c
create mode 100644 target_info.c
--
2.47.1
^ permalink raw reply [flat|nested] 36+ messages in thread
* [RFC PATCH v2 01/11] qapi: Rename TargetInfo structure as BinaryTargetInfo
2025-04-18 0:50 [RFC PATCH v2 00/11] single-binary: Make hw/arm/ common Philippe Mathieu-Daudé
@ 2025-04-18 0:50 ` Philippe Mathieu-Daudé
2025-04-18 2:55 ` Pierrick Bouvier
2025-04-18 0:50 ` [RFC PATCH v2 02/11] qemu: Convert target_name() to TargetInfo API Philippe Mathieu-Daudé
` (9 subsequent siblings)
10 siblings, 1 reply; 36+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-04-18 0:50 UTC (permalink / raw)
To: Pierrick Bouvier, qemu-devel; +Cc: Anton Johansson, Richard Henderson
The QAPI-generated 'TargetInfo' structure name is only used
in a single file. We want to heavily use another structure
similarly named. Rename the QAPI one, since structure names
are not part of the public API.
Suggested-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
qapi/machine.json | 12 ++++++------
hw/core/machine-qmp-cmds.c | 4 ++--
2 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/qapi/machine.json b/qapi/machine.json
index a6b8795b09e..3246212f048 100644
--- a/qapi/machine.json
+++ b/qapi/machine.json
@@ -275,15 +275,15 @@
{ 'command': 'query-current-machine', 'returns': 'CurrentMachineParams' }
##
-# @TargetInfo:
+# @BinaryTargetInfo:
#
-# Information describing the QEMU target.
+# Information describing the QEMU binary target.
#
-# @arch: the target architecture
+# @arch: the binary target architecture
#
# Since: 1.2
##
-{ 'struct': 'TargetInfo',
+{ 'struct': 'BinaryTargetInfo',
'data': { 'arch': 'SysEmuTarget' } }
##
@@ -291,11 +291,11 @@
#
# Return information about the target for this QEMU
#
-# Returns: TargetInfo
+# Returns: BinaryTargetInfo
#
# Since: 1.2
##
-{ 'command': 'query-target', 'returns': 'TargetInfo' }
+{ 'command': 'query-target', 'returns': 'BinaryTargetInfo' }
##
# @UuidInfo:
diff --git a/hw/core/machine-qmp-cmds.c b/hw/core/machine-qmp-cmds.c
index 3130c5cd456..408994b67d7 100644
--- a/hw/core/machine-qmp-cmds.c
+++ b/hw/core/machine-qmp-cmds.c
@@ -132,9 +132,9 @@ CurrentMachineParams *qmp_query_current_machine(Error **errp)
return params;
}
-TargetInfo *qmp_query_target(Error **errp)
+BinaryTargetInfo *qmp_query_target(Error **errp)
{
- TargetInfo *info = g_malloc0(sizeof(*info));
+ BinaryTargetInfo *info = g_malloc0(sizeof(*info));
info->arch = qapi_enum_parse(&SysEmuTarget_lookup, target_name(), -1,
&error_abort);
--
2.47.1
^ permalink raw reply related [flat|nested] 36+ messages in thread
* [RFC PATCH v2 02/11] qemu: Convert target_name() to TargetInfo API
2025-04-18 0:50 [RFC PATCH v2 00/11] single-binary: Make hw/arm/ common Philippe Mathieu-Daudé
2025-04-18 0:50 ` [RFC PATCH v2 01/11] qapi: Rename TargetInfo structure as BinaryTargetInfo Philippe Mathieu-Daudé
@ 2025-04-18 0:50 ` Philippe Mathieu-Daudé
2025-04-18 3:01 ` Pierrick Bouvier
2025-04-18 0:50 ` [RFC PATCH v2 03/11] system/vl: Filter machine list available for a particular target binary Philippe Mathieu-Daudé
` (8 subsequent siblings)
10 siblings, 1 reply; 36+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-04-18 0:50 UTC (permalink / raw)
To: Pierrick Bouvier, qemu-devel; +Cc: Anton Johansson, Richard Henderson
Have target_name() be a target-agnostic method, dispatching
to a per-target TargetInfo singleton structure.
By default a stub singleton is used. No logical change
expected.
Inspired-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
---
meson.build | 3 +++
include/hw/core/cpu.h | 2 --
include/qemu/target_info-impl.h | 23 +++++++++++++++++++++++
include/qemu/target_info.h | 19 +++++++++++++++++++
cpu-target.c | 5 -----
hw/core/machine-qmp-cmds.c | 1 +
plugins/loader.c | 2 +-
system/vl.c | 2 +-
target_info-stub.c | 19 +++++++++++++++++++
target_info.c | 16 ++++++++++++++++
10 files changed, 83 insertions(+), 9 deletions(-)
create mode 100644 include/qemu/target_info-impl.h
create mode 100644 include/qemu/target_info.h
create mode 100644 target_info-stub.c
create mode 100644 target_info.c
diff --git a/meson.build b/meson.build
index bcb9d39a387..49a050a28a3 100644
--- a/meson.build
+++ b/meson.build
@@ -3807,6 +3807,9 @@ endif
common_ss.add(pagevary)
specific_ss.add(files('page-target.c', 'page-vary-target.c'))
+common_ss.add(files('target_info.c'))
+specific_ss.add(files('target_info-stub.c'))
+
subdir('backends')
subdir('disas')
subdir('migration')
diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h
index 5b645df59f5..9d9448341d1 100644
--- a/include/hw/core/cpu.h
+++ b/include/hw/core/cpu.h
@@ -1115,8 +1115,6 @@ bool cpu_exec_realizefn(CPUState *cpu, Error **errp);
void cpu_exec_unrealizefn(CPUState *cpu);
void cpu_exec_reset_hold(CPUState *cpu);
-const char *target_name(void);
-
#ifdef COMPILING_PER_TARGET
extern const VMStateDescription vmstate_cpu_common;
diff --git a/include/qemu/target_info-impl.h b/include/qemu/target_info-impl.h
new file mode 100644
index 00000000000..d5c94ed5296
--- /dev/null
+++ b/include/qemu/target_info-impl.h
@@ -0,0 +1,23 @@
+/*
+ * QEMU binary/target API ...
+ *
+ * Copyright (c) Linaro
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#ifndef QEMU_TARGET_INFO_IMPL_H
+#define QEMU_TARGET_INFO_IMPL_H
+
+#include "qemu/target_info.h"
+
+typedef struct TargetInfo {
+
+ /* runtime equivalent of TARGET_NAME definition */
+ const char *const name;
+
+} TargetInfo;
+
+const TargetInfo *target_info(void);
+
+#endif
diff --git a/include/qemu/target_info.h b/include/qemu/target_info.h
new file mode 100644
index 00000000000..3f6cbbbd300
--- /dev/null
+++ b/include/qemu/target_info.h
@@ -0,0 +1,19 @@
+/*
+ * QEMU binary/target API
+ *
+ * Copyright (c) Linaro
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#ifndef QEMU_TARGET_INFO_H
+#define QEMU_TARGET_INFO_H
+
+/**
+ * target_name:
+ *
+ * Returns: Canonical target name (i.e. "i386").
+ */
+const char *target_name(void);
+
+#endif
diff --git a/cpu-target.c b/cpu-target.c
index c99d208a7c4..3f82d3ea444 100644
--- a/cpu-target.c
+++ b/cpu-target.c
@@ -165,8 +165,3 @@ bool target_words_bigendian(void)
{
return TARGET_BIG_ENDIAN;
}
-
-const char *target_name(void)
-{
- return TARGET_NAME;
-}
diff --git a/hw/core/machine-qmp-cmds.c b/hw/core/machine-qmp-cmds.c
index 408994b67d7..b317aec234f 100644
--- a/hw/core/machine-qmp-cmds.c
+++ b/hw/core/machine-qmp-cmds.c
@@ -19,6 +19,7 @@
#include "qapi/qobject-input-visitor.h"
#include "qapi/type-helpers.h"
#include "qemu/uuid.h"
+#include "qemu/target_info.h"
#include "qom/qom-qobject.h"
#include "system/hostmem.h"
#include "system/hw_accel.h"
diff --git a/plugins/loader.c b/plugins/loader.c
index 7523d554f03..36a4e88d4db 100644
--- a/plugins/loader.c
+++ b/plugins/loader.c
@@ -29,7 +29,7 @@
#include "qemu/xxhash.h"
#include "qemu/plugin.h"
#include "qemu/memalign.h"
-#include "hw/core/cpu.h"
+#include "qemu/target_info.h"
#include "exec/tb-flush.h"
#include "plugin.h"
diff --git a/system/vl.c b/system/vl.c
index c17945c4939..d8a0fe713c9 100644
--- a/system/vl.c
+++ b/system/vl.c
@@ -40,6 +40,7 @@
#include "qemu/help_option.h"
#include "qemu/hw-version.h"
#include "qemu/uuid.h"
+#include "qemu/target_info.h"
#include "system/reset.h"
#include "system/runstate.h"
#include "system/runstate-action.h"
@@ -79,7 +80,6 @@
#include "hw/block/block.h"
#include "hw/i386/x86.h"
#include "hw/i386/pc.h"
-#include "hw/core/cpu.h"
#include "migration/cpr.h"
#include "migration/misc.h"
#include "migration/snapshot.h"
diff --git a/target_info-stub.c b/target_info-stub.c
new file mode 100644
index 00000000000..1e44bb6f6fb
--- /dev/null
+++ b/target_info-stub.c
@@ -0,0 +1,19 @@
+/*
+ * QEMU target info stubs
+ *
+ * Copyright (c) Linaro
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#include "qemu/osdep.h"
+#include "qemu/target_info-impl.h"
+
+static const TargetInfo target_info_stub = {
+ .name = TARGET_NAME,
+};
+
+const TargetInfo *target_info(void)
+{
+ return &target_info_stub;
+}
diff --git a/target_info.c b/target_info.c
new file mode 100644
index 00000000000..877a6a15014
--- /dev/null
+++ b/target_info.c
@@ -0,0 +1,16 @@
+/*
+ * QEMU binary/target helpers
+ *
+ * Copyright (c) Linaro
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#include "qemu/osdep.h"
+#include "qemu/target_info-impl.h"
+#include "qemu/target_info.h"
+
+const char *target_name(void)
+{
+ return target_info()->name;
+}
--
2.47.1
^ permalink raw reply related [flat|nested] 36+ messages in thread
* [RFC PATCH v2 03/11] system/vl: Filter machine list available for a particular target binary
2025-04-18 0:50 [RFC PATCH v2 00/11] single-binary: Make hw/arm/ common Philippe Mathieu-Daudé
2025-04-18 0:50 ` [RFC PATCH v2 01/11] qapi: Rename TargetInfo structure as BinaryTargetInfo Philippe Mathieu-Daudé
2025-04-18 0:50 ` [RFC PATCH v2 02/11] qemu: Convert target_name() to TargetInfo API Philippe Mathieu-Daudé
@ 2025-04-18 0:50 ` Philippe Mathieu-Daudé
2025-04-18 3:06 ` Pierrick Bouvier
2025-04-18 0:50 ` [RFC PATCH v2 04/11] hw/arm: Register TYPE_TARGET_ARM/AARCH64_CPU QOM interfaces Philippe Mathieu-Daudé
` (7 subsequent siblings)
10 siblings, 1 reply; 36+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-04-18 0:50 UTC (permalink / raw)
To: Pierrick Bouvier, qemu-devel; +Cc: Anton Johansson, Richard Henderson
Binaries can register a QOM type to filter their machines
by filling their TargetInfo::machine_typename field.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
include/qemu/target_info-impl.h | 3 +++
include/qemu/target_info.h | 8 ++++++++
system/vl.c | 14 ++++++++++++++
target_info.c | 5 +++++
4 files changed, 30 insertions(+)
diff --git a/include/qemu/target_info-impl.h b/include/qemu/target_info-impl.h
index d5c94ed5296..990fb067d20 100644
--- a/include/qemu/target_info-impl.h
+++ b/include/qemu/target_info-impl.h
@@ -16,6 +16,9 @@ typedef struct TargetInfo {
/* runtime equivalent of TARGET_NAME definition */
const char *const name;
+ /* QOM typename machines for this binary must implement */
+ const char *const machine_typename;
+
} TargetInfo;
const TargetInfo *target_info(void);
diff --git a/include/qemu/target_info.h b/include/qemu/target_info.h
index 3f6cbbbd300..e9fd2fdd7b0 100644
--- a/include/qemu/target_info.h
+++ b/include/qemu/target_info.h
@@ -16,4 +16,12 @@
*/
const char *target_name(void);
+/**
+ * target_machine_interface_typename:
+ *
+ * Returns: Name of the QOM interface implemented by machines
+ * usable on this target binary.
+ */
+const char *target_machine_interface_typename(void);
+
#endif
diff --git a/system/vl.c b/system/vl.c
index d8a0fe713c9..4e43e55afe7 100644
--- a/system/vl.c
+++ b/system/vl.c
@@ -27,6 +27,7 @@
#include "qemu/datadir.h"
#include "qemu/units.h"
#include "qemu/module.h"
+#include "qemu/target_info.h"
#include "exec/cpu-common.h"
#include "exec/page-vary.h"
#include "hw/qdev-properties.h"
@@ -836,11 +837,17 @@ static bool usb_parse(const char *cmdline, Error **errp)
static MachineClass *find_machine(const char *name, GSList *machines)
{
GSList *el;
+ const char *qom_typename_filter = target_machine_interface_typename();
for (el = machines; el; el = el->next) {
MachineClass *mc = el->data;
if (!strcmp(mc->name, name) || !g_strcmp0(mc->alias, name)) {
+ if (qom_typename_filter
+ && !object_class_dynamic_cast(el->data, qom_typename_filter)) {
+ /* Machine is not for this binary: fail */
+ return NULL;
+ }
return mc;
}
}
@@ -1563,6 +1570,7 @@ static void machine_help_func(const QDict *qdict)
g_autoptr(GSList) machines = NULL;
GSList *el;
const char *type = qdict_get_try_str(qdict, "type");
+ const char *qom_typename_filter = target_machine_interface_typename();
machines = object_class_get_list(TYPE_MACHINE, false);
if (type) {
@@ -1577,6 +1585,12 @@ static void machine_help_func(const QDict *qdict)
machines = g_slist_sort(machines, machine_class_cmp);
for (el = machines; el; el = el->next) {
MachineClass *mc = el->data;
+
+ if (qom_typename_filter
+ && !object_class_dynamic_cast(el->data, qom_typename_filter)) {
+ /* Machine is not for this binary: skip */
+ continue;
+ }
if (mc->alias) {
printf("%-20s %s (alias of %s)\n", mc->alias, mc->desc, mc->name);
}
diff --git a/target_info.c b/target_info.c
index 877a6a15014..226eed1fd7d 100644
--- a/target_info.c
+++ b/target_info.c
@@ -14,3 +14,8 @@ const char *target_name(void)
{
return target_info()->name;
}
+
+const char *target_machine_interface_typename(void)
+{
+ return target_info()->machine_typename;
+}
--
2.47.1
^ permalink raw reply related [flat|nested] 36+ messages in thread
* [RFC PATCH v2 04/11] hw/arm: Register TYPE_TARGET_ARM/AARCH64_CPU QOM interfaces
2025-04-18 0:50 [RFC PATCH v2 00/11] single-binary: Make hw/arm/ common Philippe Mathieu-Daudé
` (2 preceding siblings ...)
2025-04-18 0:50 ` [RFC PATCH v2 03/11] system/vl: Filter machine list available for a particular target binary Philippe Mathieu-Daudé
@ 2025-04-18 0:50 ` Philippe Mathieu-Daudé
2025-04-18 3:07 ` Pierrick Bouvier
2025-04-18 0:50 ` [RFC PATCH v2 05/11] hw/arm: Filter machine types for qemu-system-aarch64 binary Philippe Mathieu-Daudé
` (6 subsequent siblings)
10 siblings, 1 reply; 36+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-04-18 0:50 UTC (permalink / raw)
To: Pierrick Bouvier, qemu-devel; +Cc: Anton Johansson, Richard Henderson
Define the TYPE_TARGET_ARM_MACHINE and TYPE_TARGET_AARCH64_MACHINE
QOM interface names to allow machines to implement them.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
meson.build | 1 +
include/hw/boards.h | 1 +
include/qemu/target_info-qom.h | 18 ++++++++++++++++++
target_info-qom.c | 24 ++++++++++++++++++++++++
4 files changed, 44 insertions(+)
create mode 100644 include/qemu/target_info-qom.h
create mode 100644 target_info-qom.c
diff --git a/meson.build b/meson.build
index 49a050a28a3..168b07b5887 100644
--- a/meson.build
+++ b/meson.build
@@ -3808,6 +3808,7 @@ common_ss.add(pagevary)
specific_ss.add(files('page-target.c', 'page-vary-target.c'))
common_ss.add(files('target_info.c'))
+system_ss.add(files('target_info-qom.c'))
specific_ss.add(files('target_info-stub.c'))
subdir('backends')
diff --git a/include/hw/boards.h b/include/hw/boards.h
index 02f43ac5d4d..b1bbf3c34d4 100644
--- a/include/hw/boards.h
+++ b/include/hw/boards.h
@@ -7,6 +7,7 @@
#include "system/hostmem.h"
#include "system/blockdev.h"
#include "qapi/qapi-types-machine.h"
+#include "qemu/target_info-qom.h"
#include "qemu/module.h"
#include "qom/object.h"
#include "hw/core/cpu.h"
diff --git a/include/qemu/target_info-qom.h b/include/qemu/target_info-qom.h
new file mode 100644
index 00000000000..7eb9b6bd254
--- /dev/null
+++ b/include/qemu/target_info-qom.h
@@ -0,0 +1,18 @@
+/*
+ * QEMU binary/target API (QOM types)
+ *
+ * Copyright (c) Linaro
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#ifndef QEMU_TARGET_INFO_QOM_H
+#define QEMU_TARGET_INFO_QOM_H
+
+#define TYPE_TARGET_ARM_MACHINE \
+ "target-info-arm-machine"
+
+#define TYPE_TARGET_AARCH64_MACHINE \
+ "target-info-aarch64-machine"
+
+#endif
diff --git a/target_info-qom.c b/target_info-qom.c
new file mode 100644
index 00000000000..d3fee57361b
--- /dev/null
+++ b/target_info-qom.c
@@ -0,0 +1,24 @@
+/*
+ * QEMU binary/target API (QOM types)
+ *
+ * Copyright (c) Linaro
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#include "qemu/osdep.h"
+#include "qemu/target_info-qom.h"
+#include "qom/object.h"
+
+static const TypeInfo target_info_types[] = {
+ {
+ .name = TYPE_TARGET_ARM_MACHINE,
+ .parent = TYPE_INTERFACE,
+ },
+ {
+ .name = TYPE_TARGET_AARCH64_MACHINE,
+ .parent = TYPE_INTERFACE,
+ },
+};
+
+DEFINE_TYPES(target_info_types)
--
2.47.1
^ permalink raw reply related [flat|nested] 36+ messages in thread
* [RFC PATCH v2 05/11] hw/arm: Filter machine types for qemu-system-aarch64 binary
2025-04-18 0:50 [RFC PATCH v2 00/11] single-binary: Make hw/arm/ common Philippe Mathieu-Daudé
` (3 preceding siblings ...)
2025-04-18 0:50 ` [RFC PATCH v2 04/11] hw/arm: Register TYPE_TARGET_ARM/AARCH64_CPU QOM interfaces Philippe Mathieu-Daudé
@ 2025-04-18 0:50 ` Philippe Mathieu-Daudé
2025-04-18 0:50 ` [RFC PATCH v2 06/11] hw/arm: Filter machine types for qemu-system-arm binary Philippe Mathieu-Daudé
` (5 subsequent siblings)
10 siblings, 0 replies; 36+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-04-18 0:50 UTC (permalink / raw)
To: Pierrick Bouvier, qemu-devel; +Cc: Anton Johansson, Richard Henderson
Since the qemu-system-aarch64 binary is able to run
all machines indistinctly, simply register the
TYPE_TARGET_AARCH64_MACHINE interface for all
existing machines under the hw/arm/ directory.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
hw/arm/aspeed.c | 88 ++++++++++++++++++++++++++++++++++++++
hw/arm/b-l475e-iot01a.c | 4 ++
hw/arm/bananapi_m2u.c | 4 ++
hw/arm/collie.c | 4 ++
hw/arm/cubieboard.c | 4 ++
hw/arm/digic_boards.c | 4 ++
hw/arm/exynos4_boards.c | 8 ++++
hw/arm/fby35.c | 4 ++
hw/arm/highbank.c | 8 ++++
hw/arm/imx25_pdk.c | 4 ++
hw/arm/imx8mp-evk.c | 4 ++
hw/arm/integratorcp.c | 4 ++
hw/arm/kzm.c | 4 ++
hw/arm/mcimx6ul-evk.c | 4 ++
hw/arm/mcimx7d-sabre.c | 4 ++
hw/arm/microbit.c | 4 ++
hw/arm/mps2-tz.c | 16 +++++++
hw/arm/mps2.c | 16 +++++++
hw/arm/mps3r.c | 4 ++
hw/arm/msf2-som.c | 4 ++
hw/arm/musca.c | 8 ++++
hw/arm/musicpal.c | 4 ++
hw/arm/netduino2.c | 4 ++
hw/arm/netduinoplus2.c | 4 ++
hw/arm/npcm7xx_boards.c | 20 +++++++++
hw/arm/npcm8xx_boards.c | 4 ++
hw/arm/olimex-stm32-h405.c | 4 ++
hw/arm/omap_sx1.c | 8 ++++
hw/arm/orangepi.c | 4 ++
hw/arm/raspi.c | 20 +++++++++
hw/arm/raspi4b.c | 4 ++
hw/arm/realview.c | 16 +++++++
hw/arm/sabrelite.c | 4 ++
hw/arm/sbsa-ref.c | 4 ++
hw/arm/stellaris.c | 8 ++++
hw/arm/stm32vldiscovery.c | 4 ++
hw/arm/versatilepb.c | 8 ++++
hw/arm/vexpress.c | 8 ++++
hw/arm/virt.c | 4 ++
hw/arm/xilinx_zynq.c | 4 ++
hw/arm/xlnx-versal-virt.c | 4 ++
hw/arm/xlnx-zcu102.c | 4 ++
42 files changed, 348 insertions(+)
diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
index 82f42582fa3..ca7004c335a 100644
--- a/hw/arm/aspeed.c
+++ b/hw/arm/aspeed.c
@@ -1760,91 +1760,179 @@ static const TypeInfo aspeed_machine_types[] = {
.name = MACHINE_TYPE_NAME("palmetto-bmc"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_palmetto_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_AARCH64_MACHINE },
+ { },
+ },
}, {
.name = MACHINE_TYPE_NAME("supermicrox11-bmc"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_supermicrox11_bmc_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_AARCH64_MACHINE },
+ { },
+ },
}, {
.name = MACHINE_TYPE_NAME("supermicro-x11spi-bmc"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_supermicro_x11spi_bmc_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_AARCH64_MACHINE },
+ { },
+ },
}, {
.name = MACHINE_TYPE_NAME("ast2500-evb"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_ast2500_evb_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_AARCH64_MACHINE },
+ { },
+ },
}, {
.name = MACHINE_TYPE_NAME("romulus-bmc"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_romulus_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_AARCH64_MACHINE },
+ { },
+ },
}, {
.name = MACHINE_TYPE_NAME("sonorapass-bmc"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_sonorapass_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_AARCH64_MACHINE },
+ { },
+ },
}, {
.name = MACHINE_TYPE_NAME("witherspoon-bmc"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_witherspoon_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_AARCH64_MACHINE },
+ { },
+ },
}, {
.name = MACHINE_TYPE_NAME("ast2600-evb"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_ast2600_evb_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_AARCH64_MACHINE },
+ { },
+ },
}, {
.name = MACHINE_TYPE_NAME("yosemitev2-bmc"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_yosemitev2_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_AARCH64_MACHINE },
+ { },
+ },
}, {
.name = MACHINE_TYPE_NAME("tiogapass-bmc"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_tiogapass_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_AARCH64_MACHINE },
+ { },
+ },
}, {
.name = MACHINE_TYPE_NAME("g220a-bmc"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_g220a_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_AARCH64_MACHINE },
+ { },
+ },
}, {
.name = MACHINE_TYPE_NAME("qcom-dc-scm-v1-bmc"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_qcom_dc_scm_v1_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_AARCH64_MACHINE },
+ { },
+ },
}, {
.name = MACHINE_TYPE_NAME("qcom-firework-bmc"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_qcom_firework_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_AARCH64_MACHINE },
+ { },
+ },
}, {
.name = MACHINE_TYPE_NAME("fp5280g2-bmc"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_fp5280g2_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_AARCH64_MACHINE },
+ { },
+ },
}, {
.name = MACHINE_TYPE_NAME("quanta-q71l-bmc"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_quanta_q71l_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_AARCH64_MACHINE },
+ { },
+ },
}, {
.name = MACHINE_TYPE_NAME("rainier-bmc"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_rainier_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_AARCH64_MACHINE },
+ { },
+ },
}, {
.name = MACHINE_TYPE_NAME("fuji-bmc"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_fuji_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_AARCH64_MACHINE },
+ { },
+ },
}, {
.name = MACHINE_TYPE_NAME("bletchley-bmc"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_bletchley_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_AARCH64_MACHINE },
+ { },
+ },
}, {
.name = MACHINE_TYPE_NAME("fby35-bmc"),
.parent = MACHINE_TYPE_NAME("ast2600-evb"),
.class_init = aspeed_machine_fby35_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_AARCH64_MACHINE },
+ { },
+ },
}, {
.name = MACHINE_TYPE_NAME("ast1030-evb"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_minibmc_machine_ast1030_evb_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_AARCH64_MACHINE },
+ { },
+ },
#ifdef TARGET_AARCH64
}, {
.name = MACHINE_TYPE_NAME("ast2700a0-evb"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_ast2700a0_evb_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_AARCH64_MACHINE },
+ { },
+ },
}, {
.name = MACHINE_TYPE_NAME("ast2700a1-evb"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_ast2700a1_evb_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_AARCH64_MACHINE },
+ { },
+ },
#endif
}, {
.name = TYPE_ASPEED_MACHINE,
diff --git a/hw/arm/b-l475e-iot01a.c b/hw/arm/b-l475e-iot01a.c
index c9a5209216c..cc4b9d6c3b5 100644
--- a/hw/arm/b-l475e-iot01a.c
+++ b/hw/arm/b-l475e-iot01a.c
@@ -131,6 +131,10 @@ static const TypeInfo bl475e_machine_type[] = {
.parent = TYPE_MACHINE,
.instance_size = sizeof(Bl475eMachineState),
.class_init = bl475e_machine_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_AARCH64_MACHINE },
+ { },
+ },
}
};
diff --git a/hw/arm/bananapi_m2u.c b/hw/arm/bananapi_m2u.c
index 724ee4b05e5..d9871a796bb 100644
--- a/hw/arm/bananapi_m2u.c
+++ b/hw/arm/bananapi_m2u.c
@@ -150,6 +150,10 @@ static const TypeInfo bananapi_machine_types[] = {
.name = MACHINE_TYPE_NAME("bpim2u"),
.parent = TYPE_MACHINE,
.class_init = bpim2u_machine_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_AARCH64_MACHINE },
+ { },
+ },
},
};
diff --git a/hw/arm/collie.c b/hw/arm/collie.c
index e83aee58c6b..16e862e15b6 100644
--- a/hw/arm/collie.c
+++ b/hw/arm/collie.c
@@ -86,6 +86,10 @@ static const TypeInfo collie_machine_typeinfo = {
.parent = TYPE_MACHINE,
.class_init = collie_machine_class_init,
.instance_size = sizeof(CollieMachineState),
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_AARCH64_MACHINE },
+ { },
+ },
};
static void collie_machine_register_types(void)
diff --git a/hw/arm/cubieboard.c b/hw/arm/cubieboard.c
index 36062ac7037..dd40d65554d 100644
--- a/hw/arm/cubieboard.c
+++ b/hw/arm/cubieboard.c
@@ -131,6 +131,10 @@ static const TypeInfo cubieboard_machine_types[] = {
.name = MACHINE_TYPE_NAME("cubieboard"),
.parent = TYPE_MACHINE,
.class_init = cubieboard_machine_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_AARCH64_MACHINE },
+ { },
+ },
},
};
diff --git a/hw/arm/digic_boards.c b/hw/arm/digic_boards.c
index 3c0cc6e4370..f55309082ac 100644
--- a/hw/arm/digic_boards.c
+++ b/hw/arm/digic_boards.c
@@ -152,6 +152,10 @@ static const TypeInfo digic_machine_types[] = {
.name = MACHINE_TYPE_NAME("canon-a1100"),
.parent = TYPE_MACHINE,
.class_init = digic_machine_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_AARCH64_MACHINE },
+ { },
+ },
},
};
diff --git a/hw/arm/exynos4_boards.c b/hw/arm/exynos4_boards.c
index 2d8f2d73265..b55e364d962 100644
--- a/hw/arm/exynos4_boards.c
+++ b/hw/arm/exynos4_boards.c
@@ -172,6 +172,10 @@ static const TypeInfo nuri_type = {
.name = MACHINE_TYPE_NAME("nuri"),
.parent = TYPE_MACHINE,
.class_init = nuri_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_AARCH64_MACHINE },
+ { },
+ },
};
static void smdkc210_class_init(ObjectClass *oc, void *data)
@@ -192,6 +196,10 @@ static const TypeInfo smdkc210_type = {
.name = MACHINE_TYPE_NAME("smdkc210"),
.parent = TYPE_MACHINE,
.class_init = smdkc210_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_AARCH64_MACHINE },
+ { },
+ },
};
static void exynos4_machines_init(void)
diff --git a/hw/arm/fby35.c b/hw/arm/fby35.c
index 6d3663f14a1..de6b32ce532 100644
--- a/hw/arm/fby35.c
+++ b/hw/arm/fby35.c
@@ -187,6 +187,10 @@ static const TypeInfo fby35_types[] = {
.class_init = fby35_class_init,
.instance_size = sizeof(Fby35State),
.instance_init = fby35_instance_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_AARCH64_MACHINE },
+ { },
+ },
},
};
diff --git a/hw/arm/highbank.c b/hw/arm/highbank.c
index 0f3c207d548..e517cf3c7f6 100644
--- a/hw/arm/highbank.c
+++ b/hw/arm/highbank.c
@@ -363,6 +363,10 @@ static const TypeInfo highbank_type = {
.name = MACHINE_TYPE_NAME("highbank"),
.parent = TYPE_MACHINE,
.class_init = highbank_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_AARCH64_MACHINE },
+ { },
+ },
};
static void midway_class_init(ObjectClass *oc, void *data)
@@ -387,6 +391,10 @@ static const TypeInfo midway_type = {
.name = MACHINE_TYPE_NAME("midway"),
.parent = TYPE_MACHINE,
.class_init = midway_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_AARCH64_MACHINE },
+ { },
+ },
};
static void calxeda_machines_init(void)
diff --git a/hw/arm/imx25_pdk.c b/hw/arm/imx25_pdk.c
index a90def7f1a2..da8479ca608 100644
--- a/hw/arm/imx25_pdk.c
+++ b/hw/arm/imx25_pdk.c
@@ -157,6 +157,10 @@ static const TypeInfo imx25_machine_types[] = {
.name = MACHINE_TYPE_NAME("imx25-pdk"),
.parent = TYPE_MACHINE,
.class_init = imx25_pdk_machine_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_AARCH64_MACHINE },
+ { },
+ },
},
};
diff --git a/hw/arm/imx8mp-evk.c b/hw/arm/imx8mp-evk.c
index c7d87d99230..bc8a3abd04a 100644
--- a/hw/arm/imx8mp-evk.c
+++ b/hw/arm/imx8mp-evk.c
@@ -79,6 +79,10 @@ static const TypeInfo imx8_machine_types[] = {
.name = MACHINE_TYPE_NAME("imx8mp-evk"),
.parent = TYPE_MACHINE,
.class_init = imx8mp_evk_machine_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_AARCH64_MACHINE },
+ { },
+ },
},
};
diff --git a/hw/arm/integratorcp.c b/hw/arm/integratorcp.c
index f95916b517d..5599cf60707 100644
--- a/hw/arm/integratorcp.c
+++ b/hw/arm/integratorcp.c
@@ -760,6 +760,10 @@ static const TypeInfo integratorcp_machine_types[] = {
.name = MACHINE_TYPE_NAME("integratorcp"),
.parent = TYPE_MACHINE,
.class_init = integratorcp_machine_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_AARCH64_MACHINE },
+ { },
+ },
},
};
diff --git a/hw/arm/kzm.c b/hw/arm/kzm.c
index b56cabe9f94..208546205be 100644
--- a/hw/arm/kzm.c
+++ b/hw/arm/kzm.c
@@ -146,6 +146,10 @@ static const TypeInfo kzm_machine_types[] = {
.name = MACHINE_TYPE_NAME("kzm"),
.parent = TYPE_MACHINE,
.class_init = kzm_machine_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_AARCH64_MACHINE },
+ { },
+ },
},
};
diff --git a/hw/arm/mcimx6ul-evk.c b/hw/arm/mcimx6ul-evk.c
index d947836d2be..65e6134862e 100644
--- a/hw/arm/mcimx6ul-evk.c
+++ b/hw/arm/mcimx6ul-evk.c
@@ -84,6 +84,10 @@ static const TypeInfo imx6_machine_types[] = {
.name = MACHINE_TYPE_NAME("mcimx6ul-evk"),
.parent = TYPE_MACHINE,
.class_init = mcimx6ul_evk_machine_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_AARCH64_MACHINE },
+ { },
+ },
},
};
diff --git a/hw/arm/mcimx7d-sabre.c b/hw/arm/mcimx7d-sabre.c
index f5dc9c211dd..1f88dc03915 100644
--- a/hw/arm/mcimx7d-sabre.c
+++ b/hw/arm/mcimx7d-sabre.c
@@ -84,6 +84,10 @@ static const TypeInfo imx7_machine_types[] = {
.name = MACHINE_TYPE_NAME("mcimx7d-sabre"),
.parent = TYPE_MACHINE,
.class_init = mcimx7d_sabre_machine_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_AARCH64_MACHINE },
+ { },
+ },
},
};
diff --git a/hw/arm/microbit.c b/hw/arm/microbit.c
index ade363daaa4..e537735e247 100644
--- a/hw/arm/microbit.c
+++ b/hw/arm/microbit.c
@@ -74,6 +74,10 @@ static const TypeInfo microbit_info = {
.parent = TYPE_MACHINE,
.instance_size = sizeof(MicrobitMachineState),
.class_init = microbit_machine_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_AARCH64_MACHINE },
+ { },
+ },
};
static void microbit_machine_init(void)
diff --git a/hw/arm/mps2-tz.c b/hw/arm/mps2-tz.c
index b0633a5a69e..6cd36ee4037 100644
--- a/hw/arm/mps2-tz.c
+++ b/hw/arm/mps2-tz.c
@@ -1463,24 +1463,40 @@ static const TypeInfo mps2tz_an505_info = {
.name = TYPE_MPS2TZ_AN505_MACHINE,
.parent = TYPE_MPS2TZ_MACHINE,
.class_init = mps2tz_an505_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_AARCH64_MACHINE },
+ { },
+ },
};
static const TypeInfo mps2tz_an521_info = {
.name = TYPE_MPS2TZ_AN521_MACHINE,
.parent = TYPE_MPS2TZ_MACHINE,
.class_init = mps2tz_an521_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_AARCH64_MACHINE },
+ { },
+ },
};
static const TypeInfo mps3tz_an524_info = {
.name = TYPE_MPS3TZ_AN524_MACHINE,
.parent = TYPE_MPS2TZ_MACHINE,
.class_init = mps3tz_an524_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_AARCH64_MACHINE },
+ { },
+ },
};
static const TypeInfo mps3tz_an547_info = {
.name = TYPE_MPS3TZ_AN547_MACHINE,
.parent = TYPE_MPS2TZ_MACHINE,
.class_init = mps3tz_an547_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_AARCH64_MACHINE },
+ { },
+ },
};
static void mps2tz_machine_init(void)
diff --git a/hw/arm/mps2.c b/hw/arm/mps2.c
index 6958485a668..709d7d0a08e 100644
--- a/hw/arm/mps2.c
+++ b/hw/arm/mps2.c
@@ -563,24 +563,40 @@ static const TypeInfo mps2_an385_info = {
.name = TYPE_MPS2_AN385_MACHINE,
.parent = TYPE_MPS2_MACHINE,
.class_init = mps2_an385_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_AARCH64_MACHINE },
+ { },
+ },
};
static const TypeInfo mps2_an386_info = {
.name = TYPE_MPS2_AN386_MACHINE,
.parent = TYPE_MPS2_MACHINE,
.class_init = mps2_an386_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_AARCH64_MACHINE },
+ { },
+ },
};
static const TypeInfo mps2_an500_info = {
.name = TYPE_MPS2_AN500_MACHINE,
.parent = TYPE_MPS2_MACHINE,
.class_init = mps2_an500_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_AARCH64_MACHINE },
+ { },
+ },
};
static const TypeInfo mps2_an511_info = {
.name = TYPE_MPS2_AN511_MACHINE,
.parent = TYPE_MPS2_MACHINE,
.class_init = mps2_an511_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_AARCH64_MACHINE },
+ { },
+ },
};
static void mps2_machine_init(void)
diff --git a/hw/arm/mps3r.c b/hw/arm/mps3r.c
index 4dd1e8a7180..d1a72c7775b 100644
--- a/hw/arm/mps3r.c
+++ b/hw/arm/mps3r.c
@@ -634,6 +634,10 @@ static const TypeInfo mps3r_machine_types[] = {
.name = TYPE_MPS3R_AN536_MACHINE,
.parent = TYPE_MPS3R_MACHINE,
.class_init = mps3r_an536_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_AARCH64_MACHINE },
+ { },
+ },
},
};
diff --git a/hw/arm/msf2-som.c b/hw/arm/msf2-som.c
index 6ce47eaa27a..11988b6aa6d 100644
--- a/hw/arm/msf2-som.c
+++ b/hw/arm/msf2-som.c
@@ -114,6 +114,10 @@ static const TypeInfo msf2_machine_types[] = {
.name = MACHINE_TYPE_NAME("emcraft-sf2"),
.parent = TYPE_MACHINE,
.class_init = emcraft_sf2_machine_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_AARCH64_MACHINE },
+ { },
+ },
},
};
diff --git a/hw/arm/musca.c b/hw/arm/musca.c
index a4f43f1992b..3a11b3d1cd6 100644
--- a/hw/arm/musca.c
+++ b/hw/arm/musca.c
@@ -657,12 +657,20 @@ static const TypeInfo musca_a_info = {
.name = TYPE_MUSCA_A_MACHINE,
.parent = TYPE_MUSCA_MACHINE,
.class_init = musca_a_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_AARCH64_MACHINE },
+ { },
+ },
};
static const TypeInfo musca_b1_info = {
.name = TYPE_MUSCA_B1_MACHINE,
.parent = TYPE_MUSCA_MACHINE,
.class_init = musca_b1_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_AARCH64_MACHINE },
+ { },
+ },
};
static void musca_machine_init(void)
diff --git a/hw/arm/musicpal.c b/hw/arm/musicpal.c
index f7c488cd1d6..9cf8eec8b13 100644
--- a/hw/arm/musicpal.c
+++ b/hw/arm/musicpal.c
@@ -1381,6 +1381,10 @@ static const TypeInfo musicpal_types[] = {
.name = MACHINE_TYPE_NAME("musicpal"),
.parent = TYPE_MACHINE,
.class_init = musicpal_machine_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_AARCH64_MACHINE },
+ { },
+ },
},
};
diff --git a/hw/arm/netduino2.c b/hw/arm/netduino2.c
index 52c30055d44..e6e140ed6bf 100644
--- a/hw/arm/netduino2.c
+++ b/hw/arm/netduino2.c
@@ -71,6 +71,10 @@ static const TypeInfo netduino_machine_types[] = {
.name = MACHINE_TYPE_NAME("netduino2"),
.parent = TYPE_MACHINE,
.class_init = netduino2_machine_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_AARCH64_MACHINE },
+ { },
+ },
},
};
diff --git a/hw/arm/netduinoplus2.c b/hw/arm/netduinoplus2.c
index 2735d3a0e2b..b54e990b5bd 100644
--- a/hw/arm/netduinoplus2.c
+++ b/hw/arm/netduinoplus2.c
@@ -71,6 +71,10 @@ static const TypeInfo netduino_machine_types[] = {
.name = MACHINE_TYPE_NAME("netduinoplus2"),
.parent = TYPE_MACHINE,
.class_init = netduinoplus2_machine_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_AARCH64_MACHINE },
+ { },
+ },
},
};
diff --git a/hw/arm/npcm7xx_boards.c b/hw/arm/npcm7xx_boards.c
index eb28b97ad83..4d2c52f3422 100644
--- a/hw/arm/npcm7xx_boards.c
+++ b/hw/arm/npcm7xx_boards.c
@@ -549,22 +549,42 @@ static const TypeInfo npcm7xx_machine_types[] = {
.name = MACHINE_TYPE_NAME("npcm750-evb"),
.parent = TYPE_NPCM7XX_MACHINE,
.class_init = npcm750_evb_machine_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_AARCH64_MACHINE },
+ { },
+ },
}, {
.name = MACHINE_TYPE_NAME("quanta-gsj"),
.parent = TYPE_NPCM7XX_MACHINE,
.class_init = gsj_machine_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_AARCH64_MACHINE },
+ { },
+ },
}, {
.name = MACHINE_TYPE_NAME("quanta-gbs-bmc"),
.parent = TYPE_NPCM7XX_MACHINE,
.class_init = gbs_bmc_machine_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_AARCH64_MACHINE },
+ { },
+ },
}, {
.name = MACHINE_TYPE_NAME("kudo-bmc"),
.parent = TYPE_NPCM7XX_MACHINE,
.class_init = kudo_bmc_machine_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_AARCH64_MACHINE },
+ { },
+ },
}, {
.name = MACHINE_TYPE_NAME("mori-bmc"),
.parent = TYPE_NPCM7XX_MACHINE,
.class_init = mori_bmc_machine_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_AARCH64_MACHINE },
+ { },
+ },
},
};
diff --git a/hw/arm/npcm8xx_boards.c b/hw/arm/npcm8xx_boards.c
index 3fb8478e72e..1b5a3080436 100644
--- a/hw/arm/npcm8xx_boards.c
+++ b/hw/arm/npcm8xx_boards.c
@@ -248,6 +248,10 @@ static const TypeInfo npcm8xx_machine_types[] = {
.name = MACHINE_TYPE_NAME("npcm845-evb"),
.parent = TYPE_NPCM8XX_MACHINE,
.class_init = npcm845_evb_machine_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_AARCH64_MACHINE },
+ { },
+ },
},
};
diff --git a/hw/arm/olimex-stm32-h405.c b/hw/arm/olimex-stm32-h405.c
index 795218c93cf..4344bef4db1 100644
--- a/hw/arm/olimex-stm32-h405.c
+++ b/hw/arm/olimex-stm32-h405.c
@@ -77,6 +77,10 @@ static const TypeInfo olimex_stm32_machine_types[] = {
.name = MACHINE_TYPE_NAME("olimex-stm32-h405"),
.parent = TYPE_MACHINE,
.class_init = olimex_stm32_machine_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_AARCH64_MACHINE },
+ { },
+ },
},
};
diff --git a/hw/arm/omap_sx1.c b/hw/arm/omap_sx1.c
index aa1e96b3ad7..9f90f95b9ee 100644
--- a/hw/arm/omap_sx1.c
+++ b/hw/arm/omap_sx1.c
@@ -219,6 +219,10 @@ static const TypeInfo sx1_machine_v2_type = {
.name = MACHINE_TYPE_NAME("sx1"),
.parent = TYPE_MACHINE,
.class_init = sx1_machine_v2_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_AARCH64_MACHINE },
+ { },
+ },
};
static void sx1_machine_v1_class_init(ObjectClass *oc, void *data)
@@ -238,6 +242,10 @@ static const TypeInfo sx1_machine_v1_type = {
.name = MACHINE_TYPE_NAME("sx1-v1"),
.parent = TYPE_MACHINE,
.class_init = sx1_machine_v1_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_AARCH64_MACHINE },
+ { },
+ },
};
static void sx1_machine_init(void)
diff --git a/hw/arm/orangepi.c b/hw/arm/orangepi.c
index 6821033bfd7..f539b2fc3a4 100644
--- a/hw/arm/orangepi.c
+++ b/hw/arm/orangepi.c
@@ -130,6 +130,10 @@ static const TypeInfo orangepi_machine_types[] = {
.name = MACHINE_TYPE_NAME("orangepi-pc"),
.parent = TYPE_MACHINE,
.class_init = orangepi_machine_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_AARCH64_MACHINE },
+ { },
+ },
},
};
diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c
index dce35ca11aa..b8b947bc29e 100644
--- a/hw/arm/raspi.c
+++ b/hw/arm/raspi.c
@@ -394,23 +394,43 @@ static const TypeInfo raspi_machine_types[] = {
.name = MACHINE_TYPE_NAME("raspi0"),
.parent = TYPE_RASPI_MACHINE,
.class_init = raspi0_machine_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_AARCH64_MACHINE },
+ { },
+ },
}, {
.name = MACHINE_TYPE_NAME("raspi1ap"),
.parent = TYPE_RASPI_MACHINE,
.class_init = raspi1ap_machine_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_AARCH64_MACHINE },
+ { },
+ },
}, {
.name = MACHINE_TYPE_NAME("raspi2b"),
.parent = TYPE_RASPI_MACHINE,
.class_init = raspi2b_machine_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_AARCH64_MACHINE },
+ { },
+ },
#ifdef TARGET_AARCH64
}, {
.name = MACHINE_TYPE_NAME("raspi3ap"),
.parent = TYPE_RASPI_MACHINE,
.class_init = raspi3ap_machine_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_AARCH64_MACHINE },
+ { },
+ },
}, {
.name = MACHINE_TYPE_NAME("raspi3b"),
.parent = TYPE_RASPI_MACHINE,
.class_init = raspi3b_machine_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_AARCH64_MACHINE },
+ { },
+ },
#endif
}, {
.name = TYPE_RASPI_MACHINE,
diff --git a/hw/arm/raspi4b.c b/hw/arm/raspi4b.c
index f6de103a3e1..8074cd80b4d 100644
--- a/hw/arm/raspi4b.c
+++ b/hw/arm/raspi4b.c
@@ -127,6 +127,10 @@ static const TypeInfo raspi4b_machine_type = {
.parent = TYPE_RASPI_BASE_MACHINE,
.instance_size = sizeof(Raspi4bMachineState),
.class_init = raspi4b_machine_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_AARCH64_MACHINE },
+ { },
+ },
};
static void raspi4b_machine_register_type(void)
diff --git a/hw/arm/realview.c b/hw/arm/realview.c
index 008eeaf049a..2ccee583117 100644
--- a/hw/arm/realview.c
+++ b/hw/arm/realview.c
@@ -431,6 +431,10 @@ static const TypeInfo realview_eb_type = {
.name = MACHINE_TYPE_NAME("realview-eb"),
.parent = TYPE_MACHINE,
.class_init = realview_eb_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_AARCH64_MACHINE },
+ { },
+ },
};
static void realview_eb_mpcore_class_init(ObjectClass *oc, void *data)
@@ -452,6 +456,10 @@ static const TypeInfo realview_eb_mpcore_type = {
.name = MACHINE_TYPE_NAME("realview-eb-mpcore"),
.parent = TYPE_MACHINE,
.class_init = realview_eb_mpcore_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_AARCH64_MACHINE },
+ { },
+ },
};
static void realview_pb_a8_class_init(ObjectClass *oc, void *data)
@@ -471,6 +479,10 @@ static const TypeInfo realview_pb_a8_type = {
.name = MACHINE_TYPE_NAME("realview-pb-a8"),
.parent = TYPE_MACHINE,
.class_init = realview_pb_a8_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_AARCH64_MACHINE },
+ { },
+ },
};
static void realview_pbx_a9_class_init(ObjectClass *oc, void *data)
@@ -491,6 +503,10 @@ static const TypeInfo realview_pbx_a9_type = {
.name = MACHINE_TYPE_NAME("realview-pbx-a9"),
.parent = TYPE_MACHINE,
.class_init = realview_pbx_a9_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_AARCH64_MACHINE },
+ { },
+ },
};
static void realview_machine_init(void)
diff --git a/hw/arm/sabrelite.c b/hw/arm/sabrelite.c
index ea59ba301e7..a4c1dd7edc1 100644
--- a/hw/arm/sabrelite.c
+++ b/hw/arm/sabrelite.c
@@ -120,6 +120,10 @@ static const TypeInfo sabrelite_machine_types[] = {
.name = MACHINE_TYPE_NAME("sabrelite"),
.parent = TYPE_MACHINE,
.class_init = sabrelite_machine_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_AARCH64_MACHINE },
+ { },
+ },
},
};
diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c
index aa09d7a0917..138b8a4bf7f 100644
--- a/hw/arm/sbsa-ref.c
+++ b/hw/arm/sbsa-ref.c
@@ -920,6 +920,10 @@ static const TypeInfo sbsa_ref_info = {
.instance_init = sbsa_ref_instance_init,
.class_init = sbsa_ref_class_init,
.instance_size = sizeof(SBSAMachineState),
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_AARCH64_MACHINE },
+ { },
+ },
};
static void sbsa_ref_machine_init(void)
diff --git a/hw/arm/stellaris.c b/hw/arm/stellaris.c
index cbe914c93e9..1e696e25c42 100644
--- a/hw/arm/stellaris.c
+++ b/hw/arm/stellaris.c
@@ -1427,6 +1427,10 @@ static const TypeInfo lm3s811evb_type = {
.name = MACHINE_TYPE_NAME("lm3s811evb"),
.parent = TYPE_MACHINE,
.class_init = lm3s811evb_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_AARCH64_MACHINE },
+ { },
+ },
};
/*
@@ -1448,6 +1452,10 @@ static const TypeInfo lm3s6965evb_type = {
.name = MACHINE_TYPE_NAME("lm3s6965evb"),
.parent = TYPE_MACHINE,
.class_init = lm3s6965evb_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_AARCH64_MACHINE },
+ { },
+ },
};
static void stellaris_machine_init(void)
diff --git a/hw/arm/stm32vldiscovery.c b/hw/arm/stm32vldiscovery.c
index 3a9728ca719..7c267fd880b 100644
--- a/hw/arm/stm32vldiscovery.c
+++ b/hw/arm/stm32vldiscovery.c
@@ -74,6 +74,10 @@ static const TypeInfo stm32vldiscovery_machine_types[] = {
.name = MACHINE_TYPE_NAME("stm32vldiscovery"),
.parent = TYPE_MACHINE,
.class_init = stm32vldiscovery_machine_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_AARCH64_MACHINE },
+ { },
+ },
},
};
diff --git a/hw/arm/versatilepb.c b/hw/arm/versatilepb.c
index 35766445fa4..4c71a73b3b1 100644
--- a/hw/arm/versatilepb.c
+++ b/hw/arm/versatilepb.c
@@ -431,6 +431,10 @@ static const TypeInfo versatilepb_type = {
.name = MACHINE_TYPE_NAME("versatilepb"),
.parent = TYPE_MACHINE,
.class_init = versatilepb_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_AARCH64_MACHINE },
+ { },
+ },
};
static void versatileab_class_init(ObjectClass *oc, void *data)
@@ -452,6 +456,10 @@ static const TypeInfo versatileab_type = {
.name = MACHINE_TYPE_NAME("versatileab"),
.parent = TYPE_MACHINE,
.class_init = versatileab_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_AARCH64_MACHINE },
+ { },
+ },
};
static void versatile_machine_init(void)
diff --git a/hw/arm/vexpress.c b/hw/arm/vexpress.c
index 76c6107766c..fad4a9b8cfa 100644
--- a/hw/arm/vexpress.c
+++ b/hw/arm/vexpress.c
@@ -850,6 +850,10 @@ static const TypeInfo vexpress_a9_info = {
.parent = TYPE_VEXPRESS_MACHINE,
.class_init = vexpress_a9_class_init,
.instance_init = vexpress_a9_instance_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_AARCH64_MACHINE },
+ { },
+ },
};
static const TypeInfo vexpress_a15_info = {
@@ -857,6 +861,10 @@ static const TypeInfo vexpress_a15_info = {
.parent = TYPE_VEXPRESS_MACHINE,
.class_init = vexpress_a15_class_init,
.instance_init = vexpress_a15_instance_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_AARCH64_MACHINE },
+ { },
+ },
};
static void vexpress_machine_init(void)
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index a96452f17a4..41918eb760b 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -123,6 +123,10 @@ static void arm_virt_compat_set(MachineClass *mc)
.name = MACHINE_VER_TYPE_NAME("virt", __VA_ARGS__), \
.parent = TYPE_VIRT_MACHINE, \
.class_init = MACHINE_VER_SYM(class_init, virt, __VA_ARGS__), \
+ .interfaces = (InterfaceInfo[]) { \
+ { TYPE_TARGET_AARCH64_MACHINE }, \
+ { }, \
+ }, \
}; \
static void MACHINE_VER_SYM(register, virt, __VA_ARGS__)(void) \
{ \
diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c
index b8916665ed6..efcbddffda0 100644
--- a/hw/arm/xilinx_zynq.c
+++ b/hw/arm/xilinx_zynq.c
@@ -480,6 +480,10 @@ static const TypeInfo zynq_machine_type = {
.parent = TYPE_MACHINE,
.class_init = zynq_machine_class_init,
.instance_size = sizeof(ZynqMachineState),
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_AARCH64_MACHINE },
+ { },
+ },
};
static void zynq_machine_register_types(void)
diff --git a/hw/arm/xlnx-versal-virt.c b/hw/arm/xlnx-versal-virt.c
index 0c6f0359e3d..89fd79f81e3 100644
--- a/hw/arm/xlnx-versal-virt.c
+++ b/hw/arm/xlnx-versal-virt.c
@@ -833,6 +833,10 @@ static const TypeInfo versal_virt_machine_init_typeinfo = {
.instance_init = versal_virt_machine_instance_init,
.instance_size = sizeof(VersalVirt),
.instance_finalize = versal_virt_machine_finalize,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_AARCH64_MACHINE },
+ { },
+ },
};
static void versal_virt_machine_init_register_types(void)
diff --git a/hw/arm/xlnx-zcu102.c b/hw/arm/xlnx-zcu102.c
index 4fdb153e4d8..1ca4ac6a675 100644
--- a/hw/arm/xlnx-zcu102.c
+++ b/hw/arm/xlnx-zcu102.c
@@ -303,6 +303,10 @@ static const TypeInfo xlnx_zcu102_machine_init_typeinfo = {
.class_init = xlnx_zcu102_machine_class_init,
.instance_init = xlnx_zcu102_machine_instance_init,
.instance_size = sizeof(XlnxZCU102),
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_AARCH64_MACHINE },
+ { },
+ },
};
static void xlnx_zcu102_machine_init_register_types(void)
--
2.47.1
^ permalink raw reply related [flat|nested] 36+ messages in thread
* [RFC PATCH v2 06/11] hw/arm: Filter machine types for qemu-system-arm binary
2025-04-18 0:50 [RFC PATCH v2 00/11] single-binary: Make hw/arm/ common Philippe Mathieu-Daudé
` (4 preceding siblings ...)
2025-04-18 0:50 ` [RFC PATCH v2 05/11] hw/arm: Filter machine types for qemu-system-aarch64 binary Philippe Mathieu-Daudé
@ 2025-04-18 0:50 ` Philippe Mathieu-Daudé
2025-04-18 3:08 ` Pierrick Bouvier
2025-04-18 0:50 ` [RFC PATCH v2 07/11] hw/core: Allow ARM/Aarch64 binaries to use the 'none' machine Philippe Mathieu-Daudé
` (4 subsequent siblings)
10 siblings, 1 reply; 36+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-04-18 0:50 UTC (permalink / raw)
To: Pierrick Bouvier, qemu-devel; +Cc: Anton Johansson, Richard Henderson
Very few machines are restricted to the qemu-system-aarch64
binary:
$ git grep TARGET_AARCH64 hw/arm/meson.build
hw/arm/meson.build:31:arm_common_ss.add(when: ['CONFIG_RASPI', 'TARGET_AARCH64'], if_true: files('bcm2838.c', 'raspi4b.c'))
hw/arm/meson.build:50:arm_common_ss.add(when: ['CONFIG_ASPEED_SOC', 'TARGET_AARCH64'], if_true: files('aspeed_ast27x0.c'))
$ git grep -W AARCH64 hw/arm/Kconfig
hw/arm/Kconfig=185=config SBSA_REF
hw/arm/Kconfig-186- bool
hw/arm/Kconfig-187- default y
hw/arm/Kconfig:188: depends on TCG && AARCH64
--
hw/arm/Kconfig=413=config XLNX_ZYNQMP_ARM
hw/arm/Kconfig-414- bool
hw/arm/Kconfig-415- default y if PIXMAN
hw/arm/Kconfig:416: depends on TCG && AARCH64
--
hw/arm/Kconfig=435=config XLNX_VERSAL
hw/arm/Kconfig-436- bool
hw/arm/Kconfig-437- default y
hw/arm/Kconfig:438: depends on TCG && AARCH64
--
hw/arm/Kconfig=475=config NPCM8XX
hw/arm/Kconfig-476- bool
hw/arm/Kconfig-477- default y
hw/arm/Kconfig:478: depends on TCG && AARCH64
--
hw/arm/Kconfig=605=config FSL_IMX8MP_EVK
hw/arm/Kconfig-606- bool
hw/arm/Kconfig-607- default y
hw/arm/Kconfig:608: depends on TCG && AARCH64
$ git grep -wW TARGET_AARCH64 hw/arm | fgrep -4 MACHINE_TYPE_NAME
...
hw/arm/aspeed.c:1939:#ifdef TARGET_AARCH64
hw/arm/aspeed.c-1940- }, {
hw/arm/aspeed.c-1941- .name = MACHINE_TYPE_NAME("ast2700a0-evb"),
hw/arm/aspeed.c-1949- .name = MACHINE_TYPE_NAME("ast2700a1-evb"),
hw/arm/raspi.c:420:#ifdef TARGET_AARCH64
hw/arm/raspi.c-421- }, {
hw/arm/raspi.c-422- .name = MACHINE_TYPE_NAME("raspi3ap"),
hw/arm/raspi.c-429- }, {
hw/arm/raspi.c-430- .name = MACHINE_TYPE_NAME("raspi3b"),
This can be verified as:
$ diff -u0 <(qemu-system-arm -M help) <(qemu-system-aarch64 -M help)
@@ -5,3 +4,0 @@
-ast2700-evb Aspeed AST2700 A0 EVB (Cortex-A35) (alias of ast2700a0-evb)
-ast2700a0-evb Aspeed AST2700 A0 EVB (Cortex-A35)
-ast2700a1-evb Aspeed AST2700 A1 EVB (Cortex-A35)
@@ -22 +18,0 @@
-imx8mp-evk NXP i.MX 8M Plus EVK Board
@@ -49 +44,0 @@
-npcm845-evb Nuvoton NPCM845 Evaluation Board (Cortex-A35)
@@ -63,3 +57,0 @@
-raspi3ap Raspberry Pi 3A+ (revision 1.0)
-raspi3b Raspberry Pi 3B (revision 1.2)
-raspi4b Raspberry Pi 4B (revision 1.5)
@@ -72 +63,0 @@
-sbsa-ref QEMU 'SBSA Reference' ARM Virtual Machine
@@ -116,2 +106,0 @@
-xlnx-versal-virt Xilinx Versal Virtual development board
-xlnx-zcu102 Xilinx ZynqMP ZCU102 board with 4xA53s and 2xR5Fs based on the value of smp
Register the TYPE_TARGET_ARM_MACHINE interface for all
the machines not listed previously.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
hw/arm/aspeed.c | 20 ++++++++++++++++++++
hw/arm/b-l475e-iot01a.c | 1 +
hw/arm/bananapi_m2u.c | 1 +
hw/arm/collie.c | 1 +
hw/arm/cubieboard.c | 1 +
hw/arm/digic_boards.c | 1 +
hw/arm/exynos4_boards.c | 2 ++
hw/arm/fby35.c | 1 +
hw/arm/highbank.c | 2 ++
hw/arm/imx25_pdk.c | 1 +
hw/arm/integratorcp.c | 1 +
hw/arm/kzm.c | 1 +
hw/arm/mcimx6ul-evk.c | 1 +
hw/arm/mcimx7d-sabre.c | 1 +
hw/arm/microbit.c | 1 +
hw/arm/mps2-tz.c | 4 ++++
hw/arm/mps2.c | 4 ++++
hw/arm/mps3r.c | 1 +
hw/arm/msf2-som.c | 1 +
hw/arm/musca.c | 2 ++
hw/arm/musicpal.c | 1 +
hw/arm/netduino2.c | 1 +
hw/arm/netduinoplus2.c | 1 +
hw/arm/npcm7xx_boards.c | 5 +++++
hw/arm/olimex-stm32-h405.c | 1 +
hw/arm/omap_sx1.c | 2 ++
hw/arm/orangepi.c | 1 +
hw/arm/raspi.c | 3 +++
hw/arm/realview.c | 4 ++++
hw/arm/sabrelite.c | 1 +
hw/arm/stellaris.c | 2 ++
hw/arm/stm32vldiscovery.c | 1 +
hw/arm/versatilepb.c | 2 ++
hw/arm/vexpress.c | 2 ++
hw/arm/virt.c | 1 +
hw/arm/xilinx_zynq.c | 1 +
36 files changed, 77 insertions(+)
diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
index ca7004c335a..d54ee2d4b53 100644
--- a/hw/arm/aspeed.c
+++ b/hw/arm/aspeed.c
@@ -1761,6 +1761,7 @@ static const TypeInfo aspeed_machine_types[] = {
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_palmetto_class_init,
.interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_ARM_MACHINE },
{ TYPE_TARGET_AARCH64_MACHINE },
{ },
},
@@ -1769,6 +1770,7 @@ static const TypeInfo aspeed_machine_types[] = {
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_supermicrox11_bmc_class_init,
.interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_ARM_MACHINE },
{ TYPE_TARGET_AARCH64_MACHINE },
{ },
},
@@ -1777,6 +1779,7 @@ static const TypeInfo aspeed_machine_types[] = {
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_supermicro_x11spi_bmc_class_init,
.interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_ARM_MACHINE },
{ TYPE_TARGET_AARCH64_MACHINE },
{ },
},
@@ -1785,6 +1788,7 @@ static const TypeInfo aspeed_machine_types[] = {
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_ast2500_evb_class_init,
.interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_ARM_MACHINE },
{ TYPE_TARGET_AARCH64_MACHINE },
{ },
},
@@ -1793,6 +1797,7 @@ static const TypeInfo aspeed_machine_types[] = {
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_romulus_class_init,
.interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_ARM_MACHINE },
{ TYPE_TARGET_AARCH64_MACHINE },
{ },
},
@@ -1801,6 +1806,7 @@ static const TypeInfo aspeed_machine_types[] = {
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_sonorapass_class_init,
.interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_ARM_MACHINE },
{ TYPE_TARGET_AARCH64_MACHINE },
{ },
},
@@ -1809,6 +1815,7 @@ static const TypeInfo aspeed_machine_types[] = {
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_witherspoon_class_init,
.interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_ARM_MACHINE },
{ TYPE_TARGET_AARCH64_MACHINE },
{ },
},
@@ -1817,6 +1824,7 @@ static const TypeInfo aspeed_machine_types[] = {
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_ast2600_evb_class_init,
.interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_ARM_MACHINE },
{ TYPE_TARGET_AARCH64_MACHINE },
{ },
},
@@ -1825,6 +1833,7 @@ static const TypeInfo aspeed_machine_types[] = {
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_yosemitev2_class_init,
.interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_ARM_MACHINE },
{ TYPE_TARGET_AARCH64_MACHINE },
{ },
},
@@ -1833,6 +1842,7 @@ static const TypeInfo aspeed_machine_types[] = {
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_tiogapass_class_init,
.interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_ARM_MACHINE },
{ TYPE_TARGET_AARCH64_MACHINE },
{ },
},
@@ -1841,6 +1851,7 @@ static const TypeInfo aspeed_machine_types[] = {
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_g220a_class_init,
.interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_ARM_MACHINE },
{ TYPE_TARGET_AARCH64_MACHINE },
{ },
},
@@ -1849,6 +1860,7 @@ static const TypeInfo aspeed_machine_types[] = {
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_qcom_dc_scm_v1_class_init,
.interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_ARM_MACHINE },
{ TYPE_TARGET_AARCH64_MACHINE },
{ },
},
@@ -1857,6 +1869,7 @@ static const TypeInfo aspeed_machine_types[] = {
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_qcom_firework_class_init,
.interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_ARM_MACHINE },
{ TYPE_TARGET_AARCH64_MACHINE },
{ },
},
@@ -1865,6 +1878,7 @@ static const TypeInfo aspeed_machine_types[] = {
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_fp5280g2_class_init,
.interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_ARM_MACHINE },
{ TYPE_TARGET_AARCH64_MACHINE },
{ },
},
@@ -1873,6 +1887,7 @@ static const TypeInfo aspeed_machine_types[] = {
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_quanta_q71l_class_init,
.interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_ARM_MACHINE },
{ TYPE_TARGET_AARCH64_MACHINE },
{ },
},
@@ -1881,6 +1896,7 @@ static const TypeInfo aspeed_machine_types[] = {
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_rainier_class_init,
.interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_ARM_MACHINE },
{ TYPE_TARGET_AARCH64_MACHINE },
{ },
},
@@ -1889,6 +1905,7 @@ static const TypeInfo aspeed_machine_types[] = {
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_fuji_class_init,
.interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_ARM_MACHINE },
{ TYPE_TARGET_AARCH64_MACHINE },
{ },
},
@@ -1897,6 +1914,7 @@ static const TypeInfo aspeed_machine_types[] = {
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_bletchley_class_init,
.interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_ARM_MACHINE },
{ TYPE_TARGET_AARCH64_MACHINE },
{ },
},
@@ -1905,6 +1923,7 @@ static const TypeInfo aspeed_machine_types[] = {
.parent = MACHINE_TYPE_NAME("ast2600-evb"),
.class_init = aspeed_machine_fby35_class_init,
.interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_ARM_MACHINE },
{ TYPE_TARGET_AARCH64_MACHINE },
{ },
},
@@ -1913,6 +1932,7 @@ static const TypeInfo aspeed_machine_types[] = {
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_minibmc_machine_ast1030_evb_class_init,
.interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_ARM_MACHINE },
{ TYPE_TARGET_AARCH64_MACHINE },
{ },
},
diff --git a/hw/arm/b-l475e-iot01a.c b/hw/arm/b-l475e-iot01a.c
index cc4b9d6c3b5..ec838f59c13 100644
--- a/hw/arm/b-l475e-iot01a.c
+++ b/hw/arm/b-l475e-iot01a.c
@@ -132,6 +132,7 @@ static const TypeInfo bl475e_machine_type[] = {
.instance_size = sizeof(Bl475eMachineState),
.class_init = bl475e_machine_init,
.interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_ARM_MACHINE },
{ TYPE_TARGET_AARCH64_MACHINE },
{ },
},
diff --git a/hw/arm/bananapi_m2u.c b/hw/arm/bananapi_m2u.c
index d9871a796bb..2d844af8fd3 100644
--- a/hw/arm/bananapi_m2u.c
+++ b/hw/arm/bananapi_m2u.c
@@ -151,6 +151,7 @@ static const TypeInfo bananapi_machine_types[] = {
.parent = TYPE_MACHINE,
.class_init = bpim2u_machine_class_init,
.interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_ARM_MACHINE },
{ TYPE_TARGET_AARCH64_MACHINE },
{ },
},
diff --git a/hw/arm/collie.c b/hw/arm/collie.c
index 16e862e15b6..bb7cd26c28c 100644
--- a/hw/arm/collie.c
+++ b/hw/arm/collie.c
@@ -87,6 +87,7 @@ static const TypeInfo collie_machine_typeinfo = {
.class_init = collie_machine_class_init,
.instance_size = sizeof(CollieMachineState),
.interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_ARM_MACHINE },
{ TYPE_TARGET_AARCH64_MACHINE },
{ },
},
diff --git a/hw/arm/cubieboard.c b/hw/arm/cubieboard.c
index dd40d65554d..55d869e815e 100644
--- a/hw/arm/cubieboard.c
+++ b/hw/arm/cubieboard.c
@@ -132,6 +132,7 @@ static const TypeInfo cubieboard_machine_types[] = {
.parent = TYPE_MACHINE,
.class_init = cubieboard_machine_class_init,
.interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_ARM_MACHINE },
{ TYPE_TARGET_AARCH64_MACHINE },
{ },
},
diff --git a/hw/arm/digic_boards.c b/hw/arm/digic_boards.c
index f55309082ac..a8a59644f4c 100644
--- a/hw/arm/digic_boards.c
+++ b/hw/arm/digic_boards.c
@@ -153,6 +153,7 @@ static const TypeInfo digic_machine_types[] = {
.parent = TYPE_MACHINE,
.class_init = digic_machine_class_init,
.interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_ARM_MACHINE },
{ TYPE_TARGET_AARCH64_MACHINE },
{ },
},
diff --git a/hw/arm/exynos4_boards.c b/hw/arm/exynos4_boards.c
index b55e364d962..cff2a52e3ff 100644
--- a/hw/arm/exynos4_boards.c
+++ b/hw/arm/exynos4_boards.c
@@ -173,6 +173,7 @@ static const TypeInfo nuri_type = {
.parent = TYPE_MACHINE,
.class_init = nuri_class_init,
.interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_ARM_MACHINE },
{ TYPE_TARGET_AARCH64_MACHINE },
{ },
},
@@ -197,6 +198,7 @@ static const TypeInfo smdkc210_type = {
.parent = TYPE_MACHINE,
.class_init = smdkc210_class_init,
.interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_ARM_MACHINE },
{ TYPE_TARGET_AARCH64_MACHINE },
{ },
},
diff --git a/hw/arm/fby35.c b/hw/arm/fby35.c
index de6b32ce532..d9584b57e83 100644
--- a/hw/arm/fby35.c
+++ b/hw/arm/fby35.c
@@ -188,6 +188,7 @@ static const TypeInfo fby35_types[] = {
.instance_size = sizeof(Fby35State),
.instance_init = fby35_instance_init,
.interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_ARM_MACHINE },
{ TYPE_TARGET_AARCH64_MACHINE },
{ },
},
diff --git a/hw/arm/highbank.c b/hw/arm/highbank.c
index e517cf3c7f6..6009f22f201 100644
--- a/hw/arm/highbank.c
+++ b/hw/arm/highbank.c
@@ -364,6 +364,7 @@ static const TypeInfo highbank_type = {
.parent = TYPE_MACHINE,
.class_init = highbank_class_init,
.interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_ARM_MACHINE },
{ TYPE_TARGET_AARCH64_MACHINE },
{ },
},
@@ -392,6 +393,7 @@ static const TypeInfo midway_type = {
.parent = TYPE_MACHINE,
.class_init = midway_class_init,
.interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_ARM_MACHINE },
{ TYPE_TARGET_AARCH64_MACHINE },
{ },
},
diff --git a/hw/arm/imx25_pdk.c b/hw/arm/imx25_pdk.c
index da8479ca608..669e126bfc9 100644
--- a/hw/arm/imx25_pdk.c
+++ b/hw/arm/imx25_pdk.c
@@ -158,6 +158,7 @@ static const TypeInfo imx25_machine_types[] = {
.parent = TYPE_MACHINE,
.class_init = imx25_pdk_machine_class_init,
.interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_ARM_MACHINE },
{ TYPE_TARGET_AARCH64_MACHINE },
{ },
},
diff --git a/hw/arm/integratorcp.c b/hw/arm/integratorcp.c
index 5599cf60707..d982df8fe45 100644
--- a/hw/arm/integratorcp.c
+++ b/hw/arm/integratorcp.c
@@ -761,6 +761,7 @@ static const TypeInfo integratorcp_machine_types[] = {
.parent = TYPE_MACHINE,
.class_init = integratorcp_machine_class_init,
.interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_ARM_MACHINE },
{ TYPE_TARGET_AARCH64_MACHINE },
{ },
},
diff --git a/hw/arm/kzm.c b/hw/arm/kzm.c
index 208546205be..b2d7a312581 100644
--- a/hw/arm/kzm.c
+++ b/hw/arm/kzm.c
@@ -147,6 +147,7 @@ static const TypeInfo kzm_machine_types[] = {
.parent = TYPE_MACHINE,
.class_init = kzm_machine_class_init,
.interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_ARM_MACHINE },
{ TYPE_TARGET_AARCH64_MACHINE },
{ },
},
diff --git a/hw/arm/mcimx6ul-evk.c b/hw/arm/mcimx6ul-evk.c
index 65e6134862e..2cf124ca2b5 100644
--- a/hw/arm/mcimx6ul-evk.c
+++ b/hw/arm/mcimx6ul-evk.c
@@ -85,6 +85,7 @@ static const TypeInfo imx6_machine_types[] = {
.parent = TYPE_MACHINE,
.class_init = mcimx6ul_evk_machine_class_init,
.interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_ARM_MACHINE },
{ TYPE_TARGET_AARCH64_MACHINE },
{ },
},
diff --git a/hw/arm/mcimx7d-sabre.c b/hw/arm/mcimx7d-sabre.c
index 1f88dc03915..1a8d3e453cd 100644
--- a/hw/arm/mcimx7d-sabre.c
+++ b/hw/arm/mcimx7d-sabre.c
@@ -85,6 +85,7 @@ static const TypeInfo imx7_machine_types[] = {
.parent = TYPE_MACHINE,
.class_init = mcimx7d_sabre_machine_class_init,
.interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_ARM_MACHINE },
{ TYPE_TARGET_AARCH64_MACHINE },
{ },
},
diff --git a/hw/arm/microbit.c b/hw/arm/microbit.c
index e537735e247..ad4fe9febd0 100644
--- a/hw/arm/microbit.c
+++ b/hw/arm/microbit.c
@@ -75,6 +75,7 @@ static const TypeInfo microbit_info = {
.instance_size = sizeof(MicrobitMachineState),
.class_init = microbit_machine_class_init,
.interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_ARM_MACHINE },
{ TYPE_TARGET_AARCH64_MACHINE },
{ },
},
diff --git a/hw/arm/mps2-tz.c b/hw/arm/mps2-tz.c
index 6cd36ee4037..0676102612d 100644
--- a/hw/arm/mps2-tz.c
+++ b/hw/arm/mps2-tz.c
@@ -1464,6 +1464,7 @@ static const TypeInfo mps2tz_an505_info = {
.parent = TYPE_MPS2TZ_MACHINE,
.class_init = mps2tz_an505_class_init,
.interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_ARM_MACHINE },
{ TYPE_TARGET_AARCH64_MACHINE },
{ },
},
@@ -1474,6 +1475,7 @@ static const TypeInfo mps2tz_an521_info = {
.parent = TYPE_MPS2TZ_MACHINE,
.class_init = mps2tz_an521_class_init,
.interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_ARM_MACHINE },
{ TYPE_TARGET_AARCH64_MACHINE },
{ },
},
@@ -1484,6 +1486,7 @@ static const TypeInfo mps3tz_an524_info = {
.parent = TYPE_MPS2TZ_MACHINE,
.class_init = mps3tz_an524_class_init,
.interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_ARM_MACHINE },
{ TYPE_TARGET_AARCH64_MACHINE },
{ },
},
@@ -1494,6 +1497,7 @@ static const TypeInfo mps3tz_an547_info = {
.parent = TYPE_MPS2TZ_MACHINE,
.class_init = mps3tz_an547_class_init,
.interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_ARM_MACHINE },
{ TYPE_TARGET_AARCH64_MACHINE },
{ },
},
diff --git a/hw/arm/mps2.c b/hw/arm/mps2.c
index 709d7d0a08e..e61566a0316 100644
--- a/hw/arm/mps2.c
+++ b/hw/arm/mps2.c
@@ -564,6 +564,7 @@ static const TypeInfo mps2_an385_info = {
.parent = TYPE_MPS2_MACHINE,
.class_init = mps2_an385_class_init,
.interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_ARM_MACHINE },
{ TYPE_TARGET_AARCH64_MACHINE },
{ },
},
@@ -574,6 +575,7 @@ static const TypeInfo mps2_an386_info = {
.parent = TYPE_MPS2_MACHINE,
.class_init = mps2_an386_class_init,
.interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_ARM_MACHINE },
{ TYPE_TARGET_AARCH64_MACHINE },
{ },
},
@@ -584,6 +586,7 @@ static const TypeInfo mps2_an500_info = {
.parent = TYPE_MPS2_MACHINE,
.class_init = mps2_an500_class_init,
.interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_ARM_MACHINE },
{ TYPE_TARGET_AARCH64_MACHINE },
{ },
},
@@ -594,6 +597,7 @@ static const TypeInfo mps2_an511_info = {
.parent = TYPE_MPS2_MACHINE,
.class_init = mps2_an511_class_init,
.interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_ARM_MACHINE },
{ TYPE_TARGET_AARCH64_MACHINE },
{ },
},
diff --git a/hw/arm/mps3r.c b/hw/arm/mps3r.c
index d1a72c7775b..16e4deec7b3 100644
--- a/hw/arm/mps3r.c
+++ b/hw/arm/mps3r.c
@@ -635,6 +635,7 @@ static const TypeInfo mps3r_machine_types[] = {
.parent = TYPE_MPS3R_MACHINE,
.class_init = mps3r_an536_class_init,
.interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_ARM_MACHINE },
{ TYPE_TARGET_AARCH64_MACHINE },
{ },
},
diff --git a/hw/arm/msf2-som.c b/hw/arm/msf2-som.c
index 11988b6aa6d..c0feff92fbd 100644
--- a/hw/arm/msf2-som.c
+++ b/hw/arm/msf2-som.c
@@ -115,6 +115,7 @@ static const TypeInfo msf2_machine_types[] = {
.parent = TYPE_MACHINE,
.class_init = emcraft_sf2_machine_class_init,
.interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_ARM_MACHINE },
{ TYPE_TARGET_AARCH64_MACHINE },
{ },
},
diff --git a/hw/arm/musca.c b/hw/arm/musca.c
index 3a11b3d1cd6..e5e9950d008 100644
--- a/hw/arm/musca.c
+++ b/hw/arm/musca.c
@@ -658,6 +658,7 @@ static const TypeInfo musca_a_info = {
.parent = TYPE_MUSCA_MACHINE,
.class_init = musca_a_class_init,
.interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_ARM_MACHINE },
{ TYPE_TARGET_AARCH64_MACHINE },
{ },
},
@@ -668,6 +669,7 @@ static const TypeInfo musca_b1_info = {
.parent = TYPE_MUSCA_MACHINE,
.class_init = musca_b1_class_init,
.interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_ARM_MACHINE },
{ TYPE_TARGET_AARCH64_MACHINE },
{ },
},
diff --git a/hw/arm/musicpal.c b/hw/arm/musicpal.c
index 9cf8eec8b13..cb352512807 100644
--- a/hw/arm/musicpal.c
+++ b/hw/arm/musicpal.c
@@ -1382,6 +1382,7 @@ static const TypeInfo musicpal_types[] = {
.parent = TYPE_MACHINE,
.class_init = musicpal_machine_class_init,
.interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_ARM_MACHINE },
{ TYPE_TARGET_AARCH64_MACHINE },
{ },
},
diff --git a/hw/arm/netduino2.c b/hw/arm/netduino2.c
index e6e140ed6bf..9443b5615e5 100644
--- a/hw/arm/netduino2.c
+++ b/hw/arm/netduino2.c
@@ -72,6 +72,7 @@ static const TypeInfo netduino_machine_types[] = {
.parent = TYPE_MACHINE,
.class_init = netduino2_machine_class_init,
.interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_ARM_MACHINE },
{ TYPE_TARGET_AARCH64_MACHINE },
{ },
},
diff --git a/hw/arm/netduinoplus2.c b/hw/arm/netduinoplus2.c
index b54e990b5bd..2003b43ad10 100644
--- a/hw/arm/netduinoplus2.c
+++ b/hw/arm/netduinoplus2.c
@@ -72,6 +72,7 @@ static const TypeInfo netduino_machine_types[] = {
.parent = TYPE_MACHINE,
.class_init = netduinoplus2_machine_class_init,
.interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_ARM_MACHINE },
{ TYPE_TARGET_AARCH64_MACHINE },
{ },
},
diff --git a/hw/arm/npcm7xx_boards.c b/hw/arm/npcm7xx_boards.c
index 4d2c52f3422..6189509a3f9 100644
--- a/hw/arm/npcm7xx_boards.c
+++ b/hw/arm/npcm7xx_boards.c
@@ -550,6 +550,7 @@ static const TypeInfo npcm7xx_machine_types[] = {
.parent = TYPE_NPCM7XX_MACHINE,
.class_init = npcm750_evb_machine_class_init,
.interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_ARM_MACHINE },
{ TYPE_TARGET_AARCH64_MACHINE },
{ },
},
@@ -558,6 +559,7 @@ static const TypeInfo npcm7xx_machine_types[] = {
.parent = TYPE_NPCM7XX_MACHINE,
.class_init = gsj_machine_class_init,
.interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_ARM_MACHINE },
{ TYPE_TARGET_AARCH64_MACHINE },
{ },
},
@@ -566,6 +568,7 @@ static const TypeInfo npcm7xx_machine_types[] = {
.parent = TYPE_NPCM7XX_MACHINE,
.class_init = gbs_bmc_machine_class_init,
.interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_ARM_MACHINE },
{ TYPE_TARGET_AARCH64_MACHINE },
{ },
},
@@ -574,6 +577,7 @@ static const TypeInfo npcm7xx_machine_types[] = {
.parent = TYPE_NPCM7XX_MACHINE,
.class_init = kudo_bmc_machine_class_init,
.interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_ARM_MACHINE },
{ TYPE_TARGET_AARCH64_MACHINE },
{ },
},
@@ -582,6 +586,7 @@ static const TypeInfo npcm7xx_machine_types[] = {
.parent = TYPE_NPCM7XX_MACHINE,
.class_init = mori_bmc_machine_class_init,
.interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_ARM_MACHINE },
{ TYPE_TARGET_AARCH64_MACHINE },
{ },
},
diff --git a/hw/arm/olimex-stm32-h405.c b/hw/arm/olimex-stm32-h405.c
index 4344bef4db1..9ff1239a127 100644
--- a/hw/arm/olimex-stm32-h405.c
+++ b/hw/arm/olimex-stm32-h405.c
@@ -78,6 +78,7 @@ static const TypeInfo olimex_stm32_machine_types[] = {
.parent = TYPE_MACHINE,
.class_init = olimex_stm32_machine_class_init,
.interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_ARM_MACHINE },
{ TYPE_TARGET_AARCH64_MACHINE },
{ },
},
diff --git a/hw/arm/omap_sx1.c b/hw/arm/omap_sx1.c
index 9f90f95b9ee..a4b65d1b623 100644
--- a/hw/arm/omap_sx1.c
+++ b/hw/arm/omap_sx1.c
@@ -220,6 +220,7 @@ static const TypeInfo sx1_machine_v2_type = {
.parent = TYPE_MACHINE,
.class_init = sx1_machine_v2_class_init,
.interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_ARM_MACHINE },
{ TYPE_TARGET_AARCH64_MACHINE },
{ },
},
@@ -243,6 +244,7 @@ static const TypeInfo sx1_machine_v1_type = {
.parent = TYPE_MACHINE,
.class_init = sx1_machine_v1_class_init,
.interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_ARM_MACHINE },
{ TYPE_TARGET_AARCH64_MACHINE },
{ },
},
diff --git a/hw/arm/orangepi.c b/hw/arm/orangepi.c
index f539b2fc3a4..bbd9082cff1 100644
--- a/hw/arm/orangepi.c
+++ b/hw/arm/orangepi.c
@@ -131,6 +131,7 @@ static const TypeInfo orangepi_machine_types[] = {
.parent = TYPE_MACHINE,
.class_init = orangepi_machine_class_init,
.interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_ARM_MACHINE },
{ TYPE_TARGET_AARCH64_MACHINE },
{ },
},
diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c
index b8b947bc29e..8a2da650087 100644
--- a/hw/arm/raspi.c
+++ b/hw/arm/raspi.c
@@ -395,6 +395,7 @@ static const TypeInfo raspi_machine_types[] = {
.parent = TYPE_RASPI_MACHINE,
.class_init = raspi0_machine_class_init,
.interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_ARM_MACHINE },
{ TYPE_TARGET_AARCH64_MACHINE },
{ },
},
@@ -403,6 +404,7 @@ static const TypeInfo raspi_machine_types[] = {
.parent = TYPE_RASPI_MACHINE,
.class_init = raspi1ap_machine_class_init,
.interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_ARM_MACHINE },
{ TYPE_TARGET_AARCH64_MACHINE },
{ },
},
@@ -411,6 +413,7 @@ static const TypeInfo raspi_machine_types[] = {
.parent = TYPE_RASPI_MACHINE,
.class_init = raspi2b_machine_class_init,
.interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_ARM_MACHINE },
{ TYPE_TARGET_AARCH64_MACHINE },
{ },
},
diff --git a/hw/arm/realview.c b/hw/arm/realview.c
index 2ccee583117..c925d1483f6 100644
--- a/hw/arm/realview.c
+++ b/hw/arm/realview.c
@@ -432,6 +432,7 @@ static const TypeInfo realview_eb_type = {
.parent = TYPE_MACHINE,
.class_init = realview_eb_class_init,
.interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_ARM_MACHINE },
{ TYPE_TARGET_AARCH64_MACHINE },
{ },
},
@@ -457,6 +458,7 @@ static const TypeInfo realview_eb_mpcore_type = {
.parent = TYPE_MACHINE,
.class_init = realview_eb_mpcore_class_init,
.interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_ARM_MACHINE },
{ TYPE_TARGET_AARCH64_MACHINE },
{ },
},
@@ -480,6 +482,7 @@ static const TypeInfo realview_pb_a8_type = {
.parent = TYPE_MACHINE,
.class_init = realview_pb_a8_class_init,
.interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_ARM_MACHINE },
{ TYPE_TARGET_AARCH64_MACHINE },
{ },
},
@@ -504,6 +507,7 @@ static const TypeInfo realview_pbx_a9_type = {
.parent = TYPE_MACHINE,
.class_init = realview_pbx_a9_class_init,
.interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_ARM_MACHINE },
{ TYPE_TARGET_AARCH64_MACHINE },
{ },
},
diff --git a/hw/arm/sabrelite.c b/hw/arm/sabrelite.c
index a4c1dd7edc1..1bd82c404af 100644
--- a/hw/arm/sabrelite.c
+++ b/hw/arm/sabrelite.c
@@ -121,6 +121,7 @@ static const TypeInfo sabrelite_machine_types[] = {
.parent = TYPE_MACHINE,
.class_init = sabrelite_machine_class_init,
.interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_ARM_MACHINE },
{ TYPE_TARGET_AARCH64_MACHINE },
{ },
},
diff --git a/hw/arm/stellaris.c b/hw/arm/stellaris.c
index 1e696e25c42..2cb93a6d3af 100644
--- a/hw/arm/stellaris.c
+++ b/hw/arm/stellaris.c
@@ -1428,6 +1428,7 @@ static const TypeInfo lm3s811evb_type = {
.parent = TYPE_MACHINE,
.class_init = lm3s811evb_class_init,
.interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_ARM_MACHINE },
{ TYPE_TARGET_AARCH64_MACHINE },
{ },
},
@@ -1453,6 +1454,7 @@ static const TypeInfo lm3s6965evb_type = {
.parent = TYPE_MACHINE,
.class_init = lm3s6965evb_class_init,
.interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_ARM_MACHINE },
{ TYPE_TARGET_AARCH64_MACHINE },
{ },
},
diff --git a/hw/arm/stm32vldiscovery.c b/hw/arm/stm32vldiscovery.c
index 7c267fd880b..f0881b3c8ea 100644
--- a/hw/arm/stm32vldiscovery.c
+++ b/hw/arm/stm32vldiscovery.c
@@ -75,6 +75,7 @@ static const TypeInfo stm32vldiscovery_machine_types[] = {
.parent = TYPE_MACHINE,
.class_init = stm32vldiscovery_machine_class_init,
.interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_ARM_MACHINE },
{ TYPE_TARGET_AARCH64_MACHINE },
{ },
},
diff --git a/hw/arm/versatilepb.c b/hw/arm/versatilepb.c
index 4c71a73b3b1..e353ef025d9 100644
--- a/hw/arm/versatilepb.c
+++ b/hw/arm/versatilepb.c
@@ -432,6 +432,7 @@ static const TypeInfo versatilepb_type = {
.parent = TYPE_MACHINE,
.class_init = versatilepb_class_init,
.interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_ARM_MACHINE },
{ TYPE_TARGET_AARCH64_MACHINE },
{ },
},
@@ -457,6 +458,7 @@ static const TypeInfo versatileab_type = {
.parent = TYPE_MACHINE,
.class_init = versatileab_class_init,
.interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_ARM_MACHINE },
{ TYPE_TARGET_AARCH64_MACHINE },
{ },
},
diff --git a/hw/arm/vexpress.c b/hw/arm/vexpress.c
index fad4a9b8cfa..aade41d0317 100644
--- a/hw/arm/vexpress.c
+++ b/hw/arm/vexpress.c
@@ -851,6 +851,7 @@ static const TypeInfo vexpress_a9_info = {
.class_init = vexpress_a9_class_init,
.instance_init = vexpress_a9_instance_init,
.interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_ARM_MACHINE },
{ TYPE_TARGET_AARCH64_MACHINE },
{ },
},
@@ -862,6 +863,7 @@ static const TypeInfo vexpress_a15_info = {
.class_init = vexpress_a15_class_init,
.instance_init = vexpress_a15_instance_init,
.interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_ARM_MACHINE },
{ TYPE_TARGET_AARCH64_MACHINE },
{ },
},
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 41918eb760b..b2534a3c43e 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -124,6 +124,7 @@ static void arm_virt_compat_set(MachineClass *mc)
.parent = TYPE_VIRT_MACHINE, \
.class_init = MACHINE_VER_SYM(class_init, virt, __VA_ARGS__), \
.interfaces = (InterfaceInfo[]) { \
+ { TYPE_TARGET_ARM_MACHINE }, \
{ TYPE_TARGET_AARCH64_MACHINE }, \
{ }, \
}, \
diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c
index efcbddffda0..e8f43e193c0 100644
--- a/hw/arm/xilinx_zynq.c
+++ b/hw/arm/xilinx_zynq.c
@@ -481,6 +481,7 @@ static const TypeInfo zynq_machine_type = {
.class_init = zynq_machine_class_init,
.instance_size = sizeof(ZynqMachineState),
.interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_ARM_MACHINE },
{ TYPE_TARGET_AARCH64_MACHINE },
{ },
},
--
2.47.1
^ permalink raw reply related [flat|nested] 36+ messages in thread
* [RFC PATCH v2 07/11] hw/core: Allow ARM/Aarch64 binaries to use the 'none' machine
2025-04-18 0:50 [RFC PATCH v2 00/11] single-binary: Make hw/arm/ common Philippe Mathieu-Daudé
` (5 preceding siblings ...)
2025-04-18 0:50 ` [RFC PATCH v2 06/11] hw/arm: Filter machine types for qemu-system-arm binary Philippe Mathieu-Daudé
@ 2025-04-18 0:50 ` Philippe Mathieu-Daudé
2025-04-18 3:32 ` Pierrick Bouvier
2025-04-18 0:50 ` [RFC PATCH v2 08/11] config/target: Implement per-binary TargetInfo structure (ARM) Philippe Mathieu-Daudé
` (3 subsequent siblings)
10 siblings, 1 reply; 36+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-04-18 0:50 UTC (permalink / raw)
To: Pierrick Bouvier, qemu-devel; +Cc: Anton Johansson, Richard Henderson
When we'll start to use target_machine_interface_typename()
to filter machines for the ARM/Aarch64 binaries, the 'none'
machine will be filtered out. Register the proper interfaces
to keep it available.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
hw/core/null-machine.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/hw/core/null-machine.c b/hw/core/null-machine.c
index 1ccaf652eb4..614b52dae0d 100644
--- a/hw/core/null-machine.c
+++ b/hw/core/null-machine.c
@@ -62,6 +62,11 @@ static const TypeInfo null_machine_types[] = {
.name = MACHINE_TYPE_NAME("none"),
.parent = TYPE_MACHINE,
.class_init = null_machine_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_TARGET_ARM_MACHINE },
+ { TYPE_TARGET_AARCH64_MACHINE },
+ { },
+ },
},
};
--
2.47.1
^ permalink raw reply related [flat|nested] 36+ messages in thread
* [RFC PATCH v2 08/11] config/target: Implement per-binary TargetInfo structure (ARM)
2025-04-18 0:50 [RFC PATCH v2 00/11] single-binary: Make hw/arm/ common Philippe Mathieu-Daudé
` (6 preceding siblings ...)
2025-04-18 0:50 ` [RFC PATCH v2 07/11] hw/core: Allow ARM/Aarch64 binaries to use the 'none' machine Philippe Mathieu-Daudé
@ 2025-04-18 0:50 ` Philippe Mathieu-Daudé
2025-04-18 3:39 ` Pierrick Bouvier
2025-04-18 4:02 ` Pierrick Bouvier
2025-04-18 0:50 ` [RFC PATCH v2 09/11] config/target: Implement per-binary TargetInfo structure (Aarch64) Philippe Mathieu-Daudé
` (2 subsequent siblings)
10 siblings, 2 replies; 36+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-04-18 0:50 UTC (permalink / raw)
To: Pierrick Bouvier, qemu-devel; +Cc: Anton Johansson, Richard Henderson
If a file defining the binary TargetInfo structure is available,
link with it. Otherwise keep using the stub. Implement such
structure for arm-softmmu.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
meson.build | 7 ++++++-
configs/targets/arm-softmmu.c | 22 ++++++++++++++++++++++
2 files changed, 28 insertions(+), 1 deletion(-)
create mode 100644 configs/targets/arm-softmmu.c
diff --git a/meson.build b/meson.build
index 168b07b5887..da24cc2ba41 100644
--- a/meson.build
+++ b/meson.build
@@ -3809,7 +3809,6 @@ specific_ss.add(files('page-target.c', 'page-vary-target.c'))
common_ss.add(files('target_info.c'))
system_ss.add(files('target_info-qom.c'))
-specific_ss.add(files('target_info-stub.c'))
subdir('backends')
subdir('disas')
@@ -4272,6 +4271,12 @@ foreach target : target_dirs
arch_srcs += gdbstub_xml
endif
+ target_info_c = meson.project_source_root() / 'configs' / 'targets' / target + '.c'
+ if not fs.exists(target_info_c)
+ target_info_c = meson.project_source_root() / 'target_info-stub.c'
+ endif
+ arch_srcs += target_info_c
+
t = target_arch[target_base_arch].apply(config_target, strict: false)
arch_srcs += t.sources()
arch_deps += t.dependencies()
diff --git a/configs/targets/arm-softmmu.c b/configs/targets/arm-softmmu.c
new file mode 100644
index 00000000000..6263d604f19
--- /dev/null
+++ b/configs/targets/arm-softmmu.c
@@ -0,0 +1,22 @@
+/*
+ * QEMU binary/target API (qemu-system-arm)
+ *
+ * Copyright (c) Linaro
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#include "qemu/osdep.h"
+#include "qemu/target_info-impl.h"
+#include "qemu/target_info-qom.h"
+#include "cpu-qom.h"
+
+static const TargetInfo target_info_arm_system = {
+ .name = "arm",
+ .machine_typename = TYPE_TARGET_ARM_MACHINE,
+};
+
+const TargetInfo *target_info(void)
+{
+ return &target_info_arm_system;
+}
--
2.47.1
^ permalink raw reply related [flat|nested] 36+ messages in thread
* [RFC PATCH v2 09/11] config/target: Implement per-binary TargetInfo structure (Aarch64)
2025-04-18 0:50 [RFC PATCH v2 00/11] single-binary: Make hw/arm/ common Philippe Mathieu-Daudé
` (7 preceding siblings ...)
2025-04-18 0:50 ` [RFC PATCH v2 08/11] config/target: Implement per-binary TargetInfo structure (ARM) Philippe Mathieu-Daudé
@ 2025-04-18 0:50 ` Philippe Mathieu-Daudé
2025-04-18 3:34 ` Pierrick Bouvier
2025-04-18 0:50 ` [RFC PATCH v2 10/11] hw/arm/aspeed: Build objects once Philippe Mathieu-Daudé
2025-04-18 0:50 ` [RFC PATCH v2 11/11] hw/arm/raspi: " Philippe Mathieu-Daudé
10 siblings, 1 reply; 36+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-04-18 0:50 UTC (permalink / raw)
To: Pierrick Bouvier, qemu-devel; +Cc: Anton Johansson, Richard Henderson
Implement the TargetInfo structure for qemu-system-aarch64 binary.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
configs/targets/aarch64-softmmu.c | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
create mode 100644 configs/targets/aarch64-softmmu.c
diff --git a/configs/targets/aarch64-softmmu.c b/configs/targets/aarch64-softmmu.c
new file mode 100644
index 00000000000..e48ac264d7d
--- /dev/null
+++ b/configs/targets/aarch64-softmmu.c
@@ -0,0 +1,22 @@
+/*
+ * QEMU binary/target API (qemu-system-aarch64)
+ *
+ * Copyright (c) Linaro
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#include "qemu/osdep.h"
+#include "qemu/target_info-impl.h"
+#include "qemu/target_info-qom.h"
+#include "cpu-qom.h"
+
+static const TargetInfo target_info_aarch64_system = {
+ .name = "aarch64",
+ .machine_typename = TYPE_TARGET_AARCH64_MACHINE,
+};
+
+const TargetInfo *target_info(void)
+{
+ return &target_info_aarch64_system;
+}
--
2.47.1
^ permalink raw reply related [flat|nested] 36+ messages in thread
* [RFC PATCH v2 10/11] hw/arm/aspeed: Build objects once
2025-04-18 0:50 [RFC PATCH v2 00/11] single-binary: Make hw/arm/ common Philippe Mathieu-Daudé
` (8 preceding siblings ...)
2025-04-18 0:50 ` [RFC PATCH v2 09/11] config/target: Implement per-binary TargetInfo structure (Aarch64) Philippe Mathieu-Daudé
@ 2025-04-18 0:50 ` Philippe Mathieu-Daudé
2025-04-18 4:02 ` Pierrick Bouvier
2025-04-18 0:50 ` [RFC PATCH v2 11/11] hw/arm/raspi: " Philippe Mathieu-Daudé
10 siblings, 1 reply; 36+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-04-18 0:50 UTC (permalink / raw)
To: Pierrick Bouvier, qemu-devel; +Cc: Anton Johansson, Richard Henderson
Now than Aspeed machines can be filtered when running a
qemu-system-arm or qemu-system-aarch64 binary, we can
remove the TARGET_AARCH64 #ifdef'ry and compile the
aspeed.c file once, moving it from arm_ss[] source set
to arm_common_ss[].
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
hw/arm/aspeed.c | 6 ------
hw/arm/meson.build | 4 ++--
2 files changed, 2 insertions(+), 8 deletions(-)
diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
index d54ee2d4b53..363be2daf60 100644
--- a/hw/arm/aspeed.c
+++ b/hw/arm/aspeed.c
@@ -179,13 +179,11 @@ struct AspeedMachineState {
#define AST2600_EVB_HW_STRAP1 0x000000C0
#define AST2600_EVB_HW_STRAP2 0x00000003
-#ifdef TARGET_AARCH64
/* AST2700 evb hardware value */
/* SCU HW Strap1 */
#define AST2700_EVB_HW_STRAP1 0x00000800
/* SCUIO HW Strap1 */
#define AST2700_EVB_HW_STRAP2 0x00000700
-#endif
/* Rainier hardware value: (QEMU prototype) */
#define RAINIER_BMC_HW_STRAP1 (0x00422016 | SCU_AST2600_HW_STRAP_BOOT_SRC_EMMC)
@@ -1663,7 +1661,6 @@ static void aspeed_minibmc_machine_ast1030_evb_class_init(ObjectClass *oc,
aspeed_machine_class_init_cpus_defaults(mc);
}
-#ifdef TARGET_AARCH64
static void ast2700_evb_i2c_init(AspeedMachineState *bmc)
{
AspeedSoCState *soc = bmc->soc;
@@ -1713,7 +1710,6 @@ static void aspeed_machine_ast2700a1_evb_class_init(ObjectClass *oc, void *data)
mc->default_ram_size = 1 * GiB;
aspeed_machine_class_init_cpus_defaults(mc);
}
-#endif
static void aspeed_machine_qcom_dc_scm_v1_class_init(ObjectClass *oc,
void *data)
@@ -1936,7 +1932,6 @@ static const TypeInfo aspeed_machine_types[] = {
{ TYPE_TARGET_AARCH64_MACHINE },
{ },
},
-#ifdef TARGET_AARCH64
}, {
.name = MACHINE_TYPE_NAME("ast2700a0-evb"),
.parent = TYPE_ASPEED_MACHINE,
@@ -1953,7 +1948,6 @@ static const TypeInfo aspeed_machine_types[] = {
{ TYPE_TARGET_AARCH64_MACHINE },
{ },
},
-#endif
}, {
.name = TYPE_ASPEED_MACHINE,
.parent = TYPE_MACHINE,
diff --git a/hw/arm/meson.build b/hw/arm/meson.build
index 09b1cfe5b57..f76e7fb229f 100644
--- a/hw/arm/meson.build
+++ b/hw/arm/meson.build
@@ -39,15 +39,15 @@ arm_common_ss.add(when: 'CONFIG_XLNX_VERSAL', if_true: files('xlnx-versal.c', 'x
arm_common_ss.add(when: 'CONFIG_FSL_IMX25', if_true: files('fsl-imx25.c', 'imx25_pdk.c'))
arm_common_ss.add(when: 'CONFIG_FSL_IMX31', if_true: files('fsl-imx31.c', 'kzm.c'))
arm_common_ss.add(when: 'CONFIG_FSL_IMX6', if_true: files('fsl-imx6.c'))
-arm_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files(
+arm_common_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files(
'aspeed.c',
'aspeed_soc_common.c',
'aspeed_ast2400.c',
'aspeed_ast2600.c',
'aspeed_ast10x0.c',
+ 'aspeed_ast27x0.c',
'aspeed_eeprom.c',
'fby35.c'))
-arm_common_ss.add(when: ['CONFIG_ASPEED_SOC', 'TARGET_AARCH64'], if_true: files('aspeed_ast27x0.c'))
arm_common_ss.add(when: 'CONFIG_MPS2', if_true: files('mps2.c'))
arm_common_ss.add(when: 'CONFIG_MPS2', if_true: files('mps2-tz.c'))
arm_common_ss.add(when: 'CONFIG_MSF2', if_true: files('msf2-soc.c'))
--
2.47.1
^ permalink raw reply related [flat|nested] 36+ messages in thread
* [RFC PATCH v2 11/11] hw/arm/raspi: Build objects once
2025-04-18 0:50 [RFC PATCH v2 00/11] single-binary: Make hw/arm/ common Philippe Mathieu-Daudé
` (9 preceding siblings ...)
2025-04-18 0:50 ` [RFC PATCH v2 10/11] hw/arm/aspeed: Build objects once Philippe Mathieu-Daudé
@ 2025-04-18 0:50 ` Philippe Mathieu-Daudé
2025-04-18 4:03 ` Pierrick Bouvier
10 siblings, 1 reply; 36+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-04-18 0:50 UTC (permalink / raw)
To: Pierrick Bouvier, qemu-devel; +Cc: Anton Johansson, Richard Henderson
Now than Raspi machines can be filtered when running a
qemu-system-arm or qemu-system-aarch64 binary, we can
remove the TARGET_AARCH64 #ifdef'ry and compile the
aspeed.c file once, moving it from arm_ss[] source set
to arm_common_ss[]. Note, we expose the TYPE_BCM2837
type to qemu-system-arm, but it is not user-creatable,
so not an issue.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
hw/arm/bcm2836.c | 4 ----
hw/arm/raspi.c | 4 ----
hw/arm/meson.build | 8 ++++++--
3 files changed, 6 insertions(+), 10 deletions(-)
diff --git a/hw/arm/bcm2836.c b/hw/arm/bcm2836.c
index 95e16806fa1..7dd81e8e0f9 100644
--- a/hw/arm/bcm2836.c
+++ b/hw/arm/bcm2836.c
@@ -195,7 +195,6 @@ static void bcm2836_class_init(ObjectClass *oc, void *data)
dc->realize = bcm2836_realize;
};
-#ifdef TARGET_AARCH64
static void bcm2837_class_init(ObjectClass *oc, void *data)
{
DeviceClass *dc = DEVICE_CLASS(oc);
@@ -208,7 +207,6 @@ static void bcm2837_class_init(ObjectClass *oc, void *data)
bc->clusterid = 0x0;
dc->realize = bcm2836_realize;
};
-#endif
static const TypeInfo bcm283x_types[] = {
{
@@ -219,12 +217,10 @@ static const TypeInfo bcm283x_types[] = {
.name = TYPE_BCM2836,
.parent = TYPE_BCM283X,
.class_init = bcm2836_class_init,
-#ifdef TARGET_AARCH64
}, {
.name = TYPE_BCM2837,
.parent = TYPE_BCM283X,
.class_init = bcm2837_class_init,
-#endif
}, {
.name = TYPE_BCM283X,
.parent = TYPE_BCM283X_BASE,
diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c
index 8a2da650087..980e4a14793 100644
--- a/hw/arm/raspi.c
+++ b/hw/arm/raspi.c
@@ -367,7 +367,6 @@ static void raspi2b_machine_class_init(ObjectClass *oc, void *data)
raspi_machine_class_init(mc, rmc->board_rev);
};
-#ifdef TARGET_AARCH64
static void raspi3ap_machine_class_init(ObjectClass *oc, void *data)
{
MachineClass *mc = MACHINE_CLASS(oc);
@@ -387,7 +386,6 @@ static void raspi3b_machine_class_init(ObjectClass *oc, void *data)
rmc->board_rev = 0xa02082;
raspi_machine_class_init(mc, rmc->board_rev);
};
-#endif /* TARGET_AARCH64 */
static const TypeInfo raspi_machine_types[] = {
{
@@ -417,7 +415,6 @@ static const TypeInfo raspi_machine_types[] = {
{ TYPE_TARGET_AARCH64_MACHINE },
{ },
},
-#ifdef TARGET_AARCH64
}, {
.name = MACHINE_TYPE_NAME("raspi3ap"),
.parent = TYPE_RASPI_MACHINE,
@@ -434,7 +431,6 @@ static const TypeInfo raspi_machine_types[] = {
{ TYPE_TARGET_AARCH64_MACHINE },
{ },
},
-#endif
}, {
.name = TYPE_RASPI_MACHINE,
.parent = TYPE_RASPI_BASE_MACHINE,
diff --git a/hw/arm/meson.build b/hw/arm/meson.build
index f76e7fb229f..f52034ff6a2 100644
--- a/hw/arm/meson.build
+++ b/hw/arm/meson.build
@@ -27,8 +27,12 @@ arm_common_ss.add(when: 'CONFIG_OMAP', if_true: files('omap1.c'))
arm_common_ss.add(when: 'CONFIG_ALLWINNER_A10', if_true: files('allwinner-a10.c', 'cubieboard.c'))
arm_common_ss.add(when: 'CONFIG_ALLWINNER_H3', if_true: files('allwinner-h3.c', 'orangepi.c'))
arm_common_ss.add(when: 'CONFIG_ALLWINNER_R40', if_true: files('allwinner-r40.c', 'bananapi_m2u.c'))
-arm_ss.add(when: 'CONFIG_RASPI', if_true: files('bcm2836.c', 'raspi.c'))
-arm_common_ss.add(when: ['CONFIG_RASPI', 'TARGET_AARCH64'], if_true: files('bcm2838.c', 'raspi4b.c'))
+arm_common_ss.add(when: 'CONFIG_RASPI', if_true: files(
+ 'bcm2836.c',
+ 'bcm2838.c',
+ 'raspi.c',
+ 'raspi4b.c',
+))
arm_common_ss.add(when: 'CONFIG_STM32F100_SOC', if_true: files('stm32f100_soc.c'))
arm_common_ss.add(when: 'CONFIG_STM32F205_SOC', if_true: files('stm32f205_soc.c'))
arm_common_ss.add(when: 'CONFIG_STM32F405_SOC', if_true: files('stm32f405_soc.c'))
--
2.47.1
^ permalink raw reply related [flat|nested] 36+ messages in thread
* Re: [RFC PATCH v2 01/11] qapi: Rename TargetInfo structure as BinaryTargetInfo
2025-04-18 0:50 ` [RFC PATCH v2 01/11] qapi: Rename TargetInfo structure as BinaryTargetInfo Philippe Mathieu-Daudé
@ 2025-04-18 2:55 ` Pierrick Bouvier
0 siblings, 0 replies; 36+ messages in thread
From: Pierrick Bouvier @ 2025-04-18 2:55 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel
Cc: Anton Johansson, Richard Henderson
On 4/17/25 17:50, Philippe Mathieu-Daudé wrote:
> The QAPI-generated 'TargetInfo' structure name is only used
> in a single file. We want to heavily use another structure
> similarly named. Rename the QAPI one, since structure names
> are not part of the public API.
>
> Suggested-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
> qapi/machine.json | 12 ++++++------
> hw/core/machine-qmp-cmds.c | 4 ++--
> 2 files changed, 8 insertions(+), 8 deletions(-)
>
> diff --git a/qapi/machine.json b/qapi/machine.json
> index a6b8795b09e..3246212f048 100644
> --- a/qapi/machine.json
> +++ b/qapi/machine.json
> @@ -275,15 +275,15 @@
> { 'command': 'query-current-machine', 'returns': 'CurrentMachineParams' }
>
> ##
> -# @TargetInfo:
> +# @BinaryTargetInfo:
> #
> -# Information describing the QEMU target.
> +# Information describing the QEMU binary target.
> #
> -# @arch: the target architecture
> +# @arch: the binary target architecture
> #
> # Since: 1.2
> ##
> -{ 'struct': 'TargetInfo',
> +{ 'struct': 'BinaryTargetInfo',
> 'data': { 'arch': 'SysEmuTarget' } }
>
> ##
> @@ -291,11 +291,11 @@
> #
> # Return information about the target for this QEMU
> #
> -# Returns: TargetInfo
> +# Returns: BinaryTargetInfo
> #
> # Since: 1.2
> ##
> -{ 'command': 'query-target', 'returns': 'TargetInfo' }
> +{ 'command': 'query-target', 'returns': 'BinaryTargetInfo' }
>
> ##
> # @UuidInfo:
> diff --git a/hw/core/machine-qmp-cmds.c b/hw/core/machine-qmp-cmds.c
> index 3130c5cd456..408994b67d7 100644
> --- a/hw/core/machine-qmp-cmds.c
> +++ b/hw/core/machine-qmp-cmds.c
> @@ -132,9 +132,9 @@ CurrentMachineParams *qmp_query_current_machine(Error **errp)
> return params;
> }
>
> -TargetInfo *qmp_query_target(Error **errp)
> +BinaryTargetInfo *qmp_query_target(Error **errp)
> {
> - TargetInfo *info = g_malloc0(sizeof(*info));
> + BinaryTargetInfo *info = g_malloc0(sizeof(*info));
>
> info->arch = qapi_enum_parse(&SysEmuTarget_lookup, target_name(), -1,
> &error_abort);
Good for me. If anyone wants another name than BinaryTargetInfo, I'm ok
with it.
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
^ permalink raw reply [flat|nested] 36+ messages in thread
* Re: [RFC PATCH v2 02/11] qemu: Convert target_name() to TargetInfo API
2025-04-18 0:50 ` [RFC PATCH v2 02/11] qemu: Convert target_name() to TargetInfo API Philippe Mathieu-Daudé
@ 2025-04-18 3:01 ` Pierrick Bouvier
2025-04-18 14:02 ` Philippe Mathieu-Daudé
0 siblings, 1 reply; 36+ messages in thread
From: Pierrick Bouvier @ 2025-04-18 3:01 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel
Cc: Anton Johansson, Richard Henderson
On 4/17/25 17:50, Philippe Mathieu-Daudé wrote:
> Have target_name() be a target-agnostic method, dispatching
> to a per-target TargetInfo singleton structure.
> By default a stub singleton is used. No logical change
> expected.
>
> Inspired-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
> ---
> meson.build | 3 +++
> include/hw/core/cpu.h | 2 --
> include/qemu/target_info-impl.h | 23 +++++++++++++++++++++++
> include/qemu/target_info.h | 19 +++++++++++++++++++
> cpu-target.c | 5 -----
> hw/core/machine-qmp-cmds.c | 1 +
> plugins/loader.c | 2 +-
> system/vl.c | 2 +-
> target_info-stub.c | 19 +++++++++++++++++++
> target_info.c | 16 ++++++++++++++++
> 10 files changed, 83 insertions(+), 9 deletions(-)
> create mode 100644 include/qemu/target_info-impl.h
> create mode 100644 include/qemu/target_info.h
> create mode 100644 target_info-stub.c
> create mode 100644 target_info.c
>
> diff --git a/meson.build b/meson.build
> index bcb9d39a387..49a050a28a3 100644
> --- a/meson.build
> +++ b/meson.build
> @@ -3807,6 +3807,9 @@ endif
> common_ss.add(pagevary)
> specific_ss.add(files('page-target.c', 'page-vary-target.c'))
>
> +common_ss.add(files('target_info.c'))
> +specific_ss.add(files('target_info-stub.c'))
> +
> subdir('backends')
> subdir('disas')
> subdir('migration')
> diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h
> index 5b645df59f5..9d9448341d1 100644
> --- a/include/hw/core/cpu.h
> +++ b/include/hw/core/cpu.h
> @@ -1115,8 +1115,6 @@ bool cpu_exec_realizefn(CPUState *cpu, Error **errp);
> void cpu_exec_unrealizefn(CPUState *cpu);
> void cpu_exec_reset_hold(CPUState *cpu);
>
> -const char *target_name(void);
> -
> #ifdef COMPILING_PER_TARGET
>
> extern const VMStateDescription vmstate_cpu_common;
> diff --git a/include/qemu/target_info-impl.h b/include/qemu/target_info-impl.h
> new file mode 100644
> index 00000000000..d5c94ed5296
> --- /dev/null
> +++ b/include/qemu/target_info-impl.h
> @@ -0,0 +1,23 @@
> +/*
> + * QEMU binary/target API ...
> + *
> + * Copyright (c) Linaro
> + *
> + * SPDX-License-Identifier: GPL-2.0-or-later
> + */
> +
> +#ifndef QEMU_TARGET_INFO_IMPL_H
> +#define QEMU_TARGET_INFO_IMPL_H
> +
> +#include "qemu/target_info.h"
> +
> +typedef struct TargetInfo {
> +
> + /* runtime equivalent of TARGET_NAME definition */
> + const char *const name;
> +
> +} TargetInfo;
> +
> +const TargetInfo *target_info(void);
> +
> +#endif
> diff --git a/include/qemu/target_info.h b/include/qemu/target_info.h
> new file mode 100644
> index 00000000000..3f6cbbbd300
> --- /dev/null
> +++ b/include/qemu/target_info.h
> @@ -0,0 +1,19 @@
> +/*
> + * QEMU binary/target API
> + *
> + * Copyright (c) Linaro
> + *
> + * SPDX-License-Identifier: GPL-2.0-or-later
> + */
> +
> +#ifndef QEMU_TARGET_INFO_H
> +#define QEMU_TARGET_INFO_H
> +
> +/**
> + * target_name:
> + *
> + * Returns: Canonical target name (i.e. "i386").
> + */
> +const char *target_name(void);
> +
> +#endif
> diff --git a/cpu-target.c b/cpu-target.c
> index c99d208a7c4..3f82d3ea444 100644
> --- a/cpu-target.c
> +++ b/cpu-target.c
> @@ -165,8 +165,3 @@ bool target_words_bigendian(void)
> {
> return TARGET_BIG_ENDIAN;
> }
> -
> -const char *target_name(void)
> -{
> - return TARGET_NAME;
> -}
> diff --git a/hw/core/machine-qmp-cmds.c b/hw/core/machine-qmp-cmds.c
> index 408994b67d7..b317aec234f 100644
> --- a/hw/core/machine-qmp-cmds.c
> +++ b/hw/core/machine-qmp-cmds.c
> @@ -19,6 +19,7 @@
> #include "qapi/qobject-input-visitor.h"
> #include "qapi/type-helpers.h"
> #include "qemu/uuid.h"
> +#include "qemu/target_info.h"
> #include "qom/qom-qobject.h"
> #include "system/hostmem.h"
> #include "system/hw_accel.h"
> diff --git a/plugins/loader.c b/plugins/loader.c
> index 7523d554f03..36a4e88d4db 100644
> --- a/plugins/loader.c
> +++ b/plugins/loader.c
> @@ -29,7 +29,7 @@
> #include "qemu/xxhash.h"
> #include "qemu/plugin.h"
> #include "qemu/memalign.h"
> -#include "hw/core/cpu.h"
> +#include "qemu/target_info.h"
> #include "exec/tb-flush.h"
>
> #include "plugin.h"
> diff --git a/system/vl.c b/system/vl.c
> index c17945c4939..d8a0fe713c9 100644
> --- a/system/vl.c
> +++ b/system/vl.c
> @@ -40,6 +40,7 @@
> #include "qemu/help_option.h"
> #include "qemu/hw-version.h"
> #include "qemu/uuid.h"
> +#include "qemu/target_info.h"
> #include "system/reset.h"
> #include "system/runstate.h"
> #include "system/runstate-action.h"
> @@ -79,7 +80,6 @@
> #include "hw/block/block.h"
> #include "hw/i386/x86.h"
> #include "hw/i386/pc.h"
> -#include "hw/core/cpu.h"
> #include "migration/cpr.h"
> #include "migration/misc.h"
> #include "migration/snapshot.h"
> diff --git a/target_info-stub.c b/target_info-stub.c
> new file mode 100644
> index 00000000000..1e44bb6f6fb
> --- /dev/null
> +++ b/target_info-stub.c
> @@ -0,0 +1,19 @@
> +/*
> + * QEMU target info stubs
> + *
> + * Copyright (c) Linaro
> + *
> + * SPDX-License-Identifier: GPL-2.0-or-later
> + */
> +
> +#include "qemu/osdep.h"
> +#include "qemu/target_info-impl.h"
> +
> +static const TargetInfo target_info_stub = {
> + .name = TARGET_NAME,
> +};
> +
> +const TargetInfo *target_info(void)
> +{
> + return &target_info_stub;
> +}
> diff --git a/target_info.c b/target_info.c
> new file mode 100644
> index 00000000000..877a6a15014
> --- /dev/null
> +++ b/target_info.c
> @@ -0,0 +1,16 @@
> +/*
> + * QEMU binary/target helpers
> + *
> + * Copyright (c) Linaro
> + *
> + * SPDX-License-Identifier: GPL-2.0-or-later
> + */
> +
> +#include "qemu/osdep.h"
> +#include "qemu/target_info-impl.h"
> +#include "qemu/target_info.h"
> +
> +const char *target_name(void)
> +{
> + return target_info()->name;
> +}
What is the benefit to have two different files (common and specific)?
target_name() can be inline in the same header, returning the matching
field in existing target_info, which does not need any specialization
per target.
^ permalink raw reply [flat|nested] 36+ messages in thread
* Re: [RFC PATCH v2 03/11] system/vl: Filter machine list available for a particular target binary
2025-04-18 0:50 ` [RFC PATCH v2 03/11] system/vl: Filter machine list available for a particular target binary Philippe Mathieu-Daudé
@ 2025-04-18 3:06 ` Pierrick Bouvier
2025-04-18 14:14 ` Philippe Mathieu-Daudé
0 siblings, 1 reply; 36+ messages in thread
From: Pierrick Bouvier @ 2025-04-18 3:06 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel
Cc: Anton Johansson, Richard Henderson
On 4/17/25 17:50, Philippe Mathieu-Daudé wrote:
> Binaries can register a QOM type to filter their machines
> by filling their TargetInfo::machine_typename field.
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
> include/qemu/target_info-impl.h | 3 +++
> include/qemu/target_info.h | 8 ++++++++
> system/vl.c | 14 ++++++++++++++
> target_info.c | 5 +++++
> 4 files changed, 30 insertions(+)
>
> diff --git a/include/qemu/target_info-impl.h b/include/qemu/target_info-impl.h
> index d5c94ed5296..990fb067d20 100644
> --- a/include/qemu/target_info-impl.h
> +++ b/include/qemu/target_info-impl.h
> @@ -16,6 +16,9 @@ typedef struct TargetInfo {
> /* runtime equivalent of TARGET_NAME definition */
> const char *const name;
>
> + /* QOM typename machines for this binary must implement */
> + const char *const machine_typename;
> +
> } TargetInfo;
>
> const TargetInfo *target_info(void);
> diff --git a/include/qemu/target_info.h b/include/qemu/target_info.h
> index 3f6cbbbd300..e9fd2fdd7b0 100644
> --- a/include/qemu/target_info.h
> +++ b/include/qemu/target_info.h
> @@ -16,4 +16,12 @@
> */
> const char *target_name(void);
>
> +/**
> + * target_machine_interface_typename:
> + *
> + * Returns: Name of the QOM interface implemented by machines
> + * usable on this target binary.
> + */
> +const char *target_machine_interface_typename(void);
> +
> #endif
> diff --git a/system/vl.c b/system/vl.c
> index d8a0fe713c9..4e43e55afe7 100644
> --- a/system/vl.c
> +++ b/system/vl.c
> @@ -27,6 +27,7 @@
> #include "qemu/datadir.h"
> #include "qemu/units.h"
> #include "qemu/module.h"
> +#include "qemu/target_info.h"
> #include "exec/cpu-common.h"
> #include "exec/page-vary.h"
> #include "hw/qdev-properties.h"
> @@ -836,11 +837,17 @@ static bool usb_parse(const char *cmdline, Error **errp)
> static MachineClass *find_machine(const char *name, GSList *machines)
> {
> GSList *el;
> + const char *qom_typename_filter = target_machine_interface_typename();
>
> for (el = machines; el; el = el->next) {
> MachineClass *mc = el->data;
>
> if (!strcmp(mc->name, name) || !g_strcmp0(mc->alias, name)) {
> + if (qom_typename_filter
> + && !object_class_dynamic_cast(el->data, qom_typename_filter)) {
> + /* Machine is not for this binary: fail */
> + return NULL;
> + }
> return mc;
> }
> }
> @@ -1563,6 +1570,7 @@ static void machine_help_func(const QDict *qdict)
> g_autoptr(GSList) machines = NULL;
> GSList *el;
> const char *type = qdict_get_try_str(qdict, "type");
> + const char *qom_typename_filter = target_machine_interface_typename();
>
> machines = object_class_get_list(TYPE_MACHINE, false);
We can replace change to system/vl.c with:
const char *machine_type = target_machine_interface_typename();
machines = object_class_get_list(machine_type, false);
> if (type) {
> @@ -1577,6 +1585,12 @@ static void machine_help_func(const QDict *qdict)
> machines = g_slist_sort(machines, machine_class_cmp);
> for (el = machines; el; el = el->next) {
> MachineClass *mc = el->data;
> +
> + if (qom_typename_filter
> + && !object_class_dynamic_cast(el->data, qom_typename_filter)) {
> + /* Machine is not for this binary: skip */
> + continue;
> + }
> if (mc->alias) {
> printf("%-20s %s (alias of %s)\n", mc->alias, mc->desc, mc->name);
> }
> diff --git a/target_info.c b/target_info.c
> index 877a6a15014..226eed1fd7d 100644
> --- a/target_info.c
> +++ b/target_info.c
> @@ -14,3 +14,8 @@ const char *target_name(void)
> {
> return target_info()->name;
> }
> +
> +const char *target_machine_interface_typename(void)
> +{
> + return target_info()->machine_typename;
And here:
const char *machine_type = target_info()->machine_typename;
if (!machine_type) {
machine_type = TYPE_MACHINE;
}
return machine_type;
> +}
This way, there is no special case to handle anywhere, and we can safely
replace occurrences of TYPE_MACHINE queries with
target_machine_interface_typename().
As well, just a nit, but it's not important to know it's an interface, I
would prefer a simpler name: target_machine_type();
^ permalink raw reply [flat|nested] 36+ messages in thread
* Re: [RFC PATCH v2 04/11] hw/arm: Register TYPE_TARGET_ARM/AARCH64_CPU QOM interfaces
2025-04-18 0:50 ` [RFC PATCH v2 04/11] hw/arm: Register TYPE_TARGET_ARM/AARCH64_CPU QOM interfaces Philippe Mathieu-Daudé
@ 2025-04-18 3:07 ` Pierrick Bouvier
2025-04-18 14:07 ` Philippe Mathieu-Daudé
0 siblings, 1 reply; 36+ messages in thread
From: Pierrick Bouvier @ 2025-04-18 3:07 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel
Cc: Anton Johansson, Richard Henderson
On 4/17/25 17:50, Philippe Mathieu-Daudé wrote:
> Define the TYPE_TARGET_ARM_MACHINE and TYPE_TARGET_AARCH64_MACHINE
> QOM interface names to allow machines to implement them.
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
> meson.build | 1 +
> include/hw/boards.h | 1 +
> include/qemu/target_info-qom.h | 18 ++++++++++++++++++
> target_info-qom.c | 24 ++++++++++++++++++++++++
> 4 files changed, 44 insertions(+)
> create mode 100644 include/qemu/target_info-qom.h
> create mode 100644 target_info-qom.c
>
> diff --git a/meson.build b/meson.build
> index 49a050a28a3..168b07b5887 100644
> --- a/meson.build
> +++ b/meson.build
> @@ -3808,6 +3808,7 @@ common_ss.add(pagevary)
> specific_ss.add(files('page-target.c', 'page-vary-target.c'))
>
> common_ss.add(files('target_info.c'))
> +system_ss.add(files('target_info-qom.c'))
> specific_ss.add(files('target_info-stub.c'))
>
> subdir('backends')
> diff --git a/include/hw/boards.h b/include/hw/boards.h
> index 02f43ac5d4d..b1bbf3c34d4 100644
> --- a/include/hw/boards.h
> +++ b/include/hw/boards.h
> @@ -7,6 +7,7 @@
> #include "system/hostmem.h"
> #include "system/blockdev.h"
> #include "qapi/qapi-types-machine.h"
> +#include "qemu/target_info-qom.h"
> #include "qemu/module.h"
> #include "qom/object.h"
> #include "hw/core/cpu.h"
> diff --git a/include/qemu/target_info-qom.h b/include/qemu/target_info-qom.h
> new file mode 100644
> index 00000000000..7eb9b6bd254
> --- /dev/null
> +++ b/include/qemu/target_info-qom.h
> @@ -0,0 +1,18 @@
> +/*
> + * QEMU binary/target API (QOM types)
> + *
> + * Copyright (c) Linaro
> + *
> + * SPDX-License-Identifier: GPL-2.0-or-later
> + */
> +
> +#ifndef QEMU_TARGET_INFO_QOM_H
> +#define QEMU_TARGET_INFO_QOM_H
> +
> +#define TYPE_TARGET_ARM_MACHINE \
> + "target-info-arm-machine"
> +
> +#define TYPE_TARGET_AARCH64_MACHINE \
> + "target-info-aarch64-machine"
> +
> +#endif
> diff --git a/target_info-qom.c b/target_info-qom.c
> new file mode 100644
> index 00000000000..d3fee57361b
> --- /dev/null
> +++ b/target_info-qom.c
> @@ -0,0 +1,24 @@
> +/*
> + * QEMU binary/target API (QOM types)
> + *
> + * Copyright (c) Linaro
> + *
> + * SPDX-License-Identifier: GPL-2.0-or-later
> + */
> +
> +#include "qemu/osdep.h"
> +#include "qemu/target_info-qom.h"
> +#include "qom/object.h"
> +
> +static const TypeInfo target_info_types[] = {
> + {
> + .name = TYPE_TARGET_ARM_MACHINE,
> + .parent = TYPE_INTERFACE,
> + },
> + {
> + .name = TYPE_TARGET_AARCH64_MACHINE,
> + .parent = TYPE_INTERFACE,
> + },
> +};
> +
> +DEFINE_TYPES(target_info_types)
Ideally, this should be in target/arm, as this type will only be used by
boards in hw/arm, and by the target_info specialization.
^ permalink raw reply [flat|nested] 36+ messages in thread
* Re: [RFC PATCH v2 06/11] hw/arm: Filter machine types for qemu-system-arm binary
2025-04-18 0:50 ` [RFC PATCH v2 06/11] hw/arm: Filter machine types for qemu-system-arm binary Philippe Mathieu-Daudé
@ 2025-04-18 3:08 ` Pierrick Bouvier
0 siblings, 0 replies; 36+ messages in thread
From: Pierrick Bouvier @ 2025-04-18 3:08 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel
Cc: Anton Johansson, Richard Henderson
On 4/17/25 17:50, Philippe Mathieu-Daudé wrote:
> Very few machines are restricted to the qemu-system-aarch64
> binary:
>
> $ git grep TARGET_AARCH64 hw/arm/meson.build
> hw/arm/meson.build:31:arm_common_ss.add(when: ['CONFIG_RASPI', 'TARGET_AARCH64'], if_true: files('bcm2838.c', 'raspi4b.c'))
> hw/arm/meson.build:50:arm_common_ss.add(when: ['CONFIG_ASPEED_SOC', 'TARGET_AARCH64'], if_true: files('aspeed_ast27x0.c'))
>
> $ git grep -W AARCH64 hw/arm/Kconfig
> hw/arm/Kconfig=185=config SBSA_REF
> hw/arm/Kconfig-186- bool
> hw/arm/Kconfig-187- default y
> hw/arm/Kconfig:188: depends on TCG && AARCH64
> --
> hw/arm/Kconfig=413=config XLNX_ZYNQMP_ARM
> hw/arm/Kconfig-414- bool
> hw/arm/Kconfig-415- default y if PIXMAN
> hw/arm/Kconfig:416: depends on TCG && AARCH64
> --
> hw/arm/Kconfig=435=config XLNX_VERSAL
> hw/arm/Kconfig-436- bool
> hw/arm/Kconfig-437- default y
> hw/arm/Kconfig:438: depends on TCG && AARCH64
> --
> hw/arm/Kconfig=475=config NPCM8XX
> hw/arm/Kconfig-476- bool
> hw/arm/Kconfig-477- default y
> hw/arm/Kconfig:478: depends on TCG && AARCH64
> --
> hw/arm/Kconfig=605=config FSL_IMX8MP_EVK
> hw/arm/Kconfig-606- bool
> hw/arm/Kconfig-607- default y
> hw/arm/Kconfig:608: depends on TCG && AARCH64
>
> $ git grep -wW TARGET_AARCH64 hw/arm | fgrep -4 MACHINE_TYPE_NAME
> ...
> hw/arm/aspeed.c:1939:#ifdef TARGET_AARCH64
> hw/arm/aspeed.c-1940- }, {
> hw/arm/aspeed.c-1941- .name = MACHINE_TYPE_NAME("ast2700a0-evb"),
>
> hw/arm/aspeed.c-1949- .name = MACHINE_TYPE_NAME("ast2700a1-evb"),
>
> hw/arm/raspi.c:420:#ifdef TARGET_AARCH64
> hw/arm/raspi.c-421- }, {
> hw/arm/raspi.c-422- .name = MACHINE_TYPE_NAME("raspi3ap"),
>
> hw/arm/raspi.c-429- }, {
> hw/arm/raspi.c-430- .name = MACHINE_TYPE_NAME("raspi3b"),
>
> This can be verified as:
>
> $ diff -u0 <(qemu-system-arm -M help) <(qemu-system-aarch64 -M help)
> @@ -5,3 +4,0 @@
> -ast2700-evb Aspeed AST2700 A0 EVB (Cortex-A35) (alias of ast2700a0-evb)
> -ast2700a0-evb Aspeed AST2700 A0 EVB (Cortex-A35)
> -ast2700a1-evb Aspeed AST2700 A1 EVB (Cortex-A35)
> @@ -22 +18,0 @@
> -imx8mp-evk NXP i.MX 8M Plus EVK Board
> @@ -49 +44,0 @@
> -npcm845-evb Nuvoton NPCM845 Evaluation Board (Cortex-A35)
> @@ -63,3 +57,0 @@
> -raspi3ap Raspberry Pi 3A+ (revision 1.0)
> -raspi3b Raspberry Pi 3B (revision 1.2)
> -raspi4b Raspberry Pi 4B (revision 1.5)
> @@ -72 +63,0 @@
> -sbsa-ref QEMU 'SBSA Reference' ARM Virtual Machine
> @@ -116,2 +106,0 @@
> -xlnx-versal-virt Xilinx Versal Virtual development board
> -xlnx-zcu102 Xilinx ZynqMP ZCU102 board with 4xA53s and 2xR5Fs based on the value of smp
>
> Register the TYPE_TARGET_ARM_MACHINE interface for all
> the machines not listed previously.
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
> hw/arm/aspeed.c | 20 ++++++++++++++++++++
> hw/arm/b-l475e-iot01a.c | 1 +
> hw/arm/bananapi_m2u.c | 1 +
> hw/arm/collie.c | 1 +
> hw/arm/cubieboard.c | 1 +
> hw/arm/digic_boards.c | 1 +
> hw/arm/exynos4_boards.c | 2 ++
> hw/arm/fby35.c | 1 +
> hw/arm/highbank.c | 2 ++
> hw/arm/imx25_pdk.c | 1 +
> hw/arm/integratorcp.c | 1 +
> hw/arm/kzm.c | 1 +
> hw/arm/mcimx6ul-evk.c | 1 +
> hw/arm/mcimx7d-sabre.c | 1 +
> hw/arm/microbit.c | 1 +
> hw/arm/mps2-tz.c | 4 ++++
> hw/arm/mps2.c | 4 ++++
> hw/arm/mps3r.c | 1 +
> hw/arm/msf2-som.c | 1 +
> hw/arm/musca.c | 2 ++
> hw/arm/musicpal.c | 1 +
> hw/arm/netduino2.c | 1 +
> hw/arm/netduinoplus2.c | 1 +
> hw/arm/npcm7xx_boards.c | 5 +++++
> hw/arm/olimex-stm32-h405.c | 1 +
> hw/arm/omap_sx1.c | 2 ++
> hw/arm/orangepi.c | 1 +
> hw/arm/raspi.c | 3 +++
> hw/arm/realview.c | 4 ++++
> hw/arm/sabrelite.c | 1 +
> hw/arm/stellaris.c | 2 ++
> hw/arm/stm32vldiscovery.c | 1 +
> hw/arm/versatilepb.c | 2 ++
> hw/arm/vexpress.c | 2 ++
> hw/arm/virt.c | 1 +
> hw/arm/xilinx_zynq.c | 1 +
> 36 files changed, 77 insertions(+)
>
> diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
> index ca7004c335a..d54ee2d4b53 100644
> --- a/hw/arm/aspeed.c
> +++ b/hw/arm/aspeed.c
> @@ -1761,6 +1761,7 @@ static const TypeInfo aspeed_machine_types[] = {
> .parent = TYPE_ASPEED_MACHINE,
> .class_init = aspeed_machine_palmetto_class_init,
> .interfaces = (InterfaceInfo[]) {
> + { TYPE_TARGET_ARM_MACHINE },
> { TYPE_TARGET_AARCH64_MACHINE },
> { },
> },
> @@ -1769,6 +1770,7 @@ static const TypeInfo aspeed_machine_types[] = {
> .parent = TYPE_ASPEED_MACHINE,
> .class_init = aspeed_machine_supermicrox11_bmc_class_init,
> .interfaces = (InterfaceInfo[]) {
> + { TYPE_TARGET_ARM_MACHINE },
> { TYPE_TARGET_AARCH64_MACHINE },
> { },
> },
> @@ -1777,6 +1779,7 @@ static const TypeInfo aspeed_machine_types[] = {
> .parent = TYPE_ASPEED_MACHINE,
> .class_init = aspeed_machine_supermicro_x11spi_bmc_class_init,
> .interfaces = (InterfaceInfo[]) {
> + { TYPE_TARGET_ARM_MACHINE },
> { TYPE_TARGET_AARCH64_MACHINE },
> { },
> },
> @@ -1785,6 +1788,7 @@ static const TypeInfo aspeed_machine_types[] = {
> .parent = TYPE_ASPEED_MACHINE,
> .class_init = aspeed_machine_ast2500_evb_class_init,
> .interfaces = (InterfaceInfo[]) {
> + { TYPE_TARGET_ARM_MACHINE },
> { TYPE_TARGET_AARCH64_MACHINE },
> { },
> },
> @@ -1793,6 +1797,7 @@ static const TypeInfo aspeed_machine_types[] = {
> .parent = TYPE_ASPEED_MACHINE,
> .class_init = aspeed_machine_romulus_class_init,
> .interfaces = (InterfaceInfo[]) {
> + { TYPE_TARGET_ARM_MACHINE },
> { TYPE_TARGET_AARCH64_MACHINE },
> { },
> },
> @@ -1801,6 +1806,7 @@ static const TypeInfo aspeed_machine_types[] = {
> .parent = TYPE_ASPEED_MACHINE,
> .class_init = aspeed_machine_sonorapass_class_init,
> .interfaces = (InterfaceInfo[]) {
> + { TYPE_TARGET_ARM_MACHINE },
> { TYPE_TARGET_AARCH64_MACHINE },
> { },
> },
> @@ -1809,6 +1815,7 @@ static const TypeInfo aspeed_machine_types[] = {
> .parent = TYPE_ASPEED_MACHINE,
> .class_init = aspeed_machine_witherspoon_class_init,
> .interfaces = (InterfaceInfo[]) {
> + { TYPE_TARGET_ARM_MACHINE },
> { TYPE_TARGET_AARCH64_MACHINE },
> { },
> },
> @@ -1817,6 +1824,7 @@ static const TypeInfo aspeed_machine_types[] = {
> .parent = TYPE_ASPEED_MACHINE,
> .class_init = aspeed_machine_ast2600_evb_class_init,
> .interfaces = (InterfaceInfo[]) {
> + { TYPE_TARGET_ARM_MACHINE },
> { TYPE_TARGET_AARCH64_MACHINE },
> { },
> },
> @@ -1825,6 +1833,7 @@ static const TypeInfo aspeed_machine_types[] = {
> .parent = TYPE_ASPEED_MACHINE,
> .class_init = aspeed_machine_yosemitev2_class_init,
> .interfaces = (InterfaceInfo[]) {
> + { TYPE_TARGET_ARM_MACHINE },
> { TYPE_TARGET_AARCH64_MACHINE },
> { },
> },
> @@ -1833,6 +1842,7 @@ static const TypeInfo aspeed_machine_types[] = {
> .parent = TYPE_ASPEED_MACHINE,
> .class_init = aspeed_machine_tiogapass_class_init,
> .interfaces = (InterfaceInfo[]) {
> + { TYPE_TARGET_ARM_MACHINE },
> { TYPE_TARGET_AARCH64_MACHINE },
> { },
> },
> @@ -1841,6 +1851,7 @@ static const TypeInfo aspeed_machine_types[] = {
> .parent = TYPE_ASPEED_MACHINE,
> .class_init = aspeed_machine_g220a_class_init,
> .interfaces = (InterfaceInfo[]) {
> + { TYPE_TARGET_ARM_MACHINE },
> { TYPE_TARGET_AARCH64_MACHINE },
> { },
> },
> @@ -1849,6 +1860,7 @@ static const TypeInfo aspeed_machine_types[] = {
> .parent = TYPE_ASPEED_MACHINE,
> .class_init = aspeed_machine_qcom_dc_scm_v1_class_init,
> .interfaces = (InterfaceInfo[]) {
> + { TYPE_TARGET_ARM_MACHINE },
> { TYPE_TARGET_AARCH64_MACHINE },
> { },
> },
> @@ -1857,6 +1869,7 @@ static const TypeInfo aspeed_machine_types[] = {
> .parent = TYPE_ASPEED_MACHINE,
> .class_init = aspeed_machine_qcom_firework_class_init,
> .interfaces = (InterfaceInfo[]) {
> + { TYPE_TARGET_ARM_MACHINE },
> { TYPE_TARGET_AARCH64_MACHINE },
> { },
> },
> @@ -1865,6 +1878,7 @@ static const TypeInfo aspeed_machine_types[] = {
> .parent = TYPE_ASPEED_MACHINE,
> .class_init = aspeed_machine_fp5280g2_class_init,
> .interfaces = (InterfaceInfo[]) {
> + { TYPE_TARGET_ARM_MACHINE },
> { TYPE_TARGET_AARCH64_MACHINE },
> { },
> },
> @@ -1873,6 +1887,7 @@ static const TypeInfo aspeed_machine_types[] = {
> .parent = TYPE_ASPEED_MACHINE,
> .class_init = aspeed_machine_quanta_q71l_class_init,
> .interfaces = (InterfaceInfo[]) {
> + { TYPE_TARGET_ARM_MACHINE },
> { TYPE_TARGET_AARCH64_MACHINE },
> { },
> },
> @@ -1881,6 +1896,7 @@ static const TypeInfo aspeed_machine_types[] = {
> .parent = TYPE_ASPEED_MACHINE,
> .class_init = aspeed_machine_rainier_class_init,
> .interfaces = (InterfaceInfo[]) {
> + { TYPE_TARGET_ARM_MACHINE },
> { TYPE_TARGET_AARCH64_MACHINE },
> { },
> },
> @@ -1889,6 +1905,7 @@ static const TypeInfo aspeed_machine_types[] = {
> .parent = TYPE_ASPEED_MACHINE,
> .class_init = aspeed_machine_fuji_class_init,
> .interfaces = (InterfaceInfo[]) {
> + { TYPE_TARGET_ARM_MACHINE },
> { TYPE_TARGET_AARCH64_MACHINE },
> { },
> },
> @@ -1897,6 +1914,7 @@ static const TypeInfo aspeed_machine_types[] = {
> .parent = TYPE_ASPEED_MACHINE,
> .class_init = aspeed_machine_bletchley_class_init,
> .interfaces = (InterfaceInfo[]) {
> + { TYPE_TARGET_ARM_MACHINE },
> { TYPE_TARGET_AARCH64_MACHINE },
> { },
> },
> @@ -1905,6 +1923,7 @@ static const TypeInfo aspeed_machine_types[] = {
> .parent = MACHINE_TYPE_NAME("ast2600-evb"),
> .class_init = aspeed_machine_fby35_class_init,
> .interfaces = (InterfaceInfo[]) {
> + { TYPE_TARGET_ARM_MACHINE },
> { TYPE_TARGET_AARCH64_MACHINE },
> { },
> },
> @@ -1913,6 +1932,7 @@ static const TypeInfo aspeed_machine_types[] = {
> .parent = TYPE_ASPEED_MACHINE,
> .class_init = aspeed_minibmc_machine_ast1030_evb_class_init,
> .interfaces = (InterfaceInfo[]) {
> + { TYPE_TARGET_ARM_MACHINE },
> { TYPE_TARGET_AARCH64_MACHINE },
> { },
> },
> diff --git a/hw/arm/b-l475e-iot01a.c b/hw/arm/b-l475e-iot01a.c
> index cc4b9d6c3b5..ec838f59c13 100644
> --- a/hw/arm/b-l475e-iot01a.c
> +++ b/hw/arm/b-l475e-iot01a.c
> @@ -132,6 +132,7 @@ static const TypeInfo bl475e_machine_type[] = {
> .instance_size = sizeof(Bl475eMachineState),
> .class_init = bl475e_machine_init,
> .interfaces = (InterfaceInfo[]) {
> + { TYPE_TARGET_ARM_MACHINE },
> { TYPE_TARGET_AARCH64_MACHINE },
> { },
> },
> diff --git a/hw/arm/bananapi_m2u.c b/hw/arm/bananapi_m2u.c
> index d9871a796bb..2d844af8fd3 100644
> --- a/hw/arm/bananapi_m2u.c
> +++ b/hw/arm/bananapi_m2u.c
> @@ -151,6 +151,7 @@ static const TypeInfo bananapi_machine_types[] = {
> .parent = TYPE_MACHINE,
> .class_init = bpim2u_machine_class_init,
> .interfaces = (InterfaceInfo[]) {
> + { TYPE_TARGET_ARM_MACHINE },
> { TYPE_TARGET_AARCH64_MACHINE },
> { },
> },
> diff --git a/hw/arm/collie.c b/hw/arm/collie.c
> index 16e862e15b6..bb7cd26c28c 100644
> --- a/hw/arm/collie.c
> +++ b/hw/arm/collie.c
> @@ -87,6 +87,7 @@ static const TypeInfo collie_machine_typeinfo = {
> .class_init = collie_machine_class_init,
> .instance_size = sizeof(CollieMachineState),
> .interfaces = (InterfaceInfo[]) {
> + { TYPE_TARGET_ARM_MACHINE },
> { TYPE_TARGET_AARCH64_MACHINE },
> { },
> },
> diff --git a/hw/arm/cubieboard.c b/hw/arm/cubieboard.c
> index dd40d65554d..55d869e815e 100644
> --- a/hw/arm/cubieboard.c
> +++ b/hw/arm/cubieboard.c
> @@ -132,6 +132,7 @@ static const TypeInfo cubieboard_machine_types[] = {
> .parent = TYPE_MACHINE,
> .class_init = cubieboard_machine_class_init,
> .interfaces = (InterfaceInfo[]) {
> + { TYPE_TARGET_ARM_MACHINE },
> { TYPE_TARGET_AARCH64_MACHINE },
> { },
> },
> diff --git a/hw/arm/digic_boards.c b/hw/arm/digic_boards.c
> index f55309082ac..a8a59644f4c 100644
> --- a/hw/arm/digic_boards.c
> +++ b/hw/arm/digic_boards.c
> @@ -153,6 +153,7 @@ static const TypeInfo digic_machine_types[] = {
> .parent = TYPE_MACHINE,
> .class_init = digic_machine_class_init,
> .interfaces = (InterfaceInfo[]) {
> + { TYPE_TARGET_ARM_MACHINE },
> { TYPE_TARGET_AARCH64_MACHINE },
> { },
> },
> diff --git a/hw/arm/exynos4_boards.c b/hw/arm/exynos4_boards.c
> index b55e364d962..cff2a52e3ff 100644
> --- a/hw/arm/exynos4_boards.c
> +++ b/hw/arm/exynos4_boards.c
> @@ -173,6 +173,7 @@ static const TypeInfo nuri_type = {
> .parent = TYPE_MACHINE,
> .class_init = nuri_class_init,
> .interfaces = (InterfaceInfo[]) {
> + { TYPE_TARGET_ARM_MACHINE },
> { TYPE_TARGET_AARCH64_MACHINE },
> { },
> },
> @@ -197,6 +198,7 @@ static const TypeInfo smdkc210_type = {
> .parent = TYPE_MACHINE,
> .class_init = smdkc210_class_init,
> .interfaces = (InterfaceInfo[]) {
> + { TYPE_TARGET_ARM_MACHINE },
> { TYPE_TARGET_AARCH64_MACHINE },
> { },
> },
> diff --git a/hw/arm/fby35.c b/hw/arm/fby35.c
> index de6b32ce532..d9584b57e83 100644
> --- a/hw/arm/fby35.c
> +++ b/hw/arm/fby35.c
> @@ -188,6 +188,7 @@ static const TypeInfo fby35_types[] = {
> .instance_size = sizeof(Fby35State),
> .instance_init = fby35_instance_init,
> .interfaces = (InterfaceInfo[]) {
> + { TYPE_TARGET_ARM_MACHINE },
> { TYPE_TARGET_AARCH64_MACHINE },
> { },
> },
> diff --git a/hw/arm/highbank.c b/hw/arm/highbank.c
> index e517cf3c7f6..6009f22f201 100644
> --- a/hw/arm/highbank.c
> +++ b/hw/arm/highbank.c
> @@ -364,6 +364,7 @@ static const TypeInfo highbank_type = {
> .parent = TYPE_MACHINE,
> .class_init = highbank_class_init,
> .interfaces = (InterfaceInfo[]) {
> + { TYPE_TARGET_ARM_MACHINE },
> { TYPE_TARGET_AARCH64_MACHINE },
> { },
> },
> @@ -392,6 +393,7 @@ static const TypeInfo midway_type = {
> .parent = TYPE_MACHINE,
> .class_init = midway_class_init,
> .interfaces = (InterfaceInfo[]) {
> + { TYPE_TARGET_ARM_MACHINE },
> { TYPE_TARGET_AARCH64_MACHINE },
> { },
> },
> diff --git a/hw/arm/imx25_pdk.c b/hw/arm/imx25_pdk.c
> index da8479ca608..669e126bfc9 100644
> --- a/hw/arm/imx25_pdk.c
> +++ b/hw/arm/imx25_pdk.c
> @@ -158,6 +158,7 @@ static const TypeInfo imx25_machine_types[] = {
> .parent = TYPE_MACHINE,
> .class_init = imx25_pdk_machine_class_init,
> .interfaces = (InterfaceInfo[]) {
> + { TYPE_TARGET_ARM_MACHINE },
> { TYPE_TARGET_AARCH64_MACHINE },
> { },
> },
> diff --git a/hw/arm/integratorcp.c b/hw/arm/integratorcp.c
> index 5599cf60707..d982df8fe45 100644
> --- a/hw/arm/integratorcp.c
> +++ b/hw/arm/integratorcp.c
> @@ -761,6 +761,7 @@ static const TypeInfo integratorcp_machine_types[] = {
> .parent = TYPE_MACHINE,
> .class_init = integratorcp_machine_class_init,
> .interfaces = (InterfaceInfo[]) {
> + { TYPE_TARGET_ARM_MACHINE },
> { TYPE_TARGET_AARCH64_MACHINE },
> { },
> },
> diff --git a/hw/arm/kzm.c b/hw/arm/kzm.c
> index 208546205be..b2d7a312581 100644
> --- a/hw/arm/kzm.c
> +++ b/hw/arm/kzm.c
> @@ -147,6 +147,7 @@ static const TypeInfo kzm_machine_types[] = {
> .parent = TYPE_MACHINE,
> .class_init = kzm_machine_class_init,
> .interfaces = (InterfaceInfo[]) {
> + { TYPE_TARGET_ARM_MACHINE },
> { TYPE_TARGET_AARCH64_MACHINE },
> { },
> },
> diff --git a/hw/arm/mcimx6ul-evk.c b/hw/arm/mcimx6ul-evk.c
> index 65e6134862e..2cf124ca2b5 100644
> --- a/hw/arm/mcimx6ul-evk.c
> +++ b/hw/arm/mcimx6ul-evk.c
> @@ -85,6 +85,7 @@ static const TypeInfo imx6_machine_types[] = {
> .parent = TYPE_MACHINE,
> .class_init = mcimx6ul_evk_machine_class_init,
> .interfaces = (InterfaceInfo[]) {
> + { TYPE_TARGET_ARM_MACHINE },
> { TYPE_TARGET_AARCH64_MACHINE },
> { },
> },
> diff --git a/hw/arm/mcimx7d-sabre.c b/hw/arm/mcimx7d-sabre.c
> index 1f88dc03915..1a8d3e453cd 100644
> --- a/hw/arm/mcimx7d-sabre.c
> +++ b/hw/arm/mcimx7d-sabre.c
> @@ -85,6 +85,7 @@ static const TypeInfo imx7_machine_types[] = {
> .parent = TYPE_MACHINE,
> .class_init = mcimx7d_sabre_machine_class_init,
> .interfaces = (InterfaceInfo[]) {
> + { TYPE_TARGET_ARM_MACHINE },
> { TYPE_TARGET_AARCH64_MACHINE },
> { },
> },
> diff --git a/hw/arm/microbit.c b/hw/arm/microbit.c
> index e537735e247..ad4fe9febd0 100644
> --- a/hw/arm/microbit.c
> +++ b/hw/arm/microbit.c
> @@ -75,6 +75,7 @@ static const TypeInfo microbit_info = {
> .instance_size = sizeof(MicrobitMachineState),
> .class_init = microbit_machine_class_init,
> .interfaces = (InterfaceInfo[]) {
> + { TYPE_TARGET_ARM_MACHINE },
> { TYPE_TARGET_AARCH64_MACHINE },
> { },
> },
> diff --git a/hw/arm/mps2-tz.c b/hw/arm/mps2-tz.c
> index 6cd36ee4037..0676102612d 100644
> --- a/hw/arm/mps2-tz.c
> +++ b/hw/arm/mps2-tz.c
> @@ -1464,6 +1464,7 @@ static const TypeInfo mps2tz_an505_info = {
> .parent = TYPE_MPS2TZ_MACHINE,
> .class_init = mps2tz_an505_class_init,
> .interfaces = (InterfaceInfo[]) {
> + { TYPE_TARGET_ARM_MACHINE },
> { TYPE_TARGET_AARCH64_MACHINE },
> { },
> },
> @@ -1474,6 +1475,7 @@ static const TypeInfo mps2tz_an521_info = {
> .parent = TYPE_MPS2TZ_MACHINE,
> .class_init = mps2tz_an521_class_init,
> .interfaces = (InterfaceInfo[]) {
> + { TYPE_TARGET_ARM_MACHINE },
> { TYPE_TARGET_AARCH64_MACHINE },
> { },
> },
> @@ -1484,6 +1486,7 @@ static const TypeInfo mps3tz_an524_info = {
> .parent = TYPE_MPS2TZ_MACHINE,
> .class_init = mps3tz_an524_class_init,
> .interfaces = (InterfaceInfo[]) {
> + { TYPE_TARGET_ARM_MACHINE },
> { TYPE_TARGET_AARCH64_MACHINE },
> { },
> },
> @@ -1494,6 +1497,7 @@ static const TypeInfo mps3tz_an547_info = {
> .parent = TYPE_MPS2TZ_MACHINE,
> .class_init = mps3tz_an547_class_init,
> .interfaces = (InterfaceInfo[]) {
> + { TYPE_TARGET_ARM_MACHINE },
> { TYPE_TARGET_AARCH64_MACHINE },
> { },
> },
> diff --git a/hw/arm/mps2.c b/hw/arm/mps2.c
> index 709d7d0a08e..e61566a0316 100644
> --- a/hw/arm/mps2.c
> +++ b/hw/arm/mps2.c
> @@ -564,6 +564,7 @@ static const TypeInfo mps2_an385_info = {
> .parent = TYPE_MPS2_MACHINE,
> .class_init = mps2_an385_class_init,
> .interfaces = (InterfaceInfo[]) {
> + { TYPE_TARGET_ARM_MACHINE },
> { TYPE_TARGET_AARCH64_MACHINE },
> { },
> },
> @@ -574,6 +575,7 @@ static const TypeInfo mps2_an386_info = {
> .parent = TYPE_MPS2_MACHINE,
> .class_init = mps2_an386_class_init,
> .interfaces = (InterfaceInfo[]) {
> + { TYPE_TARGET_ARM_MACHINE },
> { TYPE_TARGET_AARCH64_MACHINE },
> { },
> },
> @@ -584,6 +586,7 @@ static const TypeInfo mps2_an500_info = {
> .parent = TYPE_MPS2_MACHINE,
> .class_init = mps2_an500_class_init,
> .interfaces = (InterfaceInfo[]) {
> + { TYPE_TARGET_ARM_MACHINE },
> { TYPE_TARGET_AARCH64_MACHINE },
> { },
> },
> @@ -594,6 +597,7 @@ static const TypeInfo mps2_an511_info = {
> .parent = TYPE_MPS2_MACHINE,
> .class_init = mps2_an511_class_init,
> .interfaces = (InterfaceInfo[]) {
> + { TYPE_TARGET_ARM_MACHINE },
> { TYPE_TARGET_AARCH64_MACHINE },
> { },
> },
> diff --git a/hw/arm/mps3r.c b/hw/arm/mps3r.c
> index d1a72c7775b..16e4deec7b3 100644
> --- a/hw/arm/mps3r.c
> +++ b/hw/arm/mps3r.c
> @@ -635,6 +635,7 @@ static const TypeInfo mps3r_machine_types[] = {
> .parent = TYPE_MPS3R_MACHINE,
> .class_init = mps3r_an536_class_init,
> .interfaces = (InterfaceInfo[]) {
> + { TYPE_TARGET_ARM_MACHINE },
> { TYPE_TARGET_AARCH64_MACHINE },
> { },
> },
> diff --git a/hw/arm/msf2-som.c b/hw/arm/msf2-som.c
> index 11988b6aa6d..c0feff92fbd 100644
> --- a/hw/arm/msf2-som.c
> +++ b/hw/arm/msf2-som.c
> @@ -115,6 +115,7 @@ static const TypeInfo msf2_machine_types[] = {
> .parent = TYPE_MACHINE,
> .class_init = emcraft_sf2_machine_class_init,
> .interfaces = (InterfaceInfo[]) {
> + { TYPE_TARGET_ARM_MACHINE },
> { TYPE_TARGET_AARCH64_MACHINE },
> { },
> },
> diff --git a/hw/arm/musca.c b/hw/arm/musca.c
> index 3a11b3d1cd6..e5e9950d008 100644
> --- a/hw/arm/musca.c
> +++ b/hw/arm/musca.c
> @@ -658,6 +658,7 @@ static const TypeInfo musca_a_info = {
> .parent = TYPE_MUSCA_MACHINE,
> .class_init = musca_a_class_init,
> .interfaces = (InterfaceInfo[]) {
> + { TYPE_TARGET_ARM_MACHINE },
> { TYPE_TARGET_AARCH64_MACHINE },
> { },
> },
> @@ -668,6 +669,7 @@ static const TypeInfo musca_b1_info = {
> .parent = TYPE_MUSCA_MACHINE,
> .class_init = musca_b1_class_init,
> .interfaces = (InterfaceInfo[]) {
> + { TYPE_TARGET_ARM_MACHINE },
> { TYPE_TARGET_AARCH64_MACHINE },
> { },
> },
> diff --git a/hw/arm/musicpal.c b/hw/arm/musicpal.c
> index 9cf8eec8b13..cb352512807 100644
> --- a/hw/arm/musicpal.c
> +++ b/hw/arm/musicpal.c
> @@ -1382,6 +1382,7 @@ static const TypeInfo musicpal_types[] = {
> .parent = TYPE_MACHINE,
> .class_init = musicpal_machine_class_init,
> .interfaces = (InterfaceInfo[]) {
> + { TYPE_TARGET_ARM_MACHINE },
> { TYPE_TARGET_AARCH64_MACHINE },
> { },
> },
> diff --git a/hw/arm/netduino2.c b/hw/arm/netduino2.c
> index e6e140ed6bf..9443b5615e5 100644
> --- a/hw/arm/netduino2.c
> +++ b/hw/arm/netduino2.c
> @@ -72,6 +72,7 @@ static const TypeInfo netduino_machine_types[] = {
> .parent = TYPE_MACHINE,
> .class_init = netduino2_machine_class_init,
> .interfaces = (InterfaceInfo[]) {
> + { TYPE_TARGET_ARM_MACHINE },
> { TYPE_TARGET_AARCH64_MACHINE },
> { },
> },
> diff --git a/hw/arm/netduinoplus2.c b/hw/arm/netduinoplus2.c
> index b54e990b5bd..2003b43ad10 100644
> --- a/hw/arm/netduinoplus2.c
> +++ b/hw/arm/netduinoplus2.c
> @@ -72,6 +72,7 @@ static const TypeInfo netduino_machine_types[] = {
> .parent = TYPE_MACHINE,
> .class_init = netduinoplus2_machine_class_init,
> .interfaces = (InterfaceInfo[]) {
> + { TYPE_TARGET_ARM_MACHINE },
> { TYPE_TARGET_AARCH64_MACHINE },
> { },
> },
> diff --git a/hw/arm/npcm7xx_boards.c b/hw/arm/npcm7xx_boards.c
> index 4d2c52f3422..6189509a3f9 100644
> --- a/hw/arm/npcm7xx_boards.c
> +++ b/hw/arm/npcm7xx_boards.c
> @@ -550,6 +550,7 @@ static const TypeInfo npcm7xx_machine_types[] = {
> .parent = TYPE_NPCM7XX_MACHINE,
> .class_init = npcm750_evb_machine_class_init,
> .interfaces = (InterfaceInfo[]) {
> + { TYPE_TARGET_ARM_MACHINE },
> { TYPE_TARGET_AARCH64_MACHINE },
> { },
> },
> @@ -558,6 +559,7 @@ static const TypeInfo npcm7xx_machine_types[] = {
> .parent = TYPE_NPCM7XX_MACHINE,
> .class_init = gsj_machine_class_init,
> .interfaces = (InterfaceInfo[]) {
> + { TYPE_TARGET_ARM_MACHINE },
> { TYPE_TARGET_AARCH64_MACHINE },
> { },
> },
> @@ -566,6 +568,7 @@ static const TypeInfo npcm7xx_machine_types[] = {
> .parent = TYPE_NPCM7XX_MACHINE,
> .class_init = gbs_bmc_machine_class_init,
> .interfaces = (InterfaceInfo[]) {
> + { TYPE_TARGET_ARM_MACHINE },
> { TYPE_TARGET_AARCH64_MACHINE },
> { },
> },
> @@ -574,6 +577,7 @@ static const TypeInfo npcm7xx_machine_types[] = {
> .parent = TYPE_NPCM7XX_MACHINE,
> .class_init = kudo_bmc_machine_class_init,
> .interfaces = (InterfaceInfo[]) {
> + { TYPE_TARGET_ARM_MACHINE },
> { TYPE_TARGET_AARCH64_MACHINE },
> { },
> },
> @@ -582,6 +586,7 @@ static const TypeInfo npcm7xx_machine_types[] = {
> .parent = TYPE_NPCM7XX_MACHINE,
> .class_init = mori_bmc_machine_class_init,
> .interfaces = (InterfaceInfo[]) {
> + { TYPE_TARGET_ARM_MACHINE },
> { TYPE_TARGET_AARCH64_MACHINE },
> { },
> },
> diff --git a/hw/arm/olimex-stm32-h405.c b/hw/arm/olimex-stm32-h405.c
> index 4344bef4db1..9ff1239a127 100644
> --- a/hw/arm/olimex-stm32-h405.c
> +++ b/hw/arm/olimex-stm32-h405.c
> @@ -78,6 +78,7 @@ static const TypeInfo olimex_stm32_machine_types[] = {
> .parent = TYPE_MACHINE,
> .class_init = olimex_stm32_machine_class_init,
> .interfaces = (InterfaceInfo[]) {
> + { TYPE_TARGET_ARM_MACHINE },
> { TYPE_TARGET_AARCH64_MACHINE },
> { },
> },
> diff --git a/hw/arm/omap_sx1.c b/hw/arm/omap_sx1.c
> index 9f90f95b9ee..a4b65d1b623 100644
> --- a/hw/arm/omap_sx1.c
> +++ b/hw/arm/omap_sx1.c
> @@ -220,6 +220,7 @@ static const TypeInfo sx1_machine_v2_type = {
> .parent = TYPE_MACHINE,
> .class_init = sx1_machine_v2_class_init,
> .interfaces = (InterfaceInfo[]) {
> + { TYPE_TARGET_ARM_MACHINE },
> { TYPE_TARGET_AARCH64_MACHINE },
> { },
> },
> @@ -243,6 +244,7 @@ static const TypeInfo sx1_machine_v1_type = {
> .parent = TYPE_MACHINE,
> .class_init = sx1_machine_v1_class_init,
> .interfaces = (InterfaceInfo[]) {
> + { TYPE_TARGET_ARM_MACHINE },
> { TYPE_TARGET_AARCH64_MACHINE },
> { },
> },
> diff --git a/hw/arm/orangepi.c b/hw/arm/orangepi.c
> index f539b2fc3a4..bbd9082cff1 100644
> --- a/hw/arm/orangepi.c
> +++ b/hw/arm/orangepi.c
> @@ -131,6 +131,7 @@ static const TypeInfo orangepi_machine_types[] = {
> .parent = TYPE_MACHINE,
> .class_init = orangepi_machine_class_init,
> .interfaces = (InterfaceInfo[]) {
> + { TYPE_TARGET_ARM_MACHINE },
> { TYPE_TARGET_AARCH64_MACHINE },
> { },
> },
> diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c
> index b8b947bc29e..8a2da650087 100644
> --- a/hw/arm/raspi.c
> +++ b/hw/arm/raspi.c
> @@ -395,6 +395,7 @@ static const TypeInfo raspi_machine_types[] = {
> .parent = TYPE_RASPI_MACHINE,
> .class_init = raspi0_machine_class_init,
> .interfaces = (InterfaceInfo[]) {
> + { TYPE_TARGET_ARM_MACHINE },
> { TYPE_TARGET_AARCH64_MACHINE },
> { },
> },
> @@ -403,6 +404,7 @@ static const TypeInfo raspi_machine_types[] = {
> .parent = TYPE_RASPI_MACHINE,
> .class_init = raspi1ap_machine_class_init,
> .interfaces = (InterfaceInfo[]) {
> + { TYPE_TARGET_ARM_MACHINE },
> { TYPE_TARGET_AARCH64_MACHINE },
> { },
> },
> @@ -411,6 +413,7 @@ static const TypeInfo raspi_machine_types[] = {
> .parent = TYPE_RASPI_MACHINE,
> .class_init = raspi2b_machine_class_init,
> .interfaces = (InterfaceInfo[]) {
> + { TYPE_TARGET_ARM_MACHINE },
> { TYPE_TARGET_AARCH64_MACHINE },
> { },
> },
> diff --git a/hw/arm/realview.c b/hw/arm/realview.c
> index 2ccee583117..c925d1483f6 100644
> --- a/hw/arm/realview.c
> +++ b/hw/arm/realview.c
> @@ -432,6 +432,7 @@ static const TypeInfo realview_eb_type = {
> .parent = TYPE_MACHINE,
> .class_init = realview_eb_class_init,
> .interfaces = (InterfaceInfo[]) {
> + { TYPE_TARGET_ARM_MACHINE },
> { TYPE_TARGET_AARCH64_MACHINE },
> { },
> },
> @@ -457,6 +458,7 @@ static const TypeInfo realview_eb_mpcore_type = {
> .parent = TYPE_MACHINE,
> .class_init = realview_eb_mpcore_class_init,
> .interfaces = (InterfaceInfo[]) {
> + { TYPE_TARGET_ARM_MACHINE },
> { TYPE_TARGET_AARCH64_MACHINE },
> { },
> },
> @@ -480,6 +482,7 @@ static const TypeInfo realview_pb_a8_type = {
> .parent = TYPE_MACHINE,
> .class_init = realview_pb_a8_class_init,
> .interfaces = (InterfaceInfo[]) {
> + { TYPE_TARGET_ARM_MACHINE },
> { TYPE_TARGET_AARCH64_MACHINE },
> { },
> },
> @@ -504,6 +507,7 @@ static const TypeInfo realview_pbx_a9_type = {
> .parent = TYPE_MACHINE,
> .class_init = realview_pbx_a9_class_init,
> .interfaces = (InterfaceInfo[]) {
> + { TYPE_TARGET_ARM_MACHINE },
> { TYPE_TARGET_AARCH64_MACHINE },
> { },
> },
> diff --git a/hw/arm/sabrelite.c b/hw/arm/sabrelite.c
> index a4c1dd7edc1..1bd82c404af 100644
> --- a/hw/arm/sabrelite.c
> +++ b/hw/arm/sabrelite.c
> @@ -121,6 +121,7 @@ static const TypeInfo sabrelite_machine_types[] = {
> .parent = TYPE_MACHINE,
> .class_init = sabrelite_machine_class_init,
> .interfaces = (InterfaceInfo[]) {
> + { TYPE_TARGET_ARM_MACHINE },
> { TYPE_TARGET_AARCH64_MACHINE },
> { },
> },
> diff --git a/hw/arm/stellaris.c b/hw/arm/stellaris.c
> index 1e696e25c42..2cb93a6d3af 100644
> --- a/hw/arm/stellaris.c
> +++ b/hw/arm/stellaris.c
> @@ -1428,6 +1428,7 @@ static const TypeInfo lm3s811evb_type = {
> .parent = TYPE_MACHINE,
> .class_init = lm3s811evb_class_init,
> .interfaces = (InterfaceInfo[]) {
> + { TYPE_TARGET_ARM_MACHINE },
> { TYPE_TARGET_AARCH64_MACHINE },
> { },
> },
> @@ -1453,6 +1454,7 @@ static const TypeInfo lm3s6965evb_type = {
> .parent = TYPE_MACHINE,
> .class_init = lm3s6965evb_class_init,
> .interfaces = (InterfaceInfo[]) {
> + { TYPE_TARGET_ARM_MACHINE },
> { TYPE_TARGET_AARCH64_MACHINE },
> { },
> },
> diff --git a/hw/arm/stm32vldiscovery.c b/hw/arm/stm32vldiscovery.c
> index 7c267fd880b..f0881b3c8ea 100644
> --- a/hw/arm/stm32vldiscovery.c
> +++ b/hw/arm/stm32vldiscovery.c
> @@ -75,6 +75,7 @@ static const TypeInfo stm32vldiscovery_machine_types[] = {
> .parent = TYPE_MACHINE,
> .class_init = stm32vldiscovery_machine_class_init,
> .interfaces = (InterfaceInfo[]) {
> + { TYPE_TARGET_ARM_MACHINE },
> { TYPE_TARGET_AARCH64_MACHINE },
> { },
> },
> diff --git a/hw/arm/versatilepb.c b/hw/arm/versatilepb.c
> index 4c71a73b3b1..e353ef025d9 100644
> --- a/hw/arm/versatilepb.c
> +++ b/hw/arm/versatilepb.c
> @@ -432,6 +432,7 @@ static const TypeInfo versatilepb_type = {
> .parent = TYPE_MACHINE,
> .class_init = versatilepb_class_init,
> .interfaces = (InterfaceInfo[]) {
> + { TYPE_TARGET_ARM_MACHINE },
> { TYPE_TARGET_AARCH64_MACHINE },
> { },
> },
> @@ -457,6 +458,7 @@ static const TypeInfo versatileab_type = {
> .parent = TYPE_MACHINE,
> .class_init = versatileab_class_init,
> .interfaces = (InterfaceInfo[]) {
> + { TYPE_TARGET_ARM_MACHINE },
> { TYPE_TARGET_AARCH64_MACHINE },
> { },
> },
> diff --git a/hw/arm/vexpress.c b/hw/arm/vexpress.c
> index fad4a9b8cfa..aade41d0317 100644
> --- a/hw/arm/vexpress.c
> +++ b/hw/arm/vexpress.c
> @@ -851,6 +851,7 @@ static const TypeInfo vexpress_a9_info = {
> .class_init = vexpress_a9_class_init,
> .instance_init = vexpress_a9_instance_init,
> .interfaces = (InterfaceInfo[]) {
> + { TYPE_TARGET_ARM_MACHINE },
> { TYPE_TARGET_AARCH64_MACHINE },
> { },
> },
> @@ -862,6 +863,7 @@ static const TypeInfo vexpress_a15_info = {
> .class_init = vexpress_a15_class_init,
> .instance_init = vexpress_a15_instance_init,
> .interfaces = (InterfaceInfo[]) {
> + { TYPE_TARGET_ARM_MACHINE },
> { TYPE_TARGET_AARCH64_MACHINE },
> { },
> },
> diff --git a/hw/arm/virt.c b/hw/arm/virt.c
> index 41918eb760b..b2534a3c43e 100644
> --- a/hw/arm/virt.c
> +++ b/hw/arm/virt.c
> @@ -124,6 +124,7 @@ static void arm_virt_compat_set(MachineClass *mc)
> .parent = TYPE_VIRT_MACHINE, \
> .class_init = MACHINE_VER_SYM(class_init, virt, __VA_ARGS__), \
> .interfaces = (InterfaceInfo[]) { \
> + { TYPE_TARGET_ARM_MACHINE }, \
> { TYPE_TARGET_AARCH64_MACHINE }, \
> { }, \
> }, \
> diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c
> index efcbddffda0..e8f43e193c0 100644
> --- a/hw/arm/xilinx_zynq.c
> +++ b/hw/arm/xilinx_zynq.c
> @@ -481,6 +481,7 @@ static const TypeInfo zynq_machine_type = {
> .class_init = zynq_machine_class_init,
> .instance_size = sizeof(ZynqMachineState),
> .interfaces = (InterfaceInfo[]) {
> + { TYPE_TARGET_ARM_MACHINE },
> { TYPE_TARGET_AARCH64_MACHINE },
> { },
> },
This can be squashed with previous commit.
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
^ permalink raw reply [flat|nested] 36+ messages in thread
* Re: [RFC PATCH v2 07/11] hw/core: Allow ARM/Aarch64 binaries to use the 'none' machine
2025-04-18 0:50 ` [RFC PATCH v2 07/11] hw/core: Allow ARM/Aarch64 binaries to use the 'none' machine Philippe Mathieu-Daudé
@ 2025-04-18 3:32 ` Pierrick Bouvier
0 siblings, 0 replies; 36+ messages in thread
From: Pierrick Bouvier @ 2025-04-18 3:32 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel
Cc: Anton Johansson, Richard Henderson
On 4/17/25 17:50, Philippe Mathieu-Daudé wrote:
> When we'll start to use target_machine_interface_typename()
> to filter machines for the ARM/Aarch64 binaries, the 'none'
> machine will be filtered out. Register the proper interfaces
> to keep it available.
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
> hw/core/null-machine.c | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/hw/core/null-machine.c b/hw/core/null-machine.c
> index 1ccaf652eb4..614b52dae0d 100644
> --- a/hw/core/null-machine.c
> +++ b/hw/core/null-machine.c
> @@ -62,6 +62,11 @@ static const TypeInfo null_machine_types[] = {
> .name = MACHINE_TYPE_NAME("none"),
> .parent = TYPE_MACHINE,
> .class_init = null_machine_class_init,
> + .interfaces = (InterfaceInfo[]) {
> + { TYPE_TARGET_ARM_MACHINE },
> + { TYPE_TARGET_AARCH64_MACHINE },
> + { },
> + },
> },
> };
>
I see better why those type were defined in a global header.
I would still favor a header in hw/arm, that this file can include (and
other arch later when we'll implement it for them).
^ permalink raw reply [flat|nested] 36+ messages in thread
* Re: [RFC PATCH v2 09/11] config/target: Implement per-binary TargetInfo structure (Aarch64)
2025-04-18 0:50 ` [RFC PATCH v2 09/11] config/target: Implement per-binary TargetInfo structure (Aarch64) Philippe Mathieu-Daudé
@ 2025-04-18 3:34 ` Pierrick Bouvier
0 siblings, 0 replies; 36+ messages in thread
From: Pierrick Bouvier @ 2025-04-18 3:34 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel
Cc: Anton Johansson, Richard Henderson
On 4/17/25 17:50, Philippe Mathieu-Daudé wrote:
> Implement the TargetInfo structure for qemu-system-aarch64 binary.
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
> configs/targets/aarch64-softmmu.c | 22 ++++++++++++++++++++++
> 1 file changed, 22 insertions(+)
> create mode 100644 configs/targets/aarch64-softmmu.c
>
> diff --git a/configs/targets/aarch64-softmmu.c b/configs/targets/aarch64-softmmu.c
> new file mode 100644
> index 00000000000..e48ac264d7d
> --- /dev/null
> +++ b/configs/targets/aarch64-softmmu.c
> @@ -0,0 +1,22 @@
> +/*
> + * QEMU binary/target API (qemu-system-aarch64)
> + *
> + * Copyright (c) Linaro
> + *
> + * SPDX-License-Identifier: GPL-2.0-or-later
> + */
> +
> +#include "qemu/osdep.h"
> +#include "qemu/target_info-impl.h"
> +#include "qemu/target_info-qom.h"
> +#include "cpu-qom.h"
> +
> +static const TargetInfo target_info_aarch64_system = {
> + .name = "aarch64",
> + .machine_typename = TYPE_TARGET_AARCH64_MACHINE,
> +};
> +
> +const TargetInfo *target_info(void)
> +{
> + return &target_info_aarch64_system;
> +}
You can squash this with same thing for arm target, and split meson
change in another commit.
^ permalink raw reply [flat|nested] 36+ messages in thread
* Re: [RFC PATCH v2 08/11] config/target: Implement per-binary TargetInfo structure (ARM)
2025-04-18 0:50 ` [RFC PATCH v2 08/11] config/target: Implement per-binary TargetInfo structure (ARM) Philippe Mathieu-Daudé
@ 2025-04-18 3:39 ` Pierrick Bouvier
2025-04-18 4:02 ` Pierrick Bouvier
1 sibling, 0 replies; 36+ messages in thread
From: Pierrick Bouvier @ 2025-04-18 3:39 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel
Cc: Anton Johansson, Richard Henderson
On 4/17/25 17:50, Philippe Mathieu-Daudé wrote:
> If a file defining the binary TargetInfo structure is available,
> link with it. Otherwise keep using the stub. Implement such
> structure for arm-softmmu.
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
> meson.build | 7 ++++++-
> configs/targets/arm-softmmu.c | 22 ++++++++++++++++++++++
> 2 files changed, 28 insertions(+), 1 deletion(-)
> create mode 100644 configs/targets/arm-softmmu.c
>
> diff --git a/meson.build b/meson.build
> index 168b07b5887..da24cc2ba41 100644
> --- a/meson.build
> +++ b/meson.build
> @@ -3809,7 +3809,6 @@ specific_ss.add(files('page-target.c', 'page-vary-target.c'))
>
> common_ss.add(files('target_info.c'))
> system_ss.add(files('target_info-qom.c'))
> -specific_ss.add(files('target_info-stub.c'))
>
> subdir('backends')
> subdir('disas')
> @@ -4272,6 +4271,12 @@ foreach target : target_dirs
> arch_srcs += gdbstub_xml
> endif
>
> + target_info_c = meson.project_source_root() / 'configs' / 'targets' / target + '.c'
> + if not fs.exists(target_info_c)
> + target_info_c = meson.project_source_root() / 'target_info-stub.c'
> + endif
> + arch_srcs += target_info_c
> +
> t = target_arch[target_base_arch].apply(config_target, strict: false)
> arch_srcs += t.sources()
> arch_deps += t.dependencies()
> diff --git a/configs/targets/arm-softmmu.c b/configs/targets/arm-softmmu.c
> new file mode 100644
> index 00000000000..6263d604f19
> --- /dev/null
> +++ b/configs/targets/arm-softmmu.c
> @@ -0,0 +1,22 @@
> +/*
> + * QEMU binary/target API (qemu-system-arm)
> + *
> + * Copyright (c) Linaro
> + *
> + * SPDX-License-Identifier: GPL-2.0-or-later
> + */
> +
> +#include "qemu/osdep.h"
> +#include "qemu/target_info-impl.h"
> +#include "qemu/target_info-qom.h"
> +#include "cpu-qom.h"
> +
> +static const TargetInfo target_info_arm_system = {
> + .name = "arm",
> + .machine_typename = TYPE_TARGET_ARM_MACHINE,
> +};
> +
> +const TargetInfo *target_info(void)
> +{
> + return &target_info_arm_system;
> +}
You can extract this from this commit, and squash with aarch64 target.
I think it's a good idea to store this in configs/targets.
^ permalink raw reply [flat|nested] 36+ messages in thread
* Re: [RFC PATCH v2 08/11] config/target: Implement per-binary TargetInfo structure (ARM)
2025-04-18 0:50 ` [RFC PATCH v2 08/11] config/target: Implement per-binary TargetInfo structure (ARM) Philippe Mathieu-Daudé
2025-04-18 3:39 ` Pierrick Bouvier
@ 2025-04-18 4:02 ` Pierrick Bouvier
2025-04-18 11:20 ` Philippe Mathieu-Daudé
1 sibling, 1 reply; 36+ messages in thread
From: Pierrick Bouvier @ 2025-04-18 4:02 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel
Cc: Anton Johansson, Richard Henderson
On 4/17/25 17:50, Philippe Mathieu-Daudé wrote:
> If a file defining the binary TargetInfo structure is available,
> link with it. Otherwise keep using the stub. Implement such
> structure for arm-softmmu.
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
> meson.build | 7 ++++++-
> configs/targets/arm-softmmu.c | 22 ++++++++++++++++++++++
> 2 files changed, 28 insertions(+), 1 deletion(-)
> create mode 100644 configs/targets/arm-softmmu.c
>
> diff --git a/meson.build b/meson.build
> index 168b07b5887..da24cc2ba41 100644
> --- a/meson.build
> +++ b/meson.build
> @@ -3809,7 +3809,6 @@ specific_ss.add(files('page-target.c', 'page-vary-target.c'))
>
> common_ss.add(files('target_info.c'))
> system_ss.add(files('target_info-qom.c'))
> -specific_ss.add(files('target_info-stub.c'))
>
> subdir('backends')
> subdir('disas')
> @@ -4272,6 +4271,12 @@ foreach target : target_dirs
> arch_srcs += gdbstub_xml
> endif
>
> + target_info_c = meson.project_source_root() / 'configs' / 'targets' / target + '.c'
> + if not fs.exists(target_info_c)
> + target_info_c = meson.project_source_root() / 'target_info-stub.c'
> + endif
> + arch_srcs += target_info_c
> +
> t = target_arch[target_base_arch].apply(config_target, strict: false)
> arch_srcs += t.sources()
> arch_deps += t.dependencies()
While this works, it would be better with a dictionary, so it follows
the style of existing meson.build.
As well, two advantages:
- we can move configs somewhere else in case we decide to split them in
every folder later
- We avoid calling fs.exists for every target, but it should not really
change anything to configure step time.
---
diff --git a/meson.build b/meson.build
index 81afa63853e..7fca3c5c4dc 100644
--- a/meson.build
+++ b/meson.build
@@ -3228,6 +3228,7 @@ config_devices_mak_list = []
config_devices_h = {}
config_target_h = {}
config_target_mak = {}
+target_info = {}
disassemblers = {
'alpha' : ['CONFIG_ALPHA_DIS'],
@@ -3823,9 +3824,9 @@ specific_ss.add(files('page-target.c',
'page-vary-target.c'))
common_ss.add(files('target_info.c'))
system_ss.add(files('target_info-qom.c'))
-specific_ss.add(files('target_info-stub.c'))
subdir('backends')
+subdir('configs/targets')
subdir('disas')
subdir('migration')
subdir('monitor')
@@ -4286,6 +4287,12 @@ foreach target : target_dirs
arch_srcs += gdbstub_xml
endif
+ if target in target_info
+ arch_srcs += target_info[target]
+ else
+ arch_srcs += files('target_info-stub.c')
+ endif
+
t = target_arch[target_base_arch].apply(config_target, strict: false)
arch_srcs += t.sources()
arch_deps += t.dependencies()
diff --git a/configs/targets/meson.build b/configs/targets/meson.build
new file mode 100644
index 00000000000..140386e932c
--- /dev/null
+++ b/configs/targets/meson.build
@@ -0,0 +1,3 @@
+foreach target : ['arm-softmmu', 'aarch64-softmmu']
+ target_info += {target : files(target + '.c')}
+endforeach
^ permalink raw reply related [flat|nested] 36+ messages in thread
* Re: [RFC PATCH v2 10/11] hw/arm/aspeed: Build objects once
2025-04-18 0:50 ` [RFC PATCH v2 10/11] hw/arm/aspeed: Build objects once Philippe Mathieu-Daudé
@ 2025-04-18 4:02 ` Pierrick Bouvier
0 siblings, 0 replies; 36+ messages in thread
From: Pierrick Bouvier @ 2025-04-18 4:02 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel
Cc: Anton Johansson, Richard Henderson
On 4/17/25 17:50, Philippe Mathieu-Daudé wrote:
> Now than Aspeed machines can be filtered when running a
> qemu-system-arm or qemu-system-aarch64 binary, we can
> remove the TARGET_AARCH64 #ifdef'ry and compile the
> aspeed.c file once, moving it from arm_ss[] source set
> to arm_common_ss[].
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
> hw/arm/aspeed.c | 6 ------
> hw/arm/meson.build | 4 ++--
> 2 files changed, 2 insertions(+), 8 deletions(-)
>
> diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
> index d54ee2d4b53..363be2daf60 100644
> --- a/hw/arm/aspeed.c
> +++ b/hw/arm/aspeed.c
> @@ -179,13 +179,11 @@ struct AspeedMachineState {
> #define AST2600_EVB_HW_STRAP1 0x000000C0
> #define AST2600_EVB_HW_STRAP2 0x00000003
>
> -#ifdef TARGET_AARCH64
> /* AST2700 evb hardware value */
> /* SCU HW Strap1 */
> #define AST2700_EVB_HW_STRAP1 0x00000800
> /* SCUIO HW Strap1 */
> #define AST2700_EVB_HW_STRAP2 0x00000700
> -#endif
>
> /* Rainier hardware value: (QEMU prototype) */
> #define RAINIER_BMC_HW_STRAP1 (0x00422016 | SCU_AST2600_HW_STRAP_BOOT_SRC_EMMC)
> @@ -1663,7 +1661,6 @@ static void aspeed_minibmc_machine_ast1030_evb_class_init(ObjectClass *oc,
> aspeed_machine_class_init_cpus_defaults(mc);
> }
>
> -#ifdef TARGET_AARCH64
> static void ast2700_evb_i2c_init(AspeedMachineState *bmc)
> {
> AspeedSoCState *soc = bmc->soc;
> @@ -1713,7 +1710,6 @@ static void aspeed_machine_ast2700a1_evb_class_init(ObjectClass *oc, void *data)
> mc->default_ram_size = 1 * GiB;
> aspeed_machine_class_init_cpus_defaults(mc);
> }
> -#endif
>
> static void aspeed_machine_qcom_dc_scm_v1_class_init(ObjectClass *oc,
> void *data)
> @@ -1936,7 +1932,6 @@ static const TypeInfo aspeed_machine_types[] = {
> { TYPE_TARGET_AARCH64_MACHINE },
> { },
> },
> -#ifdef TARGET_AARCH64
> }, {
> .name = MACHINE_TYPE_NAME("ast2700a0-evb"),
> .parent = TYPE_ASPEED_MACHINE,
> @@ -1953,7 +1948,6 @@ static const TypeInfo aspeed_machine_types[] = {
> { TYPE_TARGET_AARCH64_MACHINE },
> { },
> },
> -#endif
> }, {
> .name = TYPE_ASPEED_MACHINE,
> .parent = TYPE_MACHINE,
> diff --git a/hw/arm/meson.build b/hw/arm/meson.build
> index 09b1cfe5b57..f76e7fb229f 100644
> --- a/hw/arm/meson.build
> +++ b/hw/arm/meson.build
> @@ -39,15 +39,15 @@ arm_common_ss.add(when: 'CONFIG_XLNX_VERSAL', if_true: files('xlnx-versal.c', 'x
> arm_common_ss.add(when: 'CONFIG_FSL_IMX25', if_true: files('fsl-imx25.c', 'imx25_pdk.c'))
> arm_common_ss.add(when: 'CONFIG_FSL_IMX31', if_true: files('fsl-imx31.c', 'kzm.c'))
> arm_common_ss.add(when: 'CONFIG_FSL_IMX6', if_true: files('fsl-imx6.c'))
> -arm_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files(
> +arm_common_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files(
> 'aspeed.c',
> 'aspeed_soc_common.c',
> 'aspeed_ast2400.c',
> 'aspeed_ast2600.c',
> 'aspeed_ast10x0.c',
> + 'aspeed_ast27x0.c',
> 'aspeed_eeprom.c',
> 'fby35.c'))
> -arm_common_ss.add(when: ['CONFIG_ASPEED_SOC', 'TARGET_AARCH64'], if_true: files('aspeed_ast27x0.c'))
> arm_common_ss.add(when: 'CONFIG_MPS2', if_true: files('mps2.c'))
> arm_common_ss.add(when: 'CONFIG_MPS2', if_true: files('mps2-tz.c'))
> arm_common_ss.add(when: 'CONFIG_MSF2', if_true: files('msf2-soc.c'))
Hurrah!
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
^ permalink raw reply [flat|nested] 36+ messages in thread
* Re: [RFC PATCH v2 11/11] hw/arm/raspi: Build objects once
2025-04-18 0:50 ` [RFC PATCH v2 11/11] hw/arm/raspi: " Philippe Mathieu-Daudé
@ 2025-04-18 4:03 ` Pierrick Bouvier
0 siblings, 0 replies; 36+ messages in thread
From: Pierrick Bouvier @ 2025-04-18 4:03 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel
Cc: Anton Johansson, Richard Henderson
On 4/17/25 17:50, Philippe Mathieu-Daudé wrote:
> Now than Raspi machines can be filtered when running a
> qemu-system-arm or qemu-system-aarch64 binary, we can
> remove the TARGET_AARCH64 #ifdef'ry and compile the
> aspeed.c file once, moving it from arm_ss[] source set
> to arm_common_ss[]. Note, we expose the TYPE_BCM2837
> type to qemu-system-arm, but it is not user-creatable,
> so not an issue.
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
> hw/arm/bcm2836.c | 4 ----
> hw/arm/raspi.c | 4 ----
> hw/arm/meson.build | 8 ++++++--
> 3 files changed, 6 insertions(+), 10 deletions(-)
>
> diff --git a/hw/arm/bcm2836.c b/hw/arm/bcm2836.c
> index 95e16806fa1..7dd81e8e0f9 100644
> --- a/hw/arm/bcm2836.c
> +++ b/hw/arm/bcm2836.c
> @@ -195,7 +195,6 @@ static void bcm2836_class_init(ObjectClass *oc, void *data)
> dc->realize = bcm2836_realize;
> };
>
> -#ifdef TARGET_AARCH64
> static void bcm2837_class_init(ObjectClass *oc, void *data)
> {
> DeviceClass *dc = DEVICE_CLASS(oc);
> @@ -208,7 +207,6 @@ static void bcm2837_class_init(ObjectClass *oc, void *data)
> bc->clusterid = 0x0;
> dc->realize = bcm2836_realize;
> };
> -#endif
>
> static const TypeInfo bcm283x_types[] = {
> {
> @@ -219,12 +217,10 @@ static const TypeInfo bcm283x_types[] = {
> .name = TYPE_BCM2836,
> .parent = TYPE_BCM283X,
> .class_init = bcm2836_class_init,
> -#ifdef TARGET_AARCH64
> }, {
> .name = TYPE_BCM2837,
> .parent = TYPE_BCM283X,
> .class_init = bcm2837_class_init,
> -#endif
> }, {
> .name = TYPE_BCM283X,
> .parent = TYPE_BCM283X_BASE,
> diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c
> index 8a2da650087..980e4a14793 100644
> --- a/hw/arm/raspi.c
> +++ b/hw/arm/raspi.c
> @@ -367,7 +367,6 @@ static void raspi2b_machine_class_init(ObjectClass *oc, void *data)
> raspi_machine_class_init(mc, rmc->board_rev);
> };
>
> -#ifdef TARGET_AARCH64
> static void raspi3ap_machine_class_init(ObjectClass *oc, void *data)
> {
> MachineClass *mc = MACHINE_CLASS(oc);
> @@ -387,7 +386,6 @@ static void raspi3b_machine_class_init(ObjectClass *oc, void *data)
> rmc->board_rev = 0xa02082;
> raspi_machine_class_init(mc, rmc->board_rev);
> };
> -#endif /* TARGET_AARCH64 */
>
> static const TypeInfo raspi_machine_types[] = {
> {
> @@ -417,7 +415,6 @@ static const TypeInfo raspi_machine_types[] = {
> { TYPE_TARGET_AARCH64_MACHINE },
> { },
> },
> -#ifdef TARGET_AARCH64
> }, {
> .name = MACHINE_TYPE_NAME("raspi3ap"),
> .parent = TYPE_RASPI_MACHINE,
> @@ -434,7 +431,6 @@ static const TypeInfo raspi_machine_types[] = {
> { TYPE_TARGET_AARCH64_MACHINE },
> { },
> },
> -#endif
> }, {
> .name = TYPE_RASPI_MACHINE,
> .parent = TYPE_RASPI_BASE_MACHINE,
> diff --git a/hw/arm/meson.build b/hw/arm/meson.build
> index f76e7fb229f..f52034ff6a2 100644
> --- a/hw/arm/meson.build
> +++ b/hw/arm/meson.build
> @@ -27,8 +27,12 @@ arm_common_ss.add(when: 'CONFIG_OMAP', if_true: files('omap1.c'))
> arm_common_ss.add(when: 'CONFIG_ALLWINNER_A10', if_true: files('allwinner-a10.c', 'cubieboard.c'))
> arm_common_ss.add(when: 'CONFIG_ALLWINNER_H3', if_true: files('allwinner-h3.c', 'orangepi.c'))
> arm_common_ss.add(when: 'CONFIG_ALLWINNER_R40', if_true: files('allwinner-r40.c', 'bananapi_m2u.c'))
> -arm_ss.add(when: 'CONFIG_RASPI', if_true: files('bcm2836.c', 'raspi.c'))
> -arm_common_ss.add(when: ['CONFIG_RASPI', 'TARGET_AARCH64'], if_true: files('bcm2838.c', 'raspi4b.c'))
> +arm_common_ss.add(when: 'CONFIG_RASPI', if_true: files(
> + 'bcm2836.c',
> + 'bcm2838.c',
> + 'raspi.c',
> + 'raspi4b.c',
> +))
> arm_common_ss.add(when: 'CONFIG_STM32F100_SOC', if_true: files('stm32f100_soc.c'))
> arm_common_ss.add(when: 'CONFIG_STM32F205_SOC', if_true: files('stm32f205_soc.c'))
> arm_common_ss.add(when: 'CONFIG_STM32F405_SOC', if_true: files('stm32f405_soc.c'))
Great!
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
^ permalink raw reply [flat|nested] 36+ messages in thread
* Re: [RFC PATCH v2 08/11] config/target: Implement per-binary TargetInfo structure (ARM)
2025-04-18 4:02 ` Pierrick Bouvier
@ 2025-04-18 11:20 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 36+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-04-18 11:20 UTC (permalink / raw)
To: Pierrick Bouvier, qemu-devel; +Cc: Anton Johansson, Richard Henderson
On 18/4/25 06:02, Pierrick Bouvier wrote:
> On 4/17/25 17:50, Philippe Mathieu-Daudé wrote:
>> If a file defining the binary TargetInfo structure is available,
>> link with it. Otherwise keep using the stub. Implement such
>> structure for arm-softmmu.
>>
>> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
>> ---
>> meson.build | 7 ++++++-
>> configs/targets/arm-softmmu.c | 22 ++++++++++++++++++++++
>> 2 files changed, 28 insertions(+), 1 deletion(-)
>> create mode 100644 configs/targets/arm-softmmu.c
>>
>> diff --git a/meson.build b/meson.build
>> index 168b07b5887..da24cc2ba41 100644
>> --- a/meson.build
>> +++ b/meson.build
>> @@ -3809,7 +3809,6 @@ specific_ss.add(files('page-target.c', 'page-
>> vary-target.c'))
>> common_ss.add(files('target_info.c'))
>> system_ss.add(files('target_info-qom.c'))
>> -specific_ss.add(files('target_info-stub.c'))
>> subdir('backends')
>> subdir('disas')
>> @@ -4272,6 +4271,12 @@ foreach target : target_dirs
>> arch_srcs += gdbstub_xml
>> endif
>> + target_info_c = meson.project_source_root() / 'configs' /
>> 'targets' / target + '.c'
>> + if not fs.exists(target_info_c)
>> + target_info_c = meson.project_source_root() / 'target_info-stub.c'
>> + endif
>> + arch_srcs += target_info_c
>> +
>> t = target_arch[target_base_arch].apply(config_target, strict: false)
>> arch_srcs += t.sources()
>> arch_deps += t.dependencies()
>
> While this works, it would be better with a dictionary, so it follows
> the style of existing meson.build.
>
> As well, two advantages:
> - we can move configs somewhere else in case we decide to split them in
> every folder later
> - We avoid calling fs.exists for every target, but it should not really
> change anything to configure step time.
>
> ---
>
> diff --git a/meson.build b/meson.build
> index 81afa63853e..7fca3c5c4dc 100644
> --- a/meson.build
> +++ b/meson.build
> @@ -3228,6 +3228,7 @@ config_devices_mak_list = []
> config_devices_h = {}
> config_target_h = {}
> config_target_mak = {}
> +target_info = {}
>
> disassemblers = {
> 'alpha' : ['CONFIG_ALPHA_DIS'],
> @@ -3823,9 +3824,9 @@ specific_ss.add(files('page-target.c', 'page-vary-
> target.c'))
>
> common_ss.add(files('target_info.c'))
> system_ss.add(files('target_info-qom.c'))
> -specific_ss.add(files('target_info-stub.c'))
>
> subdir('backends')
> +subdir('configs/targets')
> subdir('disas')
> subdir('migration')
> subdir('monitor')
> @@ -4286,6 +4287,12 @@ foreach target : target_dirs
> arch_srcs += gdbstub_xml
> endif
>
> + if target in target_info
> + arch_srcs += target_info[target]
> + else
> + arch_srcs += files('target_info-stub.c')
> + endif
> +
> t = target_arch[target_base_arch].apply(config_target, strict: false)
> arch_srcs += t.sources()
> arch_deps += t.dependencies()
>
> diff --git a/configs/targets/meson.build b/configs/targets/meson.build
> new file mode 100644
> index 00000000000..140386e932c
> --- /dev/null
> +++ b/configs/targets/meson.build
> @@ -0,0 +1,3 @@
> +foreach target : ['arm-softmmu', 'aarch64-softmmu']
> + target_info += {target : files(target + '.c')}
> +endforeach
>
Thanks for showing the dictionary variant!
^ permalink raw reply [flat|nested] 36+ messages in thread
* Re: [RFC PATCH v2 02/11] qemu: Convert target_name() to TargetInfo API
2025-04-18 3:01 ` Pierrick Bouvier
@ 2025-04-18 14:02 ` Philippe Mathieu-Daudé
2025-04-18 16:23 ` Pierrick Bouvier
0 siblings, 1 reply; 36+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-04-18 14:02 UTC (permalink / raw)
To: Pierrick Bouvier, qemu-devel; +Cc: Anton Johansson, Richard Henderson
On 18/4/25 05:01, Pierrick Bouvier wrote:
> On 4/17/25 17:50, Philippe Mathieu-Daudé wrote:
>> Have target_name() be a target-agnostic method, dispatching
>> to a per-target TargetInfo singleton structure.
>> By default a stub singleton is used. No logical change
>> expected.
>>
>> Inspired-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
>> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
>> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
>> ---
>> meson.build | 3 +++
>> include/hw/core/cpu.h | 2 --
>> include/qemu/target_info-impl.h | 23 +++++++++++++++++++++++
>> include/qemu/target_info.h | 19 +++++++++++++++++++
>> cpu-target.c | 5 -----
>> hw/core/machine-qmp-cmds.c | 1 +
>> plugins/loader.c | 2 +-
>> system/vl.c | 2 +-
>> target_info-stub.c | 19 +++++++++++++++++++
>> target_info.c | 16 ++++++++++++++++
>> 10 files changed, 83 insertions(+), 9 deletions(-)
>> create mode 100644 include/qemu/target_info-impl.h
>> create mode 100644 include/qemu/target_info.h
>> create mode 100644 target_info-stub.c
>> create mode 100644 target_info.c
>> diff --git a/target_info-stub.c b/target_info-stub.c
>> new file mode 100644
>> index 00000000000..1e44bb6f6fb
>> --- /dev/null
>> +++ b/target_info-stub.c
>> @@ -0,0 +1,19 @@
>> +/*
>> + * QEMU target info stubs
>> + *
>> + * Copyright (c) Linaro
>> + *
>> + * SPDX-License-Identifier: GPL-2.0-or-later
>> + */
>> +
>> +#include "qemu/osdep.h"
>> +#include "qemu/target_info-impl.h"
>> +
>> +static const TargetInfo target_info_stub = {
>> + .name = TARGET_NAME,
>> +};
>> +
>> +const TargetInfo *target_info(void)
>> +{
>> + return &target_info_stub;
>> +}
>> diff --git a/target_info.c b/target_info.c
>> new file mode 100644
>> index 00000000000..877a6a15014
>> --- /dev/null
>> +++ b/target_info.c
>> @@ -0,0 +1,16 @@
>> +/*
>> + * QEMU binary/target helpers
>> + *
>> + * Copyright (c) Linaro
>> + *
>> + * SPDX-License-Identifier: GPL-2.0-or-later
>> + */
>> +
>> +#include "qemu/osdep.h"
>> +#include "qemu/target_info-impl.h"
>> +#include "qemu/target_info.h"
>> +
>> +const char *target_name(void)
>> +{
>> + return target_info()->name;
>> +}
>
> What is the benefit to have two different files (common and specific)?
> target_name() can be inline in the same header, returning the matching
> field in existing target_info, which does not need any specialization
> per target.
common interface exposed target-agnostic, dispatching to target-specific
implementation (providing a stub we'll remove once all targets converted).
What would you suggest?
^ permalink raw reply [flat|nested] 36+ messages in thread
* Re: [RFC PATCH v2 04/11] hw/arm: Register TYPE_TARGET_ARM/AARCH64_CPU QOM interfaces
2025-04-18 3:07 ` Pierrick Bouvier
@ 2025-04-18 14:07 ` Philippe Mathieu-Daudé
2025-04-18 16:30 ` Pierrick Bouvier
0 siblings, 1 reply; 36+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-04-18 14:07 UTC (permalink / raw)
To: Pierrick Bouvier, qemu-devel; +Cc: Anton Johansson, Richard Henderson
On 18/4/25 05:07, Pierrick Bouvier wrote:
> On 4/17/25 17:50, Philippe Mathieu-Daudé wrote:
>> Define the TYPE_TARGET_ARM_MACHINE and TYPE_TARGET_AARCH64_MACHINE
>> QOM interface names to allow machines to implement them.
>>
>> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
>> ---
>> meson.build | 1 +
>> include/hw/boards.h | 1 +
>> include/qemu/target_info-qom.h | 18 ++++++++++++++++++
>> target_info-qom.c | 24 ++++++++++++++++++++++++
>> 4 files changed, 44 insertions(+)
>> create mode 100644 include/qemu/target_info-qom.h
>> create mode 100644 target_info-qom.c
>>
>> diff --git a/meson.build b/meson.build
>> index 49a050a28a3..168b07b5887 100644
>> --- a/meson.build
>> +++ b/meson.build
>> @@ -3808,6 +3808,7 @@ common_ss.add(pagevary)
>> specific_ss.add(files('page-target.c', 'page-vary-target.c'))
>> common_ss.add(files('target_info.c'))
>> +system_ss.add(files('target_info-qom.c'))
>> specific_ss.add(files('target_info-stub.c'))
>> subdir('backends')
>> diff --git a/include/hw/boards.h b/include/hw/boards.h
>> index 02f43ac5d4d..b1bbf3c34d4 100644
>> --- a/include/hw/boards.h
>> +++ b/include/hw/boards.h
>> @@ -7,6 +7,7 @@
>> #include "system/hostmem.h"
>> #include "system/blockdev.h"
>> #include "qapi/qapi-types-machine.h"
>> +#include "qemu/target_info-qom.h"
>> #include "qemu/module.h"
>> #include "qom/object.h"
>> #include "hw/core/cpu.h"
>> diff --git a/include/qemu/target_info-qom.h b/include/qemu/
>> target_info-qom.h
>> new file mode 100644
>> index 00000000000..7eb9b6bd254
>> --- /dev/null
>> +++ b/include/qemu/target_info-qom.h
>> @@ -0,0 +1,18 @@
>> +/*
>> + * QEMU binary/target API (QOM types)
>> + *
>> + * Copyright (c) Linaro
>> + *
>> + * SPDX-License-Identifier: GPL-2.0-or-later
>> + */
>> +
>> +#ifndef QEMU_TARGET_INFO_QOM_H
>> +#define QEMU_TARGET_INFO_QOM_H
>> +
>> +#define TYPE_TARGET_ARM_MACHINE \
>> + "target-info-arm-machine"
>> +
>> +#define TYPE_TARGET_AARCH64_MACHINE \
>> + "target-info-aarch64-machine"
>> +
>> +#endif
>> diff --git a/target_info-qom.c b/target_info-qom.c
>> new file mode 100644
>> index 00000000000..d3fee57361b
>> --- /dev/null
>> +++ b/target_info-qom.c
>> @@ -0,0 +1,24 @@
>> +/*
>> + * QEMU binary/target API (QOM types)
>> + *
>> + * Copyright (c) Linaro
>> + *
>> + * SPDX-License-Identifier: GPL-2.0-or-later
>> + */
>> +
>> +#include "qemu/osdep.h"
>> +#include "qemu/target_info-qom.h"
>> +#include "qom/object.h"
>> +
>> +static const TypeInfo target_info_types[] = {
>> + {
>> + .name = TYPE_TARGET_ARM_MACHINE,
>> + .parent = TYPE_INTERFACE,
>> + },
>> + {
>> + .name = TYPE_TARGET_AARCH64_MACHINE,
>> + .parent = TYPE_INTERFACE,
>> + },
>> +};
>> +
>> +DEFINE_TYPES(target_info_types)
>
> Ideally, this should be in target/arm, as this type will only be used by
> boards in hw/arm, and by the target_info specialization.
Not the way QOM works, interfaces must be registered, which is
why I use this centralized file. Otherwise we get:
$ qemu-system-sh4 -M help
qemu-system-sh4: -M help: missing interface 'target-info-arm-machine'
for object 'machine'
^ permalink raw reply [flat|nested] 36+ messages in thread
* Re: [RFC PATCH v2 03/11] system/vl: Filter machine list available for a particular target binary
2025-04-18 3:06 ` Pierrick Bouvier
@ 2025-04-18 14:14 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 36+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-04-18 14:14 UTC (permalink / raw)
To: Pierrick Bouvier, qemu-devel; +Cc: Anton Johansson, Richard Henderson
On 18/4/25 05:06, Pierrick Bouvier wrote:
> On 4/17/25 17:50, Philippe Mathieu-Daudé wrote:
>> Binaries can register a QOM type to filter their machines
>> by filling their TargetInfo::machine_typename field.
>>
>> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
>> ---
>> include/qemu/target_info-impl.h | 3 +++
>> include/qemu/target_info.h | 8 ++++++++
>> system/vl.c | 14 ++++++++++++++
>> target_info.c | 5 +++++
>> 4 files changed, 30 insertions(+)
>>
>> diff --git a/include/qemu/target_info-impl.h b/include/qemu/
>> target_info-impl.h
>> index d5c94ed5296..990fb067d20 100644
>> --- a/include/qemu/target_info-impl.h
>> +++ b/include/qemu/target_info-impl.h
>> @@ -16,6 +16,9 @@ typedef struct TargetInfo {
>> /* runtime equivalent of TARGET_NAME definition */
>> const char *const name;
>> + /* QOM typename machines for this binary must implement */
>> + const char *const machine_typename;
>> +
>> } TargetInfo;
>> const TargetInfo *target_info(void);
>> diff --git a/include/qemu/target_info.h b/include/qemu/target_info.h
>> index 3f6cbbbd300..e9fd2fdd7b0 100644
>> --- a/include/qemu/target_info.h
>> +++ b/include/qemu/target_info.h
>> @@ -16,4 +16,12 @@
>> */
>> const char *target_name(void);
>> +/**
>> + * target_machine_interface_typename:
>> + *
>> + * Returns: Name of the QOM interface implemented by machines
>> + * usable on this target binary.
>> + */
>> +const char *target_machine_interface_typename(void);
>> +
>> #endif
>> diff --git a/system/vl.c b/system/vl.c
>> index d8a0fe713c9..4e43e55afe7 100644
>> --- a/system/vl.c
>> +++ b/system/vl.c
>> @@ -27,6 +27,7 @@
>> #include "qemu/datadir.h"
>> #include "qemu/units.h"
>> #include "qemu/module.h"
>> +#include "qemu/target_info.h"
>> #include "exec/cpu-common.h"
>> #include "exec/page-vary.h"
>> #include "hw/qdev-properties.h"
>> @@ -836,11 +837,17 @@ static bool usb_parse(const char *cmdline, Error
>> **errp)
>> static MachineClass *find_machine(const char *name, GSList *machines)
>> {
>> GSList *el;
>> + const char *qom_typename_filter =
>> target_machine_interface_typename();
>> for (el = machines; el; el = el->next) {
>> MachineClass *mc = el->data;
>> if (!strcmp(mc->name, name) || !g_strcmp0(mc->alias, name)) {
>> + if (qom_typename_filter
>> + && !object_class_dynamic_cast(el->data,
>> qom_typename_filter)) {
>> + /* Machine is not for this binary: fail */
>> + return NULL;
>> + }
>> return mc;
>> }
>> }
>> @@ -1563,6 +1570,7 @@ static void machine_help_func(const QDict *qdict)
>> g_autoptr(GSList) machines = NULL;
>> GSList *el;
>> const char *type = qdict_get_try_str(qdict, "type");
>> + const char *qom_typename_filter =
>> target_machine_interface_typename();
>> machines = object_class_get_list(TYPE_MACHINE, false);
>
> We can replace change to system/vl.c with:
>
> const char *machine_type = target_machine_interface_typename();
> machines = object_class_get_list(machine_type, false);
Clever!
>
>> if (type) {
>> @@ -1577,6 +1585,12 @@ static void machine_help_func(const QDict *qdict)
>> machines = g_slist_sort(machines, machine_class_cmp);
>> for (el = machines; el; el = el->next) {
>> MachineClass *mc = el->data;
>> +
>> + if (qom_typename_filter
>> + && !object_class_dynamic_cast(el->data,
>> qom_typename_filter)) {
>> + /* Machine is not for this binary: skip */
>> + continue;
>> + }
>> if (mc->alias) {
>> printf("%-20s %s (alias of %s)\n", mc->alias, mc->desc,
>> mc->name);
>> }
>> diff --git a/target_info.c b/target_info.c
>> index 877a6a15014..226eed1fd7d 100644
>> --- a/target_info.c
>> +++ b/target_info.c
>> @@ -14,3 +14,8 @@ const char *target_name(void)
>> {
>> return target_info()->name;
>> }
>> +
>> +const char *target_machine_interface_typename(void)
>> +{
>> + return target_info()->machine_typename;
>
> And here:
>
> const char *machine_type = target_info()->machine_typename;
> if (!machine_type) {
> machine_type = TYPE_MACHINE;
> }
> return machine_type;
>
>> +}
>
> This way, there is no special case to handle anywhere, and we can safely
> replace occurrences of TYPE_MACHINE queries with
> target_machine_interface_typename().
>
> As well, just a nit, but it's not important to know it's an interface, I
> would prefer a simpler name: target_machine_type();
^ permalink raw reply [flat|nested] 36+ messages in thread
* Re: [RFC PATCH v2 02/11] qemu: Convert target_name() to TargetInfo API
2025-04-18 14:02 ` Philippe Mathieu-Daudé
@ 2025-04-18 16:23 ` Pierrick Bouvier
2025-04-18 17:15 ` Philippe Mathieu-Daudé
0 siblings, 1 reply; 36+ messages in thread
From: Pierrick Bouvier @ 2025-04-18 16:23 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel
Cc: Anton Johansson, Richard Henderson
On 4/18/25 07:02, Philippe Mathieu-Daudé wrote:
> On 18/4/25 05:01, Pierrick Bouvier wrote:
>> On 4/17/25 17:50, Philippe Mathieu-Daudé wrote:
>>> Have target_name() be a target-agnostic method, dispatching
>>> to a per-target TargetInfo singleton structure.
>>> By default a stub singleton is used. No logical change
>>> expected.
>>>
>>> Inspired-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
>>> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
>>> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
>>> ---
>>> meson.build | 3 +++
>>> include/hw/core/cpu.h | 2 --
>>> include/qemu/target_info-impl.h | 23 +++++++++++++++++++++++
>>> include/qemu/target_info.h | 19 +++++++++++++++++++
>>> cpu-target.c | 5 -----
>>> hw/core/machine-qmp-cmds.c | 1 +
>>> plugins/loader.c | 2 +-
>>> system/vl.c | 2 +-
>>> target_info-stub.c | 19 +++++++++++++++++++
>>> target_info.c | 16 ++++++++++++++++
>>> 10 files changed, 83 insertions(+), 9 deletions(-)
>>> create mode 100644 include/qemu/target_info-impl.h
>>> create mode 100644 include/qemu/target_info.h
>>> create mode 100644 target_info-stub.c
>>> create mode 100644 target_info.c
>
>
>>> diff --git a/target_info-stub.c b/target_info-stub.c
>>> new file mode 100644
>>> index 00000000000..1e44bb6f6fb
>>> --- /dev/null
>>> +++ b/target_info-stub.c
>>> @@ -0,0 +1,19 @@
>>> +/*
>>> + * QEMU target info stubs
>>> + *
>>> + * Copyright (c) Linaro
>>> + *
>>> + * SPDX-License-Identifier: GPL-2.0-or-later
>>> + */
>>> +
>>> +#include "qemu/osdep.h"
>>> +#include "qemu/target_info-impl.h"
>>> +
>>> +static const TargetInfo target_info_stub = {
>>> + .name = TARGET_NAME,
>>> +};
>>> +
>>> +const TargetInfo *target_info(void)
>>> +{
>>> + return &target_info_stub;
>>> +}
>>> diff --git a/target_info.c b/target_info.c
>>> new file mode 100644
>>> index 00000000000..877a6a15014
>>> --- /dev/null
>>> +++ b/target_info.c
>>> @@ -0,0 +1,16 @@
>>> +/*
>>> + * QEMU binary/target helpers
>>> + *
>>> + * Copyright (c) Linaro
>>> + *
>>> + * SPDX-License-Identifier: GPL-2.0-or-later
>>> + */
>>> +
>>> +#include "qemu/osdep.h"
>>> +#include "qemu/target_info-impl.h"
>>> +#include "qemu/target_info.h"
>>> +
>>> +const char *target_name(void)
>>> +{
>>> + return target_info()->name;
>>> +}
>>
>> What is the benefit to have two different files (common and specific)?
>> target_name() can be inline in the same header, returning the matching
>> field in existing target_info, which does not need any specialization
>> per target.
>
> common interface exposed target-agnostic, dispatching to target-specific
> implementation (providing a stub we'll remove once all targets converted).
>
> What would you suggest?
To remove target_info.c and target_info-impl.h, and implement
target_name() as a static inline in target_info.h.
This way, target_info.h can still be included from common code, the
structure is directly accessed, and we have a single header where we can
add new sugar functions and associated fields later.
^ permalink raw reply [flat|nested] 36+ messages in thread
* Re: [RFC PATCH v2 04/11] hw/arm: Register TYPE_TARGET_ARM/AARCH64_CPU QOM interfaces
2025-04-18 14:07 ` Philippe Mathieu-Daudé
@ 2025-04-18 16:30 ` Pierrick Bouvier
2025-04-18 17:04 ` Philippe Mathieu-Daudé
0 siblings, 1 reply; 36+ messages in thread
From: Pierrick Bouvier @ 2025-04-18 16:30 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel
Cc: Anton Johansson, Richard Henderson
On 4/18/25 07:07, Philippe Mathieu-Daudé wrote:
> On 18/4/25 05:07, Pierrick Bouvier wrote:
>> On 4/17/25 17:50, Philippe Mathieu-Daudé wrote:
>>> Define the TYPE_TARGET_ARM_MACHINE and TYPE_TARGET_AARCH64_MACHINE
>>> QOM interface names to allow machines to implement them.
>>>
>>> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
>>> ---
>>> meson.build | 1 +
>>> include/hw/boards.h | 1 +
>>> include/qemu/target_info-qom.h | 18 ++++++++++++++++++
>>> target_info-qom.c | 24 ++++++++++++++++++++++++
>>> 4 files changed, 44 insertions(+)
>>> create mode 100644 include/qemu/target_info-qom.h
>>> create mode 100644 target_info-qom.c
>>>
>>> diff --git a/meson.build b/meson.build
>>> index 49a050a28a3..168b07b5887 100644
>>> --- a/meson.build
>>> +++ b/meson.build
>>> @@ -3808,6 +3808,7 @@ common_ss.add(pagevary)
>>> specific_ss.add(files('page-target.c', 'page-vary-target.c'))
>>> common_ss.add(files('target_info.c'))
>>> +system_ss.add(files('target_info-qom.c'))
>>> specific_ss.add(files('target_info-stub.c'))
>>> subdir('backends')
>>> diff --git a/include/hw/boards.h b/include/hw/boards.h
>>> index 02f43ac5d4d..b1bbf3c34d4 100644
>>> --- a/include/hw/boards.h
>>> +++ b/include/hw/boards.h
>>> @@ -7,6 +7,7 @@
>>> #include "system/hostmem.h"
>>> #include "system/blockdev.h"
>>> #include "qapi/qapi-types-machine.h"
>>> +#include "qemu/target_info-qom.h"
>>> #include "qemu/module.h"
>>> #include "qom/object.h"
>>> #include "hw/core/cpu.h"
>>> diff --git a/include/qemu/target_info-qom.h b/include/qemu/
>>> target_info-qom.h
>>> new file mode 100644
>>> index 00000000000..7eb9b6bd254
>>> --- /dev/null
>>> +++ b/include/qemu/target_info-qom.h
>>> @@ -0,0 +1,18 @@
>>> +/*
>>> + * QEMU binary/target API (QOM types)
>>> + *
>>> + * Copyright (c) Linaro
>>> + *
>>> + * SPDX-License-Identifier: GPL-2.0-or-later
>>> + */
>>> +
>>> +#ifndef QEMU_TARGET_INFO_QOM_H
>>> +#define QEMU_TARGET_INFO_QOM_H
>>> +
>>> +#define TYPE_TARGET_ARM_MACHINE \
>>> + "target-info-arm-machine"
>>> +
>>> +#define TYPE_TARGET_AARCH64_MACHINE \
>>> + "target-info-aarch64-machine"
>>> +
>>> +#endif
>>> diff --git a/target_info-qom.c b/target_info-qom.c
>>> new file mode 100644
>>> index 00000000000..d3fee57361b
>>> --- /dev/null
>>> +++ b/target_info-qom.c
>>> @@ -0,0 +1,24 @@
>>> +/*
>>> + * QEMU binary/target API (QOM types)
>>> + *
>>> + * Copyright (c) Linaro
>>> + *
>>> + * SPDX-License-Identifier: GPL-2.0-or-later
>>> + */
>>> +
>>> +#include "qemu/osdep.h"
>>> +#include "qemu/target_info-qom.h"
>>> +#include "qom/object.h"
>>> +
>>> +static const TypeInfo target_info_types[] = {
>>> + {
>>> + .name = TYPE_TARGET_ARM_MACHINE,
>>> + .parent = TYPE_INTERFACE,
>>> + },
>>> + {
>>> + .name = TYPE_TARGET_AARCH64_MACHINE,
>>> + .parent = TYPE_INTERFACE,
>>> + },
>>> +};
>>> +
>>> +DEFINE_TYPES(target_info_types)
>>
>> Ideally, this should be in target/arm, as this type will only be used by
>> boards in hw/arm, and by the target_info specialization.
>
> Not the way QOM works, interfaces must be registered, which is
> why I use this centralized file. Otherwise we get:
>
> $ qemu-system-sh4 -M help
> qemu-system-sh4: -M help: missing interface 'target-info-arm-machine'
> for object 'machine'
>
If I'm correct, types can be registered anywhere, since they rely on
static initializer, but in qemu-system-sh4, hw/arm or target/arm is not
linked, so it fails.
I guess this is the null board that is creating this situation, since
it's included by all binaries.
I see two solutions while still moving those types in target/arm:
- include this type file in libcommon, so it's always linked.
- introduce a new TYPE_TARGET_ALL_MACHINE, and always include it in list
of machines. But I think it's not so good as it would require to deal
with a list of types when we want to access a machine.
So I would just move the file and link it inconditonnally in all binaries.
How about that?
^ permalink raw reply [flat|nested] 36+ messages in thread
* Re: [RFC PATCH v2 04/11] hw/arm: Register TYPE_TARGET_ARM/AARCH64_CPU QOM interfaces
2025-04-18 16:30 ` Pierrick Bouvier
@ 2025-04-18 17:04 ` Philippe Mathieu-Daudé
2025-04-18 17:07 ` Pierrick Bouvier
0 siblings, 1 reply; 36+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-04-18 17:04 UTC (permalink / raw)
To: Pierrick Bouvier, qemu-devel; +Cc: Anton Johansson, Richard Henderson
On 18/4/25 18:30, Pierrick Bouvier wrote:
> On 4/18/25 07:07, Philippe Mathieu-Daudé wrote:
>> On 18/4/25 05:07, Pierrick Bouvier wrote:
>>> On 4/17/25 17:50, Philippe Mathieu-Daudé wrote:
>>>> Define the TYPE_TARGET_ARM_MACHINE and TYPE_TARGET_AARCH64_MACHINE
>>>> QOM interface names to allow machines to implement them.
>>>>
>>>> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
>>>> ---
>>>> meson.build | 1 +
>>>> include/hw/boards.h | 1 +
>>>> include/qemu/target_info-qom.h | 18 ++++++++++++++++++
>>>> target_info-qom.c | 24 ++++++++++++++++++++++++
>>>> 4 files changed, 44 insertions(+)
>>>> create mode 100644 include/qemu/target_info-qom.h
>>>> create mode 100644 target_info-qom.c
>>>>
>>>> diff --git a/meson.build b/meson.build
>>>> index 49a050a28a3..168b07b5887 100644
>>>> --- a/meson.build
>>>> +++ b/meson.build
>>>> @@ -3808,6 +3808,7 @@ common_ss.add(pagevary)
>>>> specific_ss.add(files('page-target.c', 'page-vary-target.c'))
>>>> common_ss.add(files('target_info.c'))
>>>> +system_ss.add(files('target_info-qom.c'))
>>>> specific_ss.add(files('target_info-stub.c'))
>>>> subdir('backends')
>>>> diff --git a/include/hw/boards.h b/include/hw/boards.h
>>>> index 02f43ac5d4d..b1bbf3c34d4 100644
>>>> --- a/include/hw/boards.h
>>>> +++ b/include/hw/boards.h
>>>> @@ -7,6 +7,7 @@
>>>> #include "system/hostmem.h"
>>>> #include "system/blockdev.h"
>>>> #include "qapi/qapi-types-machine.h"
>>>> +#include "qemu/target_info-qom.h"
>>>> #include "qemu/module.h"
>>>> #include "qom/object.h"
>>>> #include "hw/core/cpu.h"
>>>> diff --git a/include/qemu/target_info-qom.h b/include/qemu/
>>>> target_info-qom.h
>>>> new file mode 100644
>>>> index 00000000000..7eb9b6bd254
>>>> --- /dev/null
>>>> +++ b/include/qemu/target_info-qom.h
>>>> @@ -0,0 +1,18 @@
>>>> +/*
>>>> + * QEMU binary/target API (QOM types)
>>>> + *
>>>> + * Copyright (c) Linaro
>>>> + *
>>>> + * SPDX-License-Identifier: GPL-2.0-or-later
>>>> + */
>>>> +
>>>> +#ifndef QEMU_TARGET_INFO_QOM_H
>>>> +#define QEMU_TARGET_INFO_QOM_H
>>>> +
>>>> +#define TYPE_TARGET_ARM_MACHINE \
>>>> + "target-info-arm-machine"
>>>> +
>>>> +#define TYPE_TARGET_AARCH64_MACHINE \
>>>> + "target-info-aarch64-machine"
>>>> +
>>>> +#endif
>>>> diff --git a/target_info-qom.c b/target_info-qom.c
>>>> new file mode 100644
>>>> index 00000000000..d3fee57361b
>>>> --- /dev/null
>>>> +++ b/target_info-qom.c
>>>> @@ -0,0 +1,24 @@
>>>> +/*
>>>> + * QEMU binary/target API (QOM types)
>>>> + *
>>>> + * Copyright (c) Linaro
>>>> + *
>>>> + * SPDX-License-Identifier: GPL-2.0-or-later
>>>> + */
>>>> +
>>>> +#include "qemu/osdep.h"
>>>> +#include "qemu/target_info-qom.h"
>>>> +#include "qom/object.h"
>>>> +
>>>> +static const TypeInfo target_info_types[] = {
>>>> + {
>>>> + .name = TYPE_TARGET_ARM_MACHINE,
>>>> + .parent = TYPE_INTERFACE,
>>>> + },
>>>> + {
>>>> + .name = TYPE_TARGET_AARCH64_MACHINE,
>>>> + .parent = TYPE_INTERFACE,
>>>> + },
>>>> +};
>>>> +
>>>> +DEFINE_TYPES(target_info_types)
>>>
>>> Ideally, this should be in target/arm, as this type will only be used by
>>> boards in hw/arm, and by the target_info specialization.
>>
>> Not the way QOM works, interfaces must be registered, which is
>> why I use this centralized file. Otherwise we get:
>>
>> $ qemu-system-sh4 -M help
>> qemu-system-sh4: -M help: missing interface 'target-info-arm-machine'
>> for object 'machine'
>>
>
> If I'm correct, types can be registered anywhere, since they rely on
> static initializer, but in qemu-system-sh4, hw/arm or target/arm is not
> linked, so it fails.
> I guess this is the null board that is creating this situation, since
> it's included by all binaries.
Correct.
> I see two solutions while still moving those types in target/arm:
> - include this type file in libcommon, so it's always linked.
> - introduce a new TYPE_TARGET_ALL_MACHINE, and always include it in list
> of machines. But I think it's not so good as it would require to deal
> with a list of types when we want to access a machine.
>
> So I would just move the file and link it inconditonnally in all binaries.
Which file? target_info-qom.c is already in system_ss[].
^ permalink raw reply [flat|nested] 36+ messages in thread
* Re: [RFC PATCH v2 04/11] hw/arm: Register TYPE_TARGET_ARM/AARCH64_CPU QOM interfaces
2025-04-18 17:04 ` Philippe Mathieu-Daudé
@ 2025-04-18 17:07 ` Pierrick Bouvier
2025-04-18 17:10 ` Philippe Mathieu-Daudé
0 siblings, 1 reply; 36+ messages in thread
From: Pierrick Bouvier @ 2025-04-18 17:07 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel
Cc: Anton Johansson, Richard Henderson
On 4/18/25 10:04, Philippe Mathieu-Daudé wrote:
> On 18/4/25 18:30, Pierrick Bouvier wrote:
>> On 4/18/25 07:07, Philippe Mathieu-Daudé wrote:
>>> On 18/4/25 05:07, Pierrick Bouvier wrote:
>>>> On 4/17/25 17:50, Philippe Mathieu-Daudé wrote:
>>>>> Define the TYPE_TARGET_ARM_MACHINE and TYPE_TARGET_AARCH64_MACHINE
>>>>> QOM interface names to allow machines to implement them.
>>>>>
>>>>> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
>>>>> ---
>>>>> meson.build | 1 +
>>>>> include/hw/boards.h | 1 +
>>>>> include/qemu/target_info-qom.h | 18 ++++++++++++++++++
>>>>> target_info-qom.c | 24 ++++++++++++++++++++++++
>>>>> 4 files changed, 44 insertions(+)
>>>>> create mode 100644 include/qemu/target_info-qom.h
>>>>> create mode 100644 target_info-qom.c
>>>>>
>>>>> diff --git a/meson.build b/meson.build
>>>>> index 49a050a28a3..168b07b5887 100644
>>>>> --- a/meson.build
>>>>> +++ b/meson.build
>>>>> @@ -3808,6 +3808,7 @@ common_ss.add(pagevary)
>>>>> specific_ss.add(files('page-target.c', 'page-vary-target.c'))
>>>>> common_ss.add(files('target_info.c'))
>>>>> +system_ss.add(files('target_info-qom.c'))
>>>>> specific_ss.add(files('target_info-stub.c'))
>>>>> subdir('backends')
>>>>> diff --git a/include/hw/boards.h b/include/hw/boards.h
>>>>> index 02f43ac5d4d..b1bbf3c34d4 100644
>>>>> --- a/include/hw/boards.h
>>>>> +++ b/include/hw/boards.h
>>>>> @@ -7,6 +7,7 @@
>>>>> #include "system/hostmem.h"
>>>>> #include "system/blockdev.h"
>>>>> #include "qapi/qapi-types-machine.h"
>>>>> +#include "qemu/target_info-qom.h"
>>>>> #include "qemu/module.h"
>>>>> #include "qom/object.h"
>>>>> #include "hw/core/cpu.h"
>>>>> diff --git a/include/qemu/target_info-qom.h b/include/qemu/
>>>>> target_info-qom.h
>>>>> new file mode 100644
>>>>> index 00000000000..7eb9b6bd254
>>>>> --- /dev/null
>>>>> +++ b/include/qemu/target_info-qom.h
>>>>> @@ -0,0 +1,18 @@
>>>>> +/*
>>>>> + * QEMU binary/target API (QOM types)
>>>>> + *
>>>>> + * Copyright (c) Linaro
>>>>> + *
>>>>> + * SPDX-License-Identifier: GPL-2.0-or-later
>>>>> + */
>>>>> +
>>>>> +#ifndef QEMU_TARGET_INFO_QOM_H
>>>>> +#define QEMU_TARGET_INFO_QOM_H
>>>>> +
>>>>> +#define TYPE_TARGET_ARM_MACHINE \
>>>>> + "target-info-arm-machine"
>>>>> +
>>>>> +#define TYPE_TARGET_AARCH64_MACHINE \
>>>>> + "target-info-aarch64-machine"
>>>>> +
>>>>> +#endif
>>>>> diff --git a/target_info-qom.c b/target_info-qom.c
>>>>> new file mode 100644
>>>>> index 00000000000..d3fee57361b
>>>>> --- /dev/null
>>>>> +++ b/target_info-qom.c
>>>>> @@ -0,0 +1,24 @@
>>>>> +/*
>>>>> + * QEMU binary/target API (QOM types)
>>>>> + *
>>>>> + * Copyright (c) Linaro
>>>>> + *
>>>>> + * SPDX-License-Identifier: GPL-2.0-or-later
>>>>> + */
>>>>> +
>>>>> +#include "qemu/osdep.h"
>>>>> +#include "qemu/target_info-qom.h"
>>>>> +#include "qom/object.h"
>>>>> +
>>>>> +static const TypeInfo target_info_types[] = {
>>>>> + {
>>>>> + .name = TYPE_TARGET_ARM_MACHINE,
>>>>> + .parent = TYPE_INTERFACE,
>>>>> + },
>>>>> + {
>>>>> + .name = TYPE_TARGET_AARCH64_MACHINE,
>>>>> + .parent = TYPE_INTERFACE,
>>>>> + },
>>>>> +};
>>>>> +
>>>>> +DEFINE_TYPES(target_info_types)
>>>>
>>>> Ideally, this should be in target/arm, as this type will only be used by
>>>> boards in hw/arm, and by the target_info specialization.
>>>
>>> Not the way QOM works, interfaces must be registered, which is
>>> why I use this centralized file. Otherwise we get:
>>>
>>> $ qemu-system-sh4 -M help
>>> qemu-system-sh4: -M help: missing interface 'target-info-arm-machine'
>>> for object 'machine'
>>>
>>
>> If I'm correct, types can be registered anywhere, since they rely on
>> static initializer, but in qemu-system-sh4, hw/arm or target/arm is not
>> linked, so it fails.
>> I guess this is the null board that is creating this situation, since
>> it's included by all binaries.
>
> Correct.
>
>> I see two solutions while still moving those types in target/arm:
>> - include this type file in libcommon, so it's always linked.
>> - introduce a new TYPE_TARGET_ALL_MACHINE, and always include it in list
>> of machines. But I think it's not so good as it would require to deal
>> with a list of types when we want to access a machine.
>>
>> So I would just move the file and link it inconditonnally in all binaries.
>
> Which file? target_info-qom.c is already in system_ss[].
Move existing target_info-qom in in target/arm/target_info_types.c, and
add it to system_ss, instead of arm_ss or arm_common_ss, so it's always
linked.
^ permalink raw reply [flat|nested] 36+ messages in thread
* Re: [RFC PATCH v2 04/11] hw/arm: Register TYPE_TARGET_ARM/AARCH64_CPU QOM interfaces
2025-04-18 17:07 ` Pierrick Bouvier
@ 2025-04-18 17:10 ` Philippe Mathieu-Daudé
2025-04-18 17:23 ` Pierrick Bouvier
0 siblings, 1 reply; 36+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-04-18 17:10 UTC (permalink / raw)
To: Pierrick Bouvier, qemu-devel; +Cc: Anton Johansson, Richard Henderson
On 18/4/25 19:07, Pierrick Bouvier wrote:
> On 4/18/25 10:04, Philippe Mathieu-Daudé wrote:
>> On 18/4/25 18:30, Pierrick Bouvier wrote:
>>> On 4/18/25 07:07, Philippe Mathieu-Daudé wrote:
>>>> On 18/4/25 05:07, Pierrick Bouvier wrote:
>>>>> On 4/17/25 17:50, Philippe Mathieu-Daudé wrote:
>>>>>> Define the TYPE_TARGET_ARM_MACHINE and TYPE_TARGET_AARCH64_MACHINE
>>>>>> QOM interface names to allow machines to implement them.
>>>>>>
>>>>>> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
>>>>>> ---
>>>>>> meson.build | 1 +
>>>>>> include/hw/boards.h | 1 +
>>>>>> include/qemu/target_info-qom.h | 18 ++++++++++++++++++
>>>>>> target_info-qom.c | 24 ++++++++++++++++++++++++
>>>>>> 4 files changed, 44 insertions(+)
>>>>>> create mode 100644 include/qemu/target_info-qom.h
>>>>>> create mode 100644 target_info-qom.c
>>>>>>
>>>>>> diff --git a/meson.build b/meson.build
>>>>>> index 49a050a28a3..168b07b5887 100644
>>>>>> --- a/meson.build
>>>>>> +++ b/meson.build
>>>>>> @@ -3808,6 +3808,7 @@ common_ss.add(pagevary)
>>>>>> specific_ss.add(files('page-target.c', 'page-vary-target.c'))
>>>>>> common_ss.add(files('target_info.c'))
>>>>>> +system_ss.add(files('target_info-qom.c'))
>>>>>> specific_ss.add(files('target_info-stub.c'))
>>>>>> subdir('backends')
>>>>>> diff --git a/include/hw/boards.h b/include/hw/boards.h
>>>>>> index 02f43ac5d4d..b1bbf3c34d4 100644
>>>>>> --- a/include/hw/boards.h
>>>>>> +++ b/include/hw/boards.h
>>>>>> @@ -7,6 +7,7 @@
>>>>>> #include "system/hostmem.h"
>>>>>> #include "system/blockdev.h"
>>>>>> #include "qapi/qapi-types-machine.h"
>>>>>> +#include "qemu/target_info-qom.h"
>>>>>> #include "qemu/module.h"
>>>>>> #include "qom/object.h"
>>>>>> #include "hw/core/cpu.h"
>>>>>> diff --git a/include/qemu/target_info-qom.h b/include/qemu/
>>>>>> target_info-qom.h
>>>>>> new file mode 100644
>>>>>> index 00000000000..7eb9b6bd254
>>>>>> --- /dev/null
>>>>>> +++ b/include/qemu/target_info-qom.h
>>>>>> @@ -0,0 +1,18 @@
>>>>>> +/*
>>>>>> + * QEMU binary/target API (QOM types)
>>>>>> + *
>>>>>> + * Copyright (c) Linaro
>>>>>> + *
>>>>>> + * SPDX-License-Identifier: GPL-2.0-or-later
>>>>>> + */
>>>>>> +
>>>>>> +#ifndef QEMU_TARGET_INFO_QOM_H
>>>>>> +#define QEMU_TARGET_INFO_QOM_H
>>>>>> +
>>>>>> +#define TYPE_TARGET_ARM_MACHINE \
>>>>>> + "target-info-arm-machine"
>>>>>> +
>>>>>> +#define TYPE_TARGET_AARCH64_MACHINE \
>>>>>> + "target-info-aarch64-machine"
>>>>>> +
>>>>>> +#endif
>>>>>> diff --git a/target_info-qom.c b/target_info-qom.c
>>>>>> new file mode 100644
>>>>>> index 00000000000..d3fee57361b
>>>>>> --- /dev/null
>>>>>> +++ b/target_info-qom.c
>>>>>> @@ -0,0 +1,24 @@
>>>>>> +/*
>>>>>> + * QEMU binary/target API (QOM types)
>>>>>> + *
>>>>>> + * Copyright (c) Linaro
>>>>>> + *
>>>>>> + * SPDX-License-Identifier: GPL-2.0-or-later
>>>>>> + */
>>>>>> +
>>>>>> +#include "qemu/osdep.h"
>>>>>> +#include "qemu/target_info-qom.h"
>>>>>> +#include "qom/object.h"
>>>>>> +
>>>>>> +static const TypeInfo target_info_types[] = {
>>>>>> + {
>>>>>> + .name = TYPE_TARGET_ARM_MACHINE,
>>>>>> + .parent = TYPE_INTERFACE,
>>>>>> + },
>>>>>> + {
>>>>>> + .name = TYPE_TARGET_AARCH64_MACHINE,
>>>>>> + .parent = TYPE_INTERFACE,
>>>>>> + },
>>>>>> +};
>>>>>> +
>>>>>> +DEFINE_TYPES(target_info_types)
>>>>>
>>>>> Ideally, this should be in target/arm, as this type will only be
>>>>> used by
>>>>> boards in hw/arm, and by the target_info specialization.
>>>>
>>>> Not the way QOM works, interfaces must be registered, which is
>>>> why I use this centralized file. Otherwise we get:
>>>>
>>>> $ qemu-system-sh4 -M help
>>>> qemu-system-sh4: -M help: missing interface 'target-info-arm-machine'
>>>> for object 'machine'
>>>>
>>>
>>> If I'm correct, types can be registered anywhere, since they rely on
>>> static initializer, but in qemu-system-sh4, hw/arm or target/arm is not
>>> linked, so it fails.
>>> I guess this is the null board that is creating this situation, since
>>> it's included by all binaries.
>>
>> Correct.
>>
>>> I see two solutions while still moving those types in target/arm:
>>> - include this type file in libcommon, so it's always linked.
>>> - introduce a new TYPE_TARGET_ALL_MACHINE, and always include it in list
>>> of machines. But I think it's not so good as it would require to deal
>>> with a list of types when we want to access a machine.
>>>
>>> So I would just move the file and link it inconditonnally in all
>>> binaries.
>>
>> Which file? target_info-qom.c is already in system_ss[].
>
> Move existing target_info-qom in in target/arm/target_info_types.c, and
> add it to system_ss, instead of arm_ss or arm_common_ss, so it's always
> linked.
That should work, but what is the benefit over having a single file
where all definitions are concentrated?
^ permalink raw reply [flat|nested] 36+ messages in thread
* Re: [RFC PATCH v2 02/11] qemu: Convert target_name() to TargetInfo API
2025-04-18 16:23 ` Pierrick Bouvier
@ 2025-04-18 17:15 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 36+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-04-18 17:15 UTC (permalink / raw)
To: Pierrick Bouvier, qemu-devel; +Cc: Anton Johansson, Richard Henderson
On 18/4/25 18:23, Pierrick Bouvier wrote:
> On 4/18/25 07:02, Philippe Mathieu-Daudé wrote:
>> On 18/4/25 05:01, Pierrick Bouvier wrote:
>>> On 4/17/25 17:50, Philippe Mathieu-Daudé wrote:
>>>> Have target_name() be a target-agnostic method, dispatching
>>>> to a per-target TargetInfo singleton structure.
>>>> By default a stub singleton is used. No logical change
>>>> expected.
>>>>
>>>> Inspired-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
>>>> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
>>>> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
>>>> ---
>>>> meson.build | 3 +++
>>>> include/hw/core/cpu.h | 2 --
>>>> include/qemu/target_info-impl.h | 23 +++++++++++++++++++++++
>>>> include/qemu/target_info.h | 19 +++++++++++++++++++
>>>> cpu-target.c | 5 -----
>>>> hw/core/machine-qmp-cmds.c | 1 +
>>>> plugins/loader.c | 2 +-
>>>> system/vl.c | 2 +-
>>>> target_info-stub.c | 19 +++++++++++++++++++
>>>> target_info.c | 16 ++++++++++++++++
>>>> 10 files changed, 83 insertions(+), 9 deletions(-)
>>>> create mode 100644 include/qemu/target_info-impl.h
>>>> create mode 100644 include/qemu/target_info.h
>>>> create mode 100644 target_info-stub.c
>>>> create mode 100644 target_info.c
>>
>>
>>>> diff --git a/target_info-stub.c b/target_info-stub.c
>>>> new file mode 100644
>>>> index 00000000000..1e44bb6f6fb
>>>> --- /dev/null
>>>> +++ b/target_info-stub.c
>>>> @@ -0,0 +1,19 @@
>>>> +/*
>>>> + * QEMU target info stubs
>>>> + *
>>>> + * Copyright (c) Linaro
>>>> + *
>>>> + * SPDX-License-Identifier: GPL-2.0-or-later
>>>> + */
>>>> +
>>>> +#include "qemu/osdep.h"
>>>> +#include "qemu/target_info-impl.h"
>>>> +
>>>> +static const TargetInfo target_info_stub = {
>>>> + .name = TARGET_NAME,
>>>> +};
>>>> +
>>>> +const TargetInfo *target_info(void)
>>>> +{
>>>> + return &target_info_stub;
>>>> +}
>>>> diff --git a/target_info.c b/target_info.c
>>>> new file mode 100644
>>>> index 00000000000..877a6a15014
>>>> --- /dev/null
>>>> +++ b/target_info.c
>>>> @@ -0,0 +1,16 @@
>>>> +/*
>>>> + * QEMU binary/target helpers
>>>> + *
>>>> + * Copyright (c) Linaro
>>>> + *
>>>> + * SPDX-License-Identifier: GPL-2.0-or-later
>>>> + */
>>>> +
>>>> +#include "qemu/osdep.h"
>>>> +#include "qemu/target_info-impl.h"
>>>> +#include "qemu/target_info.h"
>>>> +
>>>> +const char *target_name(void)
>>>> +{
>>>> + return target_info()->name;
>>>> +}
>>>
>>> What is the benefit to have two different files (common and specific)?
>>> target_name() can be inline in the same header, returning the matching
>>> field in existing target_info, which does not need any specialization
>>> per target.
>>
>> common interface exposed target-agnostic, dispatching to target-specific
>> implementation (providing a stub we'll remove once all targets
>> converted).
>>
>> What would you suggest?
>
> To remove target_info.c and target_info-impl.h, and implement
> target_name() as a static inline in target_info.h.
>
> This way, target_info.h can still be included from common code, the
> structure is directly accessed, and we have a single header where we can
> add new sugar functions and associated fields later.
OK. As I'm about to post a good-enough v3, I'll not implement this
now, but will consider for v4.
^ permalink raw reply [flat|nested] 36+ messages in thread
* Re: [RFC PATCH v2 04/11] hw/arm: Register TYPE_TARGET_ARM/AARCH64_CPU QOM interfaces
2025-04-18 17:10 ` Philippe Mathieu-Daudé
@ 2025-04-18 17:23 ` Pierrick Bouvier
2025-04-18 17:32 ` Philippe Mathieu-Daudé
0 siblings, 1 reply; 36+ messages in thread
From: Pierrick Bouvier @ 2025-04-18 17:23 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel
Cc: Anton Johansson, Richard Henderson
On 4/18/25 10:10, Philippe Mathieu-Daudé wrote:
> On 18/4/25 19:07, Pierrick Bouvier wrote:
>> On 4/18/25 10:04, Philippe Mathieu-Daudé wrote:
>>> On 18/4/25 18:30, Pierrick Bouvier wrote:
>>>> On 4/18/25 07:07, Philippe Mathieu-Daudé wrote:
>>>>> On 18/4/25 05:07, Pierrick Bouvier wrote:
>>>>>> On 4/17/25 17:50, Philippe Mathieu-Daudé wrote:
>>>>>>> Define the TYPE_TARGET_ARM_MACHINE and TYPE_TARGET_AARCH64_MACHINE
>>>>>>> QOM interface names to allow machines to implement them.
>>>>>>>
>>>>>>> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
>>>>>>> ---
>>>>>>> meson.build | 1 +
>>>>>>> include/hw/boards.h | 1 +
>>>>>>> include/qemu/target_info-qom.h | 18 ++++++++++++++++++
>>>>>>> target_info-qom.c | 24 ++++++++++++++++++++++++
>>>>>>> 4 files changed, 44 insertions(+)
>>>>>>> create mode 100644 include/qemu/target_info-qom.h
>>>>>>> create mode 100644 target_info-qom.c
>>>>>>>
>>>>>>> diff --git a/meson.build b/meson.build
>>>>>>> index 49a050a28a3..168b07b5887 100644
>>>>>>> --- a/meson.build
>>>>>>> +++ b/meson.build
>>>>>>> @@ -3808,6 +3808,7 @@ common_ss.add(pagevary)
>>>>>>> specific_ss.add(files('page-target.c', 'page-vary-target.c'))
>>>>>>> common_ss.add(files('target_info.c'))
>>>>>>> +system_ss.add(files('target_info-qom.c'))
>>>>>>> specific_ss.add(files('target_info-stub.c'))
>>>>>>> subdir('backends')
>>>>>>> diff --git a/include/hw/boards.h b/include/hw/boards.h
>>>>>>> index 02f43ac5d4d..b1bbf3c34d4 100644
>>>>>>> --- a/include/hw/boards.h
>>>>>>> +++ b/include/hw/boards.h
>>>>>>> @@ -7,6 +7,7 @@
>>>>>>> #include "system/hostmem.h"
>>>>>>> #include "system/blockdev.h"
>>>>>>> #include "qapi/qapi-types-machine.h"
>>>>>>> +#include "qemu/target_info-qom.h"
>>>>>>> #include "qemu/module.h"
>>>>>>> #include "qom/object.h"
>>>>>>> #include "hw/core/cpu.h"
>>>>>>> diff --git a/include/qemu/target_info-qom.h b/include/qemu/
>>>>>>> target_info-qom.h
>>>>>>> new file mode 100644
>>>>>>> index 00000000000..7eb9b6bd254
>>>>>>> --- /dev/null
>>>>>>> +++ b/include/qemu/target_info-qom.h
>>>>>>> @@ -0,0 +1,18 @@
>>>>>>> +/*
>>>>>>> + * QEMU binary/target API (QOM types)
>>>>>>> + *
>>>>>>> + * Copyright (c) Linaro
>>>>>>> + *
>>>>>>> + * SPDX-License-Identifier: GPL-2.0-or-later
>>>>>>> + */
>>>>>>> +
>>>>>>> +#ifndef QEMU_TARGET_INFO_QOM_H
>>>>>>> +#define QEMU_TARGET_INFO_QOM_H
>>>>>>> +
>>>>>>> +#define TYPE_TARGET_ARM_MACHINE \
>>>>>>> + "target-info-arm-machine"
>>>>>>> +
>>>>>>> +#define TYPE_TARGET_AARCH64_MACHINE \
>>>>>>> + "target-info-aarch64-machine"
>>>>>>> +
>>>>>>> +#endif
>>>>>>> diff --git a/target_info-qom.c b/target_info-qom.c
>>>>>>> new file mode 100644
>>>>>>> index 00000000000..d3fee57361b
>>>>>>> --- /dev/null
>>>>>>> +++ b/target_info-qom.c
>>>>>>> @@ -0,0 +1,24 @@
>>>>>>> +/*
>>>>>>> + * QEMU binary/target API (QOM types)
>>>>>>> + *
>>>>>>> + * Copyright (c) Linaro
>>>>>>> + *
>>>>>>> + * SPDX-License-Identifier: GPL-2.0-or-later
>>>>>>> + */
>>>>>>> +
>>>>>>> +#include "qemu/osdep.h"
>>>>>>> +#include "qemu/target_info-qom.h"
>>>>>>> +#include "qom/object.h"
>>>>>>> +
>>>>>>> +static const TypeInfo target_info_types[] = {
>>>>>>> + {
>>>>>>> + .name = TYPE_TARGET_ARM_MACHINE,
>>>>>>> + .parent = TYPE_INTERFACE,
>>>>>>> + },
>>>>>>> + {
>>>>>>> + .name = TYPE_TARGET_AARCH64_MACHINE,
>>>>>>> + .parent = TYPE_INTERFACE,
>>>>>>> + },
>>>>>>> +};
>>>>>>> +
>>>>>>> +DEFINE_TYPES(target_info_types)
>>>>>>
>>>>>> Ideally, this should be in target/arm, as this type will only be
>>>>>> used by
>>>>>> boards in hw/arm, and by the target_info specialization.
>>>>>
>>>>> Not the way QOM works, interfaces must be registered, which is
>>>>> why I use this centralized file. Otherwise we get:
>>>>>
>>>>> $ qemu-system-sh4 -M help
>>>>> qemu-system-sh4: -M help: missing interface 'target-info-arm-machine'
>>>>> for object 'machine'
>>>>>
>>>>
>>>> If I'm correct, types can be registered anywhere, since they rely on
>>>> static initializer, but in qemu-system-sh4, hw/arm or target/arm is not
>>>> linked, so it fails.
>>>> I guess this is the null board that is creating this situation, since
>>>> it's included by all binaries.
>>>
>>> Correct.
>>>
>>>> I see two solutions while still moving those types in target/arm:
>>>> - include this type file in libcommon, so it's always linked.
>>>> - introduce a new TYPE_TARGET_ALL_MACHINE, and always include it in list
>>>> of machines. But I think it's not so good as it would require to deal
>>>> with a list of types when we want to access a machine.
>>>>
>>>> So I would just move the file and link it inconditonnally in all
>>>> binaries.
>>>
>>> Which file? target_info-qom.c is already in system_ss[].
>>
>> Move existing target_info-qom in in target/arm/target_info_types.c, and
>> add it to system_ss, instead of arm_ss or arm_common_ss, so it's always
>> linked.
>
> That should work, but what is the benefit over having a single file
> where all definitions are concentrated?
>
Limit which types are visible from every hw/X, so it's explicit which
architecture every board/cpu/device will implement in the end.
I don't mind if you want to keep it there for now, it doesn't really matter.
^ permalink raw reply [flat|nested] 36+ messages in thread
* Re: [RFC PATCH v2 04/11] hw/arm: Register TYPE_TARGET_ARM/AARCH64_CPU QOM interfaces
2025-04-18 17:23 ` Pierrick Bouvier
@ 2025-04-18 17:32 ` Philippe Mathieu-Daudé
2025-04-19 1:17 ` Pierrick Bouvier
0 siblings, 1 reply; 36+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-04-18 17:32 UTC (permalink / raw)
To: Pierrick Bouvier, qemu-devel; +Cc: Anton Johansson, Richard Henderson
On 18/4/25 19:23, Pierrick Bouvier wrote:
> On 4/18/25 10:10, Philippe Mathieu-Daudé wrote:
>> On 18/4/25 19:07, Pierrick Bouvier wrote:
>>> On 4/18/25 10:04, Philippe Mathieu-Daudé wrote:
>>>> On 18/4/25 18:30, Pierrick Bouvier wrote:
>>>>> On 4/18/25 07:07, Philippe Mathieu-Daudé wrote:
>>>>>> On 18/4/25 05:07, Pierrick Bouvier wrote:
>>>>>>> On 4/17/25 17:50, Philippe Mathieu-Daudé wrote:
>>>>>>>> Define the TYPE_TARGET_ARM_MACHINE and TYPE_TARGET_AARCH64_MACHINE
>>>>>>>> QOM interface names to allow machines to implement them.
>>>>>>>>
>>>>>>>> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
>>>>>>>> ---
>>>>>>>> meson.build | 1 +
>>>>>>>> include/hw/boards.h | 1 +
>>>>>>>> include/qemu/target_info-qom.h | 18 ++++++++++++++++++
>>>>>>>> target_info-qom.c | 24 ++++++++++++++++++++++++
>>>>>>>> 4 files changed, 44 insertions(+)
>>>>>>>> create mode 100644 include/qemu/target_info-qom.h
>>>>>>>> create mode 100644 target_info-qom.c
>>>>>>>>
>>>>>>>> diff --git a/meson.build b/meson.build
>>>>>>>> index 49a050a28a3..168b07b5887 100644
>>>>>>>> --- a/meson.build
>>>>>>>> +++ b/meson.build
>>>>>>>> @@ -3808,6 +3808,7 @@ common_ss.add(pagevary)
>>>>>>>> specific_ss.add(files('page-target.c', 'page-vary-target.c'))
>>>>>>>> common_ss.add(files('target_info.c'))
>>>>>>>> +system_ss.add(files('target_info-qom.c'))
>>>>>>>> specific_ss.add(files('target_info-stub.c'))
>>>>>>>> subdir('backends')
>>>>>>>> diff --git a/include/hw/boards.h b/include/hw/boards.h
>>>>>>>> index 02f43ac5d4d..b1bbf3c34d4 100644
>>>>>>>> --- a/include/hw/boards.h
>>>>>>>> +++ b/include/hw/boards.h
>>>>>>>> @@ -7,6 +7,7 @@
>>>>>>>> #include "system/hostmem.h"
>>>>>>>> #include "system/blockdev.h"
>>>>>>>> #include "qapi/qapi-types-machine.h"
>>>>>>>> +#include "qemu/target_info-qom.h"
>>>>>>>> #include "qemu/module.h"
>>>>>>>> #include "qom/object.h"
>>>>>>>> #include "hw/core/cpu.h"
>>>>>>>> diff --git a/include/qemu/target_info-qom.h b/include/qemu/
>>>>>>>> target_info-qom.h
>>>>>>>> new file mode 100644
>>>>>>>> index 00000000000..7eb9b6bd254
>>>>>>>> --- /dev/null
>>>>>>>> +++ b/include/qemu/target_info-qom.h
>>>>>>>> @@ -0,0 +1,18 @@
>>>>>>>> +/*
>>>>>>>> + * QEMU binary/target API (QOM types)
>>>>>>>> + *
>>>>>>>> + * Copyright (c) Linaro
>>>>>>>> + *
>>>>>>>> + * SPDX-License-Identifier: GPL-2.0-or-later
>>>>>>>> + */
>>>>>>>> +
>>>>>>>> +#ifndef QEMU_TARGET_INFO_QOM_H
>>>>>>>> +#define QEMU_TARGET_INFO_QOM_H
>>>>>>>> +
>>>>>>>> +#define TYPE_TARGET_ARM_MACHINE \
>>>>>>>> + "target-info-arm-machine"
>>>>>>>> +
>>>>>>>> +#define TYPE_TARGET_AARCH64_MACHINE \
>>>>>>>> + "target-info-aarch64-machine"
>>>>>>>> +
>>>>>>>> +#endif
>>>>>>>> diff --git a/target_info-qom.c b/target_info-qom.c
>>>>>>>> new file mode 100644
>>>>>>>> index 00000000000..d3fee57361b
>>>>>>>> --- /dev/null
>>>>>>>> +++ b/target_info-qom.c
>>>>>>>> @@ -0,0 +1,24 @@
>>>>>>>> +/*
>>>>>>>> + * QEMU binary/target API (QOM types)
>>>>>>>> + *
>>>>>>>> + * Copyright (c) Linaro
>>>>>>>> + *
>>>>>>>> + * SPDX-License-Identifier: GPL-2.0-or-later
>>>>>>>> + */
>>>>>>>> +
>>>>>>>> +#include "qemu/osdep.h"
>>>>>>>> +#include "qemu/target_info-qom.h"
>>>>>>>> +#include "qom/object.h"
>>>>>>>> +
>>>>>>>> +static const TypeInfo target_info_types[] = {
>>>>>>>> + {
>>>>>>>> + .name = TYPE_TARGET_ARM_MACHINE,
>>>>>>>> + .parent = TYPE_INTERFACE,
>>>>>>>> + },
>>>>>>>> + {
>>>>>>>> + .name = TYPE_TARGET_AARCH64_MACHINE,
>>>>>>>> + .parent = TYPE_INTERFACE,
>>>>>>>> + },
>>>>>>>> +};
>>>>>>>> +
>>>>>>>> +DEFINE_TYPES(target_info_types)
>>>>>>>
>>>>>>> Ideally, this should be in target/arm, as this type will only be
>>>>>>> used by
>>>>>>> boards in hw/arm, and by the target_info specialization.
>>>>>>
>>>>>> Not the way QOM works, interfaces must be registered, which is
>>>>>> why I use this centralized file. Otherwise we get:
>>>>>>
>>>>>> $ qemu-system-sh4 -M help
>>>>>> qemu-system-sh4: -M help: missing interface 'target-info-arm-machine'
>>>>>> for object 'machine'
>>>>>>
>>>>>
>>>>> If I'm correct, types can be registered anywhere, since they rely on
>>>>> static initializer, but in qemu-system-sh4, hw/arm or target/arm is
>>>>> not
>>>>> linked, so it fails.
>>>>> I guess this is the null board that is creating this situation, since
>>>>> it's included by all binaries.
>>>>
>>>> Correct.
>>>>
>>>>> I see two solutions while still moving those types in target/arm:
>>>>> - include this type file in libcommon, so it's always linked.
>>>>> - introduce a new TYPE_TARGET_ALL_MACHINE, and always include it in
>>>>> list
>>>>> of machines. But I think it's not so good as it would require to deal
>>>>> with a list of types when we want to access a machine.
>>>>>
>>>>> So I would just move the file and link it inconditonnally in all
>>>>> binaries.
>>>>
>>>> Which file? target_info-qom.c is already in system_ss[].
>>>
>>> Move existing target_info-qom in in target/arm/target_info_types.c, and
>>> add it to system_ss, instead of arm_ss or arm_common_ss, so it's always
>>> linked.
>>
>> That should work, but what is the benefit over having a single file
>> where all definitions are concentrated?
>>
>
> Limit which types are visible from every hw/X, so it's explicit which
> architecture every board/cpu/device will implement in the end.
> I don't mind if you want to keep it there for now, it doesn't really
> matter.
Oh, then I think I understood you and we are good:
Instead of having a single include/qemu/target_info-qom.h with
all target definitions, I added the ARM* ones to
include/hw/arm/machines-qom.h. But I kept target_info_types[]
in a single common source file.
^ permalink raw reply [flat|nested] 36+ messages in thread
* Re: [RFC PATCH v2 04/11] hw/arm: Register TYPE_TARGET_ARM/AARCH64_CPU QOM interfaces
2025-04-18 17:32 ` Philippe Mathieu-Daudé
@ 2025-04-19 1:17 ` Pierrick Bouvier
0 siblings, 0 replies; 36+ messages in thread
From: Pierrick Bouvier @ 2025-04-19 1:17 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel
Cc: Anton Johansson, Richard Henderson
On 4/18/25 10:32, Philippe Mathieu-Daudé wrote:
> On 18/4/25 19:23, Pierrick Bouvier wrote:
>> On 4/18/25 10:10, Philippe Mathieu-Daudé wrote:
>>> On 18/4/25 19:07, Pierrick Bouvier wrote:
>>>> On 4/18/25 10:04, Philippe Mathieu-Daudé wrote:
>>>>> On 18/4/25 18:30, Pierrick Bouvier wrote:
>>>>>> On 4/18/25 07:07, Philippe Mathieu-Daudé wrote:
>>>>>>> On 18/4/25 05:07, Pierrick Bouvier wrote:
>>>>>>>> On 4/17/25 17:50, Philippe Mathieu-Daudé wrote:
>>>>>>>>> Define the TYPE_TARGET_ARM_MACHINE and TYPE_TARGET_AARCH64_MACHINE
>>>>>>>>> QOM interface names to allow machines to implement them.
>>>>>>>>>
>>>>>>>>> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
>>>>>>>>> ---
>>>>>>>>> meson.build | 1 +
>>>>>>>>> include/hw/boards.h | 1 +
>>>>>>>>> include/qemu/target_info-qom.h | 18 ++++++++++++++++++
>>>>>>>>> target_info-qom.c | 24 ++++++++++++++++++++++++
>>>>>>>>> 4 files changed, 44 insertions(+)
>>>>>>>>> create mode 100644 include/qemu/target_info-qom.h
>>>>>>>>> create mode 100644 target_info-qom.c
>>>>>>>>>
>>>>>>>>> diff --git a/meson.build b/meson.build
>>>>>>>>> index 49a050a28a3..168b07b5887 100644
>>>>>>>>> --- a/meson.build
>>>>>>>>> +++ b/meson.build
>>>>>>>>> @@ -3808,6 +3808,7 @@ common_ss.add(pagevary)
>>>>>>>>> specific_ss.add(files('page-target.c', 'page-vary-target.c'))
>>>>>>>>> common_ss.add(files('target_info.c'))
>>>>>>>>> +system_ss.add(files('target_info-qom.c'))
>>>>>>>>> specific_ss.add(files('target_info-stub.c'))
>>>>>>>>> subdir('backends')
>>>>>>>>> diff --git a/include/hw/boards.h b/include/hw/boards.h
>>>>>>>>> index 02f43ac5d4d..b1bbf3c34d4 100644
>>>>>>>>> --- a/include/hw/boards.h
>>>>>>>>> +++ b/include/hw/boards.h
>>>>>>>>> @@ -7,6 +7,7 @@
>>>>>>>>> #include "system/hostmem.h"
>>>>>>>>> #include "system/blockdev.h"
>>>>>>>>> #include "qapi/qapi-types-machine.h"
>>>>>>>>> +#include "qemu/target_info-qom.h"
>>>>>>>>> #include "qemu/module.h"
>>>>>>>>> #include "qom/object.h"
>>>>>>>>> #include "hw/core/cpu.h"
>>>>>>>>> diff --git a/include/qemu/target_info-qom.h b/include/qemu/
>>>>>>>>> target_info-qom.h
>>>>>>>>> new file mode 100644
>>>>>>>>> index 00000000000..7eb9b6bd254
>>>>>>>>> --- /dev/null
>>>>>>>>> +++ b/include/qemu/target_info-qom.h
>>>>>>>>> @@ -0,0 +1,18 @@
>>>>>>>>> +/*
>>>>>>>>> + * QEMU binary/target API (QOM types)
>>>>>>>>> + *
>>>>>>>>> + * Copyright (c) Linaro
>>>>>>>>> + *
>>>>>>>>> + * SPDX-License-Identifier: GPL-2.0-or-later
>>>>>>>>> + */
>>>>>>>>> +
>>>>>>>>> +#ifndef QEMU_TARGET_INFO_QOM_H
>>>>>>>>> +#define QEMU_TARGET_INFO_QOM_H
>>>>>>>>> +
>>>>>>>>> +#define TYPE_TARGET_ARM_MACHINE \
>>>>>>>>> + "target-info-arm-machine"
>>>>>>>>> +
>>>>>>>>> +#define TYPE_TARGET_AARCH64_MACHINE \
>>>>>>>>> + "target-info-aarch64-machine"
>>>>>>>>> +
>>>>>>>>> +#endif
>>>>>>>>> diff --git a/target_info-qom.c b/target_info-qom.c
>>>>>>>>> new file mode 100644
>>>>>>>>> index 00000000000..d3fee57361b
>>>>>>>>> --- /dev/null
>>>>>>>>> +++ b/target_info-qom.c
>>>>>>>>> @@ -0,0 +1,24 @@
>>>>>>>>> +/*
>>>>>>>>> + * QEMU binary/target API (QOM types)
>>>>>>>>> + *
>>>>>>>>> + * Copyright (c) Linaro
>>>>>>>>> + *
>>>>>>>>> + * SPDX-License-Identifier: GPL-2.0-or-later
>>>>>>>>> + */
>>>>>>>>> +
>>>>>>>>> +#include "qemu/osdep.h"
>>>>>>>>> +#include "qemu/target_info-qom.h"
>>>>>>>>> +#include "qom/object.h"
>>>>>>>>> +
>>>>>>>>> +static const TypeInfo target_info_types[] = {
>>>>>>>>> + {
>>>>>>>>> + .name = TYPE_TARGET_ARM_MACHINE,
>>>>>>>>> + .parent = TYPE_INTERFACE,
>>>>>>>>> + },
>>>>>>>>> + {
>>>>>>>>> + .name = TYPE_TARGET_AARCH64_MACHINE,
>>>>>>>>> + .parent = TYPE_INTERFACE,
>>>>>>>>> + },
>>>>>>>>> +};
>>>>>>>>> +
>>>>>>>>> +DEFINE_TYPES(target_info_types)
>>>>>>>>
>>>>>>>> Ideally, this should be in target/arm, as this type will only be
>>>>>>>> used by
>>>>>>>> boards in hw/arm, and by the target_info specialization.
>>>>>>>
>>>>>>> Not the way QOM works, interfaces must be registered, which is
>>>>>>> why I use this centralized file. Otherwise we get:
>>>>>>>
>>>>>>> $ qemu-system-sh4 -M help
>>>>>>> qemu-system-sh4: -M help: missing interface 'target-info-arm-machine'
>>>>>>> for object 'machine'
>>>>>>>
>>>>>>
>>>>>> If I'm correct, types can be registered anywhere, since they rely on
>>>>>> static initializer, but in qemu-system-sh4, hw/arm or target/arm is
>>>>>> not
>>>>>> linked, so it fails.
>>>>>> I guess this is the null board that is creating this situation, since
>>>>>> it's included by all binaries.
>>>>>
>>>>> Correct.
>>>>>
>>>>>> I see two solutions while still moving those types in target/arm:
>>>>>> - include this type file in libcommon, so it's always linked.
>>>>>> - introduce a new TYPE_TARGET_ALL_MACHINE, and always include it in
>>>>>> list
>>>>>> of machines. But I think it's not so good as it would require to deal
>>>>>> with a list of types when we want to access a machine.
>>>>>>
>>>>>> So I would just move the file and link it inconditonnally in all
>>>>>> binaries.
>>>>>
>>>>> Which file? target_info-qom.c is already in system_ss[].
>>>>
>>>> Move existing target_info-qom in in target/arm/target_info_types.c, and
>>>> add it to system_ss, instead of arm_ss or arm_common_ss, so it's always
>>>> linked.
>>>
>>> That should work, but what is the benefit over having a single file
>>> where all definitions are concentrated?
>>>
>>
>> Limit which types are visible from every hw/X, so it's explicit which
>> architecture every board/cpu/device will implement in the end.
>> I don't mind if you want to keep it there for now, it doesn't really
>> matter.
>
> Oh, then I think I understood you and we are good:
>
> Instead of having a single include/qemu/target_info-qom.h with
> all target definitions, I added the ARM* ones to
> include/hw/arm/machines-qom.h. But I kept target_info_types[]
> in a single common source file.
All good.
^ permalink raw reply [flat|nested] 36+ messages in thread
end of thread, other threads:[~2025-04-19 1:18 UTC | newest]
Thread overview: 36+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-04-18 0:50 [RFC PATCH v2 00/11] single-binary: Make hw/arm/ common Philippe Mathieu-Daudé
2025-04-18 0:50 ` [RFC PATCH v2 01/11] qapi: Rename TargetInfo structure as BinaryTargetInfo Philippe Mathieu-Daudé
2025-04-18 2:55 ` Pierrick Bouvier
2025-04-18 0:50 ` [RFC PATCH v2 02/11] qemu: Convert target_name() to TargetInfo API Philippe Mathieu-Daudé
2025-04-18 3:01 ` Pierrick Bouvier
2025-04-18 14:02 ` Philippe Mathieu-Daudé
2025-04-18 16:23 ` Pierrick Bouvier
2025-04-18 17:15 ` Philippe Mathieu-Daudé
2025-04-18 0:50 ` [RFC PATCH v2 03/11] system/vl: Filter machine list available for a particular target binary Philippe Mathieu-Daudé
2025-04-18 3:06 ` Pierrick Bouvier
2025-04-18 14:14 ` Philippe Mathieu-Daudé
2025-04-18 0:50 ` [RFC PATCH v2 04/11] hw/arm: Register TYPE_TARGET_ARM/AARCH64_CPU QOM interfaces Philippe Mathieu-Daudé
2025-04-18 3:07 ` Pierrick Bouvier
2025-04-18 14:07 ` Philippe Mathieu-Daudé
2025-04-18 16:30 ` Pierrick Bouvier
2025-04-18 17:04 ` Philippe Mathieu-Daudé
2025-04-18 17:07 ` Pierrick Bouvier
2025-04-18 17:10 ` Philippe Mathieu-Daudé
2025-04-18 17:23 ` Pierrick Bouvier
2025-04-18 17:32 ` Philippe Mathieu-Daudé
2025-04-19 1:17 ` Pierrick Bouvier
2025-04-18 0:50 ` [RFC PATCH v2 05/11] hw/arm: Filter machine types for qemu-system-aarch64 binary Philippe Mathieu-Daudé
2025-04-18 0:50 ` [RFC PATCH v2 06/11] hw/arm: Filter machine types for qemu-system-arm binary Philippe Mathieu-Daudé
2025-04-18 3:08 ` Pierrick Bouvier
2025-04-18 0:50 ` [RFC PATCH v2 07/11] hw/core: Allow ARM/Aarch64 binaries to use the 'none' machine Philippe Mathieu-Daudé
2025-04-18 3:32 ` Pierrick Bouvier
2025-04-18 0:50 ` [RFC PATCH v2 08/11] config/target: Implement per-binary TargetInfo structure (ARM) Philippe Mathieu-Daudé
2025-04-18 3:39 ` Pierrick Bouvier
2025-04-18 4:02 ` Pierrick Bouvier
2025-04-18 11:20 ` Philippe Mathieu-Daudé
2025-04-18 0:50 ` [RFC PATCH v2 09/11] config/target: Implement per-binary TargetInfo structure (Aarch64) Philippe Mathieu-Daudé
2025-04-18 3:34 ` Pierrick Bouvier
2025-04-18 0:50 ` [RFC PATCH v2 10/11] hw/arm/aspeed: Build objects once Philippe Mathieu-Daudé
2025-04-18 4:02 ` Pierrick Bouvier
2025-04-18 0:50 ` [RFC PATCH v2 11/11] hw/arm/raspi: " Philippe Mathieu-Daudé
2025-04-18 4:03 ` Pierrick Bouvier
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