[RFC PATCH v3 00/14] single-binary: Make hw/arm/ common

[RFC PATCH v3 00/14] single-binary: Make hw/arm/ common

[Philippe Mathieu-Daudé]

Since v2:
- More comments from Pierrick addressed
- Use GList to register valid CPUs list
- Remove all TARGET_AARCH64 uses in hw/arm/

Since v1:
- Dropped unrelated / irrelevant patches
- Addressed Pierrick comments
- Added R-b tag
- Only considering machines, not CPUs.

Hi,

At this point this series is mostly a draft for Pierrick.

After introducing the generic TargetInfo API [*], we implement
the ARM variants, then use the API to remove target-specific code,
allowing to eventually remove the target-specific arm_ss[] source
set in meson.build, having all objects in arm_common_ss[].

Regards,

Phil.

Available here, based on tcg-next:
https://gitlab.com/philmd/qemu/-/tags/single-binary-hw-arm-rfc-v3

Philippe Mathieu-Daudé (14):
  qapi: Rename TargetInfo structure as BinaryTargetInfo
  qemu: Convert target_name() to TargetInfo API
  system/vl: Filter machine list available for a particular target
    binary
  hw/arm: Register TYPE_TARGET_ARM/AARCH64_MACHINE QOM interfaces
  hw/core: Allow ARM/Aarch64 binaries to use the 'none' machine
  hw/arm: Filter machine types for qemu-system-arm/aarch64 binaries
  meson: Prepare to accept per-binary TargetInfo structure
    implementation
  config/target: Implement per-binary TargetInfo structure (ARM,
    AARCH64)
  hw/arm/aspeed: Build objects once
  hw/arm/raspi: Build objects once
  hw/core/machine: Allow dynamic registration of valid CPU types
  hw/arm/virt: Register valid CPU types dynamically
  qemu/target_info: Add target_aarch64() helper
  hw/arm/virt: Replace TARGET_AARCH64 -> target_aarch64()

 meson.build                       |  11 +++
 qapi/machine.json                 |  12 ++--
 include/hw/arm/machines-qom.h     |  18 +++++
 include/hw/boards.h               |   8 +++
 include/hw/core/cpu.h             |   2 -
 include/qemu/target_info-impl.h   |  26 +++++++
 include/qemu/target_info.h        |  34 +++++++++
 configs/targets/aarch64-softmmu.c |  22 ++++++
 configs/targets/arm-softmmu.c     |  22 ++++++
 cpu-target.c                      |   5 --
 hw/arm/aspeed.c                   | 115 ++++++++++++++++++++++++++++--
 hw/arm/b-l475e-iot01a.c           |   6 ++
 hw/arm/bananapi_m2u.c             |   6 ++
 hw/arm/bcm2836.c                  |   5 +-
 hw/arm/collie.c                   |   6 ++
 hw/arm/cubieboard.c               |   6 ++
 hw/arm/digic_boards.c             |   6 ++
 hw/arm/exynos4_boards.c           |  11 +++
 hw/arm/fby35.c                    |   6 ++
 hw/arm/highbank.c                 |  11 +++
 hw/arm/imx25_pdk.c                |   6 ++
 hw/arm/imx8mp-evk.c               |   5 ++
 hw/arm/integratorcp.c             |   6 ++
 hw/arm/kzm.c                      |   6 ++
 hw/arm/mcimx6ul-evk.c             |   6 ++
 hw/arm/mcimx7d-sabre.c            |   6 ++
 hw/arm/microbit.c                 |   6 ++
 hw/arm/mps2-tz.c                  |  21 ++++++
 hw/arm/mps2.c                     |  21 ++++++
 hw/arm/mps3r.c                    |   6 ++
 hw/arm/msf2-som.c                 |   6 ++
 hw/arm/musca.c                    |  11 +++
 hw/arm/musicpal.c                 |   6 ++
 hw/arm/netduino2.c                |   6 ++
 hw/arm/netduinoplus2.c            |   6 ++
 hw/arm/npcm7xx_boards.c           |  26 +++++++
 hw/arm/npcm8xx_boards.c           |   5 ++
 hw/arm/olimex-stm32-h405.c        |   6 ++
 hw/arm/omap_sx1.c                 |  11 +++
 hw/arm/orangepi.c                 |   6 ++
 hw/arm/raspi.c                    |  28 ++++++--
 hw/arm/raspi4b.c                  |   5 ++
 hw/arm/realview.c                 |  21 ++++++
 hw/arm/sabrelite.c                |   6 ++
 hw/arm/sbsa-ref.c                 |   5 ++
 hw/arm/stellaris.c                |  11 +++
 hw/arm/stm32vldiscovery.c         |   6 ++
 hw/arm/versatilepb.c              |  11 +++
 hw/arm/vexpress.c                 |  11 +++
 hw/arm/virt.c                     |  50 +++++++------
 hw/arm/xilinx_zynq.c              |   6 ++
 hw/arm/xlnx-versal-virt.c         |   5 ++
 hw/arm/xlnx-zcu102.c              |   5 ++
 hw/core/machine-qmp-cmds.c        |   5 +-
 hw/core/machine.c                 |  30 ++++++++
 hw/core/null-machine.c            |   6 ++
 plugins/loader.c                  |   2 +-
 system/vl.c                       |   5 +-
 target_info-qom.c                 |  24 +++++++
 target_info-stub.c                |  21 ++++++
 target_info.c                     |  26 +++++++
 configs/targets/meson.build       |   3 +
 hw/arm/meson.build                |  12 ++--
 63 files changed, 761 insertions(+), 59 deletions(-)
 create mode 100644 include/hw/arm/machines-qom.h
 create mode 100644 include/qemu/target_info-impl.h
 create mode 100644 include/qemu/target_info.h
 create mode 100644 configs/targets/aarch64-softmmu.c
 create mode 100644 configs/targets/arm-softmmu.c
 create mode 100644 target_info-qom.c
 create mode 100644 target_info-stub.c
 create mode 100644 target_info.c
 create mode 100644 configs/targets/meson.build

-- 
2.47.1

[RFC PATCH v3 01/14] qapi: Rename TargetInfo structure as BinaryTargetInfo

[Philippe Mathieu-Daudé]

The QAPI-generated 'TargetInfo' structure name is only used
in a single file. We want to heavily use another structure
similarly named. Rename the QAPI one, since structure names
are not part of the public API.

Suggested-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
---
 qapi/machine.json          | 12 ++++++------
 hw/core/machine-qmp-cmds.c |  4 ++--
 2 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/qapi/machine.json b/qapi/machine.json
index a6b8795b09e..3246212f048 100644
--- a/qapi/machine.json
+++ b/qapi/machine.json
@@ -275,15 +275,15 @@
 { 'command': 'query-current-machine', 'returns': 'CurrentMachineParams' }
 
 ##
-# @TargetInfo:
+# @BinaryTargetInfo:
 #
-# Information describing the QEMU target.
+# Information describing the QEMU binary target.
 #
-# @arch: the target architecture
+# @arch: the binary target architecture
 #
 # Since: 1.2
 ##
-{ 'struct': 'TargetInfo',
+{ 'struct': 'BinaryTargetInfo',
   'data': { 'arch': 'SysEmuTarget' } }
 
 ##
@@ -291,11 +291,11 @@
 #
 # Return information about the target for this QEMU
 #
-# Returns: TargetInfo
+# Returns: BinaryTargetInfo
 #
 # Since: 1.2
 ##
-{ 'command': 'query-target', 'returns': 'TargetInfo' }
+{ 'command': 'query-target', 'returns': 'BinaryTargetInfo' }
 
 ##
 # @UuidInfo:
diff --git a/hw/core/machine-qmp-cmds.c b/hw/core/machine-qmp-cmds.c
index 3130c5cd456..408994b67d7 100644
--- a/hw/core/machine-qmp-cmds.c
+++ b/hw/core/machine-qmp-cmds.c
@@ -132,9 +132,9 @@ CurrentMachineParams *qmp_query_current_machine(Error **errp)
     return params;
 }
 
-TargetInfo *qmp_query_target(Error **errp)
+BinaryTargetInfo *qmp_query_target(Error **errp)
 {
-    TargetInfo *info = g_malloc0(sizeof(*info));
+    BinaryTargetInfo *info = g_malloc0(sizeof(*info));
 
     info->arch = qapi_enum_parse(&SysEmuTarget_lookup, target_name(), -1,
                                  &error_abort);
-- 
2.47.1

Re: [RFC PATCH v3 01/14] qapi: Rename TargetInfo structure as BinaryTargetInfo

[Philippe Mathieu-Daudé]

+Daniel/Markus on this single one.

On 18/4/25 19:28, Philippe Mathieu-Daudé wrote:
> The QAPI-generated 'TargetInfo' structure name is only used
> in a single file. We want to heavily use another structure
> similarly named. Rename the QAPI one, since structure names
> are not part of the public API.
> 
> Suggested-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
> ---
>   qapi/machine.json          | 12 ++++++------
>   hw/core/machine-qmp-cmds.c |  4 ++--
>   2 files changed, 8 insertions(+), 8 deletions(-)
> 
> diff --git a/qapi/machine.json b/qapi/machine.json
> index a6b8795b09e..3246212f048 100644
> --- a/qapi/machine.json
> +++ b/qapi/machine.json
> @@ -275,15 +275,15 @@
>   { 'command': 'query-current-machine', 'returns': 'CurrentMachineParams' }
>   
>   ##
> -# @TargetInfo:
> +# @BinaryTargetInfo:
>   #
> -# Information describing the QEMU target.
> +# Information describing the QEMU binary target.
>   #
> -# @arch: the target architecture
> +# @arch: the binary target architecture
>   #
>   # Since: 1.2
>   ##
> -{ 'struct': 'TargetInfo',
> +{ 'struct': 'BinaryTargetInfo',
>     'data': { 'arch': 'SysEmuTarget' } }
>   
>   ##
> @@ -291,11 +291,11 @@
>   #
>   # Return information about the target for this QEMU
>   #
> -# Returns: TargetInfo
> +# Returns: BinaryTargetInfo
>   #
>   # Since: 1.2
>   ##
> -{ 'command': 'query-target', 'returns': 'TargetInfo' }
> +{ 'command': 'query-target', 'returns': 'BinaryTargetInfo' }
>   
>   ##
>   # @UuidInfo:
> diff --git a/hw/core/machine-qmp-cmds.c b/hw/core/machine-qmp-cmds.c
> index 3130c5cd456..408994b67d7 100644
> --- a/hw/core/machine-qmp-cmds.c
> +++ b/hw/core/machine-qmp-cmds.c
> @@ -132,9 +132,9 @@ CurrentMachineParams *qmp_query_current_machine(Error **errp)
>       return params;
>   }
>   
> -TargetInfo *qmp_query_target(Error **errp)
> +BinaryTargetInfo *qmp_query_target(Error **errp)
>   {
> -    TargetInfo *info = g_malloc0(sizeof(*info));
> +    BinaryTargetInfo *info = g_malloc0(sizeof(*info));
>   
>       info->arch = qapi_enum_parse(&SysEmuTarget_lookup, target_name(), -1,
>                                    &error_abort);

Re: [RFC PATCH v3 01/14] qapi: Rename TargetInfo structure as BinaryTargetInfo

[Richard Henderson]

On 4/18/25 10:28, Philippe Mathieu-Daudé wrote:
> The QAPI-generated 'TargetInfo' structure name is only used
> in a single file. We want to heavily use another structure
> similarly named. Rename the QAPI one, since structure names
> are not part of the public API.
> 
> Suggested-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
> ---
>   qapi/machine.json          | 12 ++++++------
>   hw/core/machine-qmp-cmds.c |  4 ++--
>   2 files changed, 8 insertions(+), 8 deletions(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~

Re: [RFC PATCH v3 01/14] qapi: Rename TargetInfo structure as BinaryTargetInfo

[Markus Armbruster]

Philippe Mathieu-Daudé <philmd@linaro.org> writes:

> The QAPI-generated 'TargetInfo' structure name is only used
> in a single file. We want to heavily use another structure
> similarly named. Rename the QAPI one, since structure names
> are not part of the public API.
>
> Suggested-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
> ---
>  qapi/machine.json          | 12 ++++++------
>  hw/core/machine-qmp-cmds.c |  4 ++--
>  2 files changed, 8 insertions(+), 8 deletions(-)
>
> diff --git a/qapi/machine.json b/qapi/machine.json
> index a6b8795b09e..3246212f048 100644
> --- a/qapi/machine.json
> +++ b/qapi/machine.json
> @@ -275,15 +275,15 @@
>  { 'command': 'query-current-machine', 'returns': 'CurrentMachineParams' }
>  
>  ##
> -# @TargetInfo:
> +# @BinaryTargetInfo:
>  #
> -# Information describing the QEMU target.
> +# Information describing the QEMU binary target.

What's "the QEMU binary target"?  The QEMU binary's target?

From the QMP user's point of view, perhaps "the QEMU process's target"
would make more sense.

>  #
> -# @arch: the target architecture
> +# @arch: the binary target architecture

Are there non-binary target architectures?

>  #
>  # Since: 1.2
>  ##
> -{ 'struct': 'TargetInfo',
> +{ 'struct': 'BinaryTargetInfo',
>    'data': { 'arch': 'SysEmuTarget' } }
>  
>  ##
> @@ -291,11 +291,11 @@
>  #
>  # Return information about the target for this QEMU
>  #
> -# Returns: TargetInfo
> +# Returns: BinaryTargetInfo
>  #
>  # Since: 1.2
>  ##
> -{ 'command': 'query-target', 'returns': 'TargetInfo' }
> +{ 'command': 'query-target', 'returns': 'BinaryTargetInfo' }
>  
>  ##
>  # @UuidInfo:
> diff --git a/hw/core/machine-qmp-cmds.c b/hw/core/machine-qmp-cmds.c
> index 3130c5cd456..408994b67d7 100644
> --- a/hw/core/machine-qmp-cmds.c
> +++ b/hw/core/machine-qmp-cmds.c
> @@ -132,9 +132,9 @@ CurrentMachineParams *qmp_query_current_machine(Error **errp)
>      return params;
>  }
>  
> -TargetInfo *qmp_query_target(Error **errp)
> +BinaryTargetInfo *qmp_query_target(Error **errp)
>  {
> -    TargetInfo *info = g_malloc0(sizeof(*info));
> +    BinaryTargetInfo *info = g_malloc0(sizeof(*info));
>  
>      info->arch = qapi_enum_parse(&SysEmuTarget_lookup, target_name(), -1,
>                                   &error_abort);

Re: [RFC PATCH v3 01/14] qapi: Rename TargetInfo structure as BinaryTargetInfo

[Philippe Mathieu-Daudé]

On 22/4/25 07:55, Markus Armbruster wrote:
> Philippe Mathieu-Daudé <philmd@linaro.org> writes:
> 
>> The QAPI-generated 'TargetInfo' structure name is only used
>> in a single file. We want to heavily use another structure
>> similarly named. Rename the QAPI one, since structure names
>> are not part of the public API.
>>
>> Suggested-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
>> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
>> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
>> ---
>>   qapi/machine.json          | 12 ++++++------
>>   hw/core/machine-qmp-cmds.c |  4 ++--
>>   2 files changed, 8 insertions(+), 8 deletions(-)
>>
>> diff --git a/qapi/machine.json b/qapi/machine.json
>> index a6b8795b09e..3246212f048 100644
>> --- a/qapi/machine.json
>> +++ b/qapi/machine.json
>> @@ -275,15 +275,15 @@
>>   { 'command': 'query-current-machine', 'returns': 'CurrentMachineParams' }
>>   
>>   ##
>> -# @TargetInfo:
>> +# @BinaryTargetInfo:
>>   #
>> -# Information describing the QEMU target.
>> +# Information describing the QEMU binary target.
> 
> What's "the QEMU binary target"?  The QEMU binary's target?

For me 'qemu-system-aarch64' is a QEMU binary, but for Pierrick and
Richard it is the QEMU target, so I merged both names ¯\_(ツ)_/¯

This structure describes the static target configuration built into
a binary, i.e. TARGET_NAME=aarch64, TARGET_BIG_ENDIAN=false.

For the forthcoming single/heterogeneous binary, we don't have a
particular restricted configuration in the binary.

What about "Information describing the QEMU target configuration
built in a binary."?

> 
>  From the QMP user's point of view, perhaps "the QEMU process's target"
> would make more sense.

So maybe ProcessTargetInfo is a better structure name.

For heterogeneous target I suppose we'll return SYS_EMU_TARGET_HETERO
and we'll provide new QMP commands, possibly returning array of
ProcessTargetInfo.

> 
>>   #
>> -# @arch: the target architecture
>> +# @arch: the binary target architecture
> 
> Are there non-binary target architectures?

:) I won't update this line.

> 
>>   #
>>   # Since: 1.2
>>   ##
>> -{ 'struct': 'TargetInfo',
>> +{ 'struct': 'BinaryTargetInfo',
>>     'data': { 'arch': 'SysEmuTarget' } }
>>   
>>   ##
>> @@ -291,11 +291,11 @@
>>   #
>>   # Return information about the target for this QEMU
>>   #
>> -# Returns: TargetInfo
>> +# Returns: BinaryTargetInfo
>>   #
>>   # Since: 1.2
>>   ##
>> -{ 'command': 'query-target', 'returns': 'TargetInfo' }
>> +{ 'command': 'query-target', 'returns': 'BinaryTargetInfo' }
>>   
>>   ##
>>   # @UuidInfo:
>> diff --git a/hw/core/machine-qmp-cmds.c b/hw/core/machine-qmp-cmds.c
>> index 3130c5cd456..408994b67d7 100644
>> --- a/hw/core/machine-qmp-cmds.c
>> +++ b/hw/core/machine-qmp-cmds.c
>> @@ -132,9 +132,9 @@ CurrentMachineParams *qmp_query_current_machine(Error **errp)
>>       return params;
>>   }
>>   
>> -TargetInfo *qmp_query_target(Error **errp)
>> +BinaryTargetInfo *qmp_query_target(Error **errp)
>>   {
>> -    TargetInfo *info = g_malloc0(sizeof(*info));
>> +    BinaryTargetInfo *info = g_malloc0(sizeof(*info));
>>   
>>       info->arch = qapi_enum_parse(&SysEmuTarget_lookup, target_name(), -1,
>>                                    &error_abort);
> 

Re: [RFC PATCH v3 01/14] qapi: Rename TargetInfo structure as BinaryTargetInfo

[Markus Armbruster]

Philippe Mathieu-Daudé <philmd@linaro.org> writes:

> On 22/4/25 07:55, Markus Armbruster wrote:
>> Philippe Mathieu-Daudé <philmd@linaro.org> writes:
>> 
>>> The QAPI-generated 'TargetInfo' structure name is only used
>>> in a single file. We want to heavily use another structure
>>> similarly named. Rename the QAPI one, since structure names
>>> are not part of the public API.
>>>
>>> Suggested-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
>>> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
>>> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
>>> ---
>>>   qapi/machine.json          | 12 ++++++------
>>>   hw/core/machine-qmp-cmds.c |  4 ++--
>>>   2 files changed, 8 insertions(+), 8 deletions(-)
>>>
>>> diff --git a/qapi/machine.json b/qapi/machine.json
>>> index a6b8795b09e..3246212f048 100644
>>> --- a/qapi/machine.json
>>> +++ b/qapi/machine.json
>>> @@ -275,15 +275,15 @@
>>>  { 'command': 'query-current-machine', 'returns': 'CurrentMachineParams' }
>>>   
>>>  ##
>>> -# @TargetInfo:
>>> +# @BinaryTargetInfo:
>>>  #
>>> -# Information describing the QEMU target.
>>> +# Information describing the QEMU binary target.
>> 
>> What's "the QEMU binary target"?  The QEMU binary's target?
>
> For me 'qemu-system-aarch64' is a QEMU binary,

Makes sense to me.

>                                                but for Pierrick and
> Richard it is the QEMU target,

Make about as much sense to me as calling my /usr/bin/gcc "the GNU C
compiler target", i.e. none.  It's the GNU C compiler targeting x86_64.

>                                so I merged both names ¯\_(ツ)_/¯

If it gets your patch merged...

> This structure describes the static target configuration built into
> a binary, i.e. TARGET_NAME=aarch64, TARGET_BIG_ENDIAN=false.
>
> For the forthcoming single/heterogeneous binary, we don't have a
> particular restricted configuration in the binary.
>
> What about "Information describing the QEMU target configuration
> built in a binary."?

That's better.  Here's my try: "Information on the target configuration
built into the QEMU binary."

>>  From the QMP user's point of view, perhaps "the QEMU process's target"
>> would make more sense.
>
> So maybe ProcessTargetInfo is a better structure name.

QemuTargetInfo would sidestep binary vs. process.

> For heterogeneous target I suppose we'll return SYS_EMU_TARGET_HETERO
> and we'll provide new QMP commands, possibly returning array of
> ProcessTargetInfo.

[...]

Re: [RFC PATCH v3 01/14] qapi: Rename TargetInfo structure as BinaryTargetInfo

[Philippe Mathieu-Daudé]

On 22/4/25 11:10, Markus Armbruster wrote:
> Philippe Mathieu-Daudé <philmd@linaro.org> writes:
> 
>> On 22/4/25 07:55, Markus Armbruster wrote:
>>> Philippe Mathieu-Daudé <philmd@linaro.org> writes:
>>>
>>>> The QAPI-generated 'TargetInfo' structure name is only used
>>>> in a single file. We want to heavily use another structure
>>>> similarly named. Rename the QAPI one, since structure names
>>>> are not part of the public API.
>>>>
>>>> Suggested-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
>>>> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
>>>> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
>>>> ---
>>>>    qapi/machine.json          | 12 ++++++------
>>>>    hw/core/machine-qmp-cmds.c |  4 ++--
>>>>    2 files changed, 8 insertions(+), 8 deletions(-)
>>>>
>>>> diff --git a/qapi/machine.json b/qapi/machine.json
>>>> index a6b8795b09e..3246212f048 100644
>>>> --- a/qapi/machine.json
>>>> +++ b/qapi/machine.json
>>>> @@ -275,15 +275,15 @@
>>>>   { 'command': 'query-current-machine', 'returns': 'CurrentMachineParams' }
>>>>    
>>>>   ##
>>>> -# @TargetInfo:
>>>> +# @BinaryTargetInfo:
>>>>   #
>>>> -# Information describing the QEMU target.
>>>> +# Information describing the QEMU binary target.
>>>
>>> What's "the QEMU binary target"?  The QEMU binary's target?
>>
>> For me 'qemu-system-aarch64' is a QEMU binary,
> 
> Makes sense to me.
> 
>>                                                 but for Pierrick and
>> Richard it is the QEMU target,
> 
> Make about as much sense to me as calling my /usr/bin/gcc "the GNU C
> compiler target", i.e. none.  It's the GNU C compiler targeting x86_64.
> 
>>                                 so I merged both names ¯\_(ツ)_/¯
> 
> If it gets your patch merged...
> 
>> This structure describes the static target configuration built into
>> a binary, i.e. TARGET_NAME=aarch64, TARGET_BIG_ENDIAN=false.
>>
>> For the forthcoming single/heterogeneous binary, we don't have a
>> particular restricted configuration in the binary.
>>
>> What about "Information describing the QEMU target configuration
>> built in a binary."?
> 
> That's better.  Here's my try: "Information on the target configuration
> built into the QEMU binary."
> 
>>>   From the QMP user's point of view, perhaps "the QEMU process's target"
>>> would make more sense.
>>
>> So maybe ProcessTargetInfo is a better structure name.
> 
> QemuTargetInfo would sidestep binary vs. process.

Thank you!

> 
>> For heterogeneous target I suppose we'll return SYS_EMU_TARGET_HETERO
>> and we'll provide new QMP commands, possibly returning array of
>> ProcessTargetInfo.
> 
> [...]
> 

Re: [RFC PATCH v3 01/14] qapi: Rename TargetInfo structure as BinaryTargetInfo

[BALATON Zoltan]

[-- Attachment #1: Type: text/plain, Size: 2782 bytes --]

On Tue, 22 Apr 2025, Markus Armbruster wrote:
> Philippe Mathieu-Daudé <philmd@linaro.org> writes:
>> On 22/4/25 07:55, Markus Armbruster wrote:
>>> Philippe Mathieu-Daudé <philmd@linaro.org> writes:
>>>
>>>> The QAPI-generated 'TargetInfo' structure name is only used
>>>> in a single file. We want to heavily use another structure
>>>> similarly named. Rename the QAPI one, since structure names
>>>> are not part of the public API.
>>>>
>>>> Suggested-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
>>>> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
>>>> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
>>>> ---
>>>>   qapi/machine.json          | 12 ++++++------
>>>>   hw/core/machine-qmp-cmds.c |  4 ++--
>>>>   2 files changed, 8 insertions(+), 8 deletions(-)
>>>>
>>>> diff --git a/qapi/machine.json b/qapi/machine.json
>>>> index a6b8795b09e..3246212f048 100644
>>>> --- a/qapi/machine.json
>>>> +++ b/qapi/machine.json
>>>> @@ -275,15 +275,15 @@
>>>>  { 'command': 'query-current-machine', 'returns': 'CurrentMachineParams' }
>>>>
>>>>  ##
>>>> -# @TargetInfo:
>>>> +# @BinaryTargetInfo:
>>>>  #
>>>> -# Information describing the QEMU target.
>>>> +# Information describing the QEMU binary target.
>>>
>>> What's "the QEMU binary target"?  The QEMU binary's target?
>>
>> For me 'qemu-system-aarch64' is a QEMU binary,
>
> Makes sense to me.
>
>>                                                but for Pierrick and
>> Richard it is the QEMU target,
>
> Make about as much sense to me as calling my /usr/bin/gcc "the GNU C
> compiler target", i.e. none.  It's the GNU C compiler targeting x86_64.

There's some explanation on different usages of target in
https://www.qemu.org/docs/master/devel/tcg-ops.html
maybe that explains different views.

Regards,
BALATON Zoltan

>>                                so I merged both names ¯\_(ツ)_/¯
>
> If it gets your patch merged...
>
>> This structure describes the static target configuration built into
>> a binary, i.e. TARGET_NAME=aarch64, TARGET_BIG_ENDIAN=false.
>>
>> For the forthcoming single/heterogeneous binary, we don't have a
>> particular restricted configuration in the binary.
>>
>> What about "Information describing the QEMU target configuration
>> built in a binary."?
>
> That's better.  Here's my try: "Information on the target configuration
> built into the QEMU binary."
>
>>>  From the QMP user's point of view, perhaps "the QEMU process's target"
>>> would make more sense.
>>
>> So maybe ProcessTargetInfo is a better structure name.
>
> QemuTargetInfo would sidestep binary vs. process.
>
>> For heterogeneous target I suppose we'll return SYS_EMU_TARGET_HETERO
>> and we'll provide new QMP commands, possibly returning array of
>> ProcessTargetInfo.
>
> [...]
>
>
>

Re: [RFC PATCH v3 01/14] qapi: Rename TargetInfo structure as BinaryTargetInfo

[Pierrick Bouvier]

On 4/22/25 00:35, Philippe Mathieu-Daudé wrote:
> On 22/4/25 07:55, Markus Armbruster wrote:
>> Philippe Mathieu-Daudé <philmd@linaro.org> writes:
>>
>>> The QAPI-generated 'TargetInfo' structure name is only used
>>> in a single file. We want to heavily use another structure
>>> similarly named. Rename the QAPI one, since structure names
>>> are not part of the public API.
>>>
>>> Suggested-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
>>> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
>>> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
>>> ---
>>>    qapi/machine.json          | 12 ++++++------
>>>    hw/core/machine-qmp-cmds.c |  4 ++--
>>>    2 files changed, 8 insertions(+), 8 deletions(-)
>>>
>>> diff --git a/qapi/machine.json b/qapi/machine.json
>>> index a6b8795b09e..3246212f048 100644
>>> --- a/qapi/machine.json
>>> +++ b/qapi/machine.json
>>> @@ -275,15 +275,15 @@
>>>    { 'command': 'query-current-machine', 'returns': 'CurrentMachineParams' }
>>>    
>>>    ##
>>> -# @TargetInfo:
>>> +# @BinaryTargetInfo:
>>>    #
>>> -# Information describing the QEMU target.
>>> +# Information describing the QEMU binary target.
>>
>> What's "the QEMU binary target"?  The QEMU binary's target?
> 

I agree that "target" is a *very* confusing term in QEMU.
It depends if you adopt the point of view of a compiler (where you 
generate code to *run* on a given target), or the one of an emulator 
(where you translate a target architecture to *run* on your host).

For the context of the single binary here, a target is a target in the 
meaning of our build system: ./configure --target-list=X.
In other words, a target is one of the configuration present in 
configs/targets.

It's a pair of {arch, mode}, where arch is the target architecture 
emulated, and mode is {softmmu,linux,bsd-user}.

Arch could be considered ambiguous, if you consider endianness variants 
(aarch64 vs aarch64_be, or xtensaeb vs xtensa for instance), or even 
"bitness" variants (i386 vs x86_64, arm vs aarch64).
However, for everyone sanity, I think it's better if we follow the exact 
list of targets present in config/targets today, without any change. So 
we consider any variant to be a distinct target, even though they will 
have most of their implementation in common.

Does that help to understand, or is it even more confusing?

> For me 'qemu-system-aarch64' is a QEMU binary, but for Pierrick and
> Richard it is the QEMU target, so I merged both names ¯\_(ツ)_/¯
> 

Mentioning "QEMU binary" reflects an arbitrary choice of the 
architecture we have today, but not what we might have tomorrow.
It happens that at the moment, our target list *is* the existing list of 
QEMU binaries, but it might change in the future.
Indeed, we'll be able to build several targets within a single qemu 
binary. At this point, what will be the rationale to name the targets as 
"binaries"?

If we follow this logic, we should have used: ./configure 
--binary-list=X from the start.

GCC and Clang both have the same semantic for target (which architecture 
to emit code for), but gcc uses separate binaries, while clang has a 
single binary and symlinks, and allows to override target with -target 
command line parameter.

I want to point that it's not a personal preference or taste, but simply 
reflecting what exists in QEMU command line and build system. From 
there, I don't see why we should invent another name for an existing wheel.

> This structure describes the static target configuration built into
> a binary, i.e. TARGET_NAME=aarch64, TARGET_BIG_ENDIAN=false.
> 
> For the forthcoming single/heterogeneous binary, we don't have a
> particular restricted configuration in the binary.
> 
> What about "Information describing the QEMU target configuration
> built in a binary."?
> 
>>   From the QMP user's point of view, perhaps "the QEMU process's target"
>> would make more sense.
> 
> So maybe ProcessTargetInfo is a better structure name.
> 
> For heterogeneous target I suppose we'll return SYS_EMU_TARGET_HETERO
> and we'll provide new QMP commands, possibly returning array of
> ProcessTargetInfo.
> 
>>
>>>    #
>>> -# @arch: the target architecture
>>> +# @arch: the binary target architecture
>>
>> Are there non-binary target architectures?
> 
> :) I won't update this line.
> 
>>
>>>    #
>>>    # Since: 1.2
>>>    ##
>>> -{ 'struct': 'TargetInfo',
>>> +{ 'struct': 'BinaryTargetInfo',
>>>      'data': { 'arch': 'SysEmuTarget' } }
>>>

TargetInfo and query-target are good name choices.
It just happens that it would be more useful to have this name for a 
codebase wide type, instead of a specific type used only by one QMP command.

As well, (QMP) TargetInfo is a struct with a single field, that simply 
exists to workaround a QAPI limitation:
/home/user/.work/qemu/qapi/machine.json: In command 'query-target':
/home/user/.work/qemu/qapi/machine.json:286: command's 'returns' cannot 
take enum type 'SysEmuTarget'

I don't think it's necessary to fix this limitation, or do any deep 
thinking, any name change will free the TargetInfo for what we really 
need. So SysEmuTargetStruct, SysEmuTargetContainer, QMPTargetInfo, 
SysEmuTargetInfo, or any [A-Z]*TargetInfo* is ok for me, as long as we 
don't mention what a "QEMU Binary" is.

>>>    ##
>>> @@ -291,11 +291,11 @@
>>>    #
>>>    # Return information about the target for this QEMU
>>>    #
>>> -# Returns: TargetInfo
>>> +# Returns: BinaryTargetInfo
>>>    #
>>>    # Since: 1.2
>>>    ##
>>> -{ 'command': 'query-target', 'returns': 'TargetInfo' }
>>> +{ 'command': 'query-target', 'returns': 'BinaryTargetInfo' }
>>>    
>>>    ##
>>>    # @UuidInfo:
>>> diff --git a/hw/core/machine-qmp-cmds.c b/hw/core/machine-qmp-cmds.c
>>> index 3130c5cd456..408994b67d7 100644
>>> --- a/hw/core/machine-qmp-cmds.c
>>> +++ b/hw/core/machine-qmp-cmds.c
>>> @@ -132,9 +132,9 @@ CurrentMachineParams *qmp_query_current_machine(Error **errp)
>>>        return params;
>>>    }
>>>    
>>> -TargetInfo *qmp_query_target(Error **errp)
>>> +BinaryTargetInfo *qmp_query_target(Error **errp)
>>>    {
>>> -    TargetInfo *info = g_malloc0(sizeof(*info));
>>> +    BinaryTargetInfo *info = g_malloc0(sizeof(*info));
>>>    
>>>        info->arch = qapi_enum_parse(&SysEmuTarget_lookup, target_name(), -1,
>>>                                     &error_abort);
>>
> 

[RFC PATCH v3 02/14] qemu: Convert target_name() to TargetInfo API

[Philippe Mathieu-Daudé]

Have target_name() be a target-agnostic method, dispatching
to a per-target TargetInfo singleton structure.
By default a stub singleton is used. No logical change
expected.

Inspired-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
---
 meson.build                     |  3 +++
 include/hw/core/cpu.h           |  2 --
 include/qemu/target_info-impl.h | 23 +++++++++++++++++++++++
 include/qemu/target_info.h      | 19 +++++++++++++++++++
 cpu-target.c                    |  5 -----
 hw/core/machine-qmp-cmds.c      |  1 +
 plugins/loader.c                |  2 +-
 system/vl.c                     |  2 +-
 target_info-stub.c              | 19 +++++++++++++++++++
 target_info.c                   | 16 ++++++++++++++++
 10 files changed, 83 insertions(+), 9 deletions(-)
 create mode 100644 include/qemu/target_info-impl.h
 create mode 100644 include/qemu/target_info.h
 create mode 100644 target_info-stub.c
 create mode 100644 target_info.c

diff --git a/meson.build b/meson.build
index bcb9d39a387..49a050a28a3 100644
--- a/meson.build
+++ b/meson.build
@@ -3807,6 +3807,9 @@ endif
 common_ss.add(pagevary)
 specific_ss.add(files('page-target.c', 'page-vary-target.c'))
 
+common_ss.add(files('target_info.c'))
+specific_ss.add(files('target_info-stub.c'))
+
 subdir('backends')
 subdir('disas')
 subdir('migration')
diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h
index 5b645df59f5..9d9448341d1 100644
--- a/include/hw/core/cpu.h
+++ b/include/hw/core/cpu.h
@@ -1115,8 +1115,6 @@ bool cpu_exec_realizefn(CPUState *cpu, Error **errp);
 void cpu_exec_unrealizefn(CPUState *cpu);
 void cpu_exec_reset_hold(CPUState *cpu);
 
-const char *target_name(void);
-
 #ifdef COMPILING_PER_TARGET
 
 extern const VMStateDescription vmstate_cpu_common;
diff --git a/include/qemu/target_info-impl.h b/include/qemu/target_info-impl.h
new file mode 100644
index 00000000000..11b92796b28
--- /dev/null
+++ b/include/qemu/target_info-impl.h
@@ -0,0 +1,23 @@
+/*
+ * QEMU binary/target API ...
+ *
+ *  Copyright (c) Linaro
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#ifndef QEMU_TARGET_INFO_IMPL_H
+#define QEMU_TARGET_INFO_IMPL_H
+
+#include "qemu/target_info.h"
+
+typedef struct TargetInfo {
+
+    /* runtime equivalent of TARGET_NAME definition */
+    const char *const target_name;
+
+} TargetInfo;
+
+const TargetInfo *target_info(void);
+
+#endif
diff --git a/include/qemu/target_info.h b/include/qemu/target_info.h
new file mode 100644
index 00000000000..3f6cbbbd300
--- /dev/null
+++ b/include/qemu/target_info.h
@@ -0,0 +1,19 @@
+/*
+ * QEMU binary/target API
+ *
+ *  Copyright (c) Linaro
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#ifndef QEMU_TARGET_INFO_H
+#define QEMU_TARGET_INFO_H
+
+/**
+ * target_name:
+ *
+ * Returns: Canonical target name (i.e. "i386").
+ */
+const char *target_name(void);
+
+#endif
diff --git a/cpu-target.c b/cpu-target.c
index c99d208a7c4..3f82d3ea444 100644
--- a/cpu-target.c
+++ b/cpu-target.c
@@ -165,8 +165,3 @@ bool target_words_bigendian(void)
 {
     return TARGET_BIG_ENDIAN;
 }
-
-const char *target_name(void)
-{
-    return TARGET_NAME;
-}
diff --git a/hw/core/machine-qmp-cmds.c b/hw/core/machine-qmp-cmds.c
index 408994b67d7..b317aec234f 100644
--- a/hw/core/machine-qmp-cmds.c
+++ b/hw/core/machine-qmp-cmds.c
@@ -19,6 +19,7 @@
 #include "qapi/qobject-input-visitor.h"
 #include "qapi/type-helpers.h"
 #include "qemu/uuid.h"
+#include "qemu/target_info.h"
 #include "qom/qom-qobject.h"
 #include "system/hostmem.h"
 #include "system/hw_accel.h"
diff --git a/plugins/loader.c b/plugins/loader.c
index 7523d554f03..36a4e88d4db 100644
--- a/plugins/loader.c
+++ b/plugins/loader.c
@@ -29,7 +29,7 @@
 #include "qemu/xxhash.h"
 #include "qemu/plugin.h"
 #include "qemu/memalign.h"
-#include "hw/core/cpu.h"
+#include "qemu/target_info.h"
 #include "exec/tb-flush.h"
 
 #include "plugin.h"
diff --git a/system/vl.c b/system/vl.c
index c17945c4939..d8a0fe713c9 100644
--- a/system/vl.c
+++ b/system/vl.c
@@ -40,6 +40,7 @@
 #include "qemu/help_option.h"
 #include "qemu/hw-version.h"
 #include "qemu/uuid.h"
+#include "qemu/target_info.h"
 #include "system/reset.h"
 #include "system/runstate.h"
 #include "system/runstate-action.h"
@@ -79,7 +80,6 @@
 #include "hw/block/block.h"
 #include "hw/i386/x86.h"
 #include "hw/i386/pc.h"
-#include "hw/core/cpu.h"
 #include "migration/cpr.h"
 #include "migration/misc.h"
 #include "migration/snapshot.h"
diff --git a/target_info-stub.c b/target_info-stub.c
new file mode 100644
index 00000000000..f15972c5b22
--- /dev/null
+++ b/target_info-stub.c
@@ -0,0 +1,19 @@
+/*
+ * QEMU target info stubs
+ *
+ *  Copyright (c) Linaro
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#include "qemu/osdep.h"
+#include "qemu/target_info-impl.h"
+
+static const TargetInfo target_info_stub = {
+    .target_name = TARGET_NAME,
+};
+
+const TargetInfo *target_info(void)
+{
+    return &target_info_stub;
+}
diff --git a/target_info.c b/target_info.c
new file mode 100644
index 00000000000..48c4a413326
--- /dev/null
+++ b/target_info.c
@@ -0,0 +1,16 @@
+/*
+ * QEMU binary/target helpers
+ *
+ *  Copyright (c) Linaro
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#include "qemu/osdep.h"
+#include "qemu/target_info-impl.h"
+#include "qemu/target_info.h"
+
+const char *target_name(void)
+{
+    return target_info()->target_name;
+}
-- 
2.47.1

Re: [RFC PATCH v3 02/14] qemu: Convert target_name() to TargetInfo API

[Richard Henderson]

On 4/18/25 10:28, Philippe Mathieu-Daudé wrote:
>   include/hw/core/cpu.h           |  2 --
>   include/qemu/target_info-impl.h | 23 +++++++++++++++++++++++
>   include/qemu/target_info.h      | 19 +++++++++++++++++++
>   cpu-target.c                    |  5 -----
>   hw/core/machine-qmp-cmds.c      |  1 +
>   plugins/loader.c                |  2 +-
>   system/vl.c                     |  2 +-
>   target_info-stub.c              | 19 +++++++++++++++++++
>   target_info.c                   | 16 ++++++++++++++++

Can we not mix and match _ and - in file names?
It's weird.


r~

Re: [RFC PATCH v3 02/14] qemu: Convert target_name() to TargetInfo API

[Philippe Mathieu-Daudé]

On 21/4/25 17:56, Richard Henderson wrote:
> On 4/18/25 10:28, Philippe Mathieu-Daudé wrote:
>>   include/hw/core/cpu.h           |  2 --
>>   include/qemu/target_info-impl.h | 23 +++++++++++++++++++++++
>>   include/qemu/target_info.h      | 19 +++++++++++++++++++
>>   cpu-target.c                    |  5 -----
>>   hw/core/machine-qmp-cmds.c      |  1 +
>>   plugins/loader.c                |  2 +-
>>   system/vl.c                     |  2 +-
>>   target_info-stub.c              | 19 +++++++++++++++++++
>>   target_info.c                   | 16 ++++++++++++++++
> 
> Can we not mix and match _ and - in file names?
> It's weird.

Eh style is a matter of taste :)

Since meson converts '/' -> '_', maybe use '-'?

If so, we mention our preference in docs/devel/style.rst.

[RFC PATCH v3 03/14] system/vl: Filter machine list available for a particular target binary

[Philippe Mathieu-Daudé]

Binaries can register a QOM type to filter their machines
by filling their TargetInfo::machine_typename field.

This can be used by example by main() -> machine_help_func()
to filter the machines list.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 meson.build                     |  1 +
 include/qemu/target_info-impl.h |  3 +++
 include/qemu/target_info.h      |  8 ++++++++
 system/vl.c                     |  3 ++-
 target_info-qom.c               | 15 +++++++++++++++
 target_info-stub.c              |  2 ++
 target_info.c                   |  5 +++++
 7 files changed, 36 insertions(+), 1 deletion(-)
 create mode 100644 target_info-qom.c

diff --git a/meson.build b/meson.build
index 49a050a28a3..168b07b5887 100644
--- a/meson.build
+++ b/meson.build
@@ -3808,6 +3808,7 @@ common_ss.add(pagevary)
 specific_ss.add(files('page-target.c', 'page-vary-target.c'))
 
 common_ss.add(files('target_info.c'))
+system_ss.add(files('target_info-qom.c'))
 specific_ss.add(files('target_info-stub.c'))
 
 subdir('backends')
diff --git a/include/qemu/target_info-impl.h b/include/qemu/target_info-impl.h
index 11b92796b28..e3344278a92 100644
--- a/include/qemu/target_info-impl.h
+++ b/include/qemu/target_info-impl.h
@@ -16,6 +16,9 @@ typedef struct TargetInfo {
     /* runtime equivalent of TARGET_NAME definition */
     const char *const target_name;
 
+    /* QOM typename machines for this binary must implement */
+    const char *const machine_typename;
+
 } TargetInfo;
 
 const TargetInfo *target_info(void);
diff --git a/include/qemu/target_info.h b/include/qemu/target_info.h
index 3f6cbbbd300..c67b97d66f3 100644
--- a/include/qemu/target_info.h
+++ b/include/qemu/target_info.h
@@ -16,4 +16,12 @@
  */
 const char *target_name(void);
 
+/**
+ * target_machine_typename:
+ *
+ * Returns: Name of the QOM interface implemented by machines
+ *          usable on this target binary.
+ */
+const char *target_machine_typename(void);
+
 #endif
diff --git a/system/vl.c b/system/vl.c
index d8a0fe713c9..8fb18f82e20 100644
--- a/system/vl.c
+++ b/system/vl.c
@@ -27,6 +27,7 @@
 #include "qemu/datadir.h"
 #include "qemu/units.h"
 #include "qemu/module.h"
+#include "qemu/target_info.h"
 #include "exec/cpu-common.h"
 #include "exec/page-vary.h"
 #include "hw/qdev-properties.h"
@@ -1564,7 +1565,7 @@ static void machine_help_func(const QDict *qdict)
     GSList *el;
     const char *type = qdict_get_try_str(qdict, "type");
 
-    machines = object_class_get_list(TYPE_MACHINE, false);
+    machines = object_class_get_list(target_machine_typename(), false);
     if (type) {
         ObjectClass *machine_class = OBJECT_CLASS(find_machine(type, machines));
         if (machine_class) {
diff --git a/target_info-qom.c b/target_info-qom.c
new file mode 100644
index 00000000000..a6fd8f1d5a3
--- /dev/null
+++ b/target_info-qom.c
@@ -0,0 +1,15 @@
+/*
+ * QEMU binary/target API (QOM types)
+ *
+ *  Copyright (c) Linaro
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#include "qemu/osdep.h"
+#include "qom/object.h"
+
+static const TypeInfo target_info_types[] = {
+};
+
+DEFINE_TYPES(target_info_types)
diff --git a/target_info-stub.c b/target_info-stub.c
index f15972c5b22..14e6d5e68d2 100644
--- a/target_info-stub.c
+++ b/target_info-stub.c
@@ -8,9 +8,11 @@
 
 #include "qemu/osdep.h"
 #include "qemu/target_info-impl.h"
+#include "hw/boards.h"
 
 static const TargetInfo target_info_stub = {
     .target_name = TARGET_NAME,
+    .machine_typename = TYPE_MACHINE,
 };
 
 const TargetInfo *target_info(void)
diff --git a/target_info.c b/target_info.c
index 48c4a413326..1de4334ecc5 100644
--- a/target_info.c
+++ b/target_info.c
@@ -14,3 +14,8 @@ const char *target_name(void)
 {
     return target_info()->target_name;
 }
+
+const char *target_machine_typename(void)
+{
+    return target_info()->machine_typename;
+}
-- 
2.47.1

Re: [RFC PATCH v3 03/14] system/vl: Filter machine list available for a particular target binary

[Pierrick Bouvier]

On 4/18/25 10:28, Philippe Mathieu-Daudé wrote:
> Binaries can register a QOM type to filter their machines
> by filling their TargetInfo::machine_typename field.
> 
> This can be used by example by main() -> machine_help_func()
> to filter the machines list.
> 
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
>   meson.build                     |  1 +
>   include/qemu/target_info-impl.h |  3 +++
>   include/qemu/target_info.h      |  8 ++++++++
>   system/vl.c                     |  3 ++-
>   target_info-qom.c               | 15 +++++++++++++++
>   target_info-stub.c              |  2 ++
>   target_info.c                   |  5 +++++
>   7 files changed, 36 insertions(+), 1 deletion(-)
>   create mode 100644 target_info-qom.c
> 
> diff --git a/meson.build b/meson.build
> index 49a050a28a3..168b07b5887 100644
> --- a/meson.build
> +++ b/meson.build
> @@ -3808,6 +3808,7 @@ common_ss.add(pagevary)
>   specific_ss.add(files('page-target.c', 'page-vary-target.c'))
>   
>   common_ss.add(files('target_info.c'))
> +system_ss.add(files('target_info-qom.c'))
>   specific_ss.add(files('target_info-stub.c'))
>   
>   subdir('backends')
> diff --git a/include/qemu/target_info-impl.h b/include/qemu/target_info-impl.h
> index 11b92796b28..e3344278a92 100644
> --- a/include/qemu/target_info-impl.h
> +++ b/include/qemu/target_info-impl.h
> @@ -16,6 +16,9 @@ typedef struct TargetInfo {
>       /* runtime equivalent of TARGET_NAME definition */
>       const char *const target_name;
>   
> +    /* QOM typename machines for this binary must implement */
> +    const char *const machine_typename;
> +
>   } TargetInfo;
>   
>   const TargetInfo *target_info(void);
> diff --git a/include/qemu/target_info.h b/include/qemu/target_info.h
> index 3f6cbbbd300..c67b97d66f3 100644
> --- a/include/qemu/target_info.h
> +++ b/include/qemu/target_info.h
> @@ -16,4 +16,12 @@
>    */
>   const char *target_name(void);
>   
> +/**
> + * target_machine_typename:
> + *
> + * Returns: Name of the QOM interface implemented by machines
> + *          usable on this target binary.
> + */
> +const char *target_machine_typename(void);
> +
>   #endif
> diff --git a/system/vl.c b/system/vl.c
> index d8a0fe713c9..8fb18f82e20 100644
> --- a/system/vl.c
> +++ b/system/vl.c
> @@ -27,6 +27,7 @@
>   #include "qemu/datadir.h"
>   #include "qemu/units.h"
>   #include "qemu/module.h"
> +#include "qemu/target_info.h"
>   #include "exec/cpu-common.h"
>   #include "exec/page-vary.h"
>   #include "hw/qdev-properties.h"
> @@ -1564,7 +1565,7 @@ static void machine_help_func(const QDict *qdict)
>       GSList *el;
>       const char *type = qdict_get_try_str(qdict, "type");
>   
> -    machines = object_class_get_list(TYPE_MACHINE, false);
> +    machines = object_class_get_list(target_machine_typename(), false);
>       if (type) {
>           ObjectClass *machine_class = OBJECT_CLASS(find_machine(type, machines));
>           if (machine_class) {
> diff --git a/target_info-qom.c b/target_info-qom.c
> new file mode 100644
> index 00000000000..a6fd8f1d5a3
> --- /dev/null
> +++ b/target_info-qom.c
> @@ -0,0 +1,15 @@
> +/*
> + * QEMU binary/target API (QOM types)
> + *
> + *  Copyright (c) Linaro
> + *
> + * SPDX-License-Identifier: GPL-2.0-or-later
> + */
> +
> +#include "qemu/osdep.h"
> +#include "qom/object.h"
> +
> +static const TypeInfo target_info_types[] = {
> +};
> +
> +DEFINE_TYPES(target_info_types)
> diff --git a/target_info-stub.c b/target_info-stub.c
> index f15972c5b22..14e6d5e68d2 100644
> --- a/target_info-stub.c
> +++ b/target_info-stub.c
> @@ -8,9 +8,11 @@
>   
>   #include "qemu/osdep.h"
>   #include "qemu/target_info-impl.h"
> +#include "hw/boards.h"
>   
>   static const TargetInfo target_info_stub = {
>       .target_name = TARGET_NAME,
> +    .machine_typename = TYPE_MACHINE,
>   };

Excellent, even more simple than returning NULL.

>   
>   const TargetInfo *target_info(void)
> diff --git a/target_info.c b/target_info.c
> index 48c4a413326..1de4334ecc5 100644
> --- a/target_info.c
> +++ b/target_info.c
> @@ -14,3 +14,8 @@ const char *target_name(void)
>   {
>       return target_info()->target_name;
>   }
> +
> +const char *target_machine_typename(void)
> +{
> +    return target_info()->machine_typename;
> +}

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>

[RFC PATCH v3 04/14] hw/arm: Register TYPE_TARGET_ARM/AARCH64_MACHINE QOM interfaces

[Philippe Mathieu-Daudé]

Define the TYPE_TARGET_ARM_MACHINE and TYPE_TARGET_AARCH64_MACHINE
QOM interface names to allow machines to implement them.

Register these interfaces in common code in target_info-qom.c used
by all binaries because QOM interfaces must be registered before
being checked (see next commit with the 'none' machine).

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 include/hw/arm/machines-qom.h | 18 ++++++++++++++++++
 target_info-qom.c             |  9 +++++++++
 2 files changed, 27 insertions(+)
 create mode 100644 include/hw/arm/machines-qom.h

diff --git a/include/hw/arm/machines-qom.h b/include/hw/arm/machines-qom.h
new file mode 100644
index 00000000000..a17225f5f92
--- /dev/null
+++ b/include/hw/arm/machines-qom.h
@@ -0,0 +1,18 @@
+/*
+ * QOM type definitions for ARM / Aarch64 machines
+ *
+ *  Copyright (c) Linaro
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#ifndef HW_ARM_MACHINES_QOM_H
+#define HW_ARM_MACHINES_QOM_H
+
+#define TYPE_TARGET_ARM_MACHINE \
+        "target-info-arm-machine"
+
+#define TYPE_TARGET_AARCH64_MACHINE \
+        "target-info-aarch64-machine"
+
+#endif
diff --git a/target_info-qom.c b/target_info-qom.c
index a6fd8f1d5a3..7fd58d24818 100644
--- a/target_info-qom.c
+++ b/target_info-qom.c
@@ -8,8 +8,17 @@
 
 #include "qemu/osdep.h"
 #include "qom/object.h"
+#include "hw/arm/machines-qom.h"
 
 static const TypeInfo target_info_types[] = {
+    {
+        .name           = TYPE_TARGET_ARM_MACHINE,
+        .parent         = TYPE_INTERFACE,
+    },
+    {
+        .name           = TYPE_TARGET_AARCH64_MACHINE,
+        .parent         = TYPE_INTERFACE,
+    },
 };
 
 DEFINE_TYPES(target_info_types)
-- 
2.47.1

Re: [RFC PATCH v3 04/14] hw/arm: Register TYPE_TARGET_ARM/AARCH64_MACHINE QOM interfaces

[Pierrick Bouvier]

On 4/18/25 10:28, Philippe Mathieu-Daudé wrote:
> Define the TYPE_TARGET_ARM_MACHINE and TYPE_TARGET_AARCH64_MACHINE
> QOM interface names to allow machines to implement them.
> 
> Register these interfaces in common code in target_info-qom.c used
> by all binaries because QOM interfaces must be registered before
> being checked (see next commit with the 'none' machine).
> 
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
>   include/hw/arm/machines-qom.h | 18 ++++++++++++++++++
>   target_info-qom.c             |  9 +++++++++
>   2 files changed, 27 insertions(+)
>   create mode 100644 include/hw/arm/machines-qom.h
> 
> diff --git a/include/hw/arm/machines-qom.h b/include/hw/arm/machines-qom.h
> new file mode 100644
> index 00000000000..a17225f5f92
> --- /dev/null
> +++ b/include/hw/arm/machines-qom.h
> @@ -0,0 +1,18 @@
> +/*
> + * QOM type definitions for ARM / Aarch64 machines
> + *
> + *  Copyright (c) Linaro
> + *
> + * SPDX-License-Identifier: GPL-2.0-or-later
> + */
> +
> +#ifndef HW_ARM_MACHINES_QOM_H
> +#define HW_ARM_MACHINES_QOM_H
> +
> +#define TYPE_TARGET_ARM_MACHINE \
> +        "target-info-arm-machine"
> +
> +#define TYPE_TARGET_AARCH64_MACHINE \
> +        "target-info-aarch64-machine"
> +
> +#endif
> diff --git a/target_info-qom.c b/target_info-qom.c
> index a6fd8f1d5a3..7fd58d24818 100644
> --- a/target_info-qom.c
> +++ b/target_info-qom.c
> @@ -8,8 +8,17 @@
>   
>   #include "qemu/osdep.h"
>   #include "qom/object.h"
> +#include "hw/arm/machines-qom.h"
>   
>   static const TypeInfo target_info_types[] = {
> +    {
> +        .name           = TYPE_TARGET_ARM_MACHINE,
> +        .parent         = TYPE_INTERFACE,
> +    },
> +    {
> +        .name           = TYPE_TARGET_AARCH64_MACHINE,
> +        .parent         = TYPE_INTERFACE,
> +    },
>   };
>   
>   DEFINE_TYPES(target_info_types)

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>

[RFC PATCH v3 05/14] hw/core: Allow ARM/Aarch64 binaries to use the 'none' machine

[Philippe Mathieu-Daudé]

When we'll start to use target_machine_typename() to filter
machines for the ARM/Aarch64 binaries, the 'none' machine
will be filtered out. Register the proper interfaces to keep
it available.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 hw/core/null-machine.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/hw/core/null-machine.c b/hw/core/null-machine.c
index 1ccaf652eb4..dd56d7cb7e5 100644
--- a/hw/core/null-machine.c
+++ b/hw/core/null-machine.c
@@ -16,6 +16,7 @@
 #include "hw/boards.h"
 #include "system/address-spaces.h"
 #include "hw/core/cpu.h"
+#include "hw/arm/machines-qom.h"
 
 static void machine_none_init(MachineState *mch)
 {
@@ -62,6 +63,11 @@ static const TypeInfo null_machine_types[] = {
         .name           = MACHINE_TYPE_NAME("none"),
         .parent         = TYPE_MACHINE,
         .class_init     = null_machine_class_init,
+        .interfaces     = (InterfaceInfo[]) {
+            { TYPE_TARGET_ARM_MACHINE },
+            { TYPE_TARGET_AARCH64_MACHINE },
+            { },
+        },
     },
 };
 
-- 
2.47.1

Re: [RFC PATCH v3 05/14] hw/core: Allow ARM/Aarch64 binaries to use the 'none' machine

[Pierrick Bouvier]

On 4/18/25 10:28, Philippe Mathieu-Daudé wrote:
> When we'll start to use target_machine_typename() to filter
> machines for the ARM/Aarch64 binaries, the 'none' machine
> will be filtered out. Register the proper interfaces to keep
> it available.
> 
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
>   hw/core/null-machine.c | 6 ++++++
>   1 file changed, 6 insertions(+)
> 
> diff --git a/hw/core/null-machine.c b/hw/core/null-machine.c
> index 1ccaf652eb4..dd56d7cb7e5 100644
> --- a/hw/core/null-machine.c
> +++ b/hw/core/null-machine.c
> @@ -16,6 +16,7 @@
>   #include "hw/boards.h"
>   #include "system/address-spaces.h"
>   #include "hw/core/cpu.h"
> +#include "hw/arm/machines-qom.h"
>   
>   static void machine_none_init(MachineState *mch)
>   {
> @@ -62,6 +63,11 @@ static const TypeInfo null_machine_types[] = {
>           .name           = MACHINE_TYPE_NAME("none"),
>           .parent         = TYPE_MACHINE,
>           .class_init     = null_machine_class_init,
> +        .interfaces     = (InterfaceInfo[]) {
> +            { TYPE_TARGET_ARM_MACHINE },
> +            { TYPE_TARGET_AARCH64_MACHINE },
> +            { },
> +        },
>       },
>   };
>   

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>

[RFC PATCH v3 06/14] hw/arm: Filter machine types for qemu-system-arm/aarch64 binaries

[Philippe Mathieu-Daudé]

Since the qemu-system-aarch64 binary is able to run
all machines indistinctly, simply register the
TYPE_TARGET_AARCH64_MACHINE interface for all
existing machines under the hw/arm/ directory.

Very few machines are restricted to the qemu-system-aarch64
binary:

  $ git grep TARGET_AARCH64 hw/arm/meson.build
  hw/arm/meson.build:31:arm_common_ss.add(when: ['CONFIG_RASPI', 'TARGET_AARCH64'], if_true: files('bcm2838.c', 'raspi4b.c'))
  hw/arm/meson.build:50:arm_common_ss.add(when: ['CONFIG_ASPEED_SOC', 'TARGET_AARCH64'], if_true: files('aspeed_ast27x0.c'))

  $ git grep -W AARCH64 hw/arm/Kconfig
  hw/arm/Kconfig=185=config SBSA_REF
  hw/arm/Kconfig-186-    bool
  hw/arm/Kconfig-187-    default y
  hw/arm/Kconfig:188:    depends on TCG && AARCH64
  --
  hw/arm/Kconfig=413=config XLNX_ZYNQMP_ARM
  hw/arm/Kconfig-414-    bool
  hw/arm/Kconfig-415-    default y if PIXMAN
  hw/arm/Kconfig:416:    depends on TCG && AARCH64
  --
  hw/arm/Kconfig=435=config XLNX_VERSAL
  hw/arm/Kconfig-436-    bool
  hw/arm/Kconfig-437-    default y
  hw/arm/Kconfig:438:    depends on TCG && AARCH64
  --
  hw/arm/Kconfig=475=config NPCM8XX
  hw/arm/Kconfig-476-    bool
  hw/arm/Kconfig-477-    default y
  hw/arm/Kconfig:478:    depends on TCG && AARCH64
  --
  hw/arm/Kconfig=605=config FSL_IMX8MP_EVK
  hw/arm/Kconfig-606-    bool
  hw/arm/Kconfig-607-    default y
  hw/arm/Kconfig:608:    depends on TCG && AARCH64

  $ git grep -wW TARGET_AARCH64 hw/arm | fgrep -4 MACHINE_TYPE_NAME
  ...
  hw/arm/aspeed.c:1939:#ifdef TARGET_AARCH64
  hw/arm/aspeed.c-1940-    }, {
  hw/arm/aspeed.c-1941-        .name          = MACHINE_TYPE_NAME("ast2700a0-evb"),

  hw/arm/aspeed.c-1949-        .name          = MACHINE_TYPE_NAME("ast2700a1-evb"),

  hw/arm/raspi.c:420:#ifdef TARGET_AARCH64
  hw/arm/raspi.c-421-    }, {
  hw/arm/raspi.c-422-        .name           = MACHINE_TYPE_NAME("raspi3ap"),

  hw/arm/raspi.c-429-    }, {
  hw/arm/raspi.c-430-        .name           = MACHINE_TYPE_NAME("raspi3b"),

This can be verified as:

$ diff -u0 <(qemu-system-arm -M help) <(qemu-system-aarch64 -M help)
  @@ -5,3 +4,0 @@
  -ast2700-evb          Aspeed AST2700 A0 EVB (Cortex-A35) (alias of ast2700a0-evb)
  -ast2700a0-evb        Aspeed AST2700 A0 EVB (Cortex-A35)
  -ast2700a1-evb        Aspeed AST2700 A1 EVB (Cortex-A35)
  @@ -22 +18,0 @@
  -imx8mp-evk           NXP i.MX 8M Plus EVK Board
  @@ -49 +44,0 @@
  -npcm845-evb          Nuvoton NPCM845 Evaluation Board (Cortex-A35)
  @@ -63,3 +57,0 @@
  -raspi3ap             Raspberry Pi 3A+ (revision 1.0)
  -raspi3b              Raspberry Pi 3B (revision 1.2)
  -raspi4b              Raspberry Pi 4B (revision 1.5)
  @@ -72 +63,0 @@
  -sbsa-ref             QEMU 'SBSA Reference' ARM Virtual Machine
  @@ -116,2 +106,0 @@
  -xlnx-versal-virt     Xilinx Versal Virtual development board
  -xlnx-zcu102          Xilinx ZynqMP ZCU102 board with 4xA53s and 2xR5Fs based on the value of smp

Register the TYPE_TARGET_ARM_MACHINE interface for all
the machines not listed previously.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
---
 hw/arm/aspeed.c            | 109 +++++++++++++++++++++++++++++++++++++
 hw/arm/b-l475e-iot01a.c    |   6 ++
 hw/arm/bananapi_m2u.c      |   6 ++
 hw/arm/bcm2836.c           |   1 +
 hw/arm/collie.c            |   6 ++
 hw/arm/cubieboard.c        |   6 ++
 hw/arm/digic_boards.c      |   6 ++
 hw/arm/exynos4_boards.c    |  11 ++++
 hw/arm/fby35.c             |   6 ++
 hw/arm/highbank.c          |  11 ++++
 hw/arm/imx25_pdk.c         |   6 ++
 hw/arm/imx8mp-evk.c        |   5 ++
 hw/arm/integratorcp.c      |   6 ++
 hw/arm/kzm.c               |   6 ++
 hw/arm/mcimx6ul-evk.c      |   6 ++
 hw/arm/mcimx7d-sabre.c     |   6 ++
 hw/arm/microbit.c          |   6 ++
 hw/arm/mps2-tz.c           |  21 +++++++
 hw/arm/mps2.c              |  21 +++++++
 hw/arm/mps3r.c             |   6 ++
 hw/arm/msf2-som.c          |   6 ++
 hw/arm/musca.c             |  11 ++++
 hw/arm/musicpal.c          |   6 ++
 hw/arm/netduino2.c         |   6 ++
 hw/arm/netduinoplus2.c     |   6 ++
 hw/arm/npcm7xx_boards.c    |  26 +++++++++
 hw/arm/npcm8xx_boards.c    |   5 ++
 hw/arm/olimex-stm32-h405.c |   6 ++
 hw/arm/omap_sx1.c          |  11 ++++
 hw/arm/orangepi.c          |   6 ++
 hw/arm/raspi.c             |  24 ++++++++
 hw/arm/raspi4b.c           |   5 ++
 hw/arm/realview.c          |  21 +++++++
 hw/arm/sabrelite.c         |   6 ++
 hw/arm/sbsa-ref.c          |   5 ++
 hw/arm/stellaris.c         |  11 ++++
 hw/arm/stm32vldiscovery.c  |   6 ++
 hw/arm/versatilepb.c       |  11 ++++
 hw/arm/vexpress.c          |  11 ++++
 hw/arm/virt.c              |   6 ++
 hw/arm/xilinx_zynq.c       |   6 ++
 hw/arm/xlnx-versal-virt.c  |   5 ++
 hw/arm/xlnx-zcu102.c       |   5 ++
 43 files changed, 468 insertions(+)

diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
index 82f42582fa3..ce4d49a9f59 100644
--- a/hw/arm/aspeed.c
+++ b/hw/arm/aspeed.c
@@ -15,6 +15,7 @@
 #include "hw/arm/aspeed.h"
 #include "hw/arm/aspeed_soc.h"
 #include "hw/arm/aspeed_eeprom.h"
+#include "hw/arm/machines-qom.h"
 #include "hw/block/flash.h"
 #include "hw/i2c/i2c_mux_pca954x.h"
 #include "hw/i2c/smbus_eeprom.h"
@@ -1760,91 +1761,199 @@ static const TypeInfo aspeed_machine_types[] = {
         .name          = MACHINE_TYPE_NAME("palmetto-bmc"),
         .parent        = TYPE_ASPEED_MACHINE,
         .class_init    = aspeed_machine_palmetto_class_init,
+        .interfaces     = (InterfaceInfo[]) {
+            { TYPE_TARGET_ARM_MACHINE },
+            { TYPE_TARGET_AARCH64_MACHINE },
+            { },
+        },
     }, {
         .name          = MACHINE_TYPE_NAME("supermicrox11-bmc"),
         .parent        = TYPE_ASPEED_MACHINE,
         .class_init    = aspeed_machine_supermicrox11_bmc_class_init,
+        .interfaces     = (InterfaceInfo[]) {
+            { TYPE_TARGET_ARM_MACHINE },
+            { TYPE_TARGET_AARCH64_MACHINE },
+            { },
+        },
     }, {
         .name          = MACHINE_TYPE_NAME("supermicro-x11spi-bmc"),
         .parent        = TYPE_ASPEED_MACHINE,
         .class_init    = aspeed_machine_supermicro_x11spi_bmc_class_init,
+        .interfaces     = (InterfaceInfo[]) {
+            { TYPE_TARGET_ARM_MACHINE },
+            { TYPE_TARGET_AARCH64_MACHINE },
+            { },
+        },
     }, {
         .name          = MACHINE_TYPE_NAME("ast2500-evb"),
         .parent        = TYPE_ASPEED_MACHINE,
         .class_init    = aspeed_machine_ast2500_evb_class_init,
+        .interfaces     = (InterfaceInfo[]) {
+            { TYPE_TARGET_ARM_MACHINE },
+            { TYPE_TARGET_AARCH64_MACHINE },
+            { },
+        },
     }, {
         .name          = MACHINE_TYPE_NAME("romulus-bmc"),
         .parent        = TYPE_ASPEED_MACHINE,
         .class_init    = aspeed_machine_romulus_class_init,
+        .interfaces     = (InterfaceInfo[]) {
+            { TYPE_TARGET_ARM_MACHINE },
+            { TYPE_TARGET_AARCH64_MACHINE },
+            { },
+        },
     }, {
         .name          = MACHINE_TYPE_NAME("sonorapass-bmc"),
         .parent        = TYPE_ASPEED_MACHINE,
         .class_init    = aspeed_machine_sonorapass_class_init,
+        .interfaces     = (InterfaceInfo[]) {
+            { TYPE_TARGET_ARM_MACHINE },
+            { TYPE_TARGET_AARCH64_MACHINE },
+            { },
+        },
     }, {
         .name          = MACHINE_TYPE_NAME("witherspoon-bmc"),
         .parent        = TYPE_ASPEED_MACHINE,
         .class_init    = aspeed_machine_witherspoon_class_init,
+        .interfaces     = (InterfaceInfo[]) {
+            { TYPE_TARGET_ARM_MACHINE },
+            { TYPE_TARGET_AARCH64_MACHINE },
+            { },
+        },
     }, {
         .name          = MACHINE_TYPE_NAME("ast2600-evb"),
         .parent        = TYPE_ASPEED_MACHINE,
         .class_init    = aspeed_machine_ast2600_evb_class_init,
+        .interfaces     = (InterfaceInfo[]) {
+            { TYPE_TARGET_ARM_MACHINE },
+            { TYPE_TARGET_AARCH64_MACHINE },
+            { },
+        },
     }, {
         .name          = MACHINE_TYPE_NAME("yosemitev2-bmc"),
         .parent        = TYPE_ASPEED_MACHINE,
         .class_init    = aspeed_machine_yosemitev2_class_init,
+        .interfaces     = (InterfaceInfo[]) {
+            { TYPE_TARGET_ARM_MACHINE },
+            { TYPE_TARGET_AARCH64_MACHINE },
+            { },
+        },
     }, {
         .name          = MACHINE_TYPE_NAME("tiogapass-bmc"),
         .parent        = TYPE_ASPEED_MACHINE,
         .class_init    = aspeed_machine_tiogapass_class_init,
+        .interfaces     = (InterfaceInfo[]) {
+            { TYPE_TARGET_ARM_MACHINE },
+            { TYPE_TARGET_AARCH64_MACHINE },
+            { },
+        },
     }, {
         .name          = MACHINE_TYPE_NAME("g220a-bmc"),
         .parent        = TYPE_ASPEED_MACHINE,
         .class_init    = aspeed_machine_g220a_class_init,
+        .interfaces     = (InterfaceInfo[]) {
+            { TYPE_TARGET_ARM_MACHINE },
+            { TYPE_TARGET_AARCH64_MACHINE },
+            { },
+        },
     }, {
         .name          = MACHINE_TYPE_NAME("qcom-dc-scm-v1-bmc"),
         .parent        = TYPE_ASPEED_MACHINE,
         .class_init    = aspeed_machine_qcom_dc_scm_v1_class_init,
+        .interfaces     = (InterfaceInfo[]) {
+            { TYPE_TARGET_ARM_MACHINE },
+            { TYPE_TARGET_AARCH64_MACHINE },
+            { },
+        },
     }, {
         .name          = MACHINE_TYPE_NAME("qcom-firework-bmc"),
         .parent        = TYPE_ASPEED_MACHINE,
         .class_init    = aspeed_machine_qcom_firework_class_init,
+        .interfaces     = (InterfaceInfo[]) {
+            { TYPE_TARGET_ARM_MACHINE },
+            { TYPE_TARGET_AARCH64_MACHINE },
+            { },
+        },
     }, {
         .name          = MACHINE_TYPE_NAME("fp5280g2-bmc"),
         .parent        = TYPE_ASPEED_MACHINE,
         .class_init    = aspeed_machine_fp5280g2_class_init,
+        .interfaces     = (InterfaceInfo[]) {
+            { TYPE_TARGET_ARM_MACHINE },
+            { TYPE_TARGET_AARCH64_MACHINE },
+            { },
+        },
     }, {
         .name          = MACHINE_TYPE_NAME("quanta-q71l-bmc"),
         .parent        = TYPE_ASPEED_MACHINE,
         .class_init    = aspeed_machine_quanta_q71l_class_init,
+        .interfaces     = (InterfaceInfo[]) {
+            { TYPE_TARGET_ARM_MACHINE },
+            { TYPE_TARGET_AARCH64_MACHINE },
+            { },
+        },
     }, {
         .name          = MACHINE_TYPE_NAME("rainier-bmc"),
         .parent        = TYPE_ASPEED_MACHINE,
         .class_init    = aspeed_machine_rainier_class_init,
+        .interfaces     = (InterfaceInfo[]) {
+            { TYPE_TARGET_ARM_MACHINE },
+            { TYPE_TARGET_AARCH64_MACHINE },
+            { },
+        },
     }, {
         .name          = MACHINE_TYPE_NAME("fuji-bmc"),
         .parent        = TYPE_ASPEED_MACHINE,
         .class_init    = aspeed_machine_fuji_class_init,
+        .interfaces     = (InterfaceInfo[]) {
+            { TYPE_TARGET_ARM_MACHINE },
+            { TYPE_TARGET_AARCH64_MACHINE },
+            { },
+        },
     }, {
         .name          = MACHINE_TYPE_NAME("bletchley-bmc"),
         .parent        = TYPE_ASPEED_MACHINE,
         .class_init    = aspeed_machine_bletchley_class_init,
+        .interfaces     = (InterfaceInfo[]) {
+            { TYPE_TARGET_ARM_MACHINE },
+            { TYPE_TARGET_AARCH64_MACHINE },
+            { },
+        },
     }, {
         .name          = MACHINE_TYPE_NAME("fby35-bmc"),
         .parent        = MACHINE_TYPE_NAME("ast2600-evb"),
         .class_init    = aspeed_machine_fby35_class_init,
+        .interfaces     = (InterfaceInfo[]) {
+            { TYPE_TARGET_ARM_MACHINE },
+            { TYPE_TARGET_AARCH64_MACHINE },
+            { },
+        },
     }, {
         .name           = MACHINE_TYPE_NAME("ast1030-evb"),
         .parent         = TYPE_ASPEED_MACHINE,
         .class_init     = aspeed_minibmc_machine_ast1030_evb_class_init,
+        .interfaces     = (InterfaceInfo[]) {
+            { TYPE_TARGET_ARM_MACHINE },
+            { TYPE_TARGET_AARCH64_MACHINE },
+            { },
+        },
 #ifdef TARGET_AARCH64
     }, {
         .name          = MACHINE_TYPE_NAME("ast2700a0-evb"),
         .parent        = TYPE_ASPEED_MACHINE,
         .class_init    = aspeed_machine_ast2700a0_evb_class_init,
+        .interfaces     = (InterfaceInfo[]) {
+            { TYPE_TARGET_AARCH64_MACHINE },
+            { },
+        },
         }, {
         .name          = MACHINE_TYPE_NAME("ast2700a1-evb"),
         .parent        = TYPE_ASPEED_MACHINE,
         .class_init    = aspeed_machine_ast2700a1_evb_class_init,
+        .interfaces     = (InterfaceInfo[]) {
+            { TYPE_TARGET_AARCH64_MACHINE },
+            { },
+        },
 #endif
     }, {
         .name          = TYPE_ASPEED_MACHINE,
diff --git a/hw/arm/b-l475e-iot01a.c b/hw/arm/b-l475e-iot01a.c
index c9a5209216c..7af7db3dbb3 100644
--- a/hw/arm/b-l475e-iot01a.c
+++ b/hw/arm/b-l475e-iot01a.c
@@ -29,6 +29,7 @@
 #include "qemu/error-report.h"
 #include "hw/arm/boot.h"
 #include "hw/core/split-irq.h"
+#include "hw/arm/machines-qom.h"
 #include "hw/arm/stm32l4x5_soc.h"
 #include "hw/gpio/stm32l4x5_gpio.h"
 #include "hw/display/dm163.h"
@@ -131,6 +132,11 @@ static const TypeInfo bl475e_machine_type[] = {
         .parent         = TYPE_MACHINE,
         .instance_size  = sizeof(Bl475eMachineState),
         .class_init     = bl475e_machine_init,
+        .interfaces     = (InterfaceInfo[]) {
+            { TYPE_TARGET_ARM_MACHINE },
+            { TYPE_TARGET_AARCH64_MACHINE },
+            { },
+        },
     }
 };
 
diff --git a/hw/arm/bananapi_m2u.c b/hw/arm/bananapi_m2u.c
index 724ee4b05e5..5104a45390b 100644
--- a/hw/arm/bananapi_m2u.c
+++ b/hw/arm/bananapi_m2u.c
@@ -27,6 +27,7 @@
 #include "hw/qdev-properties.h"
 #include "hw/arm/allwinner-r40.h"
 #include "hw/arm/boot.h"
+#include "hw/arm/machines-qom.h"
 
 static struct arm_boot_info bpim2u_binfo;
 
@@ -150,6 +151,11 @@ static const TypeInfo bananapi_machine_types[] = {
         .name           = MACHINE_TYPE_NAME("bpim2u"),
         .parent         = TYPE_MACHINE,
         .class_init     = bpim2u_machine_class_init,
+        .interfaces     = (InterfaceInfo[]) {
+            { TYPE_TARGET_ARM_MACHINE },
+            { TYPE_TARGET_AARCH64_MACHINE },
+            { },
+        },
     },
 };
 
diff --git a/hw/arm/bcm2836.c b/hw/arm/bcm2836.c
index 95e16806fa1..f60489983ba 100644
--- a/hw/arm/bcm2836.c
+++ b/hw/arm/bcm2836.c
@@ -14,6 +14,7 @@
 #include "qemu/module.h"
 #include "hw/arm/bcm2836.h"
 #include "hw/arm/raspi_platform.h"
+#include "hw/arm/machines-qom.h"
 #include "hw/sysbus.h"
 #include "target/arm/cpu-qom.h"
 #include "target/arm/gtimer.h"
diff --git a/hw/arm/collie.c b/hw/arm/collie.c
index e83aee58c6b..458ed53f0f6 100644
--- a/hw/arm/collie.c
+++ b/hw/arm/collie.c
@@ -15,6 +15,7 @@
 #include "hw/boards.h"
 #include "strongarm.h"
 #include "hw/arm/boot.h"
+#include "hw/arm/machines-qom.h"
 #include "hw/block/flash.h"
 #include "system/address-spaces.h"
 #include "qom/object.h"
@@ -86,6 +87,11 @@ static const TypeInfo collie_machine_typeinfo = {
     .parent = TYPE_MACHINE,
     .class_init = collie_machine_class_init,
     .instance_size = sizeof(CollieMachineState),
+    .interfaces = (InterfaceInfo[]) {
+        { TYPE_TARGET_ARM_MACHINE },
+        { TYPE_TARGET_AARCH64_MACHINE },
+        { },
+    },
 };
 
 static void collie_machine_register_types(void)
diff --git a/hw/arm/cubieboard.c b/hw/arm/cubieboard.c
index 36062ac7037..00656169b72 100644
--- a/hw/arm/cubieboard.c
+++ b/hw/arm/cubieboard.c
@@ -22,6 +22,7 @@
 #include "hw/qdev-properties.h"
 #include "hw/arm/allwinner-a10.h"
 #include "hw/arm/boot.h"
+#include "hw/arm/machines-qom.h"
 #include "hw/i2c/i2c.h"
 
 static struct arm_boot_info cubieboard_binfo = {
@@ -131,6 +132,11 @@ static const TypeInfo cubieboard_machine_types[] = {
         .name           = MACHINE_TYPE_NAME("cubieboard"),
         .parent         = TYPE_MACHINE,
         .class_init     = cubieboard_machine_class_init,
+        .interfaces     = (InterfaceInfo[]) {
+            { TYPE_TARGET_ARM_MACHINE },
+            { TYPE_TARGET_AARCH64_MACHINE },
+            { },
+        },
     },
 };
 
diff --git a/hw/arm/digic_boards.c b/hw/arm/digic_boards.c
index 3c0cc6e4370..7b9fbb5524b 100644
--- a/hw/arm/digic_boards.c
+++ b/hw/arm/digic_boards.c
@@ -29,6 +29,7 @@
 #include "hw/boards.h"
 #include "qemu/error-report.h"
 #include "hw/arm/digic.h"
+#include "hw/arm/machines-qom.h"
 #include "hw/block/flash.h"
 #include "hw/loader.h"
 #include "system/qtest.h"
@@ -152,6 +153,11 @@ static const TypeInfo digic_machine_types[] = {
         .name           = MACHINE_TYPE_NAME("canon-a1100"),
         .parent         = TYPE_MACHINE,
         .class_init     = digic_machine_class_init,
+        .interfaces     = (InterfaceInfo[]) {
+            { TYPE_TARGET_ARM_MACHINE },
+            { TYPE_TARGET_AARCH64_MACHINE },
+            { },
+        },
     },
 };
 
diff --git a/hw/arm/exynos4_boards.c b/hw/arm/exynos4_boards.c
index 2d8f2d73265..71601a0d6f0 100644
--- a/hw/arm/exynos4_boards.c
+++ b/hw/arm/exynos4_boards.c
@@ -28,6 +28,7 @@
 #include "hw/sysbus.h"
 #include "net/net.h"
 #include "hw/arm/boot.h"
+#include "hw/arm/machines-qom.h"
 #include "system/address-spaces.h"
 #include "hw/arm/exynos4210.h"
 #include "hw/net/lan9118.h"
@@ -172,6 +173,11 @@ static const TypeInfo nuri_type = {
     .name = MACHINE_TYPE_NAME("nuri"),
     .parent = TYPE_MACHINE,
     .class_init = nuri_class_init,
+    .interfaces = (InterfaceInfo[]) {
+        { TYPE_TARGET_ARM_MACHINE },
+        { TYPE_TARGET_AARCH64_MACHINE },
+        { },
+    },
 };
 
 static void smdkc210_class_init(ObjectClass *oc, void *data)
@@ -192,6 +198,11 @@ static const TypeInfo smdkc210_type = {
     .name = MACHINE_TYPE_NAME("smdkc210"),
     .parent = TYPE_MACHINE,
     .class_init = smdkc210_class_init,
+    .interfaces = (InterfaceInfo[]) {
+        { TYPE_TARGET_ARM_MACHINE },
+        { TYPE_TARGET_AARCH64_MACHINE },
+        { },
+    },
 };
 
 static void exynos4_machines_init(void)
diff --git a/hw/arm/fby35.c b/hw/arm/fby35.c
index 6d3663f14a1..84b65844b34 100644
--- a/hw/arm/fby35.c
+++ b/hw/arm/fby35.c
@@ -14,6 +14,7 @@
 #include "hw/qdev-clock.h"
 #include "hw/arm/aspeed_soc.h"
 #include "hw/arm/boot.h"
+#include "hw/arm/machines-qom.h"
 
 #define TYPE_FBY35 MACHINE_TYPE_NAME("fby35")
 OBJECT_DECLARE_SIMPLE_TYPE(Fby35State, FBY35);
@@ -187,6 +188,11 @@ static const TypeInfo fby35_types[] = {
         .class_init = fby35_class_init,
         .instance_size = sizeof(Fby35State),
         .instance_init = fby35_instance_init,
+        .interfaces = (InterfaceInfo[]) {
+            { TYPE_TARGET_ARM_MACHINE },
+            { TYPE_TARGET_AARCH64_MACHINE },
+            { },
+        },
     },
 };
 
diff --git a/hw/arm/highbank.c b/hw/arm/highbank.c
index 0f3c207d548..d26346ea8ad 100644
--- a/hw/arm/highbank.c
+++ b/hw/arm/highbank.c
@@ -23,6 +23,7 @@
 #include "hw/sysbus.h"
 #include "migration/vmstate.h"
 #include "hw/arm/boot.h"
+#include "hw/arm/machines-qom.h"
 #include "hw/loader.h"
 #include "net/net.h"
 #include "system/runstate.h"
@@ -363,6 +364,11 @@ static const TypeInfo highbank_type = {
     .name = MACHINE_TYPE_NAME("highbank"),
     .parent = TYPE_MACHINE,
     .class_init = highbank_class_init,
+    .interfaces = (InterfaceInfo[]) {
+        { TYPE_TARGET_ARM_MACHINE },
+        { TYPE_TARGET_AARCH64_MACHINE },
+        { },
+    },
 };
 
 static void midway_class_init(ObjectClass *oc, void *data)
@@ -387,6 +393,11 @@ static const TypeInfo midway_type = {
     .name = MACHINE_TYPE_NAME("midway"),
     .parent = TYPE_MACHINE,
     .class_init = midway_class_init,
+    .interfaces = (InterfaceInfo[]) {
+        { TYPE_TARGET_ARM_MACHINE },
+        { TYPE_TARGET_AARCH64_MACHINE },
+        { },
+    },
 };
 
 static void calxeda_machines_init(void)
diff --git a/hw/arm/imx25_pdk.c b/hw/arm/imx25_pdk.c
index a90def7f1a2..86f0855c929 100644
--- a/hw/arm/imx25_pdk.c
+++ b/hw/arm/imx25_pdk.c
@@ -28,6 +28,7 @@
 #include "hw/qdev-properties.h"
 #include "hw/arm/fsl-imx25.h"
 #include "hw/arm/boot.h"
+#include "hw/arm/machines-qom.h"
 #include "hw/boards.h"
 #include "qemu/error-report.h"
 #include "system/qtest.h"
@@ -157,6 +158,11 @@ static const TypeInfo imx25_machine_types[] = {
         .name           = MACHINE_TYPE_NAME("imx25-pdk"),
         .parent         = TYPE_MACHINE,
         .class_init     = imx25_pdk_machine_class_init,
+        .interfaces     = (InterfaceInfo[]) {
+            { TYPE_TARGET_ARM_MACHINE },
+            { TYPE_TARGET_AARCH64_MACHINE },
+            { },
+        },
     },
 };
 
diff --git a/hw/arm/imx8mp-evk.c b/hw/arm/imx8mp-evk.c
index c7d87d99230..44f704b9bd3 100644
--- a/hw/arm/imx8mp-evk.c
+++ b/hw/arm/imx8mp-evk.c
@@ -10,6 +10,7 @@
 #include "system/address-spaces.h"
 #include "hw/arm/boot.h"
 #include "hw/arm/fsl-imx8mp.h"
+#include "hw/arm/machines-qom.h"
 #include "hw/boards.h"
 #include "hw/qdev-properties.h"
 #include "system/qtest.h"
@@ -79,6 +80,10 @@ static const TypeInfo imx8_machine_types[] = {
         .name           = MACHINE_TYPE_NAME("imx8mp-evk"),
         .parent         = TYPE_MACHINE,
         .class_init     = imx8mp_evk_machine_class_init,
+        .interfaces     = (InterfaceInfo[]) {
+            { TYPE_TARGET_AARCH64_MACHINE },
+            { },
+        },
     },
 };
 
diff --git a/hw/arm/integratorcp.c b/hw/arm/integratorcp.c
index f95916b517d..efe1075ecc0 100644
--- a/hw/arm/integratorcp.c
+++ b/hw/arm/integratorcp.c
@@ -13,6 +13,7 @@
 #include "migration/vmstate.h"
 #include "hw/boards.h"
 #include "hw/arm/boot.h"
+#include "hw/arm/machines-qom.h"
 #include "hw/misc/arm_integrator_debug.h"
 #include "hw/net/smc91c111.h"
 #include "net/net.h"
@@ -760,6 +761,11 @@ static const TypeInfo integratorcp_machine_types[] = {
         .name           = MACHINE_TYPE_NAME("integratorcp"),
         .parent         = TYPE_MACHINE,
         .class_init     = integratorcp_machine_class_init,
+        .interfaces     = (InterfaceInfo[]) {
+            { TYPE_TARGET_ARM_MACHINE },
+            { TYPE_TARGET_AARCH64_MACHINE },
+            { },
+        },
     },
 };
 
diff --git a/hw/arm/kzm.c b/hw/arm/kzm.c
index b56cabe9f94..02ece3c0139 100644
--- a/hw/arm/kzm.c
+++ b/hw/arm/kzm.c
@@ -17,6 +17,7 @@
 #include "qapi/error.h"
 #include "hw/arm/fsl-imx31.h"
 #include "hw/arm/boot.h"
+#include "hw/arm/machines-qom.h"
 #include "hw/boards.h"
 #include "qemu/error-report.h"
 #include "system/address-spaces.h"
@@ -146,6 +147,11 @@ static const TypeInfo kzm_machine_types[] = {
         .name           = MACHINE_TYPE_NAME("kzm"),
         .parent         = TYPE_MACHINE,
         .class_init     = kzm_machine_class_init,
+        .interfaces     = (InterfaceInfo[]) {
+            { TYPE_TARGET_ARM_MACHINE },
+            { TYPE_TARGET_AARCH64_MACHINE },
+            { },
+        },
     },
 };
 
diff --git a/hw/arm/mcimx6ul-evk.c b/hw/arm/mcimx6ul-evk.c
index d947836d2be..ea636fa2e7c 100644
--- a/hw/arm/mcimx6ul-evk.c
+++ b/hw/arm/mcimx6ul-evk.c
@@ -14,6 +14,7 @@
 #include "qapi/error.h"
 #include "hw/arm/fsl-imx6ul.h"
 #include "hw/arm/boot.h"
+#include "hw/arm/machines-qom.h"
 #include "hw/boards.h"
 #include "hw/qdev-properties.h"
 #include "qemu/error-report.h"
@@ -84,6 +85,11 @@ static const TypeInfo imx6_machine_types[] = {
         .name           = MACHINE_TYPE_NAME("mcimx6ul-evk"),
         .parent         = TYPE_MACHINE,
         .class_init     = mcimx6ul_evk_machine_class_init,
+        .interfaces     = (InterfaceInfo[]) {
+            { TYPE_TARGET_ARM_MACHINE },
+            { TYPE_TARGET_AARCH64_MACHINE },
+            { },
+        },
     },
 };
 
diff --git a/hw/arm/mcimx7d-sabre.c b/hw/arm/mcimx7d-sabre.c
index f5dc9c211dd..b236a6587eb 100644
--- a/hw/arm/mcimx7d-sabre.c
+++ b/hw/arm/mcimx7d-sabre.c
@@ -16,6 +16,7 @@
 #include "qapi/error.h"
 #include "hw/arm/fsl-imx7.h"
 #include "hw/arm/boot.h"
+#include "hw/arm/machines-qom.h"
 #include "hw/boards.h"
 #include "hw/qdev-properties.h"
 #include "qemu/error-report.h"
@@ -84,6 +85,11 @@ static const TypeInfo imx7_machine_types[] = {
         .name           = MACHINE_TYPE_NAME("mcimx7d-sabre"),
         .parent         = TYPE_MACHINE,
         .class_init     = mcimx7d_sabre_machine_class_init,
+        .interfaces     = (InterfaceInfo[]) {
+            { TYPE_TARGET_ARM_MACHINE },
+            { TYPE_TARGET_AARCH64_MACHINE },
+            { },
+        },
     },
 };
 
diff --git a/hw/arm/microbit.c b/hw/arm/microbit.c
index ade363daaa4..d34b1c675e5 100644
--- a/hw/arm/microbit.c
+++ b/hw/arm/microbit.c
@@ -12,6 +12,7 @@
 #include "qapi/error.h"
 #include "hw/boards.h"
 #include "hw/arm/boot.h"
+#include "hw/arm/machines-qom.h"
 #include "system/system.h"
 #include "system/address-spaces.h"
 
@@ -74,6 +75,11 @@ static const TypeInfo microbit_info = {
     .parent = TYPE_MACHINE,
     .instance_size = sizeof(MicrobitMachineState),
     .class_init = microbit_machine_class_init,
+    .interfaces = (InterfaceInfo[]) {
+        { TYPE_TARGET_ARM_MACHINE },
+        { TYPE_TARGET_AARCH64_MACHINE },
+        { },
+    },
 };
 
 static void microbit_machine_init(void)
diff --git a/hw/arm/mps2-tz.c b/hw/arm/mps2-tz.c
index b0633a5a69e..12512477977 100644
--- a/hw/arm/mps2-tz.c
+++ b/hw/arm/mps2-tz.c
@@ -52,6 +52,7 @@
 #include "qemu/error-report.h"
 #include "hw/arm/boot.h"
 #include "hw/arm/armv7m.h"
+#include "hw/arm/machines-qom.h"
 #include "hw/or-irq.h"
 #include "hw/boards.h"
 #include "system/address-spaces.h"
@@ -1463,24 +1464,44 @@ static const TypeInfo mps2tz_an505_info = {
     .name = TYPE_MPS2TZ_AN505_MACHINE,
     .parent = TYPE_MPS2TZ_MACHINE,
     .class_init = mps2tz_an505_class_init,
+    .interfaces = (InterfaceInfo[]) {
+        { TYPE_TARGET_ARM_MACHINE },
+        { TYPE_TARGET_AARCH64_MACHINE },
+        { },
+    },
 };
 
 static const TypeInfo mps2tz_an521_info = {
     .name = TYPE_MPS2TZ_AN521_MACHINE,
     .parent = TYPE_MPS2TZ_MACHINE,
     .class_init = mps2tz_an521_class_init,
+    .interfaces = (InterfaceInfo[]) {
+        { TYPE_TARGET_ARM_MACHINE },
+        { TYPE_TARGET_AARCH64_MACHINE },
+        { },
+    },
 };
 
 static const TypeInfo mps3tz_an524_info = {
     .name = TYPE_MPS3TZ_AN524_MACHINE,
     .parent = TYPE_MPS2TZ_MACHINE,
     .class_init = mps3tz_an524_class_init,
+    .interfaces = (InterfaceInfo[]) {
+        { TYPE_TARGET_ARM_MACHINE },
+        { TYPE_TARGET_AARCH64_MACHINE },
+        { },
+    },
 };
 
 static const TypeInfo mps3tz_an547_info = {
     .name = TYPE_MPS3TZ_AN547_MACHINE,
     .parent = TYPE_MPS2TZ_MACHINE,
     .class_init = mps3tz_an547_class_init,
+    .interfaces = (InterfaceInfo[]) {
+        { TYPE_TARGET_ARM_MACHINE },
+        { TYPE_TARGET_AARCH64_MACHINE },
+        { },
+    },
 };
 
 static void mps2tz_machine_init(void)
diff --git a/hw/arm/mps2.c b/hw/arm/mps2.c
index 6958485a668..f39176c0005 100644
--- a/hw/arm/mps2.c
+++ b/hw/arm/mps2.c
@@ -31,6 +31,7 @@
 #include "qemu/error-report.h"
 #include "hw/arm/boot.h"
 #include "hw/arm/armv7m.h"
+#include "hw/arm/machines-qom.h"
 #include "hw/or-irq.h"
 #include "hw/boards.h"
 #include "system/address-spaces.h"
@@ -563,24 +564,44 @@ static const TypeInfo mps2_an385_info = {
     .name = TYPE_MPS2_AN385_MACHINE,
     .parent = TYPE_MPS2_MACHINE,
     .class_init = mps2_an385_class_init,
+    .interfaces = (InterfaceInfo[]) {
+        { TYPE_TARGET_ARM_MACHINE },
+        { TYPE_TARGET_AARCH64_MACHINE },
+        { },
+    },
 };
 
 static const TypeInfo mps2_an386_info = {
     .name = TYPE_MPS2_AN386_MACHINE,
     .parent = TYPE_MPS2_MACHINE,
     .class_init = mps2_an386_class_init,
+    .interfaces = (InterfaceInfo[]) {
+        { TYPE_TARGET_ARM_MACHINE },
+        { TYPE_TARGET_AARCH64_MACHINE },
+        { },
+    },
 };
 
 static const TypeInfo mps2_an500_info = {
     .name = TYPE_MPS2_AN500_MACHINE,
     .parent = TYPE_MPS2_MACHINE,
     .class_init = mps2_an500_class_init,
+    .interfaces = (InterfaceInfo[]) {
+        { TYPE_TARGET_ARM_MACHINE },
+        { TYPE_TARGET_AARCH64_MACHINE },
+        { },
+    },
 };
 
 static const TypeInfo mps2_an511_info = {
     .name = TYPE_MPS2_AN511_MACHINE,
     .parent = TYPE_MPS2_MACHINE,
     .class_init = mps2_an511_class_init,
+    .interfaces = (InterfaceInfo[]) {
+        { TYPE_TARGET_ARM_MACHINE },
+        { TYPE_TARGET_AARCH64_MACHINE },
+        { },
+    },
 };
 
 static void mps2_machine_init(void)
diff --git a/hw/arm/mps3r.c b/hw/arm/mps3r.c
index 4dd1e8a7180..8bcf5a4d69f 100644
--- a/hw/arm/mps3r.c
+++ b/hw/arm/mps3r.c
@@ -37,6 +37,7 @@
 #include "hw/qdev-properties.h"
 #include "hw/arm/boot.h"
 #include "hw/arm/bsa.h"
+#include "hw/arm/machines-qom.h"
 #include "hw/char/cmsdk-apb-uart.h"
 #include "hw/i2c/arm_sbcon_i2c.h"
 #include "hw/intc/arm_gicv3.h"
@@ -634,6 +635,11 @@ static const TypeInfo mps3r_machine_types[] = {
         .name = TYPE_MPS3R_AN536_MACHINE,
         .parent = TYPE_MPS3R_MACHINE,
         .class_init = mps3r_an536_class_init,
+        .interfaces = (InterfaceInfo[]) {
+            { TYPE_TARGET_ARM_MACHINE },
+            { TYPE_TARGET_AARCH64_MACHINE },
+            { },
+        },
     },
 };
 
diff --git a/hw/arm/msf2-som.c b/hw/arm/msf2-som.c
index 6ce47eaa27a..3f7aefc0ba4 100644
--- a/hw/arm/msf2-som.c
+++ b/hw/arm/msf2-som.c
@@ -32,6 +32,7 @@
 #include "hw/boards.h"
 #include "hw/qdev-properties.h"
 #include "hw/arm/boot.h"
+#include "hw/arm/machines-qom.h"
 #include "hw/qdev-clock.h"
 #include "system/address-spaces.h"
 #include "hw/arm/msf2-soc.h"
@@ -114,6 +115,11 @@ static const TypeInfo msf2_machine_types[] = {
         .name           = MACHINE_TYPE_NAME("emcraft-sf2"),
         .parent         = TYPE_MACHINE,
         .class_init     = emcraft_sf2_machine_class_init,
+        .interfaces     = (InterfaceInfo[]) {
+            { TYPE_TARGET_ARM_MACHINE },
+            { TYPE_TARGET_AARCH64_MACHINE },
+            { },
+        },
     },
 };
 
diff --git a/hw/arm/musca.c b/hw/arm/musca.c
index a4f43f1992b..608f16f69b2 100644
--- a/hw/arm/musca.c
+++ b/hw/arm/musca.c
@@ -26,6 +26,7 @@
 #include "system/system.h"
 #include "hw/arm/boot.h"
 #include "hw/arm/armsse.h"
+#include "hw/arm/machines-qom.h"
 #include "hw/boards.h"
 #include "hw/char/pl011.h"
 #include "hw/core/split-irq.h"
@@ -657,12 +658,22 @@ static const TypeInfo musca_a_info = {
     .name = TYPE_MUSCA_A_MACHINE,
     .parent = TYPE_MUSCA_MACHINE,
     .class_init = musca_a_class_init,
+    .interfaces = (InterfaceInfo[]) {
+        { TYPE_TARGET_ARM_MACHINE },
+        { TYPE_TARGET_AARCH64_MACHINE },
+        { },
+    },
 };
 
 static const TypeInfo musca_b1_info = {
     .name = TYPE_MUSCA_B1_MACHINE,
     .parent = TYPE_MUSCA_MACHINE,
     .class_init = musca_b1_class_init,
+    .interfaces = (InterfaceInfo[]) {
+        { TYPE_TARGET_ARM_MACHINE },
+        { TYPE_TARGET_AARCH64_MACHINE },
+        { },
+    },
 };
 
 static void musca_machine_init(void)
diff --git a/hw/arm/musicpal.c b/hw/arm/musicpal.c
index f7c488cd1d6..e2a65f72095 100644
--- a/hw/arm/musicpal.c
+++ b/hw/arm/musicpal.c
@@ -15,6 +15,7 @@
 #include "hw/sysbus.h"
 #include "migration/vmstate.h"
 #include "hw/arm/boot.h"
+#include "hw/arm/machines-qom.h"
 #include "net/net.h"
 #include "system/system.h"
 #include "hw/boards.h"
@@ -1381,6 +1382,11 @@ static const TypeInfo musicpal_types[] = {
         .name           = MACHINE_TYPE_NAME("musicpal"),
         .parent         = TYPE_MACHINE,
         .class_init     = musicpal_machine_class_init,
+        .interfaces     = (InterfaceInfo[]) {
+            { TYPE_TARGET_ARM_MACHINE },
+            { TYPE_TARGET_AARCH64_MACHINE },
+            { },
+        },
     },
 };
 
diff --git a/hw/arm/netduino2.c b/hw/arm/netduino2.c
index 52c30055d44..2e615276902 100644
--- a/hw/arm/netduino2.c
+++ b/hw/arm/netduino2.c
@@ -30,6 +30,7 @@
 #include "qemu/error-report.h"
 #include "hw/arm/stm32f205_soc.h"
 #include "hw/arm/boot.h"
+#include "hw/arm/machines-qom.h"
 
 /* Main SYSCLK frequency in Hz (120MHz) */
 #define SYSCLK_FRQ 120000000ULL
@@ -71,6 +72,11 @@ static const TypeInfo netduino_machine_types[] = {
         .name           = MACHINE_TYPE_NAME("netduino2"),
         .parent         = TYPE_MACHINE,
         .class_init     = netduino2_machine_class_init,
+        .interfaces     = (InterfaceInfo[]) {
+            { TYPE_TARGET_ARM_MACHINE },
+            { TYPE_TARGET_AARCH64_MACHINE },
+            { },
+        },
     },
 };
 
diff --git a/hw/arm/netduinoplus2.c b/hw/arm/netduinoplus2.c
index 2735d3a0e2b..e12f78599c4 100644
--- a/hw/arm/netduinoplus2.c
+++ b/hw/arm/netduinoplus2.c
@@ -30,6 +30,7 @@
 #include "qemu/error-report.h"
 #include "hw/arm/stm32f405_soc.h"
 #include "hw/arm/boot.h"
+#include "hw/arm/machines-qom.h"
 
 /* Main SYSCLK frequency in Hz (168MHz) */
 #define SYSCLK_FRQ 168000000ULL
@@ -71,6 +72,11 @@ static const TypeInfo netduino_machine_types[] = {
         .name           = MACHINE_TYPE_NAME("netduinoplus2"),
         .parent         = TYPE_MACHINE,
         .class_init     = netduinoplus2_machine_class_init,
+        .interfaces     = (InterfaceInfo[]) {
+            { TYPE_TARGET_ARM_MACHINE },
+            { TYPE_TARGET_AARCH64_MACHINE },
+            { },
+        },
     },
 };
 
diff --git a/hw/arm/npcm7xx_boards.c b/hw/arm/npcm7xx_boards.c
index eb28b97ad83..4b6d3443d53 100644
--- a/hw/arm/npcm7xx_boards.c
+++ b/hw/arm/npcm7xx_boards.c
@@ -17,6 +17,7 @@
 #include "qemu/osdep.h"
 
 #include "hw/arm/npcm7xx.h"
+#include "hw/arm/machines-qom.h"
 #include "hw/core/cpu.h"
 #include "hw/i2c/i2c_mux_pca954x.h"
 #include "hw/i2c/smbus_eeprom.h"
@@ -549,22 +550,47 @@ static const TypeInfo npcm7xx_machine_types[] = {
         .name           = MACHINE_TYPE_NAME("npcm750-evb"),
         .parent         = TYPE_NPCM7XX_MACHINE,
         .class_init     = npcm750_evb_machine_class_init,
+        .interfaces     = (InterfaceInfo[]) {
+                { TYPE_TARGET_ARM_MACHINE },
+                { TYPE_TARGET_AARCH64_MACHINE },
+                { },
+        },
     }, {
         .name           = MACHINE_TYPE_NAME("quanta-gsj"),
         .parent         = TYPE_NPCM7XX_MACHINE,
         .class_init     = gsj_machine_class_init,
+        .interfaces     = (InterfaceInfo[]) {
+                { TYPE_TARGET_ARM_MACHINE },
+                { TYPE_TARGET_AARCH64_MACHINE },
+                { },
+        },
     }, {
         .name           = MACHINE_TYPE_NAME("quanta-gbs-bmc"),
         .parent         = TYPE_NPCM7XX_MACHINE,
         .class_init     = gbs_bmc_machine_class_init,
+        .interfaces     = (InterfaceInfo[]) {
+                { TYPE_TARGET_ARM_MACHINE },
+                { TYPE_TARGET_AARCH64_MACHINE },
+                { },
+        },
     }, {
         .name           = MACHINE_TYPE_NAME("kudo-bmc"),
         .parent         = TYPE_NPCM7XX_MACHINE,
         .class_init     = kudo_bmc_machine_class_init,
+        .interfaces     = (InterfaceInfo[]) {
+                { TYPE_TARGET_ARM_MACHINE },
+                { TYPE_TARGET_AARCH64_MACHINE },
+                { },
+        },
     }, {
         .name           = MACHINE_TYPE_NAME("mori-bmc"),
         .parent         = TYPE_NPCM7XX_MACHINE,
         .class_init     = mori_bmc_machine_class_init,
+        .interfaces     = (InterfaceInfo[]) {
+                { TYPE_TARGET_ARM_MACHINE },
+                { TYPE_TARGET_AARCH64_MACHINE },
+                { },
+        },
     },
 };
 
diff --git a/hw/arm/npcm8xx_boards.c b/hw/arm/npcm8xx_boards.c
index 3fb8478e72e..919c14dd809 100644
--- a/hw/arm/npcm8xx_boards.c
+++ b/hw/arm/npcm8xx_boards.c
@@ -19,6 +19,7 @@
 #include "chardev/char.h"
 #include "hw/boards.h"
 #include "hw/arm/npcm8xx.h"
+#include "hw/arm/machines-qom.h"
 #include "hw/core/cpu.h"
 #include "hw/loader.h"
 #include "hw/qdev-core.h"
@@ -248,6 +249,10 @@ static const TypeInfo npcm8xx_machine_types[] = {
         .name           = MACHINE_TYPE_NAME("npcm845-evb"),
         .parent         = TYPE_NPCM8XX_MACHINE,
         .class_init     = npcm845_evb_machine_class_init,
+        .interfaces     = (InterfaceInfo[]) {
+                { TYPE_TARGET_AARCH64_MACHINE },
+                { },
+        },
     },
 };
 
diff --git a/hw/arm/olimex-stm32-h405.c b/hw/arm/olimex-stm32-h405.c
index 795218c93cf..f81f4094149 100644
--- a/hw/arm/olimex-stm32-h405.c
+++ b/hw/arm/olimex-stm32-h405.c
@@ -31,6 +31,7 @@
 #include "qemu/error-report.h"
 #include "hw/arm/stm32f405_soc.h"
 #include "hw/arm/boot.h"
+#include "hw/arm/machines-qom.h"
 
 /* olimex-stm32-h405 implementation is derived from netduinoplus2 */
 
@@ -77,6 +78,11 @@ static const TypeInfo olimex_stm32_machine_types[] = {
         .name           = MACHINE_TYPE_NAME("olimex-stm32-h405"),
         .parent         = TYPE_MACHINE,
         .class_init     = olimex_stm32_machine_class_init,
+        .interfaces     = (InterfaceInfo[]) {
+            { TYPE_TARGET_ARM_MACHINE },
+            { TYPE_TARGET_AARCH64_MACHINE },
+            { },
+        },
     },
 };
 
diff --git a/hw/arm/omap_sx1.c b/hw/arm/omap_sx1.c
index aa1e96b3ad7..2537045c1ac 100644
--- a/hw/arm/omap_sx1.c
+++ b/hw/arm/omap_sx1.c
@@ -32,6 +32,7 @@
 #include "hw/arm/omap.h"
 #include "hw/boards.h"
 #include "hw/arm/boot.h"
+#include "hw/arm/machines-qom.h"
 #include "hw/block/flash.h"
 #include "system/qtest.h"
 #include "system/address-spaces.h"
@@ -219,6 +220,11 @@ static const TypeInfo sx1_machine_v2_type = {
     .name = MACHINE_TYPE_NAME("sx1"),
     .parent = TYPE_MACHINE,
     .class_init = sx1_machine_v2_class_init,
+    .interfaces = (InterfaceInfo[]) {
+        { TYPE_TARGET_ARM_MACHINE },
+        { TYPE_TARGET_AARCH64_MACHINE },
+        { },
+    },
 };
 
 static void sx1_machine_v1_class_init(ObjectClass *oc, void *data)
@@ -238,6 +244,11 @@ static const TypeInfo sx1_machine_v1_type = {
     .name = MACHINE_TYPE_NAME("sx1-v1"),
     .parent = TYPE_MACHINE,
     .class_init = sx1_machine_v1_class_init,
+    .interfaces = (InterfaceInfo[]) {
+        { TYPE_TARGET_ARM_MACHINE },
+        { TYPE_TARGET_AARCH64_MACHINE },
+        { },
+    },
 };
 
 static void sx1_machine_init(void)
diff --git a/hw/arm/orangepi.c b/hw/arm/orangepi.c
index 6821033bfd7..4e333d428a2 100644
--- a/hw/arm/orangepi.c
+++ b/hw/arm/orangepi.c
@@ -26,6 +26,7 @@
 #include "hw/qdev-properties.h"
 #include "hw/arm/allwinner-h3.h"
 #include "hw/arm/boot.h"
+#include "hw/arm/machines-qom.h"
 
 static struct arm_boot_info orangepi_binfo;
 
@@ -130,6 +131,11 @@ static const TypeInfo orangepi_machine_types[] = {
         .name           = MACHINE_TYPE_NAME("orangepi-pc"),
         .parent         = TYPE_MACHINE,
         .class_init     = orangepi_machine_class_init,
+        .interfaces     = (InterfaceInfo[]) {
+            { TYPE_TARGET_ARM_MACHINE },
+            { TYPE_TARGET_AARCH64_MACHINE },
+            { },
+        },
     },
 };
 
diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c
index dce35ca11aa..69cccdbb6b1 100644
--- a/hw/arm/raspi.c
+++ b/hw/arm/raspi.c
@@ -25,6 +25,7 @@
 #include "hw/boards.h"
 #include "hw/loader.h"
 #include "hw/arm/boot.h"
+#include "hw/arm/machines-qom.h"
 #include "qom/object.h"
 
 #define TYPE_RASPI_MACHINE  MACHINE_TYPE_NAME("raspi-common")
@@ -394,23 +395,46 @@ static const TypeInfo raspi_machine_types[] = {
         .name           = MACHINE_TYPE_NAME("raspi0"),
         .parent         = TYPE_RASPI_MACHINE,
         .class_init     = raspi0_machine_class_init,
+        .interfaces     = (InterfaceInfo[]) {
+            { TYPE_TARGET_ARM_MACHINE },
+            { TYPE_TARGET_AARCH64_MACHINE },
+            { },
+        },
     }, {
         .name           = MACHINE_TYPE_NAME("raspi1ap"),
         .parent         = TYPE_RASPI_MACHINE,
         .class_init     = raspi1ap_machine_class_init,
+        .interfaces     = (InterfaceInfo[]) {
+            { TYPE_TARGET_ARM_MACHINE },
+            { TYPE_TARGET_AARCH64_MACHINE },
+            { },
+        },
     }, {
         .name           = MACHINE_TYPE_NAME("raspi2b"),
         .parent         = TYPE_RASPI_MACHINE,
         .class_init     = raspi2b_machine_class_init,
+        .interfaces     = (InterfaceInfo[]) {
+            { TYPE_TARGET_ARM_MACHINE },
+            { TYPE_TARGET_AARCH64_MACHINE },
+            { },
+        },
 #ifdef TARGET_AARCH64
     }, {
         .name           = MACHINE_TYPE_NAME("raspi3ap"),
         .parent         = TYPE_RASPI_MACHINE,
         .class_init     = raspi3ap_machine_class_init,
+        .interfaces     = (InterfaceInfo[]) {
+            { TYPE_TARGET_AARCH64_MACHINE },
+            { },
+        },
     }, {
         .name           = MACHINE_TYPE_NAME("raspi3b"),
         .parent         = TYPE_RASPI_MACHINE,
         .class_init     = raspi3b_machine_class_init,
+        .interfaces     = (InterfaceInfo[]) {
+            { TYPE_TARGET_AARCH64_MACHINE },
+            { },
+        },
 #endif
     }, {
         .name           = TYPE_RASPI_MACHINE,
diff --git a/hw/arm/raspi4b.c b/hw/arm/raspi4b.c
index f6de103a3e1..8fda6d3b0ca 100644
--- a/hw/arm/raspi4b.c
+++ b/hw/arm/raspi4b.c
@@ -11,6 +11,7 @@
 #include "qemu/cutils.h"
 #include "qapi/error.h"
 #include "qapi/visitor.h"
+#include "hw/arm/machines-qom.h"
 #include "hw/arm/raspi_platform.h"
 #include "hw/display/bcm2835_fb.h"
 #include "hw/registerfields.h"
@@ -127,6 +128,10 @@ static const TypeInfo raspi4b_machine_type = {
     .parent         = TYPE_RASPI_BASE_MACHINE,
     .instance_size  = sizeof(Raspi4bMachineState),
     .class_init     = raspi4b_machine_class_init,
+    .interfaces     = (InterfaceInfo[]) {
+        { TYPE_TARGET_AARCH64_MACHINE },
+        { },
+    },
 };
 
 static void raspi4b_machine_register_type(void)
diff --git a/hw/arm/realview.c b/hw/arm/realview.c
index 008eeaf049a..aed864bcd4f 100644
--- a/hw/arm/realview.c
+++ b/hw/arm/realview.c
@@ -13,6 +13,7 @@
 #include "hw/sysbus.h"
 #include "hw/arm/boot.h"
 #include "hw/arm/primecell.h"
+#include "hw/arm/machines-qom.h"
 #include "hw/core/split-irq.h"
 #include "hw/net/lan9118.h"
 #include "hw/net/smc91c111.h"
@@ -431,6 +432,11 @@ static const TypeInfo realview_eb_type = {
     .name = MACHINE_TYPE_NAME("realview-eb"),
     .parent = TYPE_MACHINE,
     .class_init = realview_eb_class_init,
+    .interfaces = (InterfaceInfo[]) {
+        { TYPE_TARGET_ARM_MACHINE },
+        { TYPE_TARGET_AARCH64_MACHINE },
+        { },
+    },
 };
 
 static void realview_eb_mpcore_class_init(ObjectClass *oc, void *data)
@@ -452,6 +458,11 @@ static const TypeInfo realview_eb_mpcore_type = {
     .name = MACHINE_TYPE_NAME("realview-eb-mpcore"),
     .parent = TYPE_MACHINE,
     .class_init = realview_eb_mpcore_class_init,
+    .interfaces = (InterfaceInfo[]) {
+        { TYPE_TARGET_ARM_MACHINE },
+        { TYPE_TARGET_AARCH64_MACHINE },
+        { },
+    },
 };
 
 static void realview_pb_a8_class_init(ObjectClass *oc, void *data)
@@ -471,6 +482,11 @@ static const TypeInfo realview_pb_a8_type = {
     .name = MACHINE_TYPE_NAME("realview-pb-a8"),
     .parent = TYPE_MACHINE,
     .class_init = realview_pb_a8_class_init,
+    .interfaces = (InterfaceInfo[]) {
+        { TYPE_TARGET_ARM_MACHINE },
+        { TYPE_TARGET_AARCH64_MACHINE },
+        { },
+    },
 };
 
 static void realview_pbx_a9_class_init(ObjectClass *oc, void *data)
@@ -491,6 +507,11 @@ static const TypeInfo realview_pbx_a9_type = {
     .name = MACHINE_TYPE_NAME("realview-pbx-a9"),
     .parent = TYPE_MACHINE,
     .class_init = realview_pbx_a9_class_init,
+    .interfaces = (InterfaceInfo[]) {
+        { TYPE_TARGET_ARM_MACHINE },
+        { TYPE_TARGET_AARCH64_MACHINE },
+        { },
+    },
 };
 
 static void realview_machine_init(void)
diff --git a/hw/arm/sabrelite.c b/hw/arm/sabrelite.c
index ea59ba301e7..bc472dcad2c 100644
--- a/hw/arm/sabrelite.c
+++ b/hw/arm/sabrelite.c
@@ -14,6 +14,7 @@
 #include "qapi/error.h"
 #include "hw/arm/fsl-imx6.h"
 #include "hw/arm/boot.h"
+#include "hw/arm/machines-qom.h"
 #include "hw/boards.h"
 #include "hw/qdev-properties.h"
 #include "qemu/error-report.h"
@@ -120,6 +121,11 @@ static const TypeInfo sabrelite_machine_types[] = {
         .name           = MACHINE_TYPE_NAME("sabrelite"),
         .parent         = TYPE_MACHINE,
         .class_init     = sabrelite_machine_class_init,
+        .interfaces     = (InterfaceInfo[]) {
+            { TYPE_TARGET_ARM_MACHINE },
+            { TYPE_TARGET_AARCH64_MACHINE },
+            { },
+        },
     },
 };
 
diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c
index aa09d7a0917..6584097fc25 100644
--- a/hw/arm/sbsa-ref.c
+++ b/hw/arm/sbsa-ref.c
@@ -34,6 +34,7 @@
 #include "hw/arm/bsa.h"
 #include "hw/arm/fdt.h"
 #include "hw/arm/smmuv3.h"
+#include "hw/arm/machines-qom.h"
 #include "hw/block/flash.h"
 #include "hw/boards.h"
 #include "hw/ide/ide-bus.h"
@@ -920,6 +921,10 @@ static const TypeInfo sbsa_ref_info = {
     .instance_init = sbsa_ref_instance_init,
     .class_init    = sbsa_ref_class_init,
     .instance_size = sizeof(SBSAMachineState),
+    .interfaces    = (InterfaceInfo[]) {
+        { TYPE_TARGET_AARCH64_MACHINE },
+        { },
+    },
 };
 
 static void sbsa_ref_machine_init(void)
diff --git a/hw/arm/stellaris.c b/hw/arm/stellaris.c
index cbe914c93e9..8dc68c145c1 100644
--- a/hw/arm/stellaris.c
+++ b/hw/arm/stellaris.c
@@ -15,6 +15,7 @@
 #include "hw/sd/sd.h"
 #include "hw/ssi/ssi.h"
 #include "hw/arm/boot.h"
+#include "hw/arm/machines-qom.h"
 #include "qemu/timer.h"
 #include "hw/i2c/i2c.h"
 #include "net/net.h"
@@ -1427,6 +1428,11 @@ static const TypeInfo lm3s811evb_type = {
     .name = MACHINE_TYPE_NAME("lm3s811evb"),
     .parent = TYPE_MACHINE,
     .class_init = lm3s811evb_class_init,
+    .interfaces = (InterfaceInfo[]) {
+        { TYPE_TARGET_ARM_MACHINE },
+        { TYPE_TARGET_AARCH64_MACHINE },
+        { },
+    },
 };
 
 /*
@@ -1448,6 +1454,11 @@ static const TypeInfo lm3s6965evb_type = {
     .name = MACHINE_TYPE_NAME("lm3s6965evb"),
     .parent = TYPE_MACHINE,
     .class_init = lm3s6965evb_class_init,
+    .interfaces = (InterfaceInfo[]) {
+        { TYPE_TARGET_ARM_MACHINE },
+        { TYPE_TARGET_AARCH64_MACHINE },
+        { },
+    },
 };
 
 static void stellaris_machine_init(void)
diff --git a/hw/arm/stm32vldiscovery.c b/hw/arm/stm32vldiscovery.c
index 3a9728ca719..b7eb948bc2d 100644
--- a/hw/arm/stm32vldiscovery.c
+++ b/hw/arm/stm32vldiscovery.c
@@ -31,6 +31,7 @@
 #include "qemu/error-report.h"
 #include "hw/arm/stm32f100_soc.h"
 #include "hw/arm/boot.h"
+#include "hw/arm/machines-qom.h"
 
 /* stm32vldiscovery implementation is derived from netduinoplus2 */
 
@@ -74,6 +75,11 @@ static const TypeInfo stm32vldiscovery_machine_types[] = {
         .name           = MACHINE_TYPE_NAME("stm32vldiscovery"),
         .parent         = TYPE_MACHINE,
         .class_init     = stm32vldiscovery_machine_class_init,
+        .interfaces     = (InterfaceInfo[]) {
+            { TYPE_TARGET_ARM_MACHINE },
+            { TYPE_TARGET_AARCH64_MACHINE },
+            { },
+        },
     },
 };
 
diff --git a/hw/arm/versatilepb.c b/hw/arm/versatilepb.c
index 35766445fa4..defc4d7d170 100644
--- a/hw/arm/versatilepb.c
+++ b/hw/arm/versatilepb.c
@@ -12,6 +12,7 @@
 #include "hw/sysbus.h"
 #include "migration/vmstate.h"
 #include "hw/arm/boot.h"
+#include "hw/arm/machines-qom.h"
 #include "hw/net/smc91c111.h"
 #include "net/net.h"
 #include "system/system.h"
@@ -431,6 +432,11 @@ static const TypeInfo versatilepb_type = {
     .name = MACHINE_TYPE_NAME("versatilepb"),
     .parent = TYPE_MACHINE,
     .class_init = versatilepb_class_init,
+    .interfaces = (InterfaceInfo[]) {
+        { TYPE_TARGET_ARM_MACHINE },
+        { TYPE_TARGET_AARCH64_MACHINE },
+        { },
+    },
 };
 
 static void versatileab_class_init(ObjectClass *oc, void *data)
@@ -452,6 +458,11 @@ static const TypeInfo versatileab_type = {
     .name = MACHINE_TYPE_NAME("versatileab"),
     .parent = TYPE_MACHINE,
     .class_init = versatileab_class_init,
+    .interfaces = (InterfaceInfo[]) {
+        { TYPE_TARGET_ARM_MACHINE },
+        { TYPE_TARGET_AARCH64_MACHINE },
+        { },
+    },
 };
 
 static void versatile_machine_init(void)
diff --git a/hw/arm/vexpress.c b/hw/arm/vexpress.c
index 76c6107766c..38b203b52da 100644
--- a/hw/arm/vexpress.c
+++ b/hw/arm/vexpress.c
@@ -27,6 +27,7 @@
 #include "hw/sysbus.h"
 #include "hw/arm/boot.h"
 #include "hw/arm/primecell.h"
+#include "hw/arm/machines-qom.h"
 #include "hw/net/lan9118.h"
 #include "hw/i2c/i2c.h"
 #include "net/net.h"
@@ -850,6 +851,11 @@ static const TypeInfo vexpress_a9_info = {
     .parent = TYPE_VEXPRESS_MACHINE,
     .class_init = vexpress_a9_class_init,
     .instance_init = vexpress_a9_instance_init,
+    .interfaces = (InterfaceInfo[]) {
+        { TYPE_TARGET_ARM_MACHINE },
+        { TYPE_TARGET_AARCH64_MACHINE },
+        { },
+    },
 };
 
 static const TypeInfo vexpress_a15_info = {
@@ -857,6 +863,11 @@ static const TypeInfo vexpress_a15_info = {
     .parent = TYPE_VEXPRESS_MACHINE,
     .class_init = vexpress_a15_class_init,
     .instance_init = vexpress_a15_instance_init,
+    .interfaces = (InterfaceInfo[]) {
+        { TYPE_TARGET_ARM_MACHINE },
+        { TYPE_TARGET_AARCH64_MACHINE },
+        { },
+    },
 };
 
 static void vexpress_machine_init(void)
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index a96452f17a4..a3c9ffe29eb 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -37,6 +37,7 @@
 #include "hw/arm/boot.h"
 #include "hw/arm/primecell.h"
 #include "hw/arm/virt.h"
+#include "hw/arm/machines-qom.h"
 #include "hw/block/flash.h"
 #include "hw/vfio/vfio-calxeda-xgmac.h"
 #include "hw/vfio/vfio-amd-xgbe.h"
@@ -123,6 +124,11 @@ static void arm_virt_compat_set(MachineClass *mc)
         .name = MACHINE_VER_TYPE_NAME("virt", __VA_ARGS__), \
         .parent = TYPE_VIRT_MACHINE, \
         .class_init = MACHINE_VER_SYM(class_init, virt, __VA_ARGS__), \
+        .interfaces = (InterfaceInfo[]) { \
+            { TYPE_TARGET_ARM_MACHINE }, \
+            { TYPE_TARGET_AARCH64_MACHINE }, \
+            { }, \
+        }, \
     }; \
     static void MACHINE_VER_SYM(register, virt, __VA_ARGS__)(void) \
     { \
diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c
index b8916665ed6..433907093fa 100644
--- a/hw/arm/xilinx_zynq.c
+++ b/hw/arm/xilinx_zynq.c
@@ -20,6 +20,7 @@
 #include "qapi/error.h"
 #include "hw/sysbus.h"
 #include "hw/arm/boot.h"
+#include "hw/arm/machines-qom.h"
 #include "net/net.h"
 #include "system/system.h"
 #include "hw/boards.h"
@@ -480,6 +481,11 @@ static const TypeInfo zynq_machine_type = {
     .parent = TYPE_MACHINE,
     .class_init = zynq_machine_class_init,
     .instance_size = sizeof(ZynqMachineState),
+    .interfaces = (InterfaceInfo[]) {
+        { TYPE_TARGET_ARM_MACHINE },
+        { TYPE_TARGET_AARCH64_MACHINE },
+        { },
+    },
 };
 
 static void zynq_machine_register_types(void)
diff --git a/hw/arm/xlnx-versal-virt.c b/hw/arm/xlnx-versal-virt.c
index 0c6f0359e3d..cb7466f7250 100644
--- a/hw/arm/xlnx-versal-virt.c
+++ b/hw/arm/xlnx-versal-virt.c
@@ -20,6 +20,7 @@
 #include "hw/qdev-properties.h"
 #include "hw/arm/xlnx-versal.h"
 #include "hw/arm/boot.h"
+#include "hw/arm/machines-qom.h"
 #include "target/arm/multiprocessing.h"
 #include "qom/object.h"
 
@@ -833,6 +834,10 @@ static const TypeInfo versal_virt_machine_init_typeinfo = {
     .instance_init = versal_virt_machine_instance_init,
     .instance_size = sizeof(VersalVirt),
     .instance_finalize = versal_virt_machine_finalize,
+    .interfaces = (InterfaceInfo[]) {
+        { TYPE_TARGET_AARCH64_MACHINE },
+        { },
+    },
 };
 
 static void versal_virt_machine_init_register_types(void)
diff --git a/hw/arm/xlnx-zcu102.c b/hw/arm/xlnx-zcu102.c
index 4fdb153e4d8..f730dbbd908 100644
--- a/hw/arm/xlnx-zcu102.c
+++ b/hw/arm/xlnx-zcu102.c
@@ -19,6 +19,7 @@
 #include "qapi/error.h"
 #include "hw/arm/xlnx-zynqmp.h"
 #include "hw/arm/boot.h"
+#include "hw/arm/machines-qom.h"
 #include "hw/boards.h"
 #include "qemu/error-report.h"
 #include "qemu/log.h"
@@ -303,6 +304,10 @@ static const TypeInfo xlnx_zcu102_machine_init_typeinfo = {
     .class_init = xlnx_zcu102_machine_class_init,
     .instance_init = xlnx_zcu102_machine_instance_init,
     .instance_size = sizeof(XlnxZCU102),
+    .interfaces = (InterfaceInfo[]) {
+        { TYPE_TARGET_AARCH64_MACHINE },
+        { },
+    },
 };
 
 static void xlnx_zcu102_machine_init_register_types(void)
-- 
2.47.1

Re: [RFC PATCH v3 06/14] hw/arm: Filter machine types for qemu-system-arm/aarch64 binaries

[Pierrick Bouvier]

On 4/18/25 10:29, Philippe Mathieu-Daudé wrote:
> Since the qemu-system-aarch64 binary is able to run
> all machines indistinctly, simply register the
> TYPE_TARGET_AARCH64_MACHINE interface for all
> existing machines under the hw/arm/ directory.
> 
> Very few machines are restricted to the qemu-system-aarch64
> binary:
> 
>    $ git grep TARGET_AARCH64 hw/arm/meson.build
>    hw/arm/meson.build:31:arm_common_ss.add(when: ['CONFIG_RASPI', 'TARGET_AARCH64'], if_true: files('bcm2838.c', 'raspi4b.c'))
>    hw/arm/meson.build:50:arm_common_ss.add(when: ['CONFIG_ASPEED_SOC', 'TARGET_AARCH64'], if_true: files('aspeed_ast27x0.c'))
> 
>    $ git grep -W AARCH64 hw/arm/Kconfig
>    hw/arm/Kconfig=185=config SBSA_REF
>    hw/arm/Kconfig-186-    bool
>    hw/arm/Kconfig-187-    default y
>    hw/arm/Kconfig:188:    depends on TCG && AARCH64
>    --
>    hw/arm/Kconfig=413=config XLNX_ZYNQMP_ARM
>    hw/arm/Kconfig-414-    bool
>    hw/arm/Kconfig-415-    default y if PIXMAN
>    hw/arm/Kconfig:416:    depends on TCG && AARCH64
>    --
>    hw/arm/Kconfig=435=config XLNX_VERSAL
>    hw/arm/Kconfig-436-    bool
>    hw/arm/Kconfig-437-    default y
>    hw/arm/Kconfig:438:    depends on TCG && AARCH64
>    --
>    hw/arm/Kconfig=475=config NPCM8XX
>    hw/arm/Kconfig-476-    bool
>    hw/arm/Kconfig-477-    default y
>    hw/arm/Kconfig:478:    depends on TCG && AARCH64
>    --
>    hw/arm/Kconfig=605=config FSL_IMX8MP_EVK
>    hw/arm/Kconfig-606-    bool
>    hw/arm/Kconfig-607-    default y
>    hw/arm/Kconfig:608:    depends on TCG && AARCH64
> 
>    $ git grep -wW TARGET_AARCH64 hw/arm | fgrep -4 MACHINE_TYPE_NAME
>    ...
>    hw/arm/aspeed.c:1939:#ifdef TARGET_AARCH64
>    hw/arm/aspeed.c-1940-    }, {
>    hw/arm/aspeed.c-1941-        .name          = MACHINE_TYPE_NAME("ast2700a0-evb"),
> 
>    hw/arm/aspeed.c-1949-        .name          = MACHINE_TYPE_NAME("ast2700a1-evb"),
> 
>    hw/arm/raspi.c:420:#ifdef TARGET_AARCH64
>    hw/arm/raspi.c-421-    }, {
>    hw/arm/raspi.c-422-        .name           = MACHINE_TYPE_NAME("raspi3ap"),
> 
>    hw/arm/raspi.c-429-    }, {
>    hw/arm/raspi.c-430-        .name           = MACHINE_TYPE_NAME("raspi3b"),
> 
> This can be verified as:
> 
> $ diff -u0 <(qemu-system-arm -M help) <(qemu-system-aarch64 -M help)
>    @@ -5,3 +4,0 @@
>    -ast2700-evb          Aspeed AST2700 A0 EVB (Cortex-A35) (alias of ast2700a0-evb)
>    -ast2700a0-evb        Aspeed AST2700 A0 EVB (Cortex-A35)
>    -ast2700a1-evb        Aspeed AST2700 A1 EVB (Cortex-A35)
>    @@ -22 +18,0 @@
>    -imx8mp-evk           NXP i.MX 8M Plus EVK Board
>    @@ -49 +44,0 @@
>    -npcm845-evb          Nuvoton NPCM845 Evaluation Board (Cortex-A35)
>    @@ -63,3 +57,0 @@
>    -raspi3ap             Raspberry Pi 3A+ (revision 1.0)
>    -raspi3b              Raspberry Pi 3B (revision 1.2)
>    -raspi4b              Raspberry Pi 4B (revision 1.5)
>    @@ -72 +63,0 @@
>    -sbsa-ref             QEMU 'SBSA Reference' ARM Virtual Machine
>    @@ -116,2 +106,0 @@
>    -xlnx-versal-virt     Xilinx Versal Virtual development board
>    -xlnx-zcu102          Xilinx ZynqMP ZCU102 board with 4xA53s and 2xR5Fs based on the value of smp
> 
> Register the TYPE_TARGET_ARM_MACHINE interface for all
> the machines not listed previously.
> 
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
> ---
>   hw/arm/aspeed.c            | 109 +++++++++++++++++++++++++++++++++++++
>   hw/arm/b-l475e-iot01a.c    |   6 ++
>   hw/arm/bananapi_m2u.c      |   6 ++
>   hw/arm/bcm2836.c           |   1 +
>   hw/arm/collie.c            |   6 ++
>   hw/arm/cubieboard.c        |   6 ++
>   hw/arm/digic_boards.c      |   6 ++
>   hw/arm/exynos4_boards.c    |  11 ++++
>   hw/arm/fby35.c             |   6 ++
>   hw/arm/highbank.c          |  11 ++++
>   hw/arm/imx25_pdk.c         |   6 ++
>   hw/arm/imx8mp-evk.c        |   5 ++
>   hw/arm/integratorcp.c      |   6 ++
>   hw/arm/kzm.c               |   6 ++
>   hw/arm/mcimx6ul-evk.c      |   6 ++
>   hw/arm/mcimx7d-sabre.c     |   6 ++
>   hw/arm/microbit.c          |   6 ++
>   hw/arm/mps2-tz.c           |  21 +++++++
>   hw/arm/mps2.c              |  21 +++++++
>   hw/arm/mps3r.c             |   6 ++
>   hw/arm/msf2-som.c          |   6 ++
>   hw/arm/musca.c             |  11 ++++
>   hw/arm/musicpal.c          |   6 ++
>   hw/arm/netduino2.c         |   6 ++
>   hw/arm/netduinoplus2.c     |   6 ++
>   hw/arm/npcm7xx_boards.c    |  26 +++++++++
>   hw/arm/npcm8xx_boards.c    |   5 ++
>   hw/arm/olimex-stm32-h405.c |   6 ++
>   hw/arm/omap_sx1.c          |  11 ++++
>   hw/arm/orangepi.c          |   6 ++
>   hw/arm/raspi.c             |  24 ++++++++
>   hw/arm/raspi4b.c           |   5 ++
>   hw/arm/realview.c          |  21 +++++++
>   hw/arm/sabrelite.c         |   6 ++
>   hw/arm/sbsa-ref.c          |   5 ++
>   hw/arm/stellaris.c         |  11 ++++
>   hw/arm/stm32vldiscovery.c  |   6 ++
>   hw/arm/versatilepb.c       |  11 ++++
>   hw/arm/vexpress.c          |  11 ++++
>   hw/arm/virt.c              |   6 ++
>   hw/arm/xilinx_zynq.c       |   6 ++
>   hw/arm/xlnx-versal-virt.c  |   5 ++
>   hw/arm/xlnx-zcu102.c       |   5 ++
>   43 files changed, 468 insertions(+)
> 
> diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
> index 82f42582fa3..ce4d49a9f59 100644
> --- a/hw/arm/aspeed.c
> +++ b/hw/arm/aspeed.c
> @@ -15,6 +15,7 @@
>   #include "hw/arm/aspeed.h"
>   #include "hw/arm/aspeed_soc.h"
>   #include "hw/arm/aspeed_eeprom.h"
> +#include "hw/arm/machines-qom.h"
>   #include "hw/block/flash.h"
>   #include "hw/i2c/i2c_mux_pca954x.h"
>   #include "hw/i2c/smbus_eeprom.h"
> @@ -1760,91 +1761,199 @@ static const TypeInfo aspeed_machine_types[] = {
>           .name          = MACHINE_TYPE_NAME("palmetto-bmc"),
>           .parent        = TYPE_ASPEED_MACHINE,
>           .class_init    = aspeed_machine_palmetto_class_init,
> +        .interfaces     = (InterfaceInfo[]) {
> +            { TYPE_TARGET_ARM_MACHINE },
> +            { TYPE_TARGET_AARCH64_MACHINE },
> +            { },
> +        },
>       }, {
>           .name          = MACHINE_TYPE_NAME("supermicrox11-bmc"),
>           .parent        = TYPE_ASPEED_MACHINE,
>           .class_init    = aspeed_machine_supermicrox11_bmc_class_init,
> +        .interfaces     = (InterfaceInfo[]) {
> +            { TYPE_TARGET_ARM_MACHINE },
> +            { TYPE_TARGET_AARCH64_MACHINE },
> +            { },
> +        },
>       }, {
>           .name          = MACHINE_TYPE_NAME("supermicro-x11spi-bmc"),
>           .parent        = TYPE_ASPEED_MACHINE,
>           .class_init    = aspeed_machine_supermicro_x11spi_bmc_class_init,
> +        .interfaces     = (InterfaceInfo[]) {
> +            { TYPE_TARGET_ARM_MACHINE },
> +            { TYPE_TARGET_AARCH64_MACHINE },
> +            { },
> +        },
>       }, {
>           .name          = MACHINE_TYPE_NAME("ast2500-evb"),
>           .parent        = TYPE_ASPEED_MACHINE,
>           .class_init    = aspeed_machine_ast2500_evb_class_init,
> +        .interfaces     = (InterfaceInfo[]) {
> +            { TYPE_TARGET_ARM_MACHINE },
> +            { TYPE_TARGET_AARCH64_MACHINE },
> +            { },
> +        },
>       }, {
>           .name          = MACHINE_TYPE_NAME("romulus-bmc"),
>           .parent        = TYPE_ASPEED_MACHINE,
>           .class_init    = aspeed_machine_romulus_class_init,
> +        .interfaces     = (InterfaceInfo[]) {
> +            { TYPE_TARGET_ARM_MACHINE },
> +            { TYPE_TARGET_AARCH64_MACHINE },
> +            { },
> +        },
>       }, {
>           .name          = MACHINE_TYPE_NAME("sonorapass-bmc"),
>           .parent        = TYPE_ASPEED_MACHINE,
>           .class_init    = aspeed_machine_sonorapass_class_init,
> +        .interfaces     = (InterfaceInfo[]) {
> +            { TYPE_TARGET_ARM_MACHINE },
> +            { TYPE_TARGET_AARCH64_MACHINE },
> +            { },
> +        },
>       }, {
>           .name          = MACHINE_TYPE_NAME("witherspoon-bmc"),
>           .parent        = TYPE_ASPEED_MACHINE,
>           .class_init    = aspeed_machine_witherspoon_class_init,
> +        .interfaces     = (InterfaceInfo[]) {
> +            { TYPE_TARGET_ARM_MACHINE },
> +            { TYPE_TARGET_AARCH64_MACHINE },
> +            { },
> +        },
>       }, {
>           .name          = MACHINE_TYPE_NAME("ast2600-evb"),
>           .parent        = TYPE_ASPEED_MACHINE,
>           .class_init    = aspeed_machine_ast2600_evb_class_init,
> +        .interfaces     = (InterfaceInfo[]) {
> +            { TYPE_TARGET_ARM_MACHINE },
> +            { TYPE_TARGET_AARCH64_MACHINE },
> +            { },
> +        },
>       }, {
>           .name          = MACHINE_TYPE_NAME("yosemitev2-bmc"),
>           .parent        = TYPE_ASPEED_MACHINE,
>           .class_init    = aspeed_machine_yosemitev2_class_init,
> +        .interfaces     = (InterfaceInfo[]) {
> +            { TYPE_TARGET_ARM_MACHINE },
> +            { TYPE_TARGET_AARCH64_MACHINE },
> +            { },
> +        },
>       }, {
>           .name          = MACHINE_TYPE_NAME("tiogapass-bmc"),
>           .parent        = TYPE_ASPEED_MACHINE,
>           .class_init    = aspeed_machine_tiogapass_class_init,
> +        .interfaces     = (InterfaceInfo[]) {
> +            { TYPE_TARGET_ARM_MACHINE },
> +            { TYPE_TARGET_AARCH64_MACHINE },
> +            { },
> +        },
>       }, {
>           .name          = MACHINE_TYPE_NAME("g220a-bmc"),
>           .parent        = TYPE_ASPEED_MACHINE,
>           .class_init    = aspeed_machine_g220a_class_init,
> +        .interfaces     = (InterfaceInfo[]) {
> +            { TYPE_TARGET_ARM_MACHINE },
> +            { TYPE_TARGET_AARCH64_MACHINE },
> +            { },
> +        },
>       }, {
>           .name          = MACHINE_TYPE_NAME("qcom-dc-scm-v1-bmc"),
>           .parent        = TYPE_ASPEED_MACHINE,
>           .class_init    = aspeed_machine_qcom_dc_scm_v1_class_init,
> +        .interfaces     = (InterfaceInfo[]) {
> +            { TYPE_TARGET_ARM_MACHINE },
> +            { TYPE_TARGET_AARCH64_MACHINE },
> +            { },
> +        },
>       }, {
>           .name          = MACHINE_TYPE_NAME("qcom-firework-bmc"),
>           .parent        = TYPE_ASPEED_MACHINE,
>           .class_init    = aspeed_machine_qcom_firework_class_init,
> +        .interfaces     = (InterfaceInfo[]) {
> +            { TYPE_TARGET_ARM_MACHINE },
> +            { TYPE_TARGET_AARCH64_MACHINE },
> +            { },
> +        },
>       }, {
>           .name          = MACHINE_TYPE_NAME("fp5280g2-bmc"),
>           .parent        = TYPE_ASPEED_MACHINE,
>           .class_init    = aspeed_machine_fp5280g2_class_init,
> +        .interfaces     = (InterfaceInfo[]) {
> +            { TYPE_TARGET_ARM_MACHINE },
> +            { TYPE_TARGET_AARCH64_MACHINE },
> +            { },
> +        },
>       }, {
>           .name          = MACHINE_TYPE_NAME("quanta-q71l-bmc"),
>           .parent        = TYPE_ASPEED_MACHINE,
>           .class_init    = aspeed_machine_quanta_q71l_class_init,
> +        .interfaces     = (InterfaceInfo[]) {
> +            { TYPE_TARGET_ARM_MACHINE },
> +            { TYPE_TARGET_AARCH64_MACHINE },
> +            { },
> +        },
>       }, {
>           .name          = MACHINE_TYPE_NAME("rainier-bmc"),
>           .parent        = TYPE_ASPEED_MACHINE,
>           .class_init    = aspeed_machine_rainier_class_init,
> +        .interfaces     = (InterfaceInfo[]) {
> +            { TYPE_TARGET_ARM_MACHINE },
> +            { TYPE_TARGET_AARCH64_MACHINE },
> +            { },
> +        },
>       }, {
>           .name          = MACHINE_TYPE_NAME("fuji-bmc"),
>           .parent        = TYPE_ASPEED_MACHINE,
>           .class_init    = aspeed_machine_fuji_class_init,
> +        .interfaces     = (InterfaceInfo[]) {
> +            { TYPE_TARGET_ARM_MACHINE },
> +            { TYPE_TARGET_AARCH64_MACHINE },
> +            { },
> +        },
>       }, {
>           .name          = MACHINE_TYPE_NAME("bletchley-bmc"),
>           .parent        = TYPE_ASPEED_MACHINE,
>           .class_init    = aspeed_machine_bletchley_class_init,
> +        .interfaces     = (InterfaceInfo[]) {
> +            { TYPE_TARGET_ARM_MACHINE },
> +            { TYPE_TARGET_AARCH64_MACHINE },
> +            { },
> +        },
>       }, {
>           .name          = MACHINE_TYPE_NAME("fby35-bmc"),
>           .parent        = MACHINE_TYPE_NAME("ast2600-evb"),
>           .class_init    = aspeed_machine_fby35_class_init,
> +        .interfaces     = (InterfaceInfo[]) {
> +            { TYPE_TARGET_ARM_MACHINE },
> +            { TYPE_TARGET_AARCH64_MACHINE },
> +            { },
> +        },
>       }, {
>           .name           = MACHINE_TYPE_NAME("ast1030-evb"),
>           .parent         = TYPE_ASPEED_MACHINE,
>           .class_init     = aspeed_minibmc_machine_ast1030_evb_class_init,
> +        .interfaces     = (InterfaceInfo[]) {
> +            { TYPE_TARGET_ARM_MACHINE },
> +            { TYPE_TARGET_AARCH64_MACHINE },
> +            { },
> +        },
>   #ifdef TARGET_AARCH64
>       }, {
>           .name          = MACHINE_TYPE_NAME("ast2700a0-evb"),
>           .parent        = TYPE_ASPEED_MACHINE,
>           .class_init    = aspeed_machine_ast2700a0_evb_class_init,
> +        .interfaces     = (InterfaceInfo[]) {
> +            { TYPE_TARGET_AARCH64_MACHINE },
> +            { },
> +        },
>           }, {
>           .name          = MACHINE_TYPE_NAME("ast2700a1-evb"),
>           .parent        = TYPE_ASPEED_MACHINE,
>           .class_init    = aspeed_machine_ast2700a1_evb_class_init,
> +        .interfaces     = (InterfaceInfo[]) {
> +            { TYPE_TARGET_AARCH64_MACHINE },
> +            { },
> +        },
>   #endif
>       }, {
>           .name          = TYPE_ASPEED_MACHINE,
> diff --git a/hw/arm/b-l475e-iot01a.c b/hw/arm/b-l475e-iot01a.c
> index c9a5209216c..7af7db3dbb3 100644
> --- a/hw/arm/b-l475e-iot01a.c
> +++ b/hw/arm/b-l475e-iot01a.c
> @@ -29,6 +29,7 @@
>   #include "qemu/error-report.h"
>   #include "hw/arm/boot.h"
>   #include "hw/core/split-irq.h"
> +#include "hw/arm/machines-qom.h"
>   #include "hw/arm/stm32l4x5_soc.h"
>   #include "hw/gpio/stm32l4x5_gpio.h"
>   #include "hw/display/dm163.h"
> @@ -131,6 +132,11 @@ static const TypeInfo bl475e_machine_type[] = {
>           .parent         = TYPE_MACHINE,
>           .instance_size  = sizeof(Bl475eMachineState),
>           .class_init     = bl475e_machine_init,
> +        .interfaces     = (InterfaceInfo[]) {
> +            { TYPE_TARGET_ARM_MACHINE },
> +            { TYPE_TARGET_AARCH64_MACHINE },
> +            { },
> +        },
>       }
>   };
>   
> diff --git a/hw/arm/bananapi_m2u.c b/hw/arm/bananapi_m2u.c
> index 724ee4b05e5..5104a45390b 100644
> --- a/hw/arm/bananapi_m2u.c
> +++ b/hw/arm/bananapi_m2u.c
> @@ -27,6 +27,7 @@
>   #include "hw/qdev-properties.h"
>   #include "hw/arm/allwinner-r40.h"
>   #include "hw/arm/boot.h"
> +#include "hw/arm/machines-qom.h"
>   
>   static struct arm_boot_info bpim2u_binfo;
>   
> @@ -150,6 +151,11 @@ static const TypeInfo bananapi_machine_types[] = {
>           .name           = MACHINE_TYPE_NAME("bpim2u"),
>           .parent         = TYPE_MACHINE,
>           .class_init     = bpim2u_machine_class_init,
> +        .interfaces     = (InterfaceInfo[]) {
> +            { TYPE_TARGET_ARM_MACHINE },
> +            { TYPE_TARGET_AARCH64_MACHINE },
> +            { },
> +        },
>       },
>   };
>   
> diff --git a/hw/arm/bcm2836.c b/hw/arm/bcm2836.c
> index 95e16806fa1..f60489983ba 100644
> --- a/hw/arm/bcm2836.c
> +++ b/hw/arm/bcm2836.c
> @@ -14,6 +14,7 @@
>   #include "qemu/module.h"
>   #include "hw/arm/bcm2836.h"
>   #include "hw/arm/raspi_platform.h"
> +#include "hw/arm/machines-qom.h"
>   #include "hw/sysbus.h"
>   #include "target/arm/cpu-qom.h"
>   #include "target/arm/gtimer.h"
> diff --git a/hw/arm/collie.c b/hw/arm/collie.c
> index e83aee58c6b..458ed53f0f6 100644
> --- a/hw/arm/collie.c
> +++ b/hw/arm/collie.c
> @@ -15,6 +15,7 @@
>   #include "hw/boards.h"
>   #include "strongarm.h"
>   #include "hw/arm/boot.h"
> +#include "hw/arm/machines-qom.h"
>   #include "hw/block/flash.h"
>   #include "system/address-spaces.h"
>   #include "qom/object.h"
> @@ -86,6 +87,11 @@ static const TypeInfo collie_machine_typeinfo = {
>       .parent = TYPE_MACHINE,
>       .class_init = collie_machine_class_init,
>       .instance_size = sizeof(CollieMachineState),
> +    .interfaces = (InterfaceInfo[]) {
> +        { TYPE_TARGET_ARM_MACHINE },
> +        { TYPE_TARGET_AARCH64_MACHINE },
> +        { },
> +    },
>   };
>   
>   static void collie_machine_register_types(void)
> diff --git a/hw/arm/cubieboard.c b/hw/arm/cubieboard.c
> index 36062ac7037..00656169b72 100644
> --- a/hw/arm/cubieboard.c
> +++ b/hw/arm/cubieboard.c
> @@ -22,6 +22,7 @@
>   #include "hw/qdev-properties.h"
>   #include "hw/arm/allwinner-a10.h"
>   #include "hw/arm/boot.h"
> +#include "hw/arm/machines-qom.h"
>   #include "hw/i2c/i2c.h"
>   
>   static struct arm_boot_info cubieboard_binfo = {
> @@ -131,6 +132,11 @@ static const TypeInfo cubieboard_machine_types[] = {
>           .name           = MACHINE_TYPE_NAME("cubieboard"),
>           .parent         = TYPE_MACHINE,
>           .class_init     = cubieboard_machine_class_init,
> +        .interfaces     = (InterfaceInfo[]) {
> +            { TYPE_TARGET_ARM_MACHINE },
> +            { TYPE_TARGET_AARCH64_MACHINE },
> +            { },
> +        },
>       },
>   };
>   
> diff --git a/hw/arm/digic_boards.c b/hw/arm/digic_boards.c
> index 3c0cc6e4370..7b9fbb5524b 100644
> --- a/hw/arm/digic_boards.c
> +++ b/hw/arm/digic_boards.c
> @@ -29,6 +29,7 @@
>   #include "hw/boards.h"
>   #include "qemu/error-report.h"
>   #include "hw/arm/digic.h"
> +#include "hw/arm/machines-qom.h"
>   #include "hw/block/flash.h"
>   #include "hw/loader.h"
>   #include "system/qtest.h"
> @@ -152,6 +153,11 @@ static const TypeInfo digic_machine_types[] = {
>           .name           = MACHINE_TYPE_NAME("canon-a1100"),
>           .parent         = TYPE_MACHINE,
>           .class_init     = digic_machine_class_init,
> +        .interfaces     = (InterfaceInfo[]) {
> +            { TYPE_TARGET_ARM_MACHINE },
> +            { TYPE_TARGET_AARCH64_MACHINE },
> +            { },
> +        },
>       },
>   };
>   
> diff --git a/hw/arm/exynos4_boards.c b/hw/arm/exynos4_boards.c
> index 2d8f2d73265..71601a0d6f0 100644
> --- a/hw/arm/exynos4_boards.c
> +++ b/hw/arm/exynos4_boards.c
> @@ -28,6 +28,7 @@
>   #include "hw/sysbus.h"
>   #include "net/net.h"
>   #include "hw/arm/boot.h"
> +#include "hw/arm/machines-qom.h"
>   #include "system/address-spaces.h"
>   #include "hw/arm/exynos4210.h"
>   #include "hw/net/lan9118.h"
> @@ -172,6 +173,11 @@ static const TypeInfo nuri_type = {
>       .name = MACHINE_TYPE_NAME("nuri"),
>       .parent = TYPE_MACHINE,
>       .class_init = nuri_class_init,
> +    .interfaces = (InterfaceInfo[]) {
> +        { TYPE_TARGET_ARM_MACHINE },
> +        { TYPE_TARGET_AARCH64_MACHINE },
> +        { },
> +    },
>   };
>   
>   static void smdkc210_class_init(ObjectClass *oc, void *data)
> @@ -192,6 +198,11 @@ static const TypeInfo smdkc210_type = {
>       .name = MACHINE_TYPE_NAME("smdkc210"),
>       .parent = TYPE_MACHINE,
>       .class_init = smdkc210_class_init,
> +    .interfaces = (InterfaceInfo[]) {
> +        { TYPE_TARGET_ARM_MACHINE },
> +        { TYPE_TARGET_AARCH64_MACHINE },
> +        { },
> +    },
>   };
>   
>   static void exynos4_machines_init(void)
> diff --git a/hw/arm/fby35.c b/hw/arm/fby35.c
> index 6d3663f14a1..84b65844b34 100644
> --- a/hw/arm/fby35.c
> +++ b/hw/arm/fby35.c
> @@ -14,6 +14,7 @@
>   #include "hw/qdev-clock.h"
>   #include "hw/arm/aspeed_soc.h"
>   #include "hw/arm/boot.h"
> +#include "hw/arm/machines-qom.h"
>   
>   #define TYPE_FBY35 MACHINE_TYPE_NAME("fby35")
>   OBJECT_DECLARE_SIMPLE_TYPE(Fby35State, FBY35);
> @@ -187,6 +188,11 @@ static const TypeInfo fby35_types[] = {
>           .class_init = fby35_class_init,
>           .instance_size = sizeof(Fby35State),
>           .instance_init = fby35_instance_init,
> +        .interfaces = (InterfaceInfo[]) {
> +            { TYPE_TARGET_ARM_MACHINE },
> +            { TYPE_TARGET_AARCH64_MACHINE },
> +            { },
> +        },
>       },
>   };
>   
> diff --git a/hw/arm/highbank.c b/hw/arm/highbank.c
> index 0f3c207d548..d26346ea8ad 100644
> --- a/hw/arm/highbank.c
> +++ b/hw/arm/highbank.c
> @@ -23,6 +23,7 @@
>   #include "hw/sysbus.h"
>   #include "migration/vmstate.h"
>   #include "hw/arm/boot.h"
> +#include "hw/arm/machines-qom.h"
>   #include "hw/loader.h"
>   #include "net/net.h"
>   #include "system/runstate.h"
> @@ -363,6 +364,11 @@ static const TypeInfo highbank_type = {
>       .name = MACHINE_TYPE_NAME("highbank"),
>       .parent = TYPE_MACHINE,
>       .class_init = highbank_class_init,
> +    .interfaces = (InterfaceInfo[]) {
> +        { TYPE_TARGET_ARM_MACHINE },
> +        { TYPE_TARGET_AARCH64_MACHINE },
> +        { },
> +    },
>   };
>   
>   static void midway_class_init(ObjectClass *oc, void *data)
> @@ -387,6 +393,11 @@ static const TypeInfo midway_type = {
>       .name = MACHINE_TYPE_NAME("midway"),
>       .parent = TYPE_MACHINE,
>       .class_init = midway_class_init,
> +    .interfaces = (InterfaceInfo[]) {
> +        { TYPE_TARGET_ARM_MACHINE },
> +        { TYPE_TARGET_AARCH64_MACHINE },
> +        { },
> +    },
>   };
>   
>   static void calxeda_machines_init(void)
> diff --git a/hw/arm/imx25_pdk.c b/hw/arm/imx25_pdk.c
> index a90def7f1a2..86f0855c929 100644
> --- a/hw/arm/imx25_pdk.c
> +++ b/hw/arm/imx25_pdk.c
> @@ -28,6 +28,7 @@
>   #include "hw/qdev-properties.h"
>   #include "hw/arm/fsl-imx25.h"
>   #include "hw/arm/boot.h"
> +#include "hw/arm/machines-qom.h"
>   #include "hw/boards.h"
>   #include "qemu/error-report.h"
>   #include "system/qtest.h"
> @@ -157,6 +158,11 @@ static const TypeInfo imx25_machine_types[] = {
>           .name           = MACHINE_TYPE_NAME("imx25-pdk"),
>           .parent         = TYPE_MACHINE,
>           .class_init     = imx25_pdk_machine_class_init,
> +        .interfaces     = (InterfaceInfo[]) {
> +            { TYPE_TARGET_ARM_MACHINE },
> +            { TYPE_TARGET_AARCH64_MACHINE },
> +            { },
> +        },
>       },
>   };
>   
> diff --git a/hw/arm/imx8mp-evk.c b/hw/arm/imx8mp-evk.c
> index c7d87d99230..44f704b9bd3 100644
> --- a/hw/arm/imx8mp-evk.c
> +++ b/hw/arm/imx8mp-evk.c
> @@ -10,6 +10,7 @@
>   #include "system/address-spaces.h"
>   #include "hw/arm/boot.h"
>   #include "hw/arm/fsl-imx8mp.h"
> +#include "hw/arm/machines-qom.h"
>   #include "hw/boards.h"
>   #include "hw/qdev-properties.h"
>   #include "system/qtest.h"
> @@ -79,6 +80,10 @@ static const TypeInfo imx8_machine_types[] = {
>           .name           = MACHINE_TYPE_NAME("imx8mp-evk"),
>           .parent         = TYPE_MACHINE,
>           .class_init     = imx8mp_evk_machine_class_init,
> +        .interfaces     = (InterfaceInfo[]) {
> +            { TYPE_TARGET_AARCH64_MACHINE },
> +            { },
> +        },
>       },
>   };
>   
> diff --git a/hw/arm/integratorcp.c b/hw/arm/integratorcp.c
> index f95916b517d..efe1075ecc0 100644
> --- a/hw/arm/integratorcp.c
> +++ b/hw/arm/integratorcp.c
> @@ -13,6 +13,7 @@
>   #include "migration/vmstate.h"
>   #include "hw/boards.h"
>   #include "hw/arm/boot.h"
> +#include "hw/arm/machines-qom.h"
>   #include "hw/misc/arm_integrator_debug.h"
>   #include "hw/net/smc91c111.h"
>   #include "net/net.h"
> @@ -760,6 +761,11 @@ static const TypeInfo integratorcp_machine_types[] = {
>           .name           = MACHINE_TYPE_NAME("integratorcp"),
>           .parent         = TYPE_MACHINE,
>           .class_init     = integratorcp_machine_class_init,
> +        .interfaces     = (InterfaceInfo[]) {
> +            { TYPE_TARGET_ARM_MACHINE },
> +            { TYPE_TARGET_AARCH64_MACHINE },
> +            { },
> +        },
>       },
>   };
>   
> diff --git a/hw/arm/kzm.c b/hw/arm/kzm.c
> index b56cabe9f94..02ece3c0139 100644
> --- a/hw/arm/kzm.c
> +++ b/hw/arm/kzm.c
> @@ -17,6 +17,7 @@
>   #include "qapi/error.h"
>   #include "hw/arm/fsl-imx31.h"
>   #include "hw/arm/boot.h"
> +#include "hw/arm/machines-qom.h"
>   #include "hw/boards.h"
>   #include "qemu/error-report.h"
>   #include "system/address-spaces.h"
> @@ -146,6 +147,11 @@ static const TypeInfo kzm_machine_types[] = {
>           .name           = MACHINE_TYPE_NAME("kzm"),
>           .parent         = TYPE_MACHINE,
>           .class_init     = kzm_machine_class_init,
> +        .interfaces     = (InterfaceInfo[]) {
> +            { TYPE_TARGET_ARM_MACHINE },
> +            { TYPE_TARGET_AARCH64_MACHINE },
> +            { },
> +        },
>       },
>   };
>   
> diff --git a/hw/arm/mcimx6ul-evk.c b/hw/arm/mcimx6ul-evk.c
> index d947836d2be..ea636fa2e7c 100644
> --- a/hw/arm/mcimx6ul-evk.c
> +++ b/hw/arm/mcimx6ul-evk.c
> @@ -14,6 +14,7 @@
>   #include "qapi/error.h"
>   #include "hw/arm/fsl-imx6ul.h"
>   #include "hw/arm/boot.h"
> +#include "hw/arm/machines-qom.h"
>   #include "hw/boards.h"
>   #include "hw/qdev-properties.h"
>   #include "qemu/error-report.h"
> @@ -84,6 +85,11 @@ static const TypeInfo imx6_machine_types[] = {
>           .name           = MACHINE_TYPE_NAME("mcimx6ul-evk"),
>           .parent         = TYPE_MACHINE,
>           .class_init     = mcimx6ul_evk_machine_class_init,
> +        .interfaces     = (InterfaceInfo[]) {
> +            { TYPE_TARGET_ARM_MACHINE },
> +            { TYPE_TARGET_AARCH64_MACHINE },
> +            { },
> +        },
>       },
>   };
>   
> diff --git a/hw/arm/mcimx7d-sabre.c b/hw/arm/mcimx7d-sabre.c
> index f5dc9c211dd..b236a6587eb 100644
> --- a/hw/arm/mcimx7d-sabre.c
> +++ b/hw/arm/mcimx7d-sabre.c
> @@ -16,6 +16,7 @@
>   #include "qapi/error.h"
>   #include "hw/arm/fsl-imx7.h"
>   #include "hw/arm/boot.h"
> +#include "hw/arm/machines-qom.h"
>   #include "hw/boards.h"
>   #include "hw/qdev-properties.h"
>   #include "qemu/error-report.h"
> @@ -84,6 +85,11 @@ static const TypeInfo imx7_machine_types[] = {
>           .name           = MACHINE_TYPE_NAME("mcimx7d-sabre"),
>           .parent         = TYPE_MACHINE,
>           .class_init     = mcimx7d_sabre_machine_class_init,
> +        .interfaces     = (InterfaceInfo[]) {
> +            { TYPE_TARGET_ARM_MACHINE },
> +            { TYPE_TARGET_AARCH64_MACHINE },
> +            { },
> +        },
>       },
>   };
>   
> diff --git a/hw/arm/microbit.c b/hw/arm/microbit.c
> index ade363daaa4..d34b1c675e5 100644
> --- a/hw/arm/microbit.c
> +++ b/hw/arm/microbit.c
> @@ -12,6 +12,7 @@
>   #include "qapi/error.h"
>   #include "hw/boards.h"
>   #include "hw/arm/boot.h"
> +#include "hw/arm/machines-qom.h"
>   #include "system/system.h"
>   #include "system/address-spaces.h"
>   
> @@ -74,6 +75,11 @@ static const TypeInfo microbit_info = {
>       .parent = TYPE_MACHINE,
>       .instance_size = sizeof(MicrobitMachineState),
>       .class_init = microbit_machine_class_init,
> +    .interfaces = (InterfaceInfo[]) {
> +        { TYPE_TARGET_ARM_MACHINE },
> +        { TYPE_TARGET_AARCH64_MACHINE },
> +        { },
> +    },
>   };
>   
>   static void microbit_machine_init(void)
> diff --git a/hw/arm/mps2-tz.c b/hw/arm/mps2-tz.c
> index b0633a5a69e..12512477977 100644
> --- a/hw/arm/mps2-tz.c
> +++ b/hw/arm/mps2-tz.c
> @@ -52,6 +52,7 @@
>   #include "qemu/error-report.h"
>   #include "hw/arm/boot.h"
>   #include "hw/arm/armv7m.h"
> +#include "hw/arm/machines-qom.h"
>   #include "hw/or-irq.h"
>   #include "hw/boards.h"
>   #include "system/address-spaces.h"
> @@ -1463,24 +1464,44 @@ static const TypeInfo mps2tz_an505_info = {
>       .name = TYPE_MPS2TZ_AN505_MACHINE,
>       .parent = TYPE_MPS2TZ_MACHINE,
>       .class_init = mps2tz_an505_class_init,
> +    .interfaces = (InterfaceInfo[]) {
> +        { TYPE_TARGET_ARM_MACHINE },
> +        { TYPE_TARGET_AARCH64_MACHINE },
> +        { },
> +    },
>   };
>   
>   static const TypeInfo mps2tz_an521_info = {
>       .name = TYPE_MPS2TZ_AN521_MACHINE,
>       .parent = TYPE_MPS2TZ_MACHINE,
>       .class_init = mps2tz_an521_class_init,
> +    .interfaces = (InterfaceInfo[]) {
> +        { TYPE_TARGET_ARM_MACHINE },
> +        { TYPE_TARGET_AARCH64_MACHINE },
> +        { },
> +    },
>   };
>   
>   static const TypeInfo mps3tz_an524_info = {
>       .name = TYPE_MPS3TZ_AN524_MACHINE,
>       .parent = TYPE_MPS2TZ_MACHINE,
>       .class_init = mps3tz_an524_class_init,
> +    .interfaces = (InterfaceInfo[]) {
> +        { TYPE_TARGET_ARM_MACHINE },
> +        { TYPE_TARGET_AARCH64_MACHINE },
> +        { },
> +    },
>   };
>   
>   static const TypeInfo mps3tz_an547_info = {
>       .name = TYPE_MPS3TZ_AN547_MACHINE,
>       .parent = TYPE_MPS2TZ_MACHINE,
>       .class_init = mps3tz_an547_class_init,
> +    .interfaces = (InterfaceInfo[]) {
> +        { TYPE_TARGET_ARM_MACHINE },
> +        { TYPE_TARGET_AARCH64_MACHINE },
> +        { },
> +    },
>   };
>   
>   static void mps2tz_machine_init(void)
> diff --git a/hw/arm/mps2.c b/hw/arm/mps2.c
> index 6958485a668..f39176c0005 100644
> --- a/hw/arm/mps2.c
> +++ b/hw/arm/mps2.c
> @@ -31,6 +31,7 @@
>   #include "qemu/error-report.h"
>   #include "hw/arm/boot.h"
>   #include "hw/arm/armv7m.h"
> +#include "hw/arm/machines-qom.h"
>   #include "hw/or-irq.h"
>   #include "hw/boards.h"
>   #include "system/address-spaces.h"
> @@ -563,24 +564,44 @@ static const TypeInfo mps2_an385_info = {
>       .name = TYPE_MPS2_AN385_MACHINE,
>       .parent = TYPE_MPS2_MACHINE,
>       .class_init = mps2_an385_class_init,
> +    .interfaces = (InterfaceInfo[]) {
> +        { TYPE_TARGET_ARM_MACHINE },
> +        { TYPE_TARGET_AARCH64_MACHINE },
> +        { },
> +    },
>   };
>   
>   static const TypeInfo mps2_an386_info = {
>       .name = TYPE_MPS2_AN386_MACHINE,
>       .parent = TYPE_MPS2_MACHINE,
>       .class_init = mps2_an386_class_init,
> +    .interfaces = (InterfaceInfo[]) {
> +        { TYPE_TARGET_ARM_MACHINE },
> +        { TYPE_TARGET_AARCH64_MACHINE },
> +        { },
> +    },
>   };
>   
>   static const TypeInfo mps2_an500_info = {
>       .name = TYPE_MPS2_AN500_MACHINE,
>       .parent = TYPE_MPS2_MACHINE,
>       .class_init = mps2_an500_class_init,
> +    .interfaces = (InterfaceInfo[]) {
> +        { TYPE_TARGET_ARM_MACHINE },
> +        { TYPE_TARGET_AARCH64_MACHINE },
> +        { },
> +    },
>   };
>   
>   static const TypeInfo mps2_an511_info = {
>       .name = TYPE_MPS2_AN511_MACHINE,
>       .parent = TYPE_MPS2_MACHINE,
>       .class_init = mps2_an511_class_init,
> +    .interfaces = (InterfaceInfo[]) {
> +        { TYPE_TARGET_ARM_MACHINE },
> +        { TYPE_TARGET_AARCH64_MACHINE },
> +        { },
> +    },
>   };
>   
>   static void mps2_machine_init(void)
> diff --git a/hw/arm/mps3r.c b/hw/arm/mps3r.c
> index 4dd1e8a7180..8bcf5a4d69f 100644
> --- a/hw/arm/mps3r.c
> +++ b/hw/arm/mps3r.c
> @@ -37,6 +37,7 @@
>   #include "hw/qdev-properties.h"
>   #include "hw/arm/boot.h"
>   #include "hw/arm/bsa.h"
> +#include "hw/arm/machines-qom.h"
>   #include "hw/char/cmsdk-apb-uart.h"
>   #include "hw/i2c/arm_sbcon_i2c.h"
>   #include "hw/intc/arm_gicv3.h"
> @@ -634,6 +635,11 @@ static const TypeInfo mps3r_machine_types[] = {
>           .name = TYPE_MPS3R_AN536_MACHINE,
>           .parent = TYPE_MPS3R_MACHINE,
>           .class_init = mps3r_an536_class_init,
> +        .interfaces = (InterfaceInfo[]) {
> +            { TYPE_TARGET_ARM_MACHINE },
> +            { TYPE_TARGET_AARCH64_MACHINE },
> +            { },
> +        },
>       },
>   };
>   
> diff --git a/hw/arm/msf2-som.c b/hw/arm/msf2-som.c
> index 6ce47eaa27a..3f7aefc0ba4 100644
> --- a/hw/arm/msf2-som.c
> +++ b/hw/arm/msf2-som.c
> @@ -32,6 +32,7 @@
>   #include "hw/boards.h"
>   #include "hw/qdev-properties.h"
>   #include "hw/arm/boot.h"
> +#include "hw/arm/machines-qom.h"
>   #include "hw/qdev-clock.h"
>   #include "system/address-spaces.h"
>   #include "hw/arm/msf2-soc.h"
> @@ -114,6 +115,11 @@ static const TypeInfo msf2_machine_types[] = {
>           .name           = MACHINE_TYPE_NAME("emcraft-sf2"),
>           .parent         = TYPE_MACHINE,
>           .class_init     = emcraft_sf2_machine_class_init,
> +        .interfaces     = (InterfaceInfo[]) {
> +            { TYPE_TARGET_ARM_MACHINE },
> +            { TYPE_TARGET_AARCH64_MACHINE },
> +            { },
> +        },
>       },
>   };
>   
> diff --git a/hw/arm/musca.c b/hw/arm/musca.c
> index a4f43f1992b..608f16f69b2 100644
> --- a/hw/arm/musca.c
> +++ b/hw/arm/musca.c
> @@ -26,6 +26,7 @@
>   #include "system/system.h"
>   #include "hw/arm/boot.h"
>   #include "hw/arm/armsse.h"
> +#include "hw/arm/machines-qom.h"
>   #include "hw/boards.h"
>   #include "hw/char/pl011.h"
>   #include "hw/core/split-irq.h"
> @@ -657,12 +658,22 @@ static const TypeInfo musca_a_info = {
>       .name = TYPE_MUSCA_A_MACHINE,
>       .parent = TYPE_MUSCA_MACHINE,
>       .class_init = musca_a_class_init,
> +    .interfaces = (InterfaceInfo[]) {
> +        { TYPE_TARGET_ARM_MACHINE },
> +        { TYPE_TARGET_AARCH64_MACHINE },
> +        { },
> +    },
>   };
>   
>   static const TypeInfo musca_b1_info = {
>       .name = TYPE_MUSCA_B1_MACHINE,
>       .parent = TYPE_MUSCA_MACHINE,
>       .class_init = musca_b1_class_init,
> +    .interfaces = (InterfaceInfo[]) {
> +        { TYPE_TARGET_ARM_MACHINE },
> +        { TYPE_TARGET_AARCH64_MACHINE },
> +        { },
> +    },
>   };
>   
>   static void musca_machine_init(void)
> diff --git a/hw/arm/musicpal.c b/hw/arm/musicpal.c
> index f7c488cd1d6..e2a65f72095 100644
> --- a/hw/arm/musicpal.c
> +++ b/hw/arm/musicpal.c
> @@ -15,6 +15,7 @@
>   #include "hw/sysbus.h"
>   #include "migration/vmstate.h"
>   #include "hw/arm/boot.h"
> +#include "hw/arm/machines-qom.h"
>   #include "net/net.h"
>   #include "system/system.h"
>   #include "hw/boards.h"
> @@ -1381,6 +1382,11 @@ static const TypeInfo musicpal_types[] = {
>           .name           = MACHINE_TYPE_NAME("musicpal"),
>           .parent         = TYPE_MACHINE,
>           .class_init     = musicpal_machine_class_init,
> +        .interfaces     = (InterfaceInfo[]) {
> +            { TYPE_TARGET_ARM_MACHINE },
> +            { TYPE_TARGET_AARCH64_MACHINE },
> +            { },
> +        },
>       },
>   };
>   
> diff --git a/hw/arm/netduino2.c b/hw/arm/netduino2.c
> index 52c30055d44..2e615276902 100644
> --- a/hw/arm/netduino2.c
> +++ b/hw/arm/netduino2.c
> @@ -30,6 +30,7 @@
>   #include "qemu/error-report.h"
>   #include "hw/arm/stm32f205_soc.h"
>   #include "hw/arm/boot.h"
> +#include "hw/arm/machines-qom.h"
>   
>   /* Main SYSCLK frequency in Hz (120MHz) */
>   #define SYSCLK_FRQ 120000000ULL
> @@ -71,6 +72,11 @@ static const TypeInfo netduino_machine_types[] = {
>           .name           = MACHINE_TYPE_NAME("netduino2"),
>           .parent         = TYPE_MACHINE,
>           .class_init     = netduino2_machine_class_init,
> +        .interfaces     = (InterfaceInfo[]) {
> +            { TYPE_TARGET_ARM_MACHINE },
> +            { TYPE_TARGET_AARCH64_MACHINE },
> +            { },
> +        },
>       },
>   };
>   
> diff --git a/hw/arm/netduinoplus2.c b/hw/arm/netduinoplus2.c
> index 2735d3a0e2b..e12f78599c4 100644
> --- a/hw/arm/netduinoplus2.c
> +++ b/hw/arm/netduinoplus2.c
> @@ -30,6 +30,7 @@
>   #include "qemu/error-report.h"
>   #include "hw/arm/stm32f405_soc.h"
>   #include "hw/arm/boot.h"
> +#include "hw/arm/machines-qom.h"
>   
>   /* Main SYSCLK frequency in Hz (168MHz) */
>   #define SYSCLK_FRQ 168000000ULL
> @@ -71,6 +72,11 @@ static const TypeInfo netduino_machine_types[] = {
>           .name           = MACHINE_TYPE_NAME("netduinoplus2"),
>           .parent         = TYPE_MACHINE,
>           .class_init     = netduinoplus2_machine_class_init,
> +        .interfaces     = (InterfaceInfo[]) {
> +            { TYPE_TARGET_ARM_MACHINE },
> +            { TYPE_TARGET_AARCH64_MACHINE },
> +            { },
> +        },
>       },
>   };
>   
> diff --git a/hw/arm/npcm7xx_boards.c b/hw/arm/npcm7xx_boards.c
> index eb28b97ad83..4b6d3443d53 100644
> --- a/hw/arm/npcm7xx_boards.c
> +++ b/hw/arm/npcm7xx_boards.c
> @@ -17,6 +17,7 @@
>   #include "qemu/osdep.h"
>   
>   #include "hw/arm/npcm7xx.h"
> +#include "hw/arm/machines-qom.h"
>   #include "hw/core/cpu.h"
>   #include "hw/i2c/i2c_mux_pca954x.h"
>   #include "hw/i2c/smbus_eeprom.h"
> @@ -549,22 +550,47 @@ static const TypeInfo npcm7xx_machine_types[] = {
>           .name           = MACHINE_TYPE_NAME("npcm750-evb"),
>           .parent         = TYPE_NPCM7XX_MACHINE,
>           .class_init     = npcm750_evb_machine_class_init,
> +        .interfaces     = (InterfaceInfo[]) {
> +                { TYPE_TARGET_ARM_MACHINE },
> +                { TYPE_TARGET_AARCH64_MACHINE },
> +                { },
> +        },
>       }, {
>           .name           = MACHINE_TYPE_NAME("quanta-gsj"),
>           .parent         = TYPE_NPCM7XX_MACHINE,
>           .class_init     = gsj_machine_class_init,
> +        .interfaces     = (InterfaceInfo[]) {
> +                { TYPE_TARGET_ARM_MACHINE },
> +                { TYPE_TARGET_AARCH64_MACHINE },
> +                { },
> +        },
>       }, {
>           .name           = MACHINE_TYPE_NAME("quanta-gbs-bmc"),
>           .parent         = TYPE_NPCM7XX_MACHINE,
>           .class_init     = gbs_bmc_machine_class_init,
> +        .interfaces     = (InterfaceInfo[]) {
> +                { TYPE_TARGET_ARM_MACHINE },
> +                { TYPE_TARGET_AARCH64_MACHINE },
> +                { },
> +        },
>       }, {
>           .name           = MACHINE_TYPE_NAME("kudo-bmc"),
>           .parent         = TYPE_NPCM7XX_MACHINE,
>           .class_init     = kudo_bmc_machine_class_init,
> +        .interfaces     = (InterfaceInfo[]) {
> +                { TYPE_TARGET_ARM_MACHINE },
> +                { TYPE_TARGET_AARCH64_MACHINE },
> +                { },
> +        },
>       }, {
>           .name           = MACHINE_TYPE_NAME("mori-bmc"),
>           .parent         = TYPE_NPCM7XX_MACHINE,
>           .class_init     = mori_bmc_machine_class_init,
> +        .interfaces     = (InterfaceInfo[]) {
> +                { TYPE_TARGET_ARM_MACHINE },
> +                { TYPE_TARGET_AARCH64_MACHINE },
> +                { },
> +        },
>       },
>   };
>   
> diff --git a/hw/arm/npcm8xx_boards.c b/hw/arm/npcm8xx_boards.c
> index 3fb8478e72e..919c14dd809 100644
> --- a/hw/arm/npcm8xx_boards.c
> +++ b/hw/arm/npcm8xx_boards.c
> @@ -19,6 +19,7 @@
>   #include "chardev/char.h"
>   #include "hw/boards.h"
>   #include "hw/arm/npcm8xx.h"
> +#include "hw/arm/machines-qom.h"
>   #include "hw/core/cpu.h"
>   #include "hw/loader.h"
>   #include "hw/qdev-core.h"
> @@ -248,6 +249,10 @@ static const TypeInfo npcm8xx_machine_types[] = {
>           .name           = MACHINE_TYPE_NAME("npcm845-evb"),
>           .parent         = TYPE_NPCM8XX_MACHINE,
>           .class_init     = npcm845_evb_machine_class_init,
> +        .interfaces     = (InterfaceInfo[]) {
> +                { TYPE_TARGET_AARCH64_MACHINE },
> +                { },
> +        },
>       },
>   };
>   
> diff --git a/hw/arm/olimex-stm32-h405.c b/hw/arm/olimex-stm32-h405.c
> index 795218c93cf..f81f4094149 100644
> --- a/hw/arm/olimex-stm32-h405.c
> +++ b/hw/arm/olimex-stm32-h405.c
> @@ -31,6 +31,7 @@
>   #include "qemu/error-report.h"
>   #include "hw/arm/stm32f405_soc.h"
>   #include "hw/arm/boot.h"
> +#include "hw/arm/machines-qom.h"
>   
>   /* olimex-stm32-h405 implementation is derived from netduinoplus2 */
>   
> @@ -77,6 +78,11 @@ static const TypeInfo olimex_stm32_machine_types[] = {
>           .name           = MACHINE_TYPE_NAME("olimex-stm32-h405"),
>           .parent         = TYPE_MACHINE,
>           .class_init     = olimex_stm32_machine_class_init,
> +        .interfaces     = (InterfaceInfo[]) {
> +            { TYPE_TARGET_ARM_MACHINE },
> +            { TYPE_TARGET_AARCH64_MACHINE },
> +            { },
> +        },
>       },
>   };
>   
> diff --git a/hw/arm/omap_sx1.c b/hw/arm/omap_sx1.c
> index aa1e96b3ad7..2537045c1ac 100644
> --- a/hw/arm/omap_sx1.c
> +++ b/hw/arm/omap_sx1.c
> @@ -32,6 +32,7 @@
>   #include "hw/arm/omap.h"
>   #include "hw/boards.h"
>   #include "hw/arm/boot.h"
> +#include "hw/arm/machines-qom.h"
>   #include "hw/block/flash.h"
>   #include "system/qtest.h"
>   #include "system/address-spaces.h"
> @@ -219,6 +220,11 @@ static const TypeInfo sx1_machine_v2_type = {
>       .name = MACHINE_TYPE_NAME("sx1"),
>       .parent = TYPE_MACHINE,
>       .class_init = sx1_machine_v2_class_init,
> +    .interfaces = (InterfaceInfo[]) {
> +        { TYPE_TARGET_ARM_MACHINE },
> +        { TYPE_TARGET_AARCH64_MACHINE },
> +        { },
> +    },
>   };
>   
>   static void sx1_machine_v1_class_init(ObjectClass *oc, void *data)
> @@ -238,6 +244,11 @@ static const TypeInfo sx1_machine_v1_type = {
>       .name = MACHINE_TYPE_NAME("sx1-v1"),
>       .parent = TYPE_MACHINE,
>       .class_init = sx1_machine_v1_class_init,
> +    .interfaces = (InterfaceInfo[]) {
> +        { TYPE_TARGET_ARM_MACHINE },
> +        { TYPE_TARGET_AARCH64_MACHINE },
> +        { },
> +    },
>   };
>   
>   static void sx1_machine_init(void)
> diff --git a/hw/arm/orangepi.c b/hw/arm/orangepi.c
> index 6821033bfd7..4e333d428a2 100644
> --- a/hw/arm/orangepi.c
> +++ b/hw/arm/orangepi.c
> @@ -26,6 +26,7 @@
>   #include "hw/qdev-properties.h"
>   #include "hw/arm/allwinner-h3.h"
>   #include "hw/arm/boot.h"
> +#include "hw/arm/machines-qom.h"
>   
>   static struct arm_boot_info orangepi_binfo;
>   
> @@ -130,6 +131,11 @@ static const TypeInfo orangepi_machine_types[] = {
>           .name           = MACHINE_TYPE_NAME("orangepi-pc"),
>           .parent         = TYPE_MACHINE,
>           .class_init     = orangepi_machine_class_init,
> +        .interfaces     = (InterfaceInfo[]) {
> +            { TYPE_TARGET_ARM_MACHINE },
> +            { TYPE_TARGET_AARCH64_MACHINE },
> +            { },
> +        },
>       },
>   };
>   
> diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c
> index dce35ca11aa..69cccdbb6b1 100644
> --- a/hw/arm/raspi.c
> +++ b/hw/arm/raspi.c
> @@ -25,6 +25,7 @@
>   #include "hw/boards.h"
>   #include "hw/loader.h"
>   #include "hw/arm/boot.h"
> +#include "hw/arm/machines-qom.h"
>   #include "qom/object.h"
>   
>   #define TYPE_RASPI_MACHINE  MACHINE_TYPE_NAME("raspi-common")
> @@ -394,23 +395,46 @@ static const TypeInfo raspi_machine_types[] = {
>           .name           = MACHINE_TYPE_NAME("raspi0"),
>           .parent         = TYPE_RASPI_MACHINE,
>           .class_init     = raspi0_machine_class_init,
> +        .interfaces     = (InterfaceInfo[]) {
> +            { TYPE_TARGET_ARM_MACHINE },
> +            { TYPE_TARGET_AARCH64_MACHINE },
> +            { },
> +        },
>       }, {
>           .name           = MACHINE_TYPE_NAME("raspi1ap"),
>           .parent         = TYPE_RASPI_MACHINE,
>           .class_init     = raspi1ap_machine_class_init,
> +        .interfaces     = (InterfaceInfo[]) {
> +            { TYPE_TARGET_ARM_MACHINE },
> +            { TYPE_TARGET_AARCH64_MACHINE },
> +            { },
> +        },
>       }, {
>           .name           = MACHINE_TYPE_NAME("raspi2b"),
>           .parent         = TYPE_RASPI_MACHINE,
>           .class_init     = raspi2b_machine_class_init,
> +        .interfaces     = (InterfaceInfo[]) {
> +            { TYPE_TARGET_ARM_MACHINE },
> +            { TYPE_TARGET_AARCH64_MACHINE },
> +            { },
> +        },
>   #ifdef TARGET_AARCH64
>       }, {
>           .name           = MACHINE_TYPE_NAME("raspi3ap"),
>           .parent         = TYPE_RASPI_MACHINE,
>           .class_init     = raspi3ap_machine_class_init,
> +        .interfaces     = (InterfaceInfo[]) {
> +            { TYPE_TARGET_AARCH64_MACHINE },
> +            { },
> +        },
>       }, {
>           .name           = MACHINE_TYPE_NAME("raspi3b"),
>           .parent         = TYPE_RASPI_MACHINE,
>           .class_init     = raspi3b_machine_class_init,
> +        .interfaces     = (InterfaceInfo[]) {
> +            { TYPE_TARGET_AARCH64_MACHINE },
> +            { },
> +        },
>   #endif
>       }, {
>           .name           = TYPE_RASPI_MACHINE,
> diff --git a/hw/arm/raspi4b.c b/hw/arm/raspi4b.c
> index f6de103a3e1..8fda6d3b0ca 100644
> --- a/hw/arm/raspi4b.c
> +++ b/hw/arm/raspi4b.c
> @@ -11,6 +11,7 @@
>   #include "qemu/cutils.h"
>   #include "qapi/error.h"
>   #include "qapi/visitor.h"
> +#include "hw/arm/machines-qom.h"
>   #include "hw/arm/raspi_platform.h"
>   #include "hw/display/bcm2835_fb.h"
>   #include "hw/registerfields.h"
> @@ -127,6 +128,10 @@ static const TypeInfo raspi4b_machine_type = {
>       .parent         = TYPE_RASPI_BASE_MACHINE,
>       .instance_size  = sizeof(Raspi4bMachineState),
>       .class_init     = raspi4b_machine_class_init,
> +    .interfaces     = (InterfaceInfo[]) {
> +        { TYPE_TARGET_AARCH64_MACHINE },
> +        { },
> +    },
>   };
>   
>   static void raspi4b_machine_register_type(void)
> diff --git a/hw/arm/realview.c b/hw/arm/realview.c
> index 008eeaf049a..aed864bcd4f 100644
> --- a/hw/arm/realview.c
> +++ b/hw/arm/realview.c
> @@ -13,6 +13,7 @@
>   #include "hw/sysbus.h"
>   #include "hw/arm/boot.h"
>   #include "hw/arm/primecell.h"
> +#include "hw/arm/machines-qom.h"
>   #include "hw/core/split-irq.h"
>   #include "hw/net/lan9118.h"
>   #include "hw/net/smc91c111.h"
> @@ -431,6 +432,11 @@ static const TypeInfo realview_eb_type = {
>       .name = MACHINE_TYPE_NAME("realview-eb"),
>       .parent = TYPE_MACHINE,
>       .class_init = realview_eb_class_init,
> +    .interfaces = (InterfaceInfo[]) {
> +        { TYPE_TARGET_ARM_MACHINE },
> +        { TYPE_TARGET_AARCH64_MACHINE },
> +        { },
> +    },
>   };
>   
>   static void realview_eb_mpcore_class_init(ObjectClass *oc, void *data)
> @@ -452,6 +458,11 @@ static const TypeInfo realview_eb_mpcore_type = {
>       .name = MACHINE_TYPE_NAME("realview-eb-mpcore"),
>       .parent = TYPE_MACHINE,
>       .class_init = realview_eb_mpcore_class_init,
> +    .interfaces = (InterfaceInfo[]) {
> +        { TYPE_TARGET_ARM_MACHINE },
> +        { TYPE_TARGET_AARCH64_MACHINE },
> +        { },
> +    },
>   };
>   
>   static void realview_pb_a8_class_init(ObjectClass *oc, void *data)
> @@ -471,6 +482,11 @@ static const TypeInfo realview_pb_a8_type = {
>       .name = MACHINE_TYPE_NAME("realview-pb-a8"),
>       .parent = TYPE_MACHINE,
>       .class_init = realview_pb_a8_class_init,
> +    .interfaces = (InterfaceInfo[]) {
> +        { TYPE_TARGET_ARM_MACHINE },
> +        { TYPE_TARGET_AARCH64_MACHINE },
> +        { },
> +    },
>   };
>   
>   static void realview_pbx_a9_class_init(ObjectClass *oc, void *data)
> @@ -491,6 +507,11 @@ static const TypeInfo realview_pbx_a9_type = {
>       .name = MACHINE_TYPE_NAME("realview-pbx-a9"),
>       .parent = TYPE_MACHINE,
>       .class_init = realview_pbx_a9_class_init,
> +    .interfaces = (InterfaceInfo[]) {
> +        { TYPE_TARGET_ARM_MACHINE },
> +        { TYPE_TARGET_AARCH64_MACHINE },
> +        { },
> +    },
>   };
>   
>   static void realview_machine_init(void)
> diff --git a/hw/arm/sabrelite.c b/hw/arm/sabrelite.c
> index ea59ba301e7..bc472dcad2c 100644
> --- a/hw/arm/sabrelite.c
> +++ b/hw/arm/sabrelite.c
> @@ -14,6 +14,7 @@
>   #include "qapi/error.h"
>   #include "hw/arm/fsl-imx6.h"
>   #include "hw/arm/boot.h"
> +#include "hw/arm/machines-qom.h"
>   #include "hw/boards.h"
>   #include "hw/qdev-properties.h"
>   #include "qemu/error-report.h"
> @@ -120,6 +121,11 @@ static const TypeInfo sabrelite_machine_types[] = {
>           .name           = MACHINE_TYPE_NAME("sabrelite"),
>           .parent         = TYPE_MACHINE,
>           .class_init     = sabrelite_machine_class_init,
> +        .interfaces     = (InterfaceInfo[]) {
> +            { TYPE_TARGET_ARM_MACHINE },
> +            { TYPE_TARGET_AARCH64_MACHINE },
> +            { },
> +        },
>       },
>   };
>   
> diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c
> index aa09d7a0917..6584097fc25 100644
> --- a/hw/arm/sbsa-ref.c
> +++ b/hw/arm/sbsa-ref.c
> @@ -34,6 +34,7 @@
>   #include "hw/arm/bsa.h"
>   #include "hw/arm/fdt.h"
>   #include "hw/arm/smmuv3.h"
> +#include "hw/arm/machines-qom.h"
>   #include "hw/block/flash.h"
>   #include "hw/boards.h"
>   #include "hw/ide/ide-bus.h"
> @@ -920,6 +921,10 @@ static const TypeInfo sbsa_ref_info = {
>       .instance_init = sbsa_ref_instance_init,
>       .class_init    = sbsa_ref_class_init,
>       .instance_size = sizeof(SBSAMachineState),
> +    .interfaces    = (InterfaceInfo[]) {
> +        { TYPE_TARGET_AARCH64_MACHINE },
> +        { },
> +    },
>   };
>   
>   static void sbsa_ref_machine_init(void)
> diff --git a/hw/arm/stellaris.c b/hw/arm/stellaris.c
> index cbe914c93e9..8dc68c145c1 100644
> --- a/hw/arm/stellaris.c
> +++ b/hw/arm/stellaris.c
> @@ -15,6 +15,7 @@
>   #include "hw/sd/sd.h"
>   #include "hw/ssi/ssi.h"
>   #include "hw/arm/boot.h"
> +#include "hw/arm/machines-qom.h"
>   #include "qemu/timer.h"
>   #include "hw/i2c/i2c.h"
>   #include "net/net.h"
> @@ -1427,6 +1428,11 @@ static const TypeInfo lm3s811evb_type = {
>       .name = MACHINE_TYPE_NAME("lm3s811evb"),
>       .parent = TYPE_MACHINE,
>       .class_init = lm3s811evb_class_init,
> +    .interfaces = (InterfaceInfo[]) {
> +        { TYPE_TARGET_ARM_MACHINE },
> +        { TYPE_TARGET_AARCH64_MACHINE },
> +        { },
> +    },
>   };
>   
>   /*
> @@ -1448,6 +1454,11 @@ static const TypeInfo lm3s6965evb_type = {
>       .name = MACHINE_TYPE_NAME("lm3s6965evb"),
>       .parent = TYPE_MACHINE,
>       .class_init = lm3s6965evb_class_init,
> +    .interfaces = (InterfaceInfo[]) {
> +        { TYPE_TARGET_ARM_MACHINE },
> +        { TYPE_TARGET_AARCH64_MACHINE },
> +        { },
> +    },
>   };
>   
>   static void stellaris_machine_init(void)
> diff --git a/hw/arm/stm32vldiscovery.c b/hw/arm/stm32vldiscovery.c
> index 3a9728ca719..b7eb948bc2d 100644
> --- a/hw/arm/stm32vldiscovery.c
> +++ b/hw/arm/stm32vldiscovery.c
> @@ -31,6 +31,7 @@
>   #include "qemu/error-report.h"
>   #include "hw/arm/stm32f100_soc.h"
>   #include "hw/arm/boot.h"
> +#include "hw/arm/machines-qom.h"
>   
>   /* stm32vldiscovery implementation is derived from netduinoplus2 */
>   
> @@ -74,6 +75,11 @@ static const TypeInfo stm32vldiscovery_machine_types[] = {
>           .name           = MACHINE_TYPE_NAME("stm32vldiscovery"),
>           .parent         = TYPE_MACHINE,
>           .class_init     = stm32vldiscovery_machine_class_init,
> +        .interfaces     = (InterfaceInfo[]) {
> +            { TYPE_TARGET_ARM_MACHINE },
> +            { TYPE_TARGET_AARCH64_MACHINE },
> +            { },
> +        },
>       },
>   };
>   
> diff --git a/hw/arm/versatilepb.c b/hw/arm/versatilepb.c
> index 35766445fa4..defc4d7d170 100644
> --- a/hw/arm/versatilepb.c
> +++ b/hw/arm/versatilepb.c
> @@ -12,6 +12,7 @@
>   #include "hw/sysbus.h"
>   #include "migration/vmstate.h"
>   #include "hw/arm/boot.h"
> +#include "hw/arm/machines-qom.h"
>   #include "hw/net/smc91c111.h"
>   #include "net/net.h"
>   #include "system/system.h"
> @@ -431,6 +432,11 @@ static const TypeInfo versatilepb_type = {
>       .name = MACHINE_TYPE_NAME("versatilepb"),
>       .parent = TYPE_MACHINE,
>       .class_init = versatilepb_class_init,
> +    .interfaces = (InterfaceInfo[]) {
> +        { TYPE_TARGET_ARM_MACHINE },
> +        { TYPE_TARGET_AARCH64_MACHINE },
> +        { },
> +    },
>   };
>   
>   static void versatileab_class_init(ObjectClass *oc, void *data)
> @@ -452,6 +458,11 @@ static const TypeInfo versatileab_type = {
>       .name = MACHINE_TYPE_NAME("versatileab"),
>       .parent = TYPE_MACHINE,
>       .class_init = versatileab_class_init,
> +    .interfaces = (InterfaceInfo[]) {
> +        { TYPE_TARGET_ARM_MACHINE },
> +        { TYPE_TARGET_AARCH64_MACHINE },
> +        { },
> +    },
>   };
>   
>   static void versatile_machine_init(void)
> diff --git a/hw/arm/vexpress.c b/hw/arm/vexpress.c
> index 76c6107766c..38b203b52da 100644
> --- a/hw/arm/vexpress.c
> +++ b/hw/arm/vexpress.c
> @@ -27,6 +27,7 @@
>   #include "hw/sysbus.h"
>   #include "hw/arm/boot.h"
>   #include "hw/arm/primecell.h"
> +#include "hw/arm/machines-qom.h"
>   #include "hw/net/lan9118.h"
>   #include "hw/i2c/i2c.h"
>   #include "net/net.h"
> @@ -850,6 +851,11 @@ static const TypeInfo vexpress_a9_info = {
>       .parent = TYPE_VEXPRESS_MACHINE,
>       .class_init = vexpress_a9_class_init,
>       .instance_init = vexpress_a9_instance_init,
> +    .interfaces = (InterfaceInfo[]) {
> +        { TYPE_TARGET_ARM_MACHINE },
> +        { TYPE_TARGET_AARCH64_MACHINE },
> +        { },
> +    },
>   };
>   
>   static const TypeInfo vexpress_a15_info = {
> @@ -857,6 +863,11 @@ static const TypeInfo vexpress_a15_info = {
>       .parent = TYPE_VEXPRESS_MACHINE,
>       .class_init = vexpress_a15_class_init,
>       .instance_init = vexpress_a15_instance_init,
> +    .interfaces = (InterfaceInfo[]) {
> +        { TYPE_TARGET_ARM_MACHINE },
> +        { TYPE_TARGET_AARCH64_MACHINE },
> +        { },
> +    },
>   };
>   
>   static void vexpress_machine_init(void)
> diff --git a/hw/arm/virt.c b/hw/arm/virt.c
> index a96452f17a4..a3c9ffe29eb 100644
> --- a/hw/arm/virt.c
> +++ b/hw/arm/virt.c
> @@ -37,6 +37,7 @@
>   #include "hw/arm/boot.h"
>   #include "hw/arm/primecell.h"
>   #include "hw/arm/virt.h"
> +#include "hw/arm/machines-qom.h"
>   #include "hw/block/flash.h"
>   #include "hw/vfio/vfio-calxeda-xgmac.h"
>   #include "hw/vfio/vfio-amd-xgbe.h"
> @@ -123,6 +124,11 @@ static void arm_virt_compat_set(MachineClass *mc)
>           .name = MACHINE_VER_TYPE_NAME("virt", __VA_ARGS__), \
>           .parent = TYPE_VIRT_MACHINE, \
>           .class_init = MACHINE_VER_SYM(class_init, virt, __VA_ARGS__), \
> +        .interfaces = (InterfaceInfo[]) { \
> +            { TYPE_TARGET_ARM_MACHINE }, \
> +            { TYPE_TARGET_AARCH64_MACHINE }, \
> +            { }, \
> +        }, \
>       }; \
>       static void MACHINE_VER_SYM(register, virt, __VA_ARGS__)(void) \
>       { \
> diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c
> index b8916665ed6..433907093fa 100644
> --- a/hw/arm/xilinx_zynq.c
> +++ b/hw/arm/xilinx_zynq.c
> @@ -20,6 +20,7 @@
>   #include "qapi/error.h"
>   #include "hw/sysbus.h"
>   #include "hw/arm/boot.h"
> +#include "hw/arm/machines-qom.h"
>   #include "net/net.h"
>   #include "system/system.h"
>   #include "hw/boards.h"
> @@ -480,6 +481,11 @@ static const TypeInfo zynq_machine_type = {
>       .parent = TYPE_MACHINE,
>       .class_init = zynq_machine_class_init,
>       .instance_size = sizeof(ZynqMachineState),
> +    .interfaces = (InterfaceInfo[]) {
> +        { TYPE_TARGET_ARM_MACHINE },
> +        { TYPE_TARGET_AARCH64_MACHINE },
> +        { },
> +    },
>   };
>   
>   static void zynq_machine_register_types(void)
> diff --git a/hw/arm/xlnx-versal-virt.c b/hw/arm/xlnx-versal-virt.c
> index 0c6f0359e3d..cb7466f7250 100644
> --- a/hw/arm/xlnx-versal-virt.c
> +++ b/hw/arm/xlnx-versal-virt.c
> @@ -20,6 +20,7 @@
>   #include "hw/qdev-properties.h"
>   #include "hw/arm/xlnx-versal.h"
>   #include "hw/arm/boot.h"
> +#include "hw/arm/machines-qom.h"
>   #include "target/arm/multiprocessing.h"
>   #include "qom/object.h"
>   
> @@ -833,6 +834,10 @@ static const TypeInfo versal_virt_machine_init_typeinfo = {
>       .instance_init = versal_virt_machine_instance_init,
>       .instance_size = sizeof(VersalVirt),
>       .instance_finalize = versal_virt_machine_finalize,
> +    .interfaces = (InterfaceInfo[]) {
> +        { TYPE_TARGET_AARCH64_MACHINE },
> +        { },
> +    },
>   };
>   
>   static void versal_virt_machine_init_register_types(void)
> diff --git a/hw/arm/xlnx-zcu102.c b/hw/arm/xlnx-zcu102.c
> index 4fdb153e4d8..f730dbbd908 100644
> --- a/hw/arm/xlnx-zcu102.c
> +++ b/hw/arm/xlnx-zcu102.c
> @@ -19,6 +19,7 @@
>   #include "qapi/error.h"
>   #include "hw/arm/xlnx-zynqmp.h"
>   #include "hw/arm/boot.h"
> +#include "hw/arm/machines-qom.h"
>   #include "hw/boards.h"
>   #include "qemu/error-report.h"
>   #include "qemu/log.h"
> @@ -303,6 +304,10 @@ static const TypeInfo xlnx_zcu102_machine_init_typeinfo = {
>       .class_init = xlnx_zcu102_machine_class_init,
>       .instance_init = xlnx_zcu102_machine_instance_init,
>       .instance_size = sizeof(XlnxZCU102),
> +    .interfaces = (InterfaceInfo[]) {
> +        { TYPE_TARGET_AARCH64_MACHINE },
> +        { },
> +    },
>   };
>   
>   static void xlnx_zcu102_machine_init_register_types(void)

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>

[RFC PATCH v3 07/14] meson: Prepare to accept per-binary TargetInfo structure implementation

[Philippe Mathieu-Daudé]

If a file defining the binary TargetInfo structure is available,
link with it. Otherwise keep using the stub.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 meson.build                 | 9 ++++++++-
 configs/targets/meson.build | 3 +++
 2 files changed, 11 insertions(+), 1 deletion(-)
 create mode 100644 configs/targets/meson.build

diff --git a/meson.build b/meson.build
index 168b07b5887..b0d4a9fcd36 100644
--- a/meson.build
+++ b/meson.build
@@ -3216,6 +3216,7 @@ config_devices_mak_list = []
 config_devices_h = {}
 config_target_h = {}
 config_target_mak = {}
+config_target_info = {}
 
 disassemblers = {
   'alpha' : ['CONFIG_ALPHA_DIS'],
@@ -3809,9 +3810,9 @@ specific_ss.add(files('page-target.c', 'page-vary-target.c'))
 
 common_ss.add(files('target_info.c'))
 system_ss.add(files('target_info-qom.c'))
-specific_ss.add(files('target_info-stub.c'))
 
 subdir('backends')
+subdir('configs/targets')
 subdir('disas')
 subdir('migration')
 subdir('monitor')
@@ -4272,6 +4273,12 @@ foreach target : target_dirs
     arch_srcs += gdbstub_xml
   endif
 
+  if target in config_target_info
+    arch_srcs += config_target_info[target]
+  else
+    arch_srcs += files('target_info-stub.c')
+  endif
+
   t = target_arch[target_base_arch].apply(config_target, strict: false)
   arch_srcs += t.sources()
   arch_deps += t.dependencies()
diff --git a/configs/targets/meson.build b/configs/targets/meson.build
new file mode 100644
index 00000000000..e9a5f7b078e
--- /dev/null
+++ b/configs/targets/meson.build
@@ -0,0 +1,3 @@
+foreach target : ['arm-softmmu', 'aarch64-softmmu']
+  config_target_info += {target : files(target + '.c')}
+endforeach
-- 
2.47.1

Re: [RFC PATCH v3 07/14] meson: Prepare to accept per-binary TargetInfo structure implementation

[Pierrick Bouvier]

On 4/18/25 10:29, Philippe Mathieu-Daudé wrote:
> If a file defining the binary TargetInfo structure is available,
> link with it. Otherwise keep using the stub.
> 
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
>   meson.build                 | 9 ++++++++-
>   configs/targets/meson.build | 3 +++
>   2 files changed, 11 insertions(+), 1 deletion(-)
>   create mode 100644 configs/targets/meson.build
> 
> diff --git a/meson.build b/meson.build
> index 168b07b5887..b0d4a9fcd36 100644
> --- a/meson.build
> +++ b/meson.build
> @@ -3216,6 +3216,7 @@ config_devices_mak_list = []
>   config_devices_h = {}
>   config_target_h = {}
>   config_target_mak = {}
> +config_target_info = {}
>   
>   disassemblers = {
>     'alpha' : ['CONFIG_ALPHA_DIS'],
> @@ -3809,9 +3810,9 @@ specific_ss.add(files('page-target.c', 'page-vary-target.c'))
>   
>   common_ss.add(files('target_info.c'))
>   system_ss.add(files('target_info-qom.c'))
> -specific_ss.add(files('target_info-stub.c'))
>   
>   subdir('backends')
> +subdir('configs/targets')
>   subdir('disas')
>   subdir('migration')
>   subdir('monitor')
> @@ -4272,6 +4273,12 @@ foreach target : target_dirs
>       arch_srcs += gdbstub_xml
>     endif
>   
> +  if target in config_target_info
> +    arch_srcs += config_target_info[target]
> +  else
> +    arch_srcs += files('target_info-stub.c')
> +  endif
> +
>     t = target_arch[target_base_arch].apply(config_target, strict: false)
>     arch_srcs += t.sources()
>     arch_deps += t.dependencies()
> diff --git a/configs/targets/meson.build b/configs/targets/meson.build
> new file mode 100644
> index 00000000000..e9a5f7b078e
> --- /dev/null
> +++ b/configs/targets/meson.build
> @@ -0,0 +1,3 @@
> +foreach target : ['arm-softmmu', 'aarch64-softmmu']
> +  config_target_info += {target : files(target + '.c')}
> +endforeach

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>

[RFC PATCH v3 08/14] config/target: Implement per-binary TargetInfo structure (ARM, AARCH64)

[Philippe Mathieu-Daudé]

Implement the TargetInfo structure for qemu-system-arm
and qemu-system-aarch64 binaries.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 configs/targets/aarch64-softmmu.c | 22 ++++++++++++++++++++++
 configs/targets/arm-softmmu.c     | 22 ++++++++++++++++++++++
 2 files changed, 44 insertions(+)
 create mode 100644 configs/targets/aarch64-softmmu.c
 create mode 100644 configs/targets/arm-softmmu.c

diff --git a/configs/targets/aarch64-softmmu.c b/configs/targets/aarch64-softmmu.c
new file mode 100644
index 00000000000..03f48bad326
--- /dev/null
+++ b/configs/targets/aarch64-softmmu.c
@@ -0,0 +1,22 @@
+/*
+ * QEMU binary/target API (qemu-system-aarch64)
+ *
+ *  Copyright (c) Linaro
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#include "qemu/osdep.h"
+#include "qemu/target_info-impl.h"
+#include "hw/arm/machines-qom.h"
+#include "target/arm/cpu-qom.h"
+
+static const TargetInfo target_info_aarch64_system = {
+    .target_name = "aarch64",
+    .machine_typename = TYPE_TARGET_AARCH64_MACHINE,
+};
+
+const TargetInfo *target_info(void)
+{
+    return &target_info_aarch64_system;
+}
diff --git a/configs/targets/arm-softmmu.c b/configs/targets/arm-softmmu.c
new file mode 100644
index 00000000000..07285f7f3b3
--- /dev/null
+++ b/configs/targets/arm-softmmu.c
@@ -0,0 +1,22 @@
+/*
+ * QEMU binary/target API (qemu-system-arm)
+ *
+ *  Copyright (c) Linaro
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#include "qemu/osdep.h"
+#include "qemu/target_info-impl.h"
+#include "hw/arm/machines-qom.h"
+#include "target/arm/cpu-qom.h"
+
+static const TargetInfo target_info_arm_system = {
+    .target_name = "arm",
+    .machine_typename = TYPE_TARGET_ARM_MACHINE,
+};
+
+const TargetInfo *target_info(void)
+{
+    return &target_info_arm_system;
+}
-- 
2.47.1

Re: [RFC PATCH v3 08/14] config/target: Implement per-binary TargetInfo structure (ARM, AARCH64)

[Pierrick Bouvier]

On 4/18/25 10:29, Philippe Mathieu-Daudé wrote:
> Implement the TargetInfo structure for qemu-system-arm
> and qemu-system-aarch64 binaries.
> 
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
>   configs/targets/aarch64-softmmu.c | 22 ++++++++++++++++++++++
>   configs/targets/arm-softmmu.c     | 22 ++++++++++++++++++++++
>   2 files changed, 44 insertions(+)
>   create mode 100644 configs/targets/aarch64-softmmu.c
>   create mode 100644 configs/targets/arm-softmmu.c
> 
> diff --git a/configs/targets/aarch64-softmmu.c b/configs/targets/aarch64-softmmu.c
> new file mode 100644
> index 00000000000..03f48bad326
> --- /dev/null
> +++ b/configs/targets/aarch64-softmmu.c
> @@ -0,0 +1,22 @@
> +/*
> + * QEMU binary/target API (qemu-system-aarch64)
> + *
> + *  Copyright (c) Linaro
> + *
> + * SPDX-License-Identifier: GPL-2.0-or-later
> + */
> +
> +#include "qemu/osdep.h"
> +#include "qemu/target_info-impl.h"
> +#include "hw/arm/machines-qom.h"
> +#include "target/arm/cpu-qom.h"
> +
> +static const TargetInfo target_info_aarch64_system = {
> +    .target_name = "aarch64",
> +    .machine_typename = TYPE_TARGET_AARCH64_MACHINE,
> +};
> +
> +const TargetInfo *target_info(void)
> +{
> +    return &target_info_aarch64_system;
> +}
> diff --git a/configs/targets/arm-softmmu.c b/configs/targets/arm-softmmu.c
> new file mode 100644
> index 00000000000..07285f7f3b3
> --- /dev/null
> +++ b/configs/targets/arm-softmmu.c
> @@ -0,0 +1,22 @@
> +/*
> + * QEMU binary/target API (qemu-system-arm)
> + *
> + *  Copyright (c) Linaro
> + *
> + * SPDX-License-Identifier: GPL-2.0-or-later
> + */
> +
> +#include "qemu/osdep.h"
> +#include "qemu/target_info-impl.h"
> +#include "hw/arm/machines-qom.h"
> +#include "target/arm/cpu-qom.h"
> +
> +static const TargetInfo target_info_arm_system = {
> +    .target_name = "arm",
> +    .machine_typename = TYPE_TARGET_ARM_MACHINE,
> +};
> +
> +const TargetInfo *target_info(void)
> +{
> +    return &target_info_arm_system;
> +}

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>

[RFC PATCH v3 09/14] hw/arm/aspeed: Build objects once

[Philippe Mathieu-Daudé]

Now than Aspeed machines can be filtered when running a
qemu-system-arm or qemu-system-aarch64 binary, we can
remove the TARGET_AARCH64 #ifdef'ry and compile the
aspeed.c file once, moving it from arm_ss[] source set
to arm_common_ss[].

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
---
 hw/arm/aspeed.c    | 6 ------
 hw/arm/meson.build | 4 ++--
 2 files changed, 2 insertions(+), 8 deletions(-)

diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
index ce4d49a9f59..6de61505a09 100644
--- a/hw/arm/aspeed.c
+++ b/hw/arm/aspeed.c
@@ -180,13 +180,11 @@ struct AspeedMachineState {
 #define AST2600_EVB_HW_STRAP1 0x000000C0
 #define AST2600_EVB_HW_STRAP2 0x00000003
 
-#ifdef TARGET_AARCH64
 /* AST2700 evb hardware value */
 /* SCU HW Strap1 */
 #define AST2700_EVB_HW_STRAP1 0x00000800
 /* SCUIO HW Strap1 */
 #define AST2700_EVB_HW_STRAP2 0x00000700
-#endif
 
 /* Rainier hardware value: (QEMU prototype) */
 #define RAINIER_BMC_HW_STRAP1 (0x00422016 | SCU_AST2600_HW_STRAP_BOOT_SRC_EMMC)
@@ -1664,7 +1662,6 @@ static void aspeed_minibmc_machine_ast1030_evb_class_init(ObjectClass *oc,
     aspeed_machine_class_init_cpus_defaults(mc);
 }
 
-#ifdef TARGET_AARCH64
 static void ast2700_evb_i2c_init(AspeedMachineState *bmc)
 {
     AspeedSoCState *soc = bmc->soc;
@@ -1714,7 +1711,6 @@ static void aspeed_machine_ast2700a1_evb_class_init(ObjectClass *oc, void *data)
     mc->default_ram_size = 1 * GiB;
     aspeed_machine_class_init_cpus_defaults(mc);
 }
-#endif
 
 static void aspeed_machine_qcom_dc_scm_v1_class_init(ObjectClass *oc,
                                                      void *data)
@@ -1937,7 +1933,6 @@ static const TypeInfo aspeed_machine_types[] = {
             { TYPE_TARGET_AARCH64_MACHINE },
             { },
         },
-#ifdef TARGET_AARCH64
     }, {
         .name          = MACHINE_TYPE_NAME("ast2700a0-evb"),
         .parent        = TYPE_ASPEED_MACHINE,
@@ -1954,7 +1949,6 @@ static const TypeInfo aspeed_machine_types[] = {
             { TYPE_TARGET_AARCH64_MACHINE },
             { },
         },
-#endif
     }, {
         .name          = TYPE_ASPEED_MACHINE,
         .parent        = TYPE_MACHINE,
diff --git a/hw/arm/meson.build b/hw/arm/meson.build
index 09b1cfe5b57..f76e7fb229f 100644
--- a/hw/arm/meson.build
+++ b/hw/arm/meson.build
@@ -39,15 +39,15 @@ arm_common_ss.add(when: 'CONFIG_XLNX_VERSAL', if_true: files('xlnx-versal.c', 'x
 arm_common_ss.add(when: 'CONFIG_FSL_IMX25', if_true: files('fsl-imx25.c', 'imx25_pdk.c'))
 arm_common_ss.add(when: 'CONFIG_FSL_IMX31', if_true: files('fsl-imx31.c', 'kzm.c'))
 arm_common_ss.add(when: 'CONFIG_FSL_IMX6', if_true: files('fsl-imx6.c'))
-arm_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files(
+arm_common_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files(
   'aspeed.c',
   'aspeed_soc_common.c',
   'aspeed_ast2400.c',
   'aspeed_ast2600.c',
   'aspeed_ast10x0.c',
+  'aspeed_ast27x0.c',
   'aspeed_eeprom.c',
   'fby35.c'))
-arm_common_ss.add(when: ['CONFIG_ASPEED_SOC', 'TARGET_AARCH64'], if_true: files('aspeed_ast27x0.c'))
 arm_common_ss.add(when: 'CONFIG_MPS2', if_true: files('mps2.c'))
 arm_common_ss.add(when: 'CONFIG_MPS2', if_true: files('mps2-tz.c'))
 arm_common_ss.add(when: 'CONFIG_MSF2', if_true: files('msf2-soc.c'))
-- 
2.47.1

[RFC PATCH v3 10/14] hw/arm/raspi: Build objects once

[Philippe Mathieu-Daudé]

Now than Raspi machines can be filtered when running a
qemu-system-arm or qemu-system-aarch64 binary, we can
remove the TARGET_AARCH64 #ifdef'ry and compile the
aspeed.c file once, moving it from arm_ss[] source set
to arm_common_ss[]. Note, we expose the TYPE_BCM2837
type to qemu-system-arm, but it is not user-creatable,
so not an issue.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
---
 hw/arm/bcm2836.c   | 4 ----
 hw/arm/raspi.c     | 4 ----
 hw/arm/meson.build | 8 ++++++--
 3 files changed, 6 insertions(+), 10 deletions(-)

diff --git a/hw/arm/bcm2836.c b/hw/arm/bcm2836.c
index f60489983ba..454ea2208d7 100644
--- a/hw/arm/bcm2836.c
+++ b/hw/arm/bcm2836.c
@@ -196,7 +196,6 @@ static void bcm2836_class_init(ObjectClass *oc, void *data)
     dc->realize = bcm2836_realize;
 };
 
-#ifdef TARGET_AARCH64
 static void bcm2837_class_init(ObjectClass *oc, void *data)
 {
     DeviceClass *dc = DEVICE_CLASS(oc);
@@ -209,7 +208,6 @@ static void bcm2837_class_init(ObjectClass *oc, void *data)
     bc->clusterid = 0x0;
     dc->realize = bcm2836_realize;
 };
-#endif
 
 static const TypeInfo bcm283x_types[] = {
     {
@@ -220,12 +218,10 @@ static const TypeInfo bcm283x_types[] = {
         .name           = TYPE_BCM2836,
         .parent         = TYPE_BCM283X,
         .class_init     = bcm2836_class_init,
-#ifdef TARGET_AARCH64
     }, {
         .name           = TYPE_BCM2837,
         .parent         = TYPE_BCM283X,
         .class_init     = bcm2837_class_init,
-#endif
     }, {
         .name           = TYPE_BCM283X,
         .parent         = TYPE_BCM283X_BASE,
diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c
index 69cccdbb6b1..641e231db61 100644
--- a/hw/arm/raspi.c
+++ b/hw/arm/raspi.c
@@ -368,7 +368,6 @@ static void raspi2b_machine_class_init(ObjectClass *oc, void *data)
     raspi_machine_class_init(mc, rmc->board_rev);
 };
 
-#ifdef TARGET_AARCH64
 static void raspi3ap_machine_class_init(ObjectClass *oc, void *data)
 {
     MachineClass *mc = MACHINE_CLASS(oc);
@@ -388,7 +387,6 @@ static void raspi3b_machine_class_init(ObjectClass *oc, void *data)
     rmc->board_rev = 0xa02082;
     raspi_machine_class_init(mc, rmc->board_rev);
 };
-#endif /* TARGET_AARCH64 */
 
 static const TypeInfo raspi_machine_types[] = {
     {
@@ -418,7 +416,6 @@ static const TypeInfo raspi_machine_types[] = {
             { TYPE_TARGET_AARCH64_MACHINE },
             { },
         },
-#ifdef TARGET_AARCH64
     }, {
         .name           = MACHINE_TYPE_NAME("raspi3ap"),
         .parent         = TYPE_RASPI_MACHINE,
@@ -435,7 +432,6 @@ static const TypeInfo raspi_machine_types[] = {
             { TYPE_TARGET_AARCH64_MACHINE },
             { },
         },
-#endif
     }, {
         .name           = TYPE_RASPI_MACHINE,
         .parent         = TYPE_RASPI_BASE_MACHINE,
diff --git a/hw/arm/meson.build b/hw/arm/meson.build
index f76e7fb229f..f52034ff6a2 100644
--- a/hw/arm/meson.build
+++ b/hw/arm/meson.build
@@ -27,8 +27,12 @@ arm_common_ss.add(when: 'CONFIG_OMAP', if_true: files('omap1.c'))
 arm_common_ss.add(when: 'CONFIG_ALLWINNER_A10', if_true: files('allwinner-a10.c', 'cubieboard.c'))
 arm_common_ss.add(when: 'CONFIG_ALLWINNER_H3', if_true: files('allwinner-h3.c', 'orangepi.c'))
 arm_common_ss.add(when: 'CONFIG_ALLWINNER_R40', if_true: files('allwinner-r40.c', 'bananapi_m2u.c'))
-arm_ss.add(when: 'CONFIG_RASPI', if_true: files('bcm2836.c', 'raspi.c'))
-arm_common_ss.add(when: ['CONFIG_RASPI', 'TARGET_AARCH64'], if_true: files('bcm2838.c', 'raspi4b.c'))
+arm_common_ss.add(when: 'CONFIG_RASPI', if_true: files(
+  'bcm2836.c',
+  'bcm2838.c',
+  'raspi.c',
+  'raspi4b.c',
+))
 arm_common_ss.add(when: 'CONFIG_STM32F100_SOC', if_true: files('stm32f100_soc.c'))
 arm_common_ss.add(when: 'CONFIG_STM32F205_SOC', if_true: files('stm32f205_soc.c'))
 arm_common_ss.add(when: 'CONFIG_STM32F405_SOC', if_true: files('stm32f405_soc.c'))
-- 
2.47.1

[RFC PATCH v3 11/14] hw/core/machine: Allow dynamic registration of valid CPU types

[Philippe Mathieu-Daudé]

Add MachineClass::valid_cpu_types_list, a dynamic list of strings.

CPU types can be registered with machine_class_add_valid_cpu_type().

Suggested-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 include/hw/boards.h |  8 ++++++++
 hw/core/machine.c   | 30 ++++++++++++++++++++++++++++++
 2 files changed, 38 insertions(+)

diff --git a/include/hw/boards.h b/include/hw/boards.h
index 02f43ac5d4d..647a29ff04d 100644
--- a/include/hw/boards.h
+++ b/include/hw/boards.h
@@ -56,6 +56,13 @@ void machine_set_cache_topo_level(MachineState *ms, CacheLevelAndType cache,
 bool machine_check_smp_cache(const MachineState *ms, Error **errp);
 void machine_memory_devices_init(MachineState *ms, hwaddr base, uint64_t size);
 
+/**
+ * machine_class_add_valid_cpu_type: Add type to list of valid CPUs
+ * @mc: Machine class
+ * @type: CPU type to allow (should be a subtype of TYPE_CPU)
+ */
+void machine_class_add_valid_cpu_type(MachineClass *mc, const char *type);
+
 /**
  * machine_class_allow_dynamic_sysbus_dev: Add type to list of valid devices
  * @mc: Machine class
@@ -306,6 +313,7 @@ struct MachineClass {
     bool ignore_memory_transaction_failures;
     int numa_mem_align_shift;
     const char * const *valid_cpu_types;
+    GList *valid_cpu_types_list;
     strList *allowed_dynamic_sysbus_devices;
     bool auto_enable_numa_with_memhp;
     bool auto_enable_numa_with_memdev;
diff --git a/hw/core/machine.c b/hw/core/machine.c
index f52a4f2273b..ff27d533b5c 100644
--- a/hw/core/machine.c
+++ b/hw/core/machine.c
@@ -1538,6 +1538,12 @@ const char *machine_class_default_cpu_type(MachineClass *mc)
     return mc->default_cpu_type;
 }
 
+void machine_class_add_valid_cpu_type(MachineClass *mc, const char *type)
+{
+    mc->valid_cpu_types_list = g_list_prepend(mc->valid_cpu_types_list,
+                                              g_strdup(type));
+}
+
 static bool is_cpu_type_supported(const MachineState *machine, Error **errp)
 {
     MachineClass *mc = MACHINE_GET_CLASS(machine);
@@ -1581,6 +1587,30 @@ static bool is_cpu_type_supported(const MachineState *machine, Error **errp)
             return false;
         }
     }
+    if (mc->valid_cpu_types_list) {
+        bool valid = false;
+        unsigned count = 0;
+        GList *l;
+
+        for (l = mc->valid_cpu_types_list; !valid && l != NULL; l = l->next) {
+            valid |= !!object_class_dynamic_cast(oc, l->data);
+            count++;
+        }
+
+        if (!valid) {
+            g_autofree char *requested = cpu_model_from_type(machine->cpu_type);
+            mc->valid_cpu_types_list = g_list_reverse(mc->valid_cpu_types_list);
+            error_setg(errp, "Invalid CPU model: %s", requested);
+            error_append_hint(errp, "The valid models are: ");
+            for (l = mc->valid_cpu_types_list; l != NULL; l = l->next) {
+                g_autofree char *model = cpu_model_from_type(l->data);
+                error_append_hint(errp, "%s%s", model, --count ? ", " : "");
+            }
+            error_append_hint(errp, "\n");
+
+            return false;
+        }
+    }
 
     /* Check if CPU type is deprecated and warn if so */
     cc = CPU_CLASS(oc);
-- 
2.47.1

Re: [RFC PATCH v3 11/14] hw/core/machine: Allow dynamic registration of valid CPU types

[Pierrick Bouvier]

On 4/18/25 10:29, Philippe Mathieu-Daudé wrote:
> Add MachineClass::valid_cpu_types_list, a dynamic list of strings.
> 
> CPU types can be registered with machine_class_add_valid_cpu_type().
> 
> Suggested-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
>   include/hw/boards.h |  8 ++++++++
>   hw/core/machine.c   | 30 ++++++++++++++++++++++++++++++
>   2 files changed, 38 insertions(+)
> 
> diff --git a/include/hw/boards.h b/include/hw/boards.h
> index 02f43ac5d4d..647a29ff04d 100644
> --- a/include/hw/boards.h
> +++ b/include/hw/boards.h
> @@ -56,6 +56,13 @@ void machine_set_cache_topo_level(MachineState *ms, CacheLevelAndType cache,
>   bool machine_check_smp_cache(const MachineState *ms, Error **errp);
>   void machine_memory_devices_init(MachineState *ms, hwaddr base, uint64_t size);
>   
> +/**
> + * machine_class_add_valid_cpu_type: Add type to list of valid CPUs
> + * @mc: Machine class
> + * @type: CPU type to allow (should be a subtype of TYPE_CPU)
> + */
> +void machine_class_add_valid_cpu_type(MachineClass *mc, const char *type);
> +
>   /**
>    * machine_class_allow_dynamic_sysbus_dev: Add type to list of valid devices
>    * @mc: Machine class
> @@ -306,6 +313,7 @@ struct MachineClass {
>       bool ignore_memory_transaction_failures;
>       int numa_mem_align_shift;
>       const char * const *valid_cpu_types;
> +    GList *valid_cpu_types_list;
>       strList *allowed_dynamic_sysbus_devices;
>       bool auto_enable_numa_with_memhp;
>       bool auto_enable_numa_with_memdev;
> diff --git a/hw/core/machine.c b/hw/core/machine.c
> index f52a4f2273b..ff27d533b5c 100644
> --- a/hw/core/machine.c
> +++ b/hw/core/machine.c
> @@ -1538,6 +1538,12 @@ const char *machine_class_default_cpu_type(MachineClass *mc)
>       return mc->default_cpu_type;
>   }
>   
> +void machine_class_add_valid_cpu_type(MachineClass *mc, const char *type)
> +{
> +    mc->valid_cpu_types_list = g_list_prepend(mc->valid_cpu_types_list,
> +                                              g_strdup(type));
> +}
> +
>   static bool is_cpu_type_supported(const MachineState *machine, Error **errp)
>   {
>       MachineClass *mc = MACHINE_GET_CLASS(machine);
> @@ -1581,6 +1587,30 @@ static bool is_cpu_type_supported(const MachineState *machine, Error **errp)
>               return false;
>           }
>       }
> +    if (mc->valid_cpu_types_list) {
> +        bool valid = false;
> +        unsigned count = 0;
> +        GList *l;
> +
> +        for (l = mc->valid_cpu_types_list; !valid && l != NULL; l = l->next) {
> +            valid |= !!object_class_dynamic_cast(oc, l->data);
> +            count++;
> +        }
> +
> +        if (!valid) {
> +            g_autofree char *requested = cpu_model_from_type(machine->cpu_type);
> +            mc->valid_cpu_types_list = g_list_reverse(mc->valid_cpu_types_list);
> +            error_setg(errp, "Invalid CPU model: %s", requested);
> +            error_append_hint(errp, "The valid models are: ");
> +            for (l = mc->valid_cpu_types_list; l != NULL; l = l->next) {
> +                g_autofree char *model = cpu_model_from_type(l->data);
> +                error_append_hint(errp, "%s%s", model, --count ? ", " : "");
> +            }
> +            error_append_hint(errp, "\n");
> +
> +            return false;
> +        }
> +    }
>   
>       /* Check if CPU type is deprecated and warn if so */
>       cc = CPU_CLASS(oc);

How about simply changing valid_cpu_types to become a function instead 
of a static list?

This way, it's simple to get list of cpus, and this change is not 
needed. The actual list will be decided at runtime, instead of 
statically, which solves the original problem.
As well, we'll need it to be able to handle accelerator specific cpus, 
so it will be changed eventually.

Re: [RFC PATCH v3 11/14] hw/core/machine: Allow dynamic registration of valid CPU types

[Pierrick Bouvier]

On 4/18/25 18:16, Pierrick Bouvier wrote:
> On 4/18/25 10:29, Philippe Mathieu-Daudé wrote:
>> Add MachineClass::valid_cpu_types_list, a dynamic list of strings.
>>
>> CPU types can be registered with machine_class_add_valid_cpu_type().
>>
>> Suggested-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
>> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
>> ---
>>    include/hw/boards.h |  8 ++++++++
>>    hw/core/machine.c   | 30 ++++++++++++++++++++++++++++++
>>    2 files changed, 38 insertions(+)
>>
>> diff --git a/include/hw/boards.h b/include/hw/boards.h
>> index 02f43ac5d4d..647a29ff04d 100644
>> --- a/include/hw/boards.h
>> +++ b/include/hw/boards.h
>> @@ -56,6 +56,13 @@ void machine_set_cache_topo_level(MachineState *ms, CacheLevelAndType cache,
>>    bool machine_check_smp_cache(const MachineState *ms, Error **errp);
>>    void machine_memory_devices_init(MachineState *ms, hwaddr base, uint64_t size);
>>    
>> +/**
>> + * machine_class_add_valid_cpu_type: Add type to list of valid CPUs
>> + * @mc: Machine class
>> + * @type: CPU type to allow (should be a subtype of TYPE_CPU)
>> + */
>> +void machine_class_add_valid_cpu_type(MachineClass *mc, const char *type);
>> +
>>    /**
>>     * machine_class_allow_dynamic_sysbus_dev: Add type to list of valid devices
>>     * @mc: Machine class
>> @@ -306,6 +313,7 @@ struct MachineClass {
>>        bool ignore_memory_transaction_failures;
>>        int numa_mem_align_shift;
>>        const char * const *valid_cpu_types;
>> +    GList *valid_cpu_types_list;
>>        strList *allowed_dynamic_sysbus_devices;
>>        bool auto_enable_numa_with_memhp;
>>        bool auto_enable_numa_with_memdev;
>> diff --git a/hw/core/machine.c b/hw/core/machine.c
>> index f52a4f2273b..ff27d533b5c 100644
>> --- a/hw/core/machine.c
>> +++ b/hw/core/machine.c
>> @@ -1538,6 +1538,12 @@ const char *machine_class_default_cpu_type(MachineClass *mc)
>>        return mc->default_cpu_type;
>>    }
>>    
>> +void machine_class_add_valid_cpu_type(MachineClass *mc, const char *type)
>> +{
>> +    mc->valid_cpu_types_list = g_list_prepend(mc->valid_cpu_types_list,
>> +                                              g_strdup(type));
>> +}
>> +
>>    static bool is_cpu_type_supported(const MachineState *machine, Error **errp)
>>    {
>>        MachineClass *mc = MACHINE_GET_CLASS(machine);
>> @@ -1581,6 +1587,30 @@ static bool is_cpu_type_supported(const MachineState *machine, Error **errp)
>>                return false;
>>            }
>>        }
>> +    if (mc->valid_cpu_types_list) {
>> +        bool valid = false;
>> +        unsigned count = 0;
>> +        GList *l;
>> +
>> +        for (l = mc->valid_cpu_types_list; !valid && l != NULL; l = l->next) {
>> +            valid |= !!object_class_dynamic_cast(oc, l->data);
>> +            count++;
>> +        }
>> +
>> +        if (!valid) {
>> +            g_autofree char *requested = cpu_model_from_type(machine->cpu_type);
>> +            mc->valid_cpu_types_list = g_list_reverse(mc->valid_cpu_types_list);
>> +            error_setg(errp, "Invalid CPU model: %s", requested);
>> +            error_append_hint(errp, "The valid models are: ");
>> +            for (l = mc->valid_cpu_types_list; l != NULL; l = l->next) {
>> +                g_autofree char *model = cpu_model_from_type(l->data);
>> +                error_append_hint(errp, "%s%s", model, --count ? ", " : "");
>> +            }
>> +            error_append_hint(errp, "\n");
>> +
>> +            return false;
>> +        }
>> +    }
>>    
>>        /* Check if CPU type is deprecated and warn if so */
>>        cc = CPU_CLASS(oc);
> 
> How about simply changing valid_cpu_types to become a function instead
> of a static list?
> 
> This way, it's simple to get list of cpus, and this change is not
> needed. The actual list will be decided at runtime, instead of
> statically, which solves the original problem.
> As well, we'll need it to be able to handle accelerator specific cpus,
> so it will be changed eventually.

This would give something like this patch.
We can then replace all valid_cpu_types with this, and remove 
valid_cpu_types field, now it's replaced by get_valid_cpu_types.

This way, we still have static lists where possible, and we can 
conveniently build a dynamic list if needed for concerned boards, which 
will be evaluated *after* machine is instantiated, so we can poke any 
accelerator or target setting defined only at runtime.

diff --git a/hw/arm/npcm8xx_boards.c b/hw/arm/npcm8xx_boards.c
index 3fb8478e72e..75f92dcfe50 100644
--- a/hw/arm/npcm8xx_boards.c
+++ b/hw/arm/npcm8xx_boards.c
@@ -209,19 +209,22 @@ static void 
npcm8xx_set_soc_type(NPCM8xxMachineClass *nmc, const char *type)
      mc->default_cpus = mc->min_cpus = mc->max_cpus = sc->num_cpus;
  }

-static void npcm8xx_machine_class_init(ObjectClass *oc, void *data)
-{
-    MachineClass *mc = MACHINE_CLASS(oc);
-    static const char * const valid_cpu_types[] = {
+static const char * const *get_valid_cpu_types(void) {
+    static const char *cpus[] = {
          ARM_CPU_TYPE_NAME("cortex-a9"),
          NULL
      };
+    return cpus;
+}

+static void npcm8xx_machine_class_init(ObjectClass *oc, void *data)
+{
+    MachineClass *mc = MACHINE_CLASS(oc);
      mc->no_floppy = 1;
      mc->no_cdrom = 1;
      mc->no_parallel = 1;
      mc->default_ram_id = "ram";
-    mc->valid_cpu_types = valid_cpu_types;
+    mc->get_valid_cpu_types = get_valid_cpu_types;
  }

[RFC PATCH v3 12/14] hw/arm/virt: Register valid CPU types dynamically

[Philippe Mathieu-Daudé]

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 hw/arm/virt.c | 35 ++++++++++++++++-------------------
 1 file changed, 16 insertions(+), 19 deletions(-)

diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index a3c9ffe29eb..48a0c3588ce 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -3134,32 +3134,30 @@ static void virt_machine_class_init(ObjectClass *oc, void *data)
 {
     MachineClass *mc = MACHINE_CLASS(oc);
     HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(oc);
-    static const char * const valid_cpu_types[] = {
+
 #ifdef CONFIG_TCG
-        ARM_CPU_TYPE_NAME("cortex-a7"),
-        ARM_CPU_TYPE_NAME("cortex-a15"),
+    machine_class_add_valid_cpu_type(mc, ARM_CPU_TYPE_NAME("cortex-a7"));
+    machine_class_add_valid_cpu_type(mc, ARM_CPU_TYPE_NAME("cortex-a15"));
 #ifdef TARGET_AARCH64
-        ARM_CPU_TYPE_NAME("cortex-a35"),
-        ARM_CPU_TYPE_NAME("cortex-a55"),
-        ARM_CPU_TYPE_NAME("cortex-a72"),
-        ARM_CPU_TYPE_NAME("cortex-a76"),
-        ARM_CPU_TYPE_NAME("cortex-a710"),
-        ARM_CPU_TYPE_NAME("a64fx"),
-        ARM_CPU_TYPE_NAME("neoverse-n1"),
-        ARM_CPU_TYPE_NAME("neoverse-v1"),
-        ARM_CPU_TYPE_NAME("neoverse-n2"),
+        machine_class_add_valid_cpu_type(mc, ARM_CPU_TYPE_NAME("cortex-a35"));
+        machine_class_add_valid_cpu_type(mc, ARM_CPU_TYPE_NAME("cortex-a55"));
+        machine_class_add_valid_cpu_type(mc, ARM_CPU_TYPE_NAME("cortex-a72"));
+        machine_class_add_valid_cpu_type(mc, ARM_CPU_TYPE_NAME("cortex-a76"));
+        machine_class_add_valid_cpu_type(mc, ARM_CPU_TYPE_NAME("cortex-a710"));
+        machine_class_add_valid_cpu_type(mc, ARM_CPU_TYPE_NAME("a64fx"));
+        machine_class_add_valid_cpu_type(mc, ARM_CPU_TYPE_NAME("neoverse-n1"));
+        machine_class_add_valid_cpu_type(mc, ARM_CPU_TYPE_NAME("neoverse-v1"));
+        machine_class_add_valid_cpu_type(mc, ARM_CPU_TYPE_NAME("neoverse-n2"));
 #endif /* TARGET_AARCH64 */
 #endif /* CONFIG_TCG */
 #ifdef TARGET_AARCH64
-        ARM_CPU_TYPE_NAME("cortex-a53"),
-        ARM_CPU_TYPE_NAME("cortex-a57"),
+        machine_class_add_valid_cpu_type(mc, ARM_CPU_TYPE_NAME("cortex-a53"));
+        machine_class_add_valid_cpu_type(mc, ARM_CPU_TYPE_NAME("cortex-a57"));
 #if defined(CONFIG_KVM) || defined(CONFIG_HVF)
-        ARM_CPU_TYPE_NAME("host"),
+        machine_class_add_valid_cpu_type(mc, ARM_CPU_TYPE_NAME("host"));
 #endif /* CONFIG_KVM || CONFIG_HVF */
 #endif /* TARGET_AARCH64 */
-        ARM_CPU_TYPE_NAME("max"),
-        NULL
-    };
+    machine_class_add_valid_cpu_type(mc, ARM_CPU_TYPE_NAME("max"));
 
     mc->init = machvirt_init;
     /* Start with max_cpus set to 512, which is the maximum supported by KVM.
@@ -3187,7 +3185,6 @@ static void virt_machine_class_init(ObjectClass *oc, void *data)
 #else
     mc->default_cpu_type = ARM_CPU_TYPE_NAME("max");
 #endif
-    mc->valid_cpu_types = valid_cpu_types;
     mc->get_default_cpu_node_id = virt_get_default_cpu_node_id;
     mc->kvm_type = virt_kvm_type;
     mc->hvf_get_physical_address_range = virt_hvf_get_physical_address_range;
-- 
2.47.1

[RFC PATCH v3 13/14] qemu/target_info: Add target_aarch64() helper

[Philippe Mathieu-Daudé]

Add a helper to distinct the binary is targetting
Aarch64 or not.

Start with a dump strcmp() implementation, leaving
room for future optimizations.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 include/qemu/target_info.h | 7 +++++++
 target_info.c              | 5 +++++
 2 files changed, 12 insertions(+)

diff --git a/include/qemu/target_info.h b/include/qemu/target_info.h
index c67b97d66f3..9b7575ce632 100644
--- a/include/qemu/target_info.h
+++ b/include/qemu/target_info.h
@@ -24,4 +24,11 @@ const char *target_name(void);
  */
 const char *target_machine_typename(void);
 
+/**
+ * target_aarch64:
+ *
+ * Returns whether the target architecture is Aarch64.
+ */
+bool target_aarch64(void);
+
 #endif
diff --git a/target_info.c b/target_info.c
index 1de4334ecc5..87dd1d51778 100644
--- a/target_info.c
+++ b/target_info.c
@@ -19,3 +19,8 @@ const char *target_machine_typename(void)
 {
     return target_info()->machine_typename;
 }
+
+bool target_aarch64(void)
+{
+    return !strcmp(target_name(), "aarch64");
+}
-- 
2.47.1

Re: [RFC PATCH v3 13/14] qemu/target_info: Add target_aarch64() helper

[Pierrick Bouvier]

On 4/18/25 10:29, Philippe Mathieu-Daudé wrote:
> Add a helper to distinct the binary is targetting
> Aarch64 or not.
> 
> Start with a dump strcmp() implementation, leaving
> room for future optimizations.
> 
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
>   include/qemu/target_info.h | 7 +++++++
>   target_info.c              | 5 +++++
>   2 files changed, 12 insertions(+)
> 
> diff --git a/include/qemu/target_info.h b/include/qemu/target_info.h
> index c67b97d66f3..9b7575ce632 100644
> --- a/include/qemu/target_info.h
> +++ b/include/qemu/target_info.h
> @@ -24,4 +24,11 @@ const char *target_name(void);
>    */
>   const char *target_machine_typename(void);
>   
> +/**
> + * target_aarch64:
> + *
> + * Returns whether the target architecture is Aarch64.
> + */
> +bool target_aarch64(void);
> +
>   #endif
> diff --git a/target_info.c b/target_info.c
> index 1de4334ecc5..87dd1d51778 100644
> --- a/target_info.c
> +++ b/target_info.c
> @@ -19,3 +19,8 @@ const char *target_machine_typename(void)
>   {
>       return target_info()->machine_typename;
>   }
> +
> +bool target_aarch64(void)
> +{
> +    return !strcmp(target_name(), "aarch64");

I don't think doing strcmp is a good move here, even temporarily.

A short term solution is making target_info.c target specific, and use:
return TARGET_AARCH64;

The long term solution, is to have a create target_current() that 
returns an enum, and target_aarch64() would become:
return target_current() == {ENUM}_AARCH64. We just need to find a good 
name for {enum} which is not Target, since it's a poisoned identifier.

This way, we can easily convert the simple
#ifdef TARGET_AARCH64 by if target_aarch64(),
and more complicated combinations by a switch on target_current().

For a first version, I think that the first solution is enough.

Re: [RFC PATCH v3 13/14] qemu/target_info: Add target_aarch64() helper

[Philippe Mathieu-Daudé]

On 19/4/25 03:09, Pierrick Bouvier wrote:
> On 4/18/25 10:29, Philippe Mathieu-Daudé wrote:
>> Add a helper to distinct the binary is targetting
>> Aarch64 or not.
>>
>> Start with a dump strcmp() implementation, leaving
>> room for future optimizations.
>>
>> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
>> ---
>>   include/qemu/target_info.h | 7 +++++++
>>   target_info.c              | 5 +++++
>>   2 files changed, 12 insertions(+)
>>
>> diff --git a/include/qemu/target_info.h b/include/qemu/target_info.h
>> index c67b97d66f3..9b7575ce632 100644
>> --- a/include/qemu/target_info.h
>> +++ b/include/qemu/target_info.h
>> @@ -24,4 +24,11 @@ const char *target_name(void);
>>    */
>>   const char *target_machine_typename(void);
>> +/**
>> + * target_aarch64:
>> + *
>> + * Returns whether the target architecture is Aarch64.
>> + */
>> +bool target_aarch64(void);
>> +
>>   #endif
>> diff --git a/target_info.c b/target_info.c
>> index 1de4334ecc5..87dd1d51778 100644
>> --- a/target_info.c
>> +++ b/target_info.c
>> @@ -19,3 +19,8 @@ const char *target_machine_typename(void)
>>   {
>>       return target_info()->machine_typename;
>>   }
>> +
>> +bool target_aarch64(void)
>> +{
>> +    return !strcmp(target_name(), "aarch64");
> 
> I don't think doing strcmp is a good move here, even temporarily.
> 
> A short term solution is making target_info.c target specific, and use:
> return TARGET_AARCH64;

IIUC as 
https://lore.kernel.org/qemu-devel/20231122183048.17150-3-philmd@linaro.org/?

> The long term solution, is to have a create target_current() that 
> returns an enum, and target_aarch64() would become:
> return target_current() == {ENUM}_AARCH64. We just need to find a good 
> name for {enum} which is not Target, since it's a poisoned identifier.
> 
> This way, we can easily convert the simple
> #ifdef TARGET_AARCH64 by if target_aarch64(),
> and more complicated combinations by a switch on target_current().

This was 
https://lore.kernel.org/qemu-devel/20250403234914.9154-4-philmd@linaro.org/, 
which was useful for the virtio-mem patch:

-- >8 --
diff --git a/hw/virtio/virtio-mem.c b/hw/virtio/virtio-mem.c
index c7968ee0c61..b5d62411b3e 100644
--- a/hw/virtio/virtio-mem.c
+++ b/hw/virtio/virtio-mem.c
@@ -17,2 +17,3 @@
  #include "qemu/units.h"
+#include "qemu/target_info.h"
  #include "system/numa.h"
@@ -35,9 +36,17 @@ static const VMStateDescription 
vmstate_virtio_mem_device_early;

-/*
- * We only had legacy x86 guests that did not support
- * VIRTIO_MEM_F_UNPLUGGED_INACCESSIBLE. Other targets don't have legacy 
guests.
- */
-#if defined(TARGET_X86_64) || defined(TARGET_I386)
-#define VIRTIO_MEM_HAS_LEGACY_GUESTS
-#endif
+static bool virtio_mem_has_legacy_guests(void)
+{
+    /*
+     * We only had legacy x86 guests that did not support
+     * VIRTIO_MEM_F_UNPLUGGED_INACCESSIBLE. Other targets don't have
+     * legacy guests.
+     */
+    switch (target_system_arch()) {
+    case SYS_EMU_TARGET_I386:
+    case SYS_EMU_TARGET_X86_64:
+        return true;
+    default:
+        return false;
+    }
+}

@@ -145,3 +154,2 @@ static uint64_t 
virtio_mem_default_block_size(RAMBlock *rb)

-#if defined(VIRTIO_MEM_HAS_LEGACY_GUESTS)
  static bool virtio_mem_has_shared_zeropage(RAMBlock *rb)
@@ -156,3 +164,2 @@ static bool virtio_mem_has_shared_zeropage(RAMBlock *rb)
  }
-#endif /* VIRTIO_MEM_HAS_LEGACY_GUESTS */

@@ -999,24 +1006,26 @@ static void virtio_mem_device_realize(DeviceState 
*dev, Error **errp)

-#if defined(VIRTIO_MEM_HAS_LEGACY_GUESTS)
-    switch (vmem->unplugged_inaccessible) {
-    case ON_OFF_AUTO_AUTO:
-        if (virtio_mem_has_shared_zeropage(rb)) {
-            vmem->unplugged_inaccessible = ON_OFF_AUTO_OFF;
-        } else {
-            vmem->unplugged_inaccessible = ON_OFF_AUTO_ON;
+    if (virtio_mem_has_legacy_guests()) {
+        switch (vmem->unplugged_inaccessible) {
+        case ON_OFF_AUTO_AUTO:
+            if (virtio_mem_has_shared_zeropage(rb)) {
+                vmem->unplugged_inaccessible = ON_OFF_AUTO_OFF;
+            } else {
+                vmem->unplugged_inaccessible = ON_OFF_AUTO_ON;
+            }
+            break;
+        case ON_OFF_AUTO_OFF:
+            if (!virtio_mem_has_shared_zeropage(rb)) {
+                warn_report("'%s' property set to 'off' with a memdev 
that does"
+                            " not support the shared zeropage.",
+                            VIRTIO_MEM_UNPLUGGED_INACCESSIBLE_PROP);
+            }
+            break;
+        default:
+            break;
          }
-        break;
-    case ON_OFF_AUTO_OFF:
-        if (!virtio_mem_has_shared_zeropage(rb)) {
-            warn_report("'%s' property set to 'off' with a memdev that 
does"
-                        " not support the shared zeropage.",
-                        VIRTIO_MEM_UNPLUGGED_INACCESSIBLE_PROP);
-        }
-        break;
-    default:
-        break;
+    } else if (vmem->unplugged_inaccessible != ON_OFF_AUTO_ON) {
+        error_setg(errp, "guest requires property '%s' to be 'on'",
+                   VIRTIO_MEM_UNPLUGGED_INACCESSIBLE_PROP);
+        return;
      }
-#else /* VIRTIO_MEM_HAS_LEGACY_GUESTS */
-    vmem->unplugged_inaccessible = ON_OFF_AUTO_ON;
-#endif /* VIRTIO_MEM_HAS_LEGACY_GUESTS */

@@ -1713,6 +1722,4 @@ static const Property virtio_mem_properties[] = {
                       TYPE_MEMORY_BACKEND, HostMemoryBackend *),
-#if defined(VIRTIO_MEM_HAS_LEGACY_GUESTS)
      DEFINE_PROP_ON_OFF_AUTO(VIRTIO_MEM_UNPLUGGED_INACCESSIBLE_PROP, 
VirtIOMEM,
                              unplugged_inaccessible, ON_OFF_AUTO_ON),
-#endif
      DEFINE_PROP_BOOL(VIRTIO_MEM_EARLY_MIGRATION_PROP, VirtIOMEM,
---

but I thought either you didn't like the approach or it was too early
to propose for the API, so I went back to strcmp.

> 
> For a first version, I think that the first solution is enough.

Re: [RFC PATCH v3 13/14] qemu/target_info: Add target_aarch64() helper

[Pierrick Bouvier]

On 4/19/25 05:54, Philippe Mathieu-Daudé wrote:
>> I don't think doing strcmp is a good move here, even temporarily.
>>
>> A short term solution is making target_info.c target specific, and use:
>> return TARGET_AARCH64;
> 
> IIUC as
> https://lore.kernel.org/qemu-devel/20231122183048.17150-3-philmd@linaro.org/?
> 

Yes, but simply named target_aarch64() instead of 
target_aarch64_available(), to mimic the existing TARGET_AARCH64.

>> The long term solution, is to have a create target_current() that
>> returns an enum, and target_aarch64() would become:
>> return target_current() == {ENUM}_AARCH64. We just need to find a good
>> name for {enum} which is not Target, since it's a poisoned identifier.
>>
>> This way, we can easily convert the simple
>> #ifdef TARGET_AARCH64 by if target_aarch64(),
>> and more complicated combinations by a switch on target_current().
> 
> This was
> https://lore.kernel.org/qemu-devel/20250403234914.9154-4-philmd@linaro.org/,
> which was useful for the virtio-mem patch:
> 
> -- >8 --
> diff --git a/hw/virtio/virtio-mem.c b/hw/virtio/virtio-mem.c
> index c7968ee0c61..b5d62411b3e 100644
> --- a/hw/virtio/virtio-mem.c
> +++ b/hw/virtio/virtio-mem.c
> @@ -17,2 +17,3 @@
>    #include "qemu/units.h"
> +#include "qemu/target_info.h"
>    #include "system/numa.h"
> @@ -35,9 +36,17 @@ static const VMStateDescription
> vmstate_virtio_mem_device_early;
> 
> -/*
> - * We only had legacy x86 guests that did not support
> - * VIRTIO_MEM_F_UNPLUGGED_INACCESSIBLE. Other targets don't have legacy
> guests.
> - */
> -#if defined(TARGET_X86_64) || defined(TARGET_I386)
> -#define VIRTIO_MEM_HAS_LEGACY_GUESTS
> -#endif
> +static bool virtio_mem_has_legacy_guests(void)
> +{
> +    /*
> +     * We only had legacy x86 guests that did not support
> +     * VIRTIO_MEM_F_UNPLUGGED_INACCESSIBLE. Other targets don't have
> +     * legacy guests.
> +     */
> +    switch (target_system_arch()) {
> +    case SYS_EMU_TARGET_I386:
> +    case SYS_EMU_TARGET_X86_64:
> +        return true;
> +    default:
> +        return false;
> +    }
> +}
> 
> @@ -145,3 +154,2 @@ static uint64_t
> virtio_mem_default_block_size(RAMBlock *rb)
> 
> -#if defined(VIRTIO_MEM_HAS_LEGACY_GUESTS)
>    static bool virtio_mem_has_shared_zeropage(RAMBlock *rb)
> @@ -156,3 +164,2 @@ static bool virtio_mem_has_shared_zeropage(RAMBlock *rb)
>    }
> -#endif /* VIRTIO_MEM_HAS_LEGACY_GUESTS */
> 
> @@ -999,24 +1006,26 @@ static void virtio_mem_device_realize(DeviceState
> *dev, Error **errp)
> 
> -#if defined(VIRTIO_MEM_HAS_LEGACY_GUESTS)
> -    switch (vmem->unplugged_inaccessible) {
> -    case ON_OFF_AUTO_AUTO:
> -        if (virtio_mem_has_shared_zeropage(rb)) {
> -            vmem->unplugged_inaccessible = ON_OFF_AUTO_OFF;
> -        } else {
> -            vmem->unplugged_inaccessible = ON_OFF_AUTO_ON;
> +    if (virtio_mem_has_legacy_guests()) {
> +        switch (vmem->unplugged_inaccessible) {
> +        case ON_OFF_AUTO_AUTO:
> +            if (virtio_mem_has_shared_zeropage(rb)) {
> +                vmem->unplugged_inaccessible = ON_OFF_AUTO_OFF;
> +            } else {
> +                vmem->unplugged_inaccessible = ON_OFF_AUTO_ON;
> +            }
> +            break;
> +        case ON_OFF_AUTO_OFF:
> +            if (!virtio_mem_has_shared_zeropage(rb)) {
> +                warn_report("'%s' property set to 'off' with a memdev
> that does"
> +                            " not support the shared zeropage.",
> +                            VIRTIO_MEM_UNPLUGGED_INACCESSIBLE_PROP);
> +            }
> +            break;
> +        default:
> +            break;
>            }
> -        break;
> -    case ON_OFF_AUTO_OFF:
> -        if (!virtio_mem_has_shared_zeropage(rb)) {
> -            warn_report("'%s' property set to 'off' with a memdev that
> does"
> -                        " not support the shared zeropage.",
> -                        VIRTIO_MEM_UNPLUGGED_INACCESSIBLE_PROP);
> -        }
> -        break;
> -    default:
> -        break;
> +    } else if (vmem->unplugged_inaccessible != ON_OFF_AUTO_ON) {
> +        error_setg(errp, "guest requires property '%s' to be 'on'",
> +                   VIRTIO_MEM_UNPLUGGED_INACCESSIBLE_PROP);
> +        return;
>        }
> -#else /* VIRTIO_MEM_HAS_LEGACY_GUESTS */
> -    vmem->unplugged_inaccessible = ON_OFF_AUTO_ON;
> -#endif /* VIRTIO_MEM_HAS_LEGACY_GUESTS */
> 
> @@ -1713,6 +1722,4 @@ static const Property virtio_mem_properties[] = {
>                         TYPE_MEMORY_BACKEND, HostMemoryBackend *),
> -#if defined(VIRTIO_MEM_HAS_LEGACY_GUESTS)
>        DEFINE_PROP_ON_OFF_AUTO(VIRTIO_MEM_UNPLUGGED_INACCESSIBLE_PROP,
> VirtIOMEM,
>                                unplugged_inaccessible, ON_OFF_AUTO_ON),
> -#endif
>        DEFINE_PROP_BOOL(VIRTIO_MEM_EARLY_MIGRATION_PROP, VirtIOMEM,
> ---
> 
> but I thought either you didn't like the approach or it was too early
> to propose for the API, so I went back to strcmp.
> 

At this point, I would like to focus on having a first version of 
TargetInfo API, and not reviewing any other changes, as things may be 
modified, and they would need to be reviewed again. It's hard to follow 
the same abstraction done multiple times in multiple series.

Regarding your proposal for target_system_arch(), I understand that you 
tried to reuse the existing SysEmuTarget, which was a good intention.
However, I don't think we should use any string compare for this (which 
qemu_api_parse does). It has several flaws:
- The most important one: it can fail (what if -1 is returned?). Enums 
can be guaranteed and exhaustive at compile time.
- It's slower than having the current arch directly known at compile time.
As well, since SysEmuTarget is a generated enum, it makes it much harder 
to follow code IMHO.
QAPI requires those things to be defined from a json file for external 
usage, but it's not a good reason for being forced to use it in all the 
codebase as the only possible abstraction.

To have something fast and infallible, we can adopt this solution:

In target_info.h:

/* Named TargetArch to not clash with poisoned TARGET_X */
typedef enum TargetArch {
     TARGET_ARCH_AARCH64,
     TARGET_ARCH_ALPHA,
     TARGET_ARCH_ARM,
     TARGET_ARCH_AVR,
     TARGET_ARCH_HPPA,
     TARGET_ARCH_I386,
     TARGET_ARCH_LOONGARCH64,
     TARGET_ARCH_M68K,
     TARGET_ARCH_MICROBLAZE,
     TARGET_ARCH_MICROBLAZEEL,
     TARGET_ARCH_MIPS,
     TARGET_ARCH_MIPS64,
     TARGET_ARCH_MIPS64EL,
     TARGET_ARCH_MIPSEL,
     TARGET_ARCH_OR1K,
     TARGET_ARCH_PPC,
     TARGET_ARCH_PPC64,
     TARGET_ARCH_RISCV32,
     TARGET_ARCH_RISCV64,
     TARGET_ARCH_RX,
     TARGET_ARCH_S390X,
     TARGET_ARCH_SH4,
     TARGET_ARCH_SH4EB,
     TARGET_ARCH_SPARC,
     TARGET_ARCH_SPARC64,
     TARGET_ARCH_TRICORE,
     TARGET_ARCH_X86_64,
     TARGET_ARCH_XTENSA,
     TARGET_ARCH_XTENSAEB,
} TargetArch;

typedef struct TargetInfo {
...
	TargetArch target_arch;
...
}

static inline target_arch() {
	return target_info()->target_arch;
}

static inline target_aarch64() {
	return target_arch() == TARGET_ARCH_AARCH64;
}


In target_info-stub.c:

#ifdef TARGET_AARCH64
# define TARGET_ARCH TARGET_ARCH_AARCH64
#elif TARGET_ARCH_ALPHA
# define TARGET_ARCH TARGET_ARCH_ALPHA
...
#endif

static const TargetInfo target_info_stub = {
     ...
     .target_arch = TARGET_ARCH;
     ...
}

Re: [RFC PATCH v3 13/14] qemu/target_info: Add target_aarch64() helper

[Markus Armbruster]

Pierrick Bouvier <pierrick.bouvier@linaro.org> writes:

[...]

> At this point, I would like to focus on having a first version of TargetInfo API, and not reviewing any other changes, as things may be modified, and they would need to be reviewed again. It's hard to follow the same abstraction done multiple times in multiple series.
>
> Regarding your proposal for target_system_arch(), I understand that you tried to reuse the existing SysEmuTarget, which was a good intention.
> However, I don't think we should use any string compare for this (which qemu_api_parse does). It has several flaws:

qemu_api_parse()?  Do you mean qapi_enum_parse()?

> - The most important one: it can fail (what if -1 is returned?). Enums can be guaranteed and exhaustive at compile time.
> - It's slower than having the current arch directly known at compile time.
> As well, since SysEmuTarget is a generated enum, it makes it much harder to follow code IMHO.
> QAPI requires those things to be defined from a json file for external usage, but it's not a good reason for being forced to use it in all the codebase as the only possible abstraction.
>
> To have something fast and infallible, we can adopt this solution:
>
> In target_info.h:
>
> /* Named TargetArch to not clash with poisoned TARGET_X */
> typedef enum TargetArch {
>     TARGET_ARCH_AARCH64,
>     TARGET_ARCH_ALPHA,
>     TARGET_ARCH_ARM,
>     TARGET_ARCH_AVR,
>     TARGET_ARCH_HPPA,
>     TARGET_ARCH_I386,
>     TARGET_ARCH_LOONGARCH64,
>     TARGET_ARCH_M68K,
>     TARGET_ARCH_MICROBLAZE,
>     TARGET_ARCH_MICROBLAZEEL,
>     TARGET_ARCH_MIPS,
>     TARGET_ARCH_MIPS64,
>     TARGET_ARCH_MIPS64EL,
>     TARGET_ARCH_MIPSEL,
>     TARGET_ARCH_OR1K,
>     TARGET_ARCH_PPC,
>     TARGET_ARCH_PPC64,
>     TARGET_ARCH_RISCV32,
>     TARGET_ARCH_RISCV64,
>     TARGET_ARCH_RX,
>     TARGET_ARCH_S390X,
>     TARGET_ARCH_SH4,
>     TARGET_ARCH_SH4EB,
>     TARGET_ARCH_SPARC,
>     TARGET_ARCH_SPARC64,
>     TARGET_ARCH_TRICORE,
>     TARGET_ARCH_X86_64,
>     TARGET_ARCH_XTENSA,
>     TARGET_ARCH_XTENSAEB,
> } TargetArch;

Effectively duplicates generated enum SysEmuTarget.  Can you explain why
that's useful?

>
> typedef struct TargetInfo {
> ...
> 	TargetArch target_arch;
> ...
> }
>
> static inline target_arch() {
> 	return target_info()->target_arch;
> }
>
> static inline target_aarch64() {
> 	return target_arch() == TARGET_ARCH_AARCH64;
> }
>
>
> In target_info-stub.c:
>
> #ifdef TARGET_AARCH64
> # define TARGET_ARCH TARGET_ARCH_AARCH64
> #elif TARGET_ARCH_ALPHA
> # define TARGET_ARCH TARGET_ARCH_ALPHA
> ...
> #endif
>
> static const TargetInfo target_info_stub = {
>     ...
>     .target_arch = TARGET_ARCH;
>     ...
> }

Re: [RFC PATCH v3 13/14] qemu/target_info: Add target_aarch64() helper

[Pierrick Bouvier]

On 4/21/25 23:04, Markus Armbruster wrote:
> Pierrick Bouvier <pierrick.bouvier@linaro.org> writes:
> 
> [...]
> 
>> At this point, I would like to focus on having a first version of TargetInfo API, and not reviewing any other changes, as things may be modified, and they would need to be reviewed again. It's hard to follow the same abstraction done multiple times in multiple series.
>>
>> Regarding your proposal for target_system_arch(), I understand that you tried to reuse the existing SysEmuTarget, which was a good intention.
>> However, I don't think we should use any string compare for this (which qemu_api_parse does). It has several flaws:
> 
> qemu_api_parse()?  Do you mean qapi_enum_parse()?
> 

Yes, sorry for the typo.

>> - The most important one: it can fail (what if -1 is returned?). Enums can be guaranteed and exhaustive at compile time.
>> - It's slower than having the current arch directly known at compile time.
>> As well, since SysEmuTarget is a generated enum, it makes it much harder to follow code IMHO.
>> QAPI requires those things to be defined from a json file for external usage, but it's not a good reason for being forced to use it in all the codebase as the only possible abstraction.
>>
>> To have something fast and infallible, we can adopt this solution:
>>
>> In target_info.h:
>>
>> /* Named TargetArch to not clash with poisoned TARGET_X */
>> typedef enum TargetArch {
>>      TARGET_ARCH_AARCH64,
>>      TARGET_ARCH_ALPHA,
>>      TARGET_ARCH_ARM,
>>      TARGET_ARCH_AVR,
>>      TARGET_ARCH_HPPA,
>>      TARGET_ARCH_I386,
>>      TARGET_ARCH_LOONGARCH64,
>>      TARGET_ARCH_M68K,
>>      TARGET_ARCH_MICROBLAZE,
>>      TARGET_ARCH_MICROBLAZEEL,
>>      TARGET_ARCH_MIPS,
>>      TARGET_ARCH_MIPS64,
>>      TARGET_ARCH_MIPS64EL,
>>      TARGET_ARCH_MIPSEL,
>>      TARGET_ARCH_OR1K,
>>      TARGET_ARCH_PPC,
>>      TARGET_ARCH_PPC64,
>>      TARGET_ARCH_RISCV32,
>>      TARGET_ARCH_RISCV64,
>>      TARGET_ARCH_RX,
>>      TARGET_ARCH_S390X,
>>      TARGET_ARCH_SH4,
>>      TARGET_ARCH_SH4EB,
>>      TARGET_ARCH_SPARC,
>>      TARGET_ARCH_SPARC64,
>>      TARGET_ARCH_TRICORE,
>>      TARGET_ARCH_X86_64,
>>      TARGET_ARCH_XTENSA,
>>      TARGET_ARCH_XTENSAEB,
>> } TargetArch;
> 
> Effectively duplicates generated enum SysEmuTarget.  Can you explain why
> that's useful?
> 

In terms of code, it doesn't change anything. we could reuse SysEmuTarget.
I just think it's more clear to have the enum defined next to the 
structure using it, compared to have this buried in generated code that 
can't be grepped easily.
(git grep SYS_EMU returns nothing, so people have to remember it's 
converted from a Json, and that naming is different).
IMHO, DRY principle should not always be followed blindly when it hurts 
code readability.

That said, my editor is able to find the generated definition as well, 
so I don't really mind reusing SysEmuTarget if we think the code 
readability is not worth the duplication.

However, I think it's a problem to compare strings to find this, when it 
can be set at compile time, in a file that will have to stay target 
specific anyway.

>>
>> typedef struct TargetInfo {
>> ...
>> 	TargetArch target_arch;
>> ...
>> }
>>
>> static inline target_arch() {
>> 	return target_info()->target_arch;
>> }
>>
>> static inline target_aarch64() {
>> 	return target_arch() == TARGET_ARCH_AARCH64;
>> }
>>
>>
>> In target_info-stub.c:
>>
>> #ifdef TARGET_AARCH64
>> # define TARGET_ARCH TARGET_ARCH_AARCH64
>> #elif TARGET_ARCH_ALPHA
>> # define TARGET_ARCH TARGET_ARCH_ALPHA
>> ...
>> #endif
>>
>> static const TargetInfo target_info_stub = {
>>      ...
>>      .target_arch = TARGET_ARCH;
>>      ...
>> }
> 

Re: [RFC PATCH v3 13/14] qemu/target_info: Add target_aarch64() helper

[Markus Armbruster]

Pierrick Bouvier <pierrick.bouvier@linaro.org> writes:

> On 4/21/25 23:04, Markus Armbruster wrote:
>> Pierrick Bouvier <pierrick.bouvier@linaro.org> writes:
>> [...]
>> 
>>> At this point, I would like to focus on having a first version of TargetInfo API, and not reviewing any other changes, as things may be modified, and they would need to be reviewed again. It's hard to follow the same abstraction done multiple times in multiple series.
>>>
>>> Regarding your proposal for target_system_arch(), I understand that you tried to reuse the existing SysEmuTarget, which was a good intention.
>>> However, I don't think we should use any string compare for this (which qemu_api_parse does). It has several flaws:
>> 
>> qemu_api_parse()?  Do you mean qapi_enum_parse()?
>
> Yes, sorry for the typo.
>
>>> - The most important one: it can fail (what if -1 is returned?). Enums can be guaranteed and exhaustive at compile time.
>>> - It's slower than having the current arch directly known at compile time.
>>> As well, since SysEmuTarget is a generated enum, it makes it much harder to follow code IMHO.
>>> QAPI requires those things to be defined from a json file for external usage, but it's not a good reason for being forced to use it in all the codebase as the only possible abstraction.
>>>
>>> To have something fast and infallible, we can adopt this solution:
>>>
>>> In target_info.h:
>>>
>>> /* Named TargetArch to not clash with poisoned TARGET_X */
>>> typedef enum TargetArch {
>>>      TARGET_ARCH_AARCH64,
>>>      TARGET_ARCH_ALPHA,
>>>      TARGET_ARCH_ARM,
>>>      TARGET_ARCH_AVR,
>>>      TARGET_ARCH_HPPA,
>>>      TARGET_ARCH_I386,
>>>      TARGET_ARCH_LOONGARCH64,
>>>      TARGET_ARCH_M68K,
>>>      TARGET_ARCH_MICROBLAZE,
>>>      TARGET_ARCH_MICROBLAZEEL,
>>>      TARGET_ARCH_MIPS,
>>>      TARGET_ARCH_MIPS64,
>>>      TARGET_ARCH_MIPS64EL,
>>>      TARGET_ARCH_MIPSEL,
>>>      TARGET_ARCH_OR1K,
>>>      TARGET_ARCH_PPC,
>>>      TARGET_ARCH_PPC64,
>>>      TARGET_ARCH_RISCV32,
>>>      TARGET_ARCH_RISCV64,
>>>      TARGET_ARCH_RX,
>>>      TARGET_ARCH_S390X,
>>>      TARGET_ARCH_SH4,
>>>      TARGET_ARCH_SH4EB,
>>>      TARGET_ARCH_SPARC,
>>>      TARGET_ARCH_SPARC64,
>>>      TARGET_ARCH_TRICORE,
>>>      TARGET_ARCH_X86_64,
>>>      TARGET_ARCH_XTENSA,
>>>      TARGET_ARCH_XTENSAEB,
>>> } TargetArch;
>> 
>> Effectively duplicates generated enum SysEmuTarget.  Can you explain why
>> that's useful?
>
> In terms of code, it doesn't change anything. we could reuse SysEmuTarget.
> I just think it's more clear to have the enum defined next to the structure using it, compared to have this buried in generated code that can't be grepped easily.
> (git grep SYS_EMU returns nothing, so people have to remember it's converted from a Json, and that naming is different).

Yes, that's unfortunate, but we don't duplicate other QAPI enums because
of it.

> IMHO, DRY principle should not always be followed blindly when it hurts code readability.

Treating DRY as dogma would be foolish.

> That said, my editor is able to find the generated definition as well, so I don't really mind reusing SysEmuTarget if we think the code readability is not worth the duplication.

It's not just the duplication, it's also the conversion between the two
enums.

> However, I think it's a problem to compare strings to find this, when it can be set at compile time, in a file that will have to stay target specific anyway.

Converting from string to enum at first practical opportunity makes the
code simpler more often than not.


[...]

Re: [RFC PATCH v3 13/14] qemu/target_info: Add target_aarch64() helper

[Pierrick Bouvier]

On 4/22/25 11:24, Markus Armbruster wrote:
>>> Effectively duplicates generated enum SysEmuTarget.  Can you explain why
>>> that's useful?
>>
>> In terms of code, it doesn't change anything. we could reuse SysEmuTarget.
>> I just think it's more clear to have the enum defined next to the structure using it, compared to have this buried in generated code that can't be grepped easily.
>> (git grep SYS_EMU returns nothing, so people have to remember it's converted from a Json, and that naming is different).
> 
> Yes, that's unfortunate, but we don't duplicate other QAPI enums because
> of it.
> 

Fine for me if it's the consensus we already have in QEMU, no one 
mentioned it until your answer.

>> IMHO, DRY principle should not always be followed blindly when it hurts code readability.
> 
> Treating DRY as dogma would be foolish.
> 

I agree, alas, it tends to be treated as such, even unintentionally, 
when people spend too much time on the same code/file.

>> That said, my editor is able to find the generated definition as well, so I don't really mind reusing SysEmuTarget if we think the code readability is not worth the duplication.
> 
> It's not just the duplication, it's also the conversion between the two
> enums.
> 
>> However, I think it's a problem to compare strings to find this, when it can be set at compile time, in a file that will have to stay target specific anyway.
> 
> Converting from string to enum at first practical opportunity makes the
> code simpler more often than not.
> 

Sure, it's not what is done in the v4 anymore, so it's fine.

> 
> [...]
> 

[RFC PATCH v3 14/14] hw/arm/virt: Replace TARGET_AARCH64 -> target_aarch64()

[Philippe Mathieu-Daudé]

Replace the target-specific TARGET_AARCH64 definition
by a call to the generic target_aarch64() helper.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
This removes the last TARGET_AARCH64 in hw/arm/.
---
 hw/arm/virt.c | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 48a0c3588ce..d5bb9cf0e8f 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -32,6 +32,7 @@
 #include "qemu/datadir.h"
 #include "qemu/units.h"
 #include "qemu/option.h"
+#include "qemu/target_info.h"
 #include "monitor/qdev.h"
 #include "hw/sysbus.h"
 #include "hw/arm/boot.h"
@@ -3138,7 +3139,7 @@ static void virt_machine_class_init(ObjectClass *oc, void *data)
 #ifdef CONFIG_TCG
     machine_class_add_valid_cpu_type(mc, ARM_CPU_TYPE_NAME("cortex-a7"));
     machine_class_add_valid_cpu_type(mc, ARM_CPU_TYPE_NAME("cortex-a15"));
-#ifdef TARGET_AARCH64
+    if (target_aarch64()) {
         machine_class_add_valid_cpu_type(mc, ARM_CPU_TYPE_NAME("cortex-a35"));
         machine_class_add_valid_cpu_type(mc, ARM_CPU_TYPE_NAME("cortex-a55"));
         machine_class_add_valid_cpu_type(mc, ARM_CPU_TYPE_NAME("cortex-a72"));
@@ -3148,15 +3149,15 @@ static void virt_machine_class_init(ObjectClass *oc, void *data)
         machine_class_add_valid_cpu_type(mc, ARM_CPU_TYPE_NAME("neoverse-n1"));
         machine_class_add_valid_cpu_type(mc, ARM_CPU_TYPE_NAME("neoverse-v1"));
         machine_class_add_valid_cpu_type(mc, ARM_CPU_TYPE_NAME("neoverse-n2"));
-#endif /* TARGET_AARCH64 */
+    }
 #endif /* CONFIG_TCG */
-#ifdef TARGET_AARCH64
+    if (target_aarch64()) {
         machine_class_add_valid_cpu_type(mc, ARM_CPU_TYPE_NAME("cortex-a53"));
         machine_class_add_valid_cpu_type(mc, ARM_CPU_TYPE_NAME("cortex-a57"));
 #if defined(CONFIG_KVM) || defined(CONFIG_HVF)
         machine_class_add_valid_cpu_type(mc, ARM_CPU_TYPE_NAME("host"));
 #endif /* CONFIG_KVM || CONFIG_HVF */
-#endif /* TARGET_AARCH64 */
+    }
     machine_class_add_valid_cpu_type(mc, ARM_CPU_TYPE_NAME("max"));
 
     mc->init = machvirt_init;
-- 
2.47.1