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From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org, Richard Henderson <richard.henderson@linaro.org>
Cc: "Pierrick Bouvier" <pierrick.bouvier@linaro.org>,
	"Paolo Bonzini" <pbonzini@redhat.com>,
	"Philippe Mathieu-Daudé" <philmd@linaro.org>
Subject: [PATCH v2 10/13] physmem: Move TCG IOMMU methods around
Date: Thu, 24 Apr 2025 11:46:50 +0200	[thread overview]
Message-ID: <20250424094653.35932-11-philmd@linaro.org> (raw)
In-Reply-To: <20250424094653.35932-1-philmd@linaro.org>

The next commit will restrict TCG specific code in physmem.c
using some #ifdef'ry. In order to keep it simple, move
iotlb_to_section() and memory_region_section_get_iotlb()
around close together.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
 system/physmem.c | 50 ++++++++++++++++++++++++------------------------
 1 file changed, 25 insertions(+), 25 deletions(-)

diff --git a/system/physmem.c b/system/physmem.c
index 637f2d85324..ccbeae241c4 100644
--- a/system/physmem.c
+++ b/system/physmem.c
@@ -746,6 +746,31 @@ translate_fail:
     return &d->map.sections[PHYS_SECTION_UNASSIGNED];
 }
 
+MemoryRegionSection *iotlb_to_section(CPUState *cpu,
+                                      hwaddr index, MemTxAttrs attrs)
+{
+    int asidx = cpu_asidx_from_attrs(cpu, attrs);
+    CPUAddressSpace *cpuas = &cpu->cpu_ases[asidx];
+    AddressSpaceDispatch *d = cpuas->memory_dispatch;
+    int section_index = index & ~TARGET_PAGE_MASK;
+    MemoryRegionSection *ret;
+
+    assert(section_index < d->map.sections_nb);
+    ret = d->map.sections + section_index;
+    assert(ret->mr);
+    assert(ret->mr->ops);
+
+    return ret;
+}
+
+/* Called from RCU critical section */
+hwaddr memory_region_section_get_iotlb(CPUState *cpu,
+                                       MemoryRegionSection *section)
+{
+    AddressSpaceDispatch *d = flatview_to_dispatch(section->fv);
+    return section - d->map.sections;
+}
+
 void cpu_address_space_init(CPUState *cpu, int asidx,
                             const char *prefix, MemoryRegion *mr)
 {
@@ -1002,14 +1027,6 @@ bool cpu_physical_memory_snapshot_get_dirty(DirtyBitmapSnapshot *snap,
     return false;
 }
 
-/* Called from RCU critical section */
-hwaddr memory_region_section_get_iotlb(CPUState *cpu,
-                                       MemoryRegionSection *section)
-{
-    AddressSpaceDispatch *d = flatview_to_dispatch(section->fv);
-    return section - d->map.sections;
-}
-
 static int subpage_register(subpage_t *mmio, uint32_t start, uint32_t end,
                             uint16_t section);
 static subpage_t *subpage_init(FlatView *fv, hwaddr base);
@@ -2669,23 +2686,6 @@ static uint16_t dummy_section(PhysPageMap *map, FlatView *fv, MemoryRegion *mr)
     return phys_section_add(map, &section);
 }
 
-MemoryRegionSection *iotlb_to_section(CPUState *cpu,
-                                      hwaddr index, MemTxAttrs attrs)
-{
-    int asidx = cpu_asidx_from_attrs(cpu, attrs);
-    CPUAddressSpace *cpuas = &cpu->cpu_ases[asidx];
-    AddressSpaceDispatch *d = cpuas->memory_dispatch;
-    int section_index = index & ~TARGET_PAGE_MASK;
-    MemoryRegionSection *ret;
-
-    assert(section_index < d->map.sections_nb);
-    ret = d->map.sections + section_index;
-    assert(ret->mr);
-    assert(ret->mr->ops);
-
-    return ret;
-}
-
 static void io_mem_init(void)
 {
     memory_region_init_io(&io_mem_unassigned, NULL, &unassigned_mem_ops, NULL,
-- 
2.47.1



  parent reply	other threads:[~2025-04-24  9:48 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-04-24  9:46 [PATCH v2 00/13] include: Remove "exec/exec-all.h" Philippe Mathieu-Daudé
2025-04-24  9:46 ` [PATCH v2 01/13] accel/tcg: Use vaddr for walk_memory_regions callback Philippe Mathieu-Daudé
2025-04-24  9:46 ` [PATCH v2 02/13] accel/tcg: Use vaddr in user/page-protection.h Philippe Mathieu-Daudé
2025-04-24  9:46 ` [PATCH v2 03/13] accel/tcg: Correct list of included headers in tcg-stub.c Philippe Mathieu-Daudé
2025-04-24 10:10   ` Mark Cave-Ayland
2025-04-24  9:46 ` [PATCH v2 04/13] include/exec: Include missing headers in exec-all.h Philippe Mathieu-Daudé
2025-04-24 10:11   ` Mark Cave-Ayland
2025-04-24  9:46 ` [PATCH v2 05/13] include/exec: Move tb_invalidate_phys_range to translation-block.h Philippe Mathieu-Daudé
2025-04-24  9:46 ` [PATCH v2 06/13] accel/tcg: Compile tb-maint.c twice Philippe Mathieu-Daudé
2025-04-24  9:46 ` [PATCH v2 07/13] target/riscv: Include missing 'accel/tcg/getpc.h' in csr.c Philippe Mathieu-Daudé
2025-04-24  9:50   ` Philippe Mathieu-Daudé
2025-04-24 10:14   ` Mark Cave-Ayland
2025-04-24 20:13     ` Philippe Mathieu-Daudé
2025-04-24 21:01       ` Richard Henderson
2025-04-24 10:23   ` Alistair Francis
2025-04-24  9:46 ` [PATCH v2 08/13] target/hexagon: Include missing 'accel/tcg/getpc.h' Philippe Mathieu-Daudé
2025-04-24 10:15   ` Mark Cave-Ayland
2025-04-24 14:35   ` Brian Cain
2025-04-24  9:46 ` [PATCH v2 09/13] accel/tcg: Include 'accel/tcg/getpc.h' in 'exec/helper-proto' Philippe Mathieu-Daudé
2025-04-24 10:21   ` Mark Cave-Ayland
2025-04-24 11:23     ` Philippe Mathieu-Daudé
2025-04-24 20:09       ` Philippe Mathieu-Daudé
2025-04-24  9:46 ` Philippe Mathieu-Daudé [this message]
2025-04-24 10:23   ` [PATCH v2 10/13] physmem: Move TCG IOMMU methods around Mark Cave-Ayland
2025-04-24  9:46 ` [PATCH v2 11/13] physmem: Restrict TCG IOMMU code to TCG accel Philippe Mathieu-Daudé
2025-04-24 10:25   ` Mark Cave-Ayland
2025-04-24  9:46 ` [PATCH v2 12/13] accel/tcg: Extract probe API out of 'exec/exec-all.h' Philippe Mathieu-Daudé
2025-04-24  9:50   ` Philippe Mathieu-Daudé
2025-04-24 10:30   ` Mark Cave-Ayland
2025-04-24 17:21   ` Richard Henderson
2025-04-24  9:46 ` [PATCH v2 13/13] include: Remove 'exec/exec-all.h' Philippe Mathieu-Daudé
2025-04-24 10:32   ` Mark Cave-Ayland

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