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From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: Pierrick Bouvier <pierrick.bouvier@linaro.org>,
	Richard Henderson <richard.henderson@linaro.org>,
	qemu-devel@nongnu.org
Cc: "Mark Cave-Ayland" <mark.caveayland@nutanix.com>,
	"Anton Johansson" <anjo@rev.ng>,
	"Philippe Mathieu-Daudé" <philmd@linaro.org>
Subject: [RFC PATCH v5 14/21] hw/core/machine: Allow dynamic registration of valid CPU types
Date: Fri, 25 Apr 2025 00:21:05 +0200	[thread overview]
Message-ID: <20250424222112.36194-15-philmd@linaro.org> (raw)
In-Reply-To: <20250424222112.36194-1-philmd@linaro.org>

Add MachineClass::get_valid_cpu_types(), a helper that
returns a dynamic list of CPU types. Since the helper
takes a MachineState argument, we know the machine is
created by the time we call it.

Suggested-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 include/hw/boards.h |  4 ++++
 hw/core/machine.c   | 26 ++++++++++++++++++++++++++
 2 files changed, 30 insertions(+)

diff --git a/include/hw/boards.h b/include/hw/boards.h
index 3573907d597..700e4f4ccf3 100644
--- a/include/hw/boards.h
+++ b/include/hw/boards.h
@@ -259,6 +259,9 @@ typedef struct {
  * @smbios_memory_device_size:
  *    Default size of memory device,
  *    SMBIOS 3.1.0 "7.18 Memory Device (Type 17)"
+ * @get_valid_cpu_types:
+ *    Returns a list of valid CPU types for this board. May be NULL
+ *    if not needed.
  */
 struct MachineClass {
     /*< private >*/
@@ -306,6 +309,7 @@ struct MachineClass {
     bool ignore_memory_transaction_failures;
     int numa_mem_align_shift;
     const char * const *valid_cpu_types;
+    GPtrArray *(*get_valid_cpu_types)(const MachineState *ms);
     strList *allowed_dynamic_sysbus_devices;
     bool auto_enable_numa_with_memhp;
     bool auto_enable_numa_with_memdev;
diff --git a/hw/core/machine.c b/hw/core/machine.c
index ed01798d37c..0901a92b32a 100644
--- a/hw/core/machine.c
+++ b/hw/core/machine.c
@@ -1581,6 +1581,32 @@ static bool is_cpu_type_supported(const MachineState *machine, Error **errp)
                 error_append_hint(errp, "\n");
             }
 
+            return false;
+        }
+    } else if (mc->get_valid_cpu_types) {
+        GPtrArray *vct = mc->get_valid_cpu_types(machine);
+        bool valid = false;
+
+        for (i = 0; i < vct->len; i++) {
+            if (object_class_dynamic_cast(oc, vct->pdata[i])) {
+                valid = true;
+                break;
+            }
+        }
+
+        if (!valid) {
+            g_autofree char *requested = cpu_model_from_type(machine->cpu_type);
+
+            error_setg(errp, "Invalid CPU model: %s", requested);
+            error_append_hint(errp, "The valid models are: ");
+            for (i = 0; i < vct->len; i++) {
+                g_autofree char *model = cpu_model_from_type(vct->pdata[i]);
+                error_append_hint(errp, "%s%s",
+                                  model, i + 1 == vct->len ? "\n" : ", ");
+            }
+        }
+        g_ptr_array_free(vct, true);
+        if (!valid) {
             return false;
         }
     }
-- 
2.47.1



  parent reply	other threads:[~2025-04-24 22:22 UTC|newest]

Thread overview: 47+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-04-24 22:20 [RFC PATCH v5 00/21] single-binary: Make hw/arm/ common Philippe Mathieu-Daudé
2025-04-24 22:20 ` [RFC PATCH v5 01/21] qapi: Rename TargetInfo structure as QemuTargetInfo Philippe Mathieu-Daudé
2025-04-24 22:20 ` [RFC PATCH v5 02/21] qemu: Convert target_name() to TargetInfo API Philippe Mathieu-Daudé
2025-04-24 22:20 ` [RFC PATCH v5 03/21] system/vl: Filter machine list available for a particular target binary Philippe Mathieu-Daudé
2025-04-24 22:20 ` [RFC PATCH v5 04/21] hw/core/null-machine: Define machine as generic QOM type Philippe Mathieu-Daudé
2025-04-24 22:30   ` Pierrick Bouvier
2025-04-24 22:47     ` Philippe Mathieu-Daudé
2025-04-24 22:49       ` Pierrick Bouvier
2025-04-24 22:20 ` [RFC PATCH v5 05/21] hw/arm: Register TYPE_TARGET_ARM/AARCH64_MACHINE QOM interfaces Philippe Mathieu-Daudé
2025-04-24 22:20 ` [RFC PATCH v5 06/21] hw/core: Allow ARM/Aarch64 binaries to use the 'none' machine Philippe Mathieu-Daudé
2025-04-24 22:20 ` [RFC PATCH v5 07/21] hw/boards: Introduce DEFINE_MACHINE_WITH_INTERFACES() macro Philippe Mathieu-Daudé
2025-04-24 22:44   ` Pierrick Bouvier
2025-04-24 22:20 ` [RFC PATCH v5 08/21] hw/arm: Add DEFINE_MACHINE_[ARM_]AARCH64() macros Philippe Mathieu-Daudé
2025-04-24 22:35   ` Pierrick Bouvier
2025-04-24 22:45     ` Philippe Mathieu-Daudé
2025-04-25  0:16   ` BALATON Zoltan
2025-04-25  6:05     ` Pierrick Bouvier
2025-04-25  9:43       ` BALATON Zoltan
2025-04-25 20:05         ` Pierrick Bouvier
2025-04-25 20:29           ` BALATON Zoltan
2025-04-25 20:36             ` Pierrick Bouvier
2025-04-28  6:52               ` Philippe Mathieu-Daudé
2025-04-28 10:31                 ` BALATON Zoltan
2025-04-28 16:47                   ` Pierrick Bouvier
2025-04-28 18:44                     ` BALATON Zoltan
2025-04-28 19:09                       ` Pierrick Bouvier
2025-04-29  1:10                         ` BALATON Zoltan
2025-04-29  1:21                           ` Pierrick Bouvier
2025-05-01 23:35                             ` BALATON Zoltan
2025-05-03 19:38                               ` Pierrick Bouvier
2025-04-24 22:21 ` [RFC PATCH v5 09/21] hw/arm: Filter machine types for qemu-system-arm/aarch64 binaries Philippe Mathieu-Daudé
2025-04-24 22:21 ` [RFC PATCH v5 10/21] meson: Prepare to accept per-binary TargetInfo structure implementation Philippe Mathieu-Daudé
2025-04-24 22:21 ` [RFC PATCH v5 11/21] config/target: Implement per-binary TargetInfo structure (ARM, AARCH64) Philippe Mathieu-Daudé
2025-04-24 22:21 ` [RFC PATCH v5 12/21] hw/arm/aspeed: Build objects once Philippe Mathieu-Daudé
2025-04-24 22:21 ` [RFC PATCH v5 13/21] hw/arm/raspi: " Philippe Mathieu-Daudé
2025-04-24 22:21 ` Philippe Mathieu-Daudé [this message]
2025-04-24 22:43   ` [RFC PATCH v5 14/21] hw/core/machine: Allow dynamic registration of valid CPU types Pierrick Bouvier
2025-04-24 22:21 ` [RFC PATCH v5 15/21] hw/arm/virt: Register valid CPU types dynamically Philippe Mathieu-Daudé
2025-04-24 22:38   ` Pierrick Bouvier
2025-04-24 22:21 ` [RFC PATCH v5 16/21] hw/arm/virt: Check accelerator availability at runtime Philippe Mathieu-Daudé
2025-04-24 22:39   ` Pierrick Bouvier
2025-04-24 22:21 ` [RFC PATCH v5 17/21] qemu/target_info: Add %target_arch field to TargetInfo Philippe Mathieu-Daudé
2025-04-24 22:21 ` [RFC PATCH v5 18/21] qemu/target_info: Add target_aarch64() helper Philippe Mathieu-Daudé
2025-04-24 22:21 ` [RFC PATCH v5 19/21] hw/arm/virt: Replace TARGET_AARCH64 -> target_aarch64() Philippe Mathieu-Daudé
2025-04-24 22:21 ` [RFC PATCH v5 20/21] hw/core: Introduce MachineClass::get_default_cpu_type() helper Philippe Mathieu-Daudé
2025-04-24 22:21 ` [RFC PATCH v5 21/21] hw/arm/virt: Get default CPU type at runtime Philippe Mathieu-Daudé
2025-04-28  3:19   ` Zhang Chen

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