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From: Andrew Jones <ajones@ventanamicro.com>
To: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org,
	alistair.francis@wdc.com,  liwei1518@gmail.com,
	zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com
Subject: Re: [PATCH v3 8/9] target/riscv: widen scounteren to target_ulong
Date: Fri, 25 Apr 2025 18:43:11 +0200	[thread overview]
Message-ID: <20250425-14cba750e7a8932b576b69d9@orel> (raw)
In-Reply-To: <20250425160203.2774835-9-dbarboza@ventanamicro.com>

On Fri, Apr 25, 2025 at 01:02:02PM -0300, Daniel Henrique Barboza wrote:
> We want to support scounteren as a KVM CSR. The KVM UAPI defines every
> CSR size as target_ulong, and our env->scounteren is fixed at 32 bits.
> 
> The other existing cases where the property size does not match the KVM
> reg size happens with uint64_t properties, like 'mstatus'. When running
> a 32 bit CPU we'll write a 32 bit 'sstatus' KVM reg into the 64 bit
> 'mstatus' field. As long as we're consistent, i.e. we're always
> reading/writing the same words, this is ok.
> 
> For scounteren, a KVM guest running in a 64 bit CPU will end up writing
> a 64 bit reg in a 32 bit field. This will have all sort of funny side
> effects in the KVM guest that we would rather avoid.
> 
> Increase scounteren to target_ulong to allow KVM to read/write the
> scounteren CSR without any surprises.
> 
> Aside from bumping the version of the RISCVCPU vmstate no other
> behavioral changes are expected.
> 
> Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
> ---
>  target/riscv/cpu.h     | 9 ++++++++-
>  target/riscv/machine.c | 6 +++---
>  2 files changed, 11 insertions(+), 4 deletions(-)
>

Reviewed-by: Andrew Jones <ajones@ventanamicro.com>


  reply	other threads:[~2025-04-25 16:44 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-04-25 16:01 [PATCH v3 0/9] target/riscv/kvm: CSR related fixes Daniel Henrique Barboza
2025-04-25 16:01 ` [PATCH v3 1/9] target/riscv/kvm: minor fixes/tweaks Daniel Henrique Barboza
2025-04-28 11:34   ` Alistair Francis
2025-04-25 16:01 ` [PATCH v3 2/9] target/riscv/kvm: fix leak in kvm_riscv_init_multiext_cfg() Daniel Henrique Barboza
2025-04-28 11:35   ` Alistair Francis
2025-04-25 16:01 ` [PATCH v3 3/9] target/riscv/kvm: turn u32/u64 reg functions into macros Daniel Henrique Barboza
2025-04-28 11:37   ` Alistair Francis
2025-04-25 16:01 ` [PATCH v3 4/9] target/riscv/kvm: turn kvm_riscv_reg_id_ulong() into a macro Daniel Henrique Barboza
2025-04-28 11:41   ` Alistair Francis
2025-04-25 16:01 ` [PATCH v3 5/9] target/riscv/kvm: add kvm_csr_cfgs[] Daniel Henrique Barboza
2025-04-28 11:44   ` Alistair Francis
2025-04-25 16:02 ` [PATCH v3 6/9] target/riscv/kvm: do not read unavailable CSRs Daniel Henrique Barboza
2025-04-25 16:02 ` [PATCH v3 7/9] target/riscv/kvm: add senvcfg CSR Daniel Henrique Barboza
2025-04-25 16:02 ` [PATCH v3 8/9] target/riscv: widen scounteren to target_ulong Daniel Henrique Barboza
2025-04-25 16:43   ` Andrew Jones [this message]
2025-04-27  5:59   ` Andrew Jones
2025-04-28 11:34     ` Daniel Henrique Barboza
2025-04-28 12:27     ` Daniel Henrique Barboza
2025-04-25 16:02 ` [PATCH v3 9/9] target/riscv/kvm: add scounteren CSR Daniel Henrique Barboza

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