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From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Philippe Mathieu-Daudé" <philmd@linaro.org>,
	"Richard Henderson" <richard.henderson@linaro.org>
Subject: [PULL 46/58] target/mips: Check CPU endianness at runtime using env_is_bigendian()
Date: Fri, 25 Apr 2025 17:28:30 +0200	[thread overview]
Message-ID: <20250425152843.69638-47-philmd@linaro.org> (raw)
In-Reply-To: <20250425152843.69638-1-philmd@linaro.org>

Since CPU endianness can be toggled at runtime before resetting,
checking the endianness at build time preprocessing the
TARGET_BIG_ENDIAN definition isn't correct. We have to call
mips_env_is_bigendian() to get the CPU endianness at runtime.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20250417131004.47205-4-philmd@linaro.org>
---
 target/mips/tcg/msa_helper.c | 34 ++++++++++++++++------------------
 1 file changed, 16 insertions(+), 18 deletions(-)

diff --git a/target/mips/tcg/msa_helper.c b/target/mips/tcg/msa_helper.c
index 14de4a71ff6..e349344647c 100644
--- a/target/mips/tcg/msa_helper.c
+++ b/target/mips/tcg/msa_helper.c
@@ -8212,7 +8212,6 @@ void helper_msa_ffint_u_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
 /* Element-by-element access macros */
 #define DF_ELEMENTS(df) (MSA_WRLEN / DF_BITS(df))
 
-#if TARGET_BIG_ENDIAN
 static inline uint64_t bswap16x4(uint64_t x)
 {
     uint64_t m = 0x00ff00ff00ff00ffull;
@@ -8223,7 +8222,6 @@ static inline uint64_t bswap32x2(uint64_t x)
 {
     return ror64(bswap64(x), 32);
 }
-#endif
 
 void helper_msa_ld_b(CPUMIPSState *env, uint32_t wd,
                      target_ulong addr)
@@ -8252,10 +8250,10 @@ void helper_msa_ld_h(CPUMIPSState *env, uint32_t wd,
      */
     d0 = cpu_ldq_le_data_ra(env, addr + 0, ra);
     d1 = cpu_ldq_le_data_ra(env, addr + 8, ra);
-#if TARGET_BIG_ENDIAN
-    d0 = bswap16x4(d0);
-    d1 = bswap16x4(d1);
-#endif
+    if (mips_env_is_bigendian(env)) {
+        d0 = bswap16x4(d0);
+        d1 = bswap16x4(d1);
+    }
     pwd->d[0] = d0;
     pwd->d[1] = d1;
 }
@@ -8273,10 +8271,10 @@ void helper_msa_ld_w(CPUMIPSState *env, uint32_t wd,
      */
     d0 = cpu_ldq_le_data_ra(env, addr + 0, ra);
     d1 = cpu_ldq_le_data_ra(env, addr + 8, ra);
-#if TARGET_BIG_ENDIAN
-    d0 = bswap32x2(d0);
-    d1 = bswap32x2(d1);
-#endif
+    if (mips_env_is_bigendian(env)) {
+        d0 = bswap32x2(d0);
+        d1 = bswap32x2(d1);
+    }
     pwd->d[0] = d0;
     pwd->d[1] = d1;
 }
@@ -8339,10 +8337,10 @@ void helper_msa_st_h(CPUMIPSState *env, uint32_t wd,
     /* Store 8 bytes at a time.  See helper_msa_ld_h. */
     d0 = pwd->d[0];
     d1 = pwd->d[1];
-#if TARGET_BIG_ENDIAN
-    d0 = bswap16x4(d0);
-    d1 = bswap16x4(d1);
-#endif
+    if (mips_env_is_bigendian(env)) {
+        d0 = bswap16x4(d0);
+        d1 = bswap16x4(d1);
+    }
     cpu_stq_le_data_ra(env, addr + 0, d0, ra);
     cpu_stq_le_data_ra(env, addr + 8, d1, ra);
 }
@@ -8360,10 +8358,10 @@ void helper_msa_st_w(CPUMIPSState *env, uint32_t wd,
     /* Store 8 bytes at a time.  See helper_msa_ld_w. */
     d0 = pwd->d[0];
     d1 = pwd->d[1];
-#if TARGET_BIG_ENDIAN
-    d0 = bswap32x2(d0);
-    d1 = bswap32x2(d1);
-#endif
+    if (mips_env_is_bigendian(env)) {
+        d0 = bswap32x2(d0);
+        d1 = bswap32x2(d1);
+    }
     cpu_stq_le_data_ra(env, addr + 0, d0, ra);
     cpu_stq_le_data_ra(env, addr + 8, d1, ra);
 }
-- 
2.47.1



  parent reply	other threads:[~2025-04-25 15:38 UTC|newest]

Thread overview: 69+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-04-25 15:27 [PULL 00/58] Misc single binary patches for 2025-04-25 Philippe Mathieu-Daudé
2025-04-25 15:27 ` [PULL 01/58] target/hexagon: Explode MO_TExx -> MO_TE | MO_xx Philippe Mathieu-Daudé
2025-04-25 15:27 ` [PULL 02/58] target/hexagon: Replace MO_TE -> MO_LE Philippe Mathieu-Daudé
2025-04-25 15:27 ` [PULL 03/58] target/i386: Replace MO_TE* -> MO_LE* Philippe Mathieu-Daudé
2025-04-25 15:27 ` [PULL 04/58] cpus: Introduce CPUClass::list_cpus() callback Philippe Mathieu-Daudé
2025-04-25 15:27 ` [PULL 05/58] target/i386: Register CPUClass:list_cpus Philippe Mathieu-Daudé
2025-04-25 15:27 ` [PULL 06/58] target/ppc: " Philippe Mathieu-Daudé
2025-04-25 15:27 ` [PULL 07/58] target/sparc: " Philippe Mathieu-Daudé
2025-04-25 15:27 ` [PULL 08/58] target/s390x: " Philippe Mathieu-Daudé
2025-04-25 15:27 ` [PULL 09/58] cpus: Remove #ifdef check on cpu_list definition Philippe Mathieu-Daudé
2025-04-25 15:27 ` [PULL 10/58] hw/pci-host/designware: Use deposit/extract API Philippe Mathieu-Daudé
2025-04-25 15:27 ` [PULL 11/58] hw/misc/edu: Convert type_init() -> DEFINE_TYPES() Philippe Mathieu-Daudé
2025-04-25 15:27 ` [PULL 12/58] qom: Have class_base_init() take a const data argument Philippe Mathieu-Daudé
2025-04-25 15:27 ` [PULL 14/58] qom: Constify TypeInfo::class_data Philippe Mathieu-Daudé
2025-04-25 15:27 ` [PULL 15/58] qom: Constify TypeInfo::interfaces Philippe Mathieu-Daudé
2025-04-25 15:28 ` [PULL 16/58] qom: Make InterfaceInfo[] uses const Philippe Mathieu-Daudé
2025-04-25 15:28 ` [PULL 17/58] qom/object: Fix type conflict of GLib function pointers Philippe Mathieu-Daudé
2025-04-25 15:28 ` [PULL 18/58] hw/core: Get default_cpu_type calling machine_class_default_cpu_type() Philippe Mathieu-Daudé
2025-04-25 15:28 ` [PULL 19/58] hw/core/cpu: gdb_arch_name string should not be freed Philippe Mathieu-Daudé
2025-04-25 15:28 ` [PULL 20/58] gdbstub: Allow gdb_core_xml_file to be set at runtime Philippe Mathieu-Daudé
2025-04-25 15:28 ` [PULL 21/58] target/arm: Handle AArch64 in TYPE_ARM_CPU gdb_arch_name Philippe Mathieu-Daudé
2025-04-25 15:28 ` [PULL 22/58] target/arm: Handle gdb_core_xml_file in TYPE_ARM_CPU Philippe Mathieu-Daudé
2025-04-25 15:28 ` [PULL 23/58] target/arm: Handle AArch64 gdb read/write regs " Philippe Mathieu-Daudé
2025-04-25 15:28 ` [PULL 24/58] target/arm: Replace target_ulong -> hwaddr in ARMMMUFaultInfo Philippe Mathieu-Daudé
2025-04-25 15:28 ` [PULL 25/58] target/arm: Replace target_ulong -> vaddr for CPUWatchpoint Philippe Mathieu-Daudé
2025-04-25 15:28 ` [PULL 26/58] target/mips: Fix MIPS16e translation Philippe Mathieu-Daudé
2025-04-25 15:28 ` [PULL 27/58] exec: Rename target_words_bigendian() -> target_big_endian() Philippe Mathieu-Daudé
2025-04-25 15:28 ` [PULL 28/58] hw/usb/hcd-xhci: Unmap canceled packet Philippe Mathieu-Daudé
2025-04-25 15:28 ` [PULL 29/58] hw/intc/i8259: Remove unused DEBUG_PIC define Philippe Mathieu-Daudé
2025-04-25 15:28 ` [PULL 30/58] hw/core/loader: Fix type conflict of GLib function pointers Philippe Mathieu-Daudé
2025-04-25 15:28 ` [PULL 31/58] hw/net/can: " Philippe Mathieu-Daudé
2025-04-25 15:28 ` [PULL 32/58] contrib/plugins: " Philippe Mathieu-Daudé
2025-04-25 15:28 ` [PULL 33/58] system/vl: " Philippe Mathieu-Daudé
2025-04-25 15:28 ` [PULL 34/58] system/memory: Remove DEVICE_HOST_ENDIAN definition Philippe Mathieu-Daudé
2025-04-25 15:28 ` [PULL 35/58] system/datadir: Add new type constant for DTB files Philippe Mathieu-Daudé
2025-04-25 15:28 ` [PULL 36/58] pc-bios: Move device tree files in their own subdir Philippe Mathieu-Daudé
2025-05-29 18:18   ` Bernhard Beschow
2025-05-30  0:54     ` BALATON Zoltan
2025-06-02  8:12       ` Philippe Mathieu-Daudé
2025-06-02 11:56         ` BALATON Zoltan
2025-06-03 11:25           ` Philippe Mathieu-Daudé
2025-06-03  6:39         ` Bernhard Beschow
2025-06-03 11:38           ` Thomas Huth
2025-06-04  9:59             ` Bernhard Beschow
2025-06-10 20:54               ` Bernhard Beschow
2025-06-03 12:58           ` BALATON Zoltan
2025-04-25 15:28 ` [PULL 37/58] meson: Use has_header_symbol() to check getcpu() Philippe Mathieu-Daudé
2025-04-25 15:28 ` [PULL 38/58] meson: Remove CONFIG_STATX and CONFIG_STATX_MNT_ID Philippe Mathieu-Daudé
2025-04-25 15:28 ` [PULL 39/58] meson: Share common C source prefixes Philippe Mathieu-Daudé
2025-04-25 15:28 ` [PULL 40/58] meson: Use osdep_prefix for strchrnul() Philippe Mathieu-Daudé
2025-04-25 15:28 ` [PULL 41/58] system/kvm: make functions accessible from common code Philippe Mathieu-Daudé
2025-04-25 15:28 ` [PULL 42/58] accel/tcg: Correct list of included headers in tcg-stub.c Philippe Mathieu-Daudé
2025-04-25 15:28 ` [PULL 43/58] target/hexagon: Include missing 'accel/tcg/getpc.h' Philippe Mathieu-Daudé
2025-04-25 15:28 ` [PULL 44/58] linux-user/elfload: Use target_needs_bswap() Philippe Mathieu-Daudé
2025-04-25 15:28 ` [PULL 45/58] accel/kvm: " Philippe Mathieu-Daudé
2025-04-25 15:28 ` Philippe Mathieu-Daudé [this message]
2025-04-25 15:28 ` [PULL 47/58] target/xtensa: Evaluate TARGET_BIG_ENDIAN at compile time Philippe Mathieu-Daudé
2025-04-25 15:28 ` [PULL 48/58] hw/mips: " Philippe Mathieu-Daudé
2025-04-25 15:28 ` [PULL 49/58] hw/microblaze: " Philippe Mathieu-Daudé
2025-04-25 15:28 ` [PULL 50/58] qapi: Rename TargetInfo structure as QemuTargetInfo Philippe Mathieu-Daudé
2025-04-25 15:28 ` [PULL 51/58] qemu: Introduce target_cpu_type() Philippe Mathieu-Daudé
2025-04-25 15:28 ` [PULL 52/58] cpus: Replace CPU_RESOLVING_TYPE -> target_cpu_type() Philippe Mathieu-Daudé
2025-04-25 15:28 ` [PULL 53/58] cpus: Move target-agnostic methods out of cpu-target.c Philippe Mathieu-Daudé
2025-04-25 15:28 ` [PULL 54/58] accel: Implement accel_init_ops_interfaces() for both system/user mode Philippe Mathieu-Daudé
2025-04-25 15:28 ` [PULL 55/58] accel: Include missing 'qemu/accel.h' header in accel-internal.h Philippe Mathieu-Daudé
2025-04-25 15:28 ` [PULL 56/58] accel: Make AccelCPUClass structure target-agnostic Philippe Mathieu-Daudé
2025-04-25 15:28 ` [PULL 57/58] accel: Move target-agnostic code from accel-target.c -> accel-common.c Philippe Mathieu-Daudé
2025-04-25 15:28 ` [PULL 58/58] qemu: Convert target_name() to TargetInfo API Philippe Mathieu-Daudé
2025-04-28 17:56 ` [PULL 00/58] Misc single binary patches for 2025-04-25 Stefan Hajnoczi

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