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* [PATCH 0/2] tcg/sparc64: Implement CTPOP
@ 2025-04-25 20:00 Richard Henderson
  2025-04-25 20:00 ` [PATCH 1/2] tcg/sparc64: Unexport use_vis3_instructions Richard Henderson
  2025-04-25 20:00 ` [PATCH 2/2] tcg/sparc64: Implement CTPOP Richard Henderson
  0 siblings, 2 replies; 5+ messages in thread
From: Richard Henderson @ 2025-04-25 20:00 UTC (permalink / raw)
  To: qemu-devel

Based-on: 20250415192515.232910-1-richard.henderson@linaro.org
("[PATCH v4 000/163] tcg: Convert to TCGOutOp structures")

The POPC instruction is present in all but the earliest sparc64 cpus.
Not sure why this got missed once upon a time...


r~

Richard Henderson (2):
  tcg/sparc64: Unexport use_vis3_instructions
  tcg/sparc64: Implement CTPOP

 tcg/sparc64/tcg-target-has.h |  6 ------
 tcg/sparc64/tcg-target.c.inc | 33 ++++++++++++++++++++++++++-------
 2 files changed, 26 insertions(+), 13 deletions(-)

-- 
2.43.0



^ permalink raw reply	[flat|nested] 5+ messages in thread

* [PATCH 1/2] tcg/sparc64: Unexport use_vis3_instructions
  2025-04-25 20:00 [PATCH 0/2] tcg/sparc64: Implement CTPOP Richard Henderson
@ 2025-04-25 20:00 ` Richard Henderson
  2025-04-25 22:20   ` Philippe Mathieu-Daudé
  2025-04-25 20:00 ` [PATCH 2/2] tcg/sparc64: Implement CTPOP Richard Henderson
  1 sibling, 1 reply; 5+ messages in thread
From: Richard Henderson @ 2025-04-25 20:00 UTC (permalink / raw)
  To: qemu-devel

This variable is no longer used outside tcg-target.c.inc.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 tcg/sparc64/tcg-target-has.h | 6 ------
 tcg/sparc64/tcg-target.c.inc | 6 ++++--
 2 files changed, 4 insertions(+), 8 deletions(-)

diff --git a/tcg/sparc64/tcg-target-has.h b/tcg/sparc64/tcg-target-has.h
index af6a949da3..b29fd177f6 100644
--- a/tcg/sparc64/tcg-target-has.h
+++ b/tcg/sparc64/tcg-target-has.h
@@ -7,12 +7,6 @@
 #ifndef TCG_TARGET_HAS_H
 #define TCG_TARGET_HAS_H
 
-#if defined(__VIS__) && __VIS__ >= 0x300
-#define use_vis3_instructions  1
-#else
-extern bool use_vis3_instructions;
-#endif
-
 /* optional instructions */
 #define TCG_TARGET_HAS_extr_i64_i32     0
 #define TCG_TARGET_HAS_qemu_ldst_i128   0
diff --git a/tcg/sparc64/tcg-target.c.inc b/tcg/sparc64/tcg-target.c.inc
index 095b310f2a..d47c1d43b2 100644
--- a/tcg/sparc64/tcg-target.c.inc
+++ b/tcg/sparc64/tcg-target.c.inc
@@ -274,8 +274,10 @@ static TCGReg tcg_target_call_oarg_reg(TCGCallReturnKind kind, int slot)
 #define STW_LE     (STWA  | INSN_ASI(ASI_PRIMARY_LITTLE))
 #define STX_LE     (STXA  | INSN_ASI(ASI_PRIMARY_LITTLE))
 
-#ifndef use_vis3_instructions
-bool use_vis3_instructions;
+#if defined(__VIS__) && __VIS__ >= 0x300
+#define use_vis3_instructions  1
+#else
+static bool use_vis3_instructions;
 #endif
 
 static bool check_fit_i64(int64_t val, unsigned int bits)
-- 
2.43.0



^ permalink raw reply related	[flat|nested] 5+ messages in thread

* [PATCH 2/2] tcg/sparc64: Implement CTPOP
  2025-04-25 20:00 [PATCH 0/2] tcg/sparc64: Implement CTPOP Richard Henderson
  2025-04-25 20:00 ` [PATCH 1/2] tcg/sparc64: Unexport use_vis3_instructions Richard Henderson
@ 2025-04-25 20:00 ` Richard Henderson
  2025-04-25 22:24   ` Philippe Mathieu-Daudé
  1 sibling, 1 reply; 5+ messages in thread
From: Richard Henderson @ 2025-04-25 20:00 UTC (permalink / raw)
  To: qemu-devel

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 tcg/sparc64/tcg-target.c.inc | 27 ++++++++++++++++++++++-----
 1 file changed, 22 insertions(+), 5 deletions(-)

diff --git a/tcg/sparc64/tcg-target.c.inc b/tcg/sparc64/tcg-target.c.inc
index d47c1d43b2..e5177d2f7f 100644
--- a/tcg/sparc64/tcg-target.c.inc
+++ b/tcg/sparc64/tcg-target.c.inc
@@ -210,6 +210,7 @@ static TCGReg tcg_target_call_oarg_reg(TCGCallReturnKind kind, int slot)
 #define ARITH_UDIVX (INSN_OP(2) | INSN_OP3(0x0d))
 #define ARITH_SDIVX (INSN_OP(2) | INSN_OP3(0x2d))
 #define ARITH_MOVCC (INSN_OP(2) | INSN_OP3(0x2c))
+#define ARITH_POPC (INSN_OP(2) | INSN_OP3(0x2e))
 #define ARITH_MOVR (INSN_OP(2) | INSN_OP3(0x2f))
 
 #define ARITH_ADDXC (INSN_OP(2) | INSN_OP3(0x36) | INSN_OPF(0x11))
@@ -274,6 +275,7 @@ static TCGReg tcg_target_call_oarg_reg(TCGCallReturnKind kind, int slot)
 #define STW_LE     (STWA  | INSN_ASI(ASI_PRIMARY_LITTLE))
 #define STX_LE     (STXA  | INSN_ASI(ASI_PRIMARY_LITTLE))
 
+static bool use_popc_instructions;
 #if defined(__VIS__) && __VIS__ >= 0x300
 #define use_vis3_instructions  1
 #else
@@ -1511,8 +1513,23 @@ static const TCGOutOpBinary outop_clz = {
     .base.static_constraint = C_NotImplemented,
 };
 
+static void tgen_ctpop(TCGContext *s, TCGType type, TCGReg a0, TCGReg a1)
+{
+    tcg_out_arith(s, a0, TCG_REG_G0, a1, ARITH_POPC);
+}
+
+static TCGConstraintSetIndex cset_ctpop(TCGType type, unsigned flags)
+{
+    if (use_popc_instructions && type == TCG_TYPE_I64) {
+        return C_O1_I1(r, r);
+    }
+    return C_NotImplemented;
+}
+
 static const TCGOutOpUnary outop_ctpop = {
-    .base.static_constraint = C_NotImplemented,
+    .base.static_constraint = C_Dynamic,
+    .base.dynamic_constraint = cset_ctpop,
+    .out_rr = tgen_ctpop,
 };
 
 static const TCGOutOpBinary outop_ctz = {
@@ -2084,15 +2101,15 @@ tcg_target_op_def(TCGOpcode op, TCGType type, unsigned flags)
 
 static void tcg_target_init(TCGContext *s)
 {
+    unsigned long hwcap = qemu_getauxval(AT_HWCAP);
+
     /*
      * Only probe for the platform and capabilities if we haven't already
      * determined maximum values at compile time.
      */
+    use_popc_instructions = (hwcap & HWCAP_SPARC_POPC) != 0;
 #ifndef use_vis3_instructions
-    {
-        unsigned long hwcap = qemu_getauxval(AT_HWCAP);
-        use_vis3_instructions = (hwcap & HWCAP_SPARC_VIS3) != 0;
-    }
+    use_vis3_instructions = (hwcap & HWCAP_SPARC_VIS3) != 0;
 #endif
 
     tcg_target_available_regs[TCG_TYPE_I32] = ALL_GENERAL_REGS;
-- 
2.43.0



^ permalink raw reply related	[flat|nested] 5+ messages in thread

* Re: [PATCH 1/2] tcg/sparc64: Unexport use_vis3_instructions
  2025-04-25 20:00 ` [PATCH 1/2] tcg/sparc64: Unexport use_vis3_instructions Richard Henderson
@ 2025-04-25 22:20   ` Philippe Mathieu-Daudé
  0 siblings, 0 replies; 5+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-04-25 22:20 UTC (permalink / raw)
  To: Richard Henderson, qemu-devel

On 25/4/25 22:00, Richard Henderson wrote:
> This variable is no longer used outside tcg-target.c.inc.
> 
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
>   tcg/sparc64/tcg-target-has.h | 6 ------
>   tcg/sparc64/tcg-target.c.inc | 6 ++++--
>   2 files changed, 4 insertions(+), 8 deletions(-)

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>



^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [PATCH 2/2] tcg/sparc64: Implement CTPOP
  2025-04-25 20:00 ` [PATCH 2/2] tcg/sparc64: Implement CTPOP Richard Henderson
@ 2025-04-25 22:24   ` Philippe Mathieu-Daudé
  0 siblings, 0 replies; 5+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-04-25 22:24 UTC (permalink / raw)
  To: Richard Henderson, qemu-devel

On 25/4/25 22:00, Richard Henderson wrote:
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
>   tcg/sparc64/tcg-target.c.inc | 27 ++++++++++++++++++++++-----
>   1 file changed, 22 insertions(+), 5 deletions(-)

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>



^ permalink raw reply	[flat|nested] 5+ messages in thread

end of thread, other threads:[~2025-04-25 22:35 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz follow: Atom feed
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2025-04-25 20:00 [PATCH 0/2] tcg/sparc64: Implement CTPOP Richard Henderson
2025-04-25 20:00 ` [PATCH 1/2] tcg/sparc64: Unexport use_vis3_instructions Richard Henderson
2025-04-25 22:20   ` Philippe Mathieu-Daudé
2025-04-25 20:00 ` [PATCH 2/2] tcg/sparc64: Implement CTPOP Richard Henderson
2025-04-25 22:24   ` Philippe Mathieu-Daudé

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