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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: pierrick.bouvier@linaro.org, philmd@linaro.org
Subject: [PATCH v2 11/16] accel/tcg: Pass TCGTBCPUState to tb_lookup
Date: Wed, 30 Apr 2025 09:48:49 -0700	[thread overview]
Message-ID: <20250430164854.2233995-12-richard.henderson@linaro.org> (raw)
In-Reply-To: <20250430164854.2233995-1-richard.henderson@linaro.org>

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 accel/tcg/cpu-exec.c | 28 +++++++++++++---------------
 1 file changed, 13 insertions(+), 15 deletions(-)

diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c
index 4a405d7b56..808983e461 100644
--- a/accel/tcg/cpu-exec.c
+++ b/accel/tcg/cpu-exec.c
@@ -232,35 +232,33 @@ static TranslationBlock *tb_htable_lookup(CPUState *cpu, vaddr pc,
  *
  * Returns: an existing translation block or NULL.
  */
-static inline TranslationBlock *tb_lookup(CPUState *cpu, vaddr pc,
-                                          uint64_t cs_base, uint32_t flags,
-                                          uint32_t cflags)
+static inline TranslationBlock *tb_lookup(CPUState *cpu, TCGTBCPUState s)
 {
     TranslationBlock *tb;
     CPUJumpCache *jc;
     uint32_t hash;
 
     /* we should never be trying to look up an INVALID tb */
-    tcg_debug_assert(!(cflags & CF_INVALID));
+    tcg_debug_assert(!(s.cflags & CF_INVALID));
 
-    hash = tb_jmp_cache_hash_func(pc);
+    hash = tb_jmp_cache_hash_func(s.pc);
     jc = cpu->tb_jmp_cache;
 
     tb = qatomic_read(&jc->array[hash].tb);
     if (likely(tb &&
-               jc->array[hash].pc == pc &&
-               tb->cs_base == cs_base &&
-               tb->flags == flags &&
-               tb_cflags(tb) == cflags)) {
+               jc->array[hash].pc == s.pc &&
+               tb->cs_base == s.cs_base &&
+               tb->flags == s.flags &&
+               tb_cflags(tb) == s.cflags)) {
         goto hit;
     }
 
-    tb = tb_htable_lookup(cpu, pc, cs_base, flags, cflags);
+    tb = tb_htable_lookup(cpu, s.pc, s.cs_base, s.flags, s.cflags);
     if (tb == NULL) {
         return NULL;
     }
 
-    jc->array[hash].pc = pc;
+    jc->array[hash].pc = s.pc;
     qatomic_set(&jc->array[hash].tb, tb);
 
 hit:
@@ -268,7 +266,7 @@ hit:
      * As long as tb is not NULL, the contents are consistent.  Therefore,
      * the virtual PC has to match for non-CF_PCREL translations.
      */
-    assert((tb_cflags(tb) & CF_PCREL) || tb->pc == pc);
+    assert((tb_cflags(tb) & CF_PCREL) || tb->pc == s.pc);
     return tb;
 }
 
@@ -402,7 +400,7 @@ const void *HELPER(lookup_tb_ptr)(CPUArchState *env)
         cpu_loop_exit(cpu);
     }
 
-    tb = tb_lookup(cpu, s.pc, s.cs_base, s.flags, s.cflags);
+    tb = tb_lookup(cpu, s);
     if (tb == NULL) {
         return tcg_code_gen_epilogue;
     }
@@ -581,7 +579,7 @@ void cpu_exec_step_atomic(CPUState *cpu)
          * Any breakpoint for this insn will have been recognized earlier.
          */
 
-        tb = tb_lookup(cpu, s.pc, s.cs_base, s.flags, s.cflags);
+        tb = tb_lookup(cpu, s);
         if (tb == NULL) {
             mmap_lock();
             tb = tb_gen_code(cpu, s.pc, s.cs_base, s.flags, s.cflags);
@@ -955,7 +953,7 @@ cpu_exec_loop(CPUState *cpu, SyncClocks *sc)
                 break;
             }
 
-            tb = tb_lookup(cpu, s.pc, s.cs_base, s.flags, s.cflags);
+            tb = tb_lookup(cpu, s);
             if (tb == NULL) {
                 CPUJumpCache *jc;
                 uint32_t h;
-- 
2.43.0



  parent reply	other threads:[~2025-04-30 16:52 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-04-30 16:48 [PATCH v2 00/16] accel/tcg: Compile cpu-exec.c twice Richard Henderson
2025-04-30 16:48 ` [PATCH v2 01/16] accel/tcg: Generalize fake_user_interrupt test Richard Henderson
2025-04-30 16:48 ` [PATCH v2 02/16] accel/tcg: Unconditionally use CPU_DUMP_CCOP in log_cpu_exec Richard Henderson
2025-04-30 16:48 ` [PATCH v2 03/16] accel/tcg: Introduce TCGCPUOps.cpu_exec_reset Richard Henderson
2025-04-30 16:48 ` [PATCH v2 04/16] target/i386: Split out x86_cpu_exec_reset Richard Henderson
2025-04-30 16:48 ` [PATCH v2 05/16] accel/tcg: Hoist cpu_get_tb_cpu_state decl to accl/tcg/cpu-ops.h Richard Henderson
2025-04-30 16:48 ` [PATCH v2 06/16] target/arm: Move cpu_get_tb_cpu_state to hflags.c Richard Henderson
2025-04-30 16:54   ` Pierrick Bouvier
2025-04-30 16:48 ` [PATCH v2 07/16] target/arm: Unexport assert_hflags_rebuild_correctly Richard Henderson
2025-04-30 16:54   ` Pierrick Bouvier
2025-04-30 16:48 ` [PATCH v2 08/16] target/riscv: Move cpu_get_tb_cpu_state to tcg-cpu.c Richard Henderson
2025-04-30 16:48 ` [PATCH v2 09/16] accel/tcg: Return TCGTBCPUState from cpu_get_tb_cpu_state Richard Henderson
2025-04-30 17:04   ` Pierrick Bouvier
2025-04-30 16:48 ` [PATCH v2 10/16] accel/tcg: Move cpu_get_tb_cpu_state to TCGCPUOps Richard Henderson
2025-04-30 16:48 ` Richard Henderson [this message]
2025-04-30 16:55   ` [PATCH v2 11/16] accel/tcg: Pass TCGTBCPUState to tb_lookup Pierrick Bouvier
2025-04-30 16:48 ` [PATCH v2 12/16] accel/tcg: Pass TCGTBCPUState to tb_htable_lookup Richard Henderson
2025-04-30 16:55   ` Pierrick Bouvier
2025-04-30 16:48 ` [PATCH v2 13/16] accel/tcg: Use TCGTBCPUState in struct tb_desc Richard Henderson
2025-04-30 16:56   ` Pierrick Bouvier
2025-04-30 16:48 ` [PATCH v2 14/16] accel/tcg: Pass TCGTBCPUState to tb_gen_code Richard Henderson
2025-04-30 16:56   ` Pierrick Bouvier
2025-04-30 16:48 ` [PATCH v2 15/16] accel/tcg: Split out accel/tcg/helper-retaddr.h Richard Henderson
2025-04-30 16:48 ` [PATCH v2 16/16] accel/tcg: Compile cpu-exec.c twice Richard Henderson

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