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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: pierrick.bouvier@linaro.org, philmd@linaro.org
Subject: [PATCH v2 14/16] accel/tcg: Pass TCGTBCPUState to tb_gen_code
Date: Wed, 30 Apr 2025 09:48:52 -0700	[thread overview]
Message-ID: <20250430164854.2233995-15-richard.henderson@linaro.org> (raw)
In-Reply-To: <20250430164854.2233995-1-richard.henderson@linaro.org>

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 accel/tcg/internal-common.h |  5 ++---
 accel/tcg/cpu-exec.c        |  4 ++--
 accel/tcg/translate-all.c   | 28 +++++++++++++---------------
 3 files changed, 17 insertions(+), 20 deletions(-)

diff --git a/accel/tcg/internal-common.h b/accel/tcg/internal-common.h
index 98c702422f..1dbc45dd95 100644
--- a/accel/tcg/internal-common.h
+++ b/accel/tcg/internal-common.h
@@ -12,6 +12,7 @@
 #include "exec/cpu-common.h"
 #include "exec/translation-block.h"
 #include "exec/mmap-lock.h"
+#include "accel/tcg/tb-cpu-state.h"
 
 extern int64_t max_delay;
 extern int64_t max_advance;
@@ -46,9 +47,7 @@ static inline bool cpu_plugin_mem_cbs_enabled(const CPUState *cpu)
 #endif
 }
 
-TranslationBlock *tb_gen_code(CPUState *cpu, vaddr pc,
-                              uint64_t cs_base, uint32_t flags,
-                              int cflags);
+TranslationBlock *tb_gen_code(CPUState *cpu, TCGTBCPUState s);
 void page_init(void);
 void tb_htable_init(void);
 void tb_reset_jump(TranslationBlock *tb, int n);
diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c
index 4ad84c2db8..a7436d2873 100644
--- a/accel/tcg/cpu-exec.c
+++ b/accel/tcg/cpu-exec.c
@@ -574,7 +574,7 @@ void cpu_exec_step_atomic(CPUState *cpu)
         tb = tb_lookup(cpu, s);
         if (tb == NULL) {
             mmap_lock();
-            tb = tb_gen_code(cpu, s.pc, s.cs_base, s.flags, s.cflags);
+            tb = tb_gen_code(cpu, s);
             mmap_unlock();
         }
 
@@ -951,7 +951,7 @@ cpu_exec_loop(CPUState *cpu, SyncClocks *sc)
                 uint32_t h;
 
                 mmap_lock();
-                tb = tb_gen_code(cpu, s.pc, s.cs_base, s.flags, s.cflags);
+                tb = tb_gen_code(cpu, s);
                 mmap_unlock();
 
                 /*
diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c
index 97aadee52c..7b0bd50904 100644
--- a/accel/tcg/translate-all.c
+++ b/accel/tcg/translate-all.c
@@ -290,9 +290,7 @@ static int setjmp_gen_code(CPUArchState *env, TranslationBlock *tb,
 }
 
 /* Called with mmap_lock held for user mode emulation.  */
-TranslationBlock *tb_gen_code(CPUState *cpu,
-                              vaddr pc, uint64_t cs_base,
-                              uint32_t flags, int cflags)
+TranslationBlock *tb_gen_code(CPUState *cpu, TCGTBCPUState s)
 {
     CPUArchState *env = cpu_env(cpu);
     TranslationBlock *tb, *existing_tb;
@@ -305,14 +303,14 @@ TranslationBlock *tb_gen_code(CPUState *cpu,
     assert_memory_lock();
     qemu_thread_jit_write();
 
-    phys_pc = get_page_addr_code_hostp(env, pc, &host_pc);
+    phys_pc = get_page_addr_code_hostp(env, s.pc, &host_pc);
 
     if (phys_pc == -1) {
         /* Generate a one-shot TB with 1 insn in it */
-        cflags = (cflags & ~CF_COUNT_MASK) | 1;
+        s.cflags = (s.cflags & ~CF_COUNT_MASK) | 1;
     }
 
-    max_insns = cflags & CF_COUNT_MASK;
+    max_insns = s.cflags & CF_COUNT_MASK;
     if (max_insns == 0) {
         max_insns = TCG_MAX_INSNS;
     }
@@ -332,12 +330,12 @@ TranslationBlock *tb_gen_code(CPUState *cpu,
 
     gen_code_buf = tcg_ctx->code_gen_ptr;
     tb->tc.ptr = tcg_splitwx_to_rx(gen_code_buf);
-    if (!(cflags & CF_PCREL)) {
-        tb->pc = pc;
+    if (!(s.cflags & CF_PCREL)) {
+        tb->pc = s.pc;
     }
-    tb->cs_base = cs_base;
-    tb->flags = flags;
-    tb->cflags = cflags;
+    tb->cs_base = s.cs_base;
+    tb->flags = s.flags;
+    tb->cflags = s.cflags;
     tb_set_page_addr0(tb, phys_pc);
     tb_set_page_addr1(tb, -1);
     if (phys_pc != -1) {
@@ -355,9 +353,9 @@ TranslationBlock *tb_gen_code(CPUState *cpu,
     tcg_ctx->guest_mo = cpu->cc->tcg_ops->guest_default_memory_order;
 
  restart_translate:
-    trace_translate_block(tb, pc, tb->tc.ptr);
+    trace_translate_block(tb, s.pc, tb->tc.ptr);
 
-    gen_code_size = setjmp_gen_code(env, tb, pc, host_pc, &max_insns, &ti);
+    gen_code_size = setjmp_gen_code(env, tb, s.pc, host_pc, &max_insns, &ti);
     if (unlikely(gen_code_size < 0)) {
         switch (gen_code_size) {
         case -1:
@@ -434,10 +432,10 @@ TranslationBlock *tb_gen_code(CPUState *cpu,
      * For CF_PCREL, attribute all executions of the generated code
      * to its first mapping.
      */
-    perf_report_code(pc, tb, tcg_splitwx_to_rx(gen_code_buf));
+    perf_report_code(s.pc, tb, tcg_splitwx_to_rx(gen_code_buf));
 
     if (qemu_loglevel_mask(CPU_LOG_TB_OUT_ASM) &&
-        qemu_log_in_addr_range(pc)) {
+        qemu_log_in_addr_range(s.pc)) {
         FILE *logfile = qemu_log_trylock();
         if (logfile) {
             int code_size, data_size;
-- 
2.43.0



  parent reply	other threads:[~2025-04-30 16:50 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-04-30 16:48 [PATCH v2 00/16] accel/tcg: Compile cpu-exec.c twice Richard Henderson
2025-04-30 16:48 ` [PATCH v2 01/16] accel/tcg: Generalize fake_user_interrupt test Richard Henderson
2025-04-30 16:48 ` [PATCH v2 02/16] accel/tcg: Unconditionally use CPU_DUMP_CCOP in log_cpu_exec Richard Henderson
2025-04-30 16:48 ` [PATCH v2 03/16] accel/tcg: Introduce TCGCPUOps.cpu_exec_reset Richard Henderson
2025-04-30 16:48 ` [PATCH v2 04/16] target/i386: Split out x86_cpu_exec_reset Richard Henderson
2025-04-30 16:48 ` [PATCH v2 05/16] accel/tcg: Hoist cpu_get_tb_cpu_state decl to accl/tcg/cpu-ops.h Richard Henderson
2025-04-30 16:48 ` [PATCH v2 06/16] target/arm: Move cpu_get_tb_cpu_state to hflags.c Richard Henderson
2025-04-30 16:54   ` Pierrick Bouvier
2025-04-30 16:48 ` [PATCH v2 07/16] target/arm: Unexport assert_hflags_rebuild_correctly Richard Henderson
2025-04-30 16:54   ` Pierrick Bouvier
2025-04-30 16:48 ` [PATCH v2 08/16] target/riscv: Move cpu_get_tb_cpu_state to tcg-cpu.c Richard Henderson
2025-04-30 16:48 ` [PATCH v2 09/16] accel/tcg: Return TCGTBCPUState from cpu_get_tb_cpu_state Richard Henderson
2025-04-30 17:04   ` Pierrick Bouvier
2025-04-30 16:48 ` [PATCH v2 10/16] accel/tcg: Move cpu_get_tb_cpu_state to TCGCPUOps Richard Henderson
2025-04-30 16:48 ` [PATCH v2 11/16] accel/tcg: Pass TCGTBCPUState to tb_lookup Richard Henderson
2025-04-30 16:55   ` Pierrick Bouvier
2025-04-30 16:48 ` [PATCH v2 12/16] accel/tcg: Pass TCGTBCPUState to tb_htable_lookup Richard Henderson
2025-04-30 16:55   ` Pierrick Bouvier
2025-04-30 16:48 ` [PATCH v2 13/16] accel/tcg: Use TCGTBCPUState in struct tb_desc Richard Henderson
2025-04-30 16:56   ` Pierrick Bouvier
2025-04-30 16:48 ` Richard Henderson [this message]
2025-04-30 16:56   ` [PATCH v2 14/16] accel/tcg: Pass TCGTBCPUState to tb_gen_code Pierrick Bouvier
2025-04-30 16:48 ` [PATCH v2 15/16] accel/tcg: Split out accel/tcg/helper-retaddr.h Richard Henderson
2025-04-30 16:48 ` [PATCH v2 16/16] accel/tcg: Compile cpu-exec.c twice Richard Henderson

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