From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: pierrick.bouvier@linaro.org, philmd@linaro.org
Subject: [PATCH v2 04/16] target/i386: Split out x86_cpu_exec_reset
Date: Wed, 30 Apr 2025 09:48:42 -0700 [thread overview]
Message-ID: <20250430164854.2233995-5-richard.henderson@linaro.org> (raw)
In-Reply-To: <20250430164854.2233995-1-richard.henderson@linaro.org>
Note that target/i386/cpu.h defines CPU_INTERRUPT_INIT
as CPU_INTERRUPT_RESET. Therefore we can handle the
new TCGCPUOps.cpu_exec_reset hook.
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
accel/tcg/cpu-exec.c | 39 ++++++++++++++-------------------------
target/i386/tcg/tcg-cpu.c | 11 ++++++++++-
2 files changed, 24 insertions(+), 26 deletions(-)
diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c
index 010f38edaa..c21c5d202d 100644
--- a/accel/tcg/cpu-exec.c
+++ b/accel/tcg/cpu-exec.c
@@ -819,33 +819,22 @@ static inline bool cpu_handle_interrupt(CPUState *cpu,
cpu->exception_index = EXCP_HLT;
bql_unlock();
return true;
- }
-#if defined(TARGET_I386)
- else if (interrupt_request & CPU_INTERRUPT_INIT) {
- X86CPU *x86_cpu = X86_CPU(cpu);
- CPUArchState *env = &x86_cpu->env;
- replay_interrupt();
- cpu_svm_check_intercept_param(env, SVM_EXIT_INIT, 0, 0);
- do_cpu_init(x86_cpu);
- cpu->exception_index = EXCP_HALTED;
- bql_unlock();
- return true;
- }
-#else
- else if (interrupt_request & CPU_INTERRUPT_RESET) {
- replay_interrupt();
- cpu->cc->tcg_ops->cpu_exec_reset(cpu);
- bql_unlock();
- return true;
- }
-#endif /* !TARGET_I386 */
- /* The target hook has 3 exit conditions:
- False when the interrupt isn't processed,
- True when it is, and we should restart on a new TB,
- and via longjmp via cpu_loop_exit. */
- else {
+ } else {
const TCGCPUOps *tcg_ops = cpu->cc->tcg_ops;
+ if (interrupt_request & CPU_INTERRUPT_RESET) {
+ replay_interrupt();
+ tcg_ops->cpu_exec_reset(cpu);
+ bql_unlock();
+ return true;
+ }
+
+ /*
+ * The target hook has 3 exit conditions:
+ * False when the interrupt isn't processed,
+ * True when it is, and we should restart on a new TB,
+ * and via longjmp via cpu_loop_exit.
+ */
if (tcg_ops->cpu_exec_interrupt(cpu, interrupt_request)) {
if (!tcg_ops->need_replay_interrupt ||
tcg_ops->need_replay_interrupt(interrupt_request)) {
diff --git a/target/i386/tcg/tcg-cpu.c b/target/i386/tcg/tcg-cpu.c
index 5d1c758ae3..f3f0380e70 100644
--- a/target/i386/tcg/tcg-cpu.c
+++ b/target/i386/tcg/tcg-cpu.c
@@ -120,6 +120,15 @@ static bool x86_debug_check_breakpoint(CPUState *cs)
/* RF disables all architectural breakpoints. */
return !(env->eflags & RF_MASK);
}
+
+static void x86_cpu_exec_reset(CPUState *cs)
+{
+ CPUArchState *env = cpu_env(cs);
+
+ cpu_svm_check_intercept_param(env, SVM_EXIT_INIT, 0, 0);
+ do_cpu_init(env_archcpu(env));
+ cs->exception_index = EXCP_HALTED;
+}
#endif
#include "accel/tcg/cpu-ops.h"
@@ -147,7 +156,7 @@ const TCGCPUOps x86_tcg_ops = {
.do_interrupt = x86_cpu_do_interrupt,
.cpu_exec_halt = x86_cpu_exec_halt,
.cpu_exec_interrupt = x86_cpu_exec_interrupt,
- .cpu_exec_reset = cpu_reset,
+ .cpu_exec_reset = x86_cpu_exec_reset,
.do_unaligned_access = x86_cpu_do_unaligned_access,
.debug_excp_handler = breakpoint_handler,
.debug_check_breakpoint = x86_debug_check_breakpoint,
--
2.43.0
next prev parent reply other threads:[~2025-04-30 16:51 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-04-30 16:48 [PATCH v2 00/16] accel/tcg: Compile cpu-exec.c twice Richard Henderson
2025-04-30 16:48 ` [PATCH v2 01/16] accel/tcg: Generalize fake_user_interrupt test Richard Henderson
2025-04-30 16:48 ` [PATCH v2 02/16] accel/tcg: Unconditionally use CPU_DUMP_CCOP in log_cpu_exec Richard Henderson
2025-04-30 16:48 ` [PATCH v2 03/16] accel/tcg: Introduce TCGCPUOps.cpu_exec_reset Richard Henderson
2025-04-30 16:48 ` Richard Henderson [this message]
2025-04-30 16:48 ` [PATCH v2 05/16] accel/tcg: Hoist cpu_get_tb_cpu_state decl to accl/tcg/cpu-ops.h Richard Henderson
2025-04-30 16:48 ` [PATCH v2 06/16] target/arm: Move cpu_get_tb_cpu_state to hflags.c Richard Henderson
2025-04-30 16:54 ` Pierrick Bouvier
2025-04-30 16:48 ` [PATCH v2 07/16] target/arm: Unexport assert_hflags_rebuild_correctly Richard Henderson
2025-04-30 16:54 ` Pierrick Bouvier
2025-04-30 16:48 ` [PATCH v2 08/16] target/riscv: Move cpu_get_tb_cpu_state to tcg-cpu.c Richard Henderson
2025-04-30 16:48 ` [PATCH v2 09/16] accel/tcg: Return TCGTBCPUState from cpu_get_tb_cpu_state Richard Henderson
2025-04-30 17:04 ` Pierrick Bouvier
2025-04-30 16:48 ` [PATCH v2 10/16] accel/tcg: Move cpu_get_tb_cpu_state to TCGCPUOps Richard Henderson
2025-04-30 16:48 ` [PATCH v2 11/16] accel/tcg: Pass TCGTBCPUState to tb_lookup Richard Henderson
2025-04-30 16:55 ` Pierrick Bouvier
2025-04-30 16:48 ` [PATCH v2 12/16] accel/tcg: Pass TCGTBCPUState to tb_htable_lookup Richard Henderson
2025-04-30 16:55 ` Pierrick Bouvier
2025-04-30 16:48 ` [PATCH v2 13/16] accel/tcg: Use TCGTBCPUState in struct tb_desc Richard Henderson
2025-04-30 16:56 ` Pierrick Bouvier
2025-04-30 16:48 ` [PATCH v2 14/16] accel/tcg: Pass TCGTBCPUState to tb_gen_code Richard Henderson
2025-04-30 16:56 ` Pierrick Bouvier
2025-04-30 16:48 ` [PATCH v2 15/16] accel/tcg: Split out accel/tcg/helper-retaddr.h Richard Henderson
2025-04-30 16:48 ` [PATCH v2 16/16] accel/tcg: Compile cpu-exec.c twice Richard Henderson
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