From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Kevin Wolf" <kwolf@redhat.com>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>,
"Yanan Wang" <wangyanan55@huawei.com>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Eduardo Habkost" <eduardo@habkost.net>,
"Fam Zheng" <fam@euphon.net>, "Hanna Reitz" <hreitz@redhat.com>,
"Zhao Liu" <zhao1.liu@intel.com>,
qemu-block@nongnu.org,
"Dmitry Fleytman" <dmitry.fleytman@gmail.com>,
"Richard Henderson" <richard.henderson@linaro.org>,
"Laurent Vivier" <lvivier@redhat.com>,
"John Snow" <jsnow@redhat.com>,
"Jason Wang" <jasowang@redhat.com>,
"Marcel Apfelbaum" <marcel.apfelbaum@gmail.com>,
"Michael S. Tsirkin" <mst@redhat.com>,
"Gerd Hoffmann" <kraxel@redhat.com>,
"Fabiano Rosas" <farosas@suse.de>,
"Daniel P. Berrangé" <berrange@redhat.com>
Subject: [PATCH v3 17/19] hw/net/vmxnet3: Remove VMXNET3_COMPAT_FLAG_OLD_MSI_OFFSETS definition
Date: Tue, 6 May 2025 16:39:03 +0200 [thread overview]
Message-ID: <20250506143905.4961-18-philmd@linaro.org> (raw)
In-Reply-To: <20250506143905.4961-1-philmd@linaro.org>
VMXNET3_COMPAT_FLAG_OLD_MSI_OFFSETS was only used by the
hw_compat_2_5[] array, via the 'x-old-msi-offsets=on' property.
We removed all machines using that array, lets remove all the
code around VMXNET3_COMPAT_FLAG_OLD_MSI_OFFSETS.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
---
hw/net/vmxnet3.c | 20 ++++++--------------
1 file changed, 6 insertions(+), 14 deletions(-)
diff --git a/hw/net/vmxnet3.c b/hw/net/vmxnet3.c
index 83d942af179..3cf5d71f478 100644
--- a/hw/net/vmxnet3.c
+++ b/hw/net/vmxnet3.c
@@ -42,18 +42,13 @@
#define VMXNET3_MSIX_BAR_SIZE 0x2000
/* Compatibility flags for migration */
-#define VMXNET3_COMPAT_FLAG_OLD_MSI_OFFSETS_BIT 0
-#define VMXNET3_COMPAT_FLAG_OLD_MSI_OFFSETS \
- (1 << VMXNET3_COMPAT_FLAG_OLD_MSI_OFFSETS_BIT)
#define VMXNET3_COMPAT_FLAG_DISABLE_PCIE_BIT 1
#define VMXNET3_COMPAT_FLAG_DISABLE_PCIE \
(1 << VMXNET3_COMPAT_FLAG_DISABLE_PCIE_BIT)
#define VMXNET3_EXP_EP_OFFSET (0x48)
-#define VMXNET3_MSI_OFFSET(s) \
- ((s)->compat_flags & VMXNET3_COMPAT_FLAG_OLD_MSI_OFFSETS ? 0x50 : 0x84)
-#define VMXNET3_MSIX_OFFSET(s) \
- ((s)->compat_flags & VMXNET3_COMPAT_FLAG_OLD_MSI_OFFSETS ? 0 : 0x9c)
+#define VMXNET3_MSI_OFFSET (0x84)
+#define VMXNET3_MSIX_OFFSET (0x9c)
#define VMXNET3_DSN_OFFSET (0x100)
#define VMXNET3_BAR0_IDX (0)
@@ -61,8 +56,7 @@
#define VMXNET3_MSIX_BAR_IDX (2)
#define VMXNET3_OFF_MSIX_TABLE (0x000)
-#define VMXNET3_OFF_MSIX_PBA(s) \
- ((s)->compat_flags & VMXNET3_COMPAT_FLAG_OLD_MSI_OFFSETS ? 0x800 : 0x1000)
+#define VMXNET3_OFF_MSIX_PBA (0x1000)
/* Link speed in Mbps should be shifted by 16 */
#define VMXNET3_LINK_SPEED (1000 << 16)
@@ -2122,8 +2116,8 @@ vmxnet3_init_msix(VMXNET3State *s)
&s->msix_bar,
VMXNET3_MSIX_BAR_IDX, VMXNET3_OFF_MSIX_TABLE,
&s->msix_bar,
- VMXNET3_MSIX_BAR_IDX, VMXNET3_OFF_MSIX_PBA(s),
- VMXNET3_MSIX_OFFSET(s), NULL);
+ VMXNET3_MSIX_BAR_IDX, VMXNET3_OFF_MSIX_PBA,
+ VMXNET3_MSIX_OFFSET, NULL);
if (0 > res) {
VMW_WRPRN("Failed to initialize MSI-X, error %d", res);
@@ -2221,7 +2215,7 @@ static void vmxnet3_pci_realize(PCIDevice *pci_dev, Error **errp)
/* Interrupt pin A */
pci_dev->config[PCI_INTERRUPT_PIN] = 0x01;
- ret = msi_init(pci_dev, VMXNET3_MSI_OFFSET(s), VMXNET3_MAX_NMSIX_INTRS,
+ ret = msi_init(pci_dev, VMXNET3_MSI_OFFSET, VMXNET3_MAX_NMSIX_INTRS,
VMXNET3_USE_64BIT, VMXNET3_PER_VECTOR_MASK, NULL);
/* Any error other than -ENOTSUP(board's MSI support is broken)
* is a programming error. Fall back to INTx silently on -ENOTSUP */
@@ -2472,8 +2466,6 @@ static const VMStateDescription vmstate_vmxnet3 = {
static const Property vmxnet3_properties[] = {
DEFINE_NIC_PROPERTIES(VMXNET3State, conf),
- DEFINE_PROP_BIT("x-old-msi-offsets", VMXNET3State, compat_flags,
- VMXNET3_COMPAT_FLAG_OLD_MSI_OFFSETS_BIT, false),
DEFINE_PROP_BIT("x-disable-pcie", VMXNET3State, compat_flags,
VMXNET3_COMPAT_FLAG_DISABLE_PCIE_BIT, false),
};
--
2.47.1
next prev parent reply other threads:[~2025-05-06 14:44 UTC|newest]
Thread overview: 44+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-05-06 14:38 [PATCH v3 00/19] hw/i386/pc: Remove deprecated 2.4 and 2.5 PC machines Philippe Mathieu-Daudé
2025-05-06 14:38 ` [PATCH v3 01/19] hw/i386/pc: Remove deprecated pc-q35-2.4 and pc-i440fx-2.4 machines Philippe Mathieu-Daudé
2025-05-07 2:31 ` Zhao Liu
2025-05-06 14:38 ` [PATCH v3 02/19] hw/i386/pc: Remove PCMachineClass::broken_reserved_end field Philippe Mathieu-Daudé
2025-05-07 2:33 ` Zhao Liu
2025-05-06 14:38 ` [PATCH v3 03/19] hw/i386/pc: Remove pc_compat_2_4[] array Philippe Mathieu-Daudé
2025-05-07 2:34 ` Zhao Liu
2025-05-06 14:38 ` [PATCH v3 04/19] target/i386/cpu: Remove X86CPU::check_cpuid field Philippe Mathieu-Daudé
2025-05-07 2:35 ` Zhao Liu
2025-05-06 14:38 ` [PATCH v3 05/19] hw/core/machine: Remove hw_compat_2_4[] array Philippe Mathieu-Daudé
2025-05-07 2:36 ` Zhao Liu
2025-05-06 14:38 ` [PATCH v3 06/19] hw/net/e1000: Remove unused E1000_FLAG_MAC flag Philippe Mathieu-Daudé
2025-05-07 3:33 ` Zhao Liu
2025-05-12 6:00 ` Thomas Huth
2025-05-12 8:14 ` Philippe Mathieu-Daudé
2025-05-06 14:38 ` [PATCH v3 07/19] hw/virtio/virtio-pci: Remove VIRTIO_PCI_FLAG_MIGRATE_EXTRA definition Philippe Mathieu-Daudé
2025-05-07 3:34 ` Zhao Liu
2025-05-06 14:38 ` [PATCH v3 08/19] hw/virtio/virtio-pci: Remove VIRTIO_PCI_FLAG_DISABLE_PCIE definition Philippe Mathieu-Daudé
2025-05-07 3:36 ` Zhao Liu
2025-05-06 14:38 ` [PATCH v3 09/19] hw/i386/pc: Remove deprecated pc-q35-2.5 and pc-i440fx-2.5 machines Philippe Mathieu-Daudé
2025-05-07 3:36 ` Zhao Liu
2025-05-06 14:38 ` [PATCH v3 10/19] hw/i386/x86: Remove X86MachineClass::save_tsc_khz field Philippe Mathieu-Daudé
2025-05-07 3:38 ` Zhao Liu
2025-05-06 14:38 ` [PATCH v3 11/19] hw/nvram/fw_cfg: Remove legacy FW_CFG_ORDER_OVERRIDE Philippe Mathieu-Daudé
2025-05-07 3:49 ` Zhao Liu
2025-05-06 14:38 ` [PATCH v3 12/19] hw/core/machine: Remove hw_compat_2_5[] array Philippe Mathieu-Daudé
2025-05-07 3:50 ` Zhao Liu
2025-05-06 14:38 ` [PATCH v3 13/19] hw/block/fdc-isa: Remove 'fallback' property Philippe Mathieu-Daudé
2025-05-07 5:50 ` Zhao Liu
2025-05-06 14:39 ` [PATCH v3 14/19] hw/scsi/vmw_pvscsi: Remove PVSCSI_COMPAT_OLD_PCI_CONFIGURATION definition Philippe Mathieu-Daudé
2025-05-07 5:57 ` Zhao Liu
2025-05-06 14:39 ` [PATCH v3 15/19] hw/scsi/vmw_pvscsi: Remove PVSCSI_COMPAT_DISABLE_PCIE_BIT definition Philippe Mathieu-Daudé
2025-05-07 5:58 ` Zhao Liu
2025-05-06 14:39 ` [PATCH v3 16/19] hw/scsi/vmw_pvscsi: Convert DeviceRealize -> InstanceInit Philippe Mathieu-Daudé
2025-05-07 6:06 ` Zhao Liu
2025-05-06 14:39 ` Philippe Mathieu-Daudé [this message]
2025-05-07 6:07 ` [PATCH v3 17/19] hw/net/vmxnet3: Remove VMXNET3_COMPAT_FLAG_OLD_MSI_OFFSETS definition Zhao Liu
2025-05-06 14:39 ` [PATCH v3 18/19] hw/net/vmxnet3: Remove VMXNET3_COMPAT_FLAG_DISABLE_PCIE definition Philippe Mathieu-Daudé
2025-05-07 6:07 ` Zhao Liu
2025-05-06 14:39 ` [PATCH v3 19/19] hw/net/vmxnet3: Merge DeviceRealize in InstanceInit Philippe Mathieu-Daudé
2025-05-07 6:08 ` Zhao Liu
2025-05-09 13:30 ` [PATCH v3 00/19] hw/i386/pc: Remove deprecated 2.4 and 2.5 PC machines Thomas Huth
2025-05-12 8:32 ` Philippe Mathieu-Daudé
2025-05-12 8:39 ` Thomas Huth
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20250506143905.4961-18-philmd@linaro.org \
--to=philmd@linaro.org \
--cc=berrange@redhat.com \
--cc=dmitry.fleytman@gmail.com \
--cc=eduardo@habkost.net \
--cc=fam@euphon.net \
--cc=farosas@suse.de \
--cc=hreitz@redhat.com \
--cc=jasowang@redhat.com \
--cc=jsnow@redhat.com \
--cc=kraxel@redhat.com \
--cc=kwolf@redhat.com \
--cc=lvivier@redhat.com \
--cc=marcel.apfelbaum@gmail.com \
--cc=mst@redhat.com \
--cc=pbonzini@redhat.com \
--cc=qemu-block@nongnu.org \
--cc=qemu-devel@nongnu.org \
--cc=richard.henderson@linaro.org \
--cc=wangyanan55@huawei.com \
--cc=zhao1.liu@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).