From: Paolo Bonzini <pbonzini@redhat.com>
To: qemu-devel@nongnu.org
Subject: [PULL 09/16] target/i386: move push of error code to switch_tss_ra
Date: Mon, 12 May 2025 21:05:17 +0200 [thread overview]
Message-ID: <20250512190524.179419-10-pbonzini@redhat.com> (raw)
In-Reply-To: <20250512190524.179419-1-pbonzini@redhat.com>
Move it there so that it can be done before the TSS trap bit is
processed.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
target/i386/tcg/seg_helper.c | 72 ++++++++++++++++++++----------------
1 file changed, 41 insertions(+), 31 deletions(-)
diff --git a/target/i386/tcg/seg_helper.c b/target/i386/tcg/seg_helper.c
index 0ca081b286d..cb90ccd2adc 100644
--- a/target/i386/tcg/seg_helper.c
+++ b/target/i386/tcg/seg_helper.c
@@ -326,10 +326,10 @@ static void tss_set_busy(CPUX86State *env, int tss_selector, bool value,
#define SWITCH_TSS_IRET 1
#define SWITCH_TSS_CALL 2
-/* return 0 if switching to a 16-bit selector */
-static int switch_tss_ra(CPUX86State *env, int tss_selector,
- uint32_t e1, uint32_t e2, int source,
- uint32_t next_eip, uintptr_t retaddr)
+static void switch_tss_ra(CPUX86State *env, int tss_selector,
+ uint32_t e1, uint32_t e2, int source,
+ uint32_t next_eip, bool has_error_code,
+ uint32_t error_code, uintptr_t retaddr)
{
int tss_limit, tss_limit_max, type, old_tss_limit_max, old_type, i;
target_ulong tss_base;
@@ -599,14 +599,38 @@ static int switch_tss_ra(CPUX86State *env, int tss_selector,
cpu_x86_update_dr7(env, env->dr[7] & ~DR7_LOCAL_BP_MASK);
}
#endif
- return type >> 3;
+
+ if (has_error_code) {
+ int cpl = env->hflags & HF_CPL_MASK;
+ StackAccess sa;
+
+ /* push the error code */
+ sa.env = env;
+ sa.ra = retaddr;
+ sa.mmu_index = x86_mmu_index_pl(env, cpl);
+ sa.sp = env->regs[R_ESP];
+ if (env->segs[R_SS].flags & DESC_B_MASK) {
+ sa.sp_mask = 0xffffffff;
+ } else {
+ sa.sp_mask = 0xffff;
+ }
+ sa.ss_base = env->segs[R_SS].base;
+ if (type & 8) {
+ pushl(&sa, error_code);
+ } else {
+ pushw(&sa, error_code);
+ }
+ SET_ESP(sa.sp, sa.sp_mask);
+ }
}
-static int switch_tss(CPUX86State *env, int tss_selector,
- uint32_t e1, uint32_t e2, int source,
- uint32_t next_eip)
+static void switch_tss(CPUX86State *env, int tss_selector,
+ uint32_t e1, uint32_t e2, int source,
+ uint32_t next_eip, bool has_error_code,
+ int error_code)
{
- return switch_tss_ra(env, tss_selector, e1, e2, source, next_eip, 0);
+ switch_tss_ra(env, tss_selector, e1, e2, source, next_eip,
+ has_error_code, error_code, 0);
}
static inline unsigned int get_sp_mask(unsigned int e2)
@@ -719,25 +743,8 @@ static void do_interrupt_protected(CPUX86State *env, int intno, int is_int,
if (!(e2 & DESC_P_MASK)) {
raise_exception_err(env, EXCP0B_NOSEG, intno * 8 + 2);
}
- shift = switch_tss(env, intno * 8, e1, e2, SWITCH_TSS_CALL, old_eip);
- if (has_error_code) {
- /* push the error code on the destination stack */
- cpl = env->hflags & HF_CPL_MASK;
- sa.mmu_index = x86_mmu_index_pl(env, cpl);
- if (env->segs[R_SS].flags & DESC_B_MASK) {
- sa.sp_mask = 0xffffffff;
- } else {
- sa.sp_mask = 0xffff;
- }
- sa.sp = env->regs[R_ESP];
- sa.ss_base = env->segs[R_SS].base;
- if (shift) {
- pushl(&sa, error_code);
- } else {
- pushw(&sa, error_code);
- }
- SET_ESP(sa.sp, sa.sp_mask);
- }
+ switch_tss(env, intno * 8, e1, e2, SWITCH_TSS_CALL, old_eip,
+ has_error_code, error_code);
return;
}
@@ -1533,7 +1540,8 @@ void helper_ljmp_protected(CPUX86State *env, int new_cs, target_ulong new_eip,
if (dpl < cpl || dpl < rpl) {
raise_exception_err_ra(env, EXCP0D_GPF, new_cs & 0xfffc, GETPC());
}
- switch_tss_ra(env, new_cs, e1, e2, SWITCH_TSS_JMP, next_eip, GETPC());
+ switch_tss_ra(env, new_cs, e1, e2, SWITCH_TSS_JMP, next_eip,
+ false, 0, GETPC());
break;
case 4: /* 286 call gate */
case 12: /* 386 call gate */
@@ -1745,7 +1753,8 @@ void helper_lcall_protected(CPUX86State *env, int new_cs, target_ulong new_eip,
if (dpl < cpl || dpl < rpl) {
raise_exception_err_ra(env, EXCP0D_GPF, new_cs & 0xfffc, GETPC());
}
- switch_tss_ra(env, new_cs, e1, e2, SWITCH_TSS_CALL, next_eip, GETPC());
+ switch_tss_ra(env, new_cs, e1, e2, SWITCH_TSS_CALL, next_eip,
+ false, 0, GETPC());
return;
case 4: /* 286 call gate */
case 12: /* 386 call gate */
@@ -2256,7 +2265,8 @@ void helper_iret_protected(CPUX86State *env, int shift, int next_eip)
if (type != 3) {
raise_exception_err_ra(env, EXCP0A_TSS, tss_selector & 0xfffc, GETPC());
}
- switch_tss_ra(env, tss_selector, e1, e2, SWITCH_TSS_IRET, next_eip, GETPC());
+ switch_tss_ra(env, tss_selector, e1, e2, SWITCH_TSS_IRET, next_eip,
+ false, 0, GETPC());
} else {
helper_ret_protected(env, shift, 1, 0, GETPC());
}
--
2.49.0
next prev parent reply other threads:[~2025-05-12 19:07 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-05-12 19:05 [PULL 00/16] Meson, x86, Rust patches for 2025-05-12 Paolo Bonzini
2025-05-12 19:05 ` [PULL 01/16] meson: drop --enable-avx* options Paolo Bonzini
2025-05-12 19:05 ` [PULL 02/16] meson: do not check supported TCG architecture if no emulators built Paolo Bonzini
2025-05-12 19:05 ` [PULL 03/16] meson: remove unnecessary dependencies from specific_ss Paolo Bonzini
2025-05-12 19:05 ` [PULL 04/16] modinfo: lookup compile_commands.json by object Paolo Bonzini
2025-05-12 19:05 ` [PULL 05/16] rust: pl011: Rename RX FIFO methods Paolo Bonzini
2025-05-12 19:05 ` [PULL 06/16] rust: pl011: Really use RX FIFO depth Paolo Bonzini
2025-05-12 19:05 ` [PULL 07/16] target/i386: ignore misplaced REX prefixes Paolo Bonzini
2025-05-12 19:05 ` [PULL 08/16] target/i386: list TCG-supported features for CPUID[80000021h].EAX Paolo Bonzini
2025-05-12 19:05 ` Paolo Bonzini [this message]
2025-05-12 19:05 ` [PULL 10/16] target/i386: implement TSS trap bit Paolo Bonzini
2025-09-10 5:50 ` Thomas Huth
2025-09-10 8:01 ` Mark Cave-Ayland
2025-09-10 9:07 ` Thomas Huth
2025-05-12 19:05 ` [PULL 11/16] target/i386/emulate: stop overloading decode->op[N].ptr Paolo Bonzini
2025-05-12 19:05 ` [PULL 12/16] target/i386/emulate: mostly rewrite flags handling Paolo Bonzini
2025-05-12 19:05 ` [PULL 13/16] target/i386: remove lflags Paolo Bonzini
2025-05-12 19:05 ` [PULL 14/16] linux-headers: update from 6.15 + kvm/next Paolo Bonzini
2025-05-12 19:05 ` [PULL 15/16] hw/audio/cs4231a: fix assertion error in isa_bus_get_irq Paolo Bonzini
2025-05-12 19:05 ` [PULL 16/16] target/i386: Make ITS_NO available to guests Paolo Bonzini
2025-05-14 13:18 ` [PULL 00/16] Meson, x86, Rust patches for 2025-05-12 Stefan Hajnoczi
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