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From: Jamin Lin via <qemu-devel@nongnu.org>
To: "Cédric Le Goater" <clg@kaod.org>,
	"Peter Maydell" <peter.maydell@linaro.org>,
	"Steven Lee" <steven_lee@aspeedtech.com>,
	"Troy Lee" <leetroy@gmail.com>,
	"Andrew Jeffery" <andrew@codeconstruct.com.au>,
	"Joel Stanley" <joel@jms.id.au>,
	"Fabiano Rosas" <farosas@suse.de>,
	"Laurent Vivier" <lvivier@redhat.com>,
	"Paolo Bonzini" <pbonzini@redhat.com>,
	"open list:ASPEED BMCs" <qemu-arm@nongnu.org>,
	"open list:All patches CC here" <qemu-devel@nongnu.org>
Cc: <jamin_lin@aspeedtech.com>, <troy_lee@aspeedtech.com>
Subject: [PATCH v3 08/28] hw/misc/aspeed_hace: Extract accumulation-mode hash execution into helper function
Date: Thu, 15 May 2025 16:09:40 +0800	[thread overview]
Message-ID: <20250515081008.583578-9-jamin_lin@aspeedtech.com> (raw)
In-Reply-To: <20250515081008.583578-1-jamin_lin@aspeedtech.com>

To improve code readability and maintainability of do_hash_operation(), this
commit introduces a new helper function: hash_execute_acc_mode().

This function encapsulates the full flow for accumulation mode, including
context initialization, update, conditional finalization, and digest writeback
with I/O vector unmapping.

No functional changes are introduced.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
 hw/misc/aspeed_hace.c | 74 ++++++++++++++++++++++++-------------------
 1 file changed, 41 insertions(+), 33 deletions(-)

diff --git a/hw/misc/aspeed_hace.c b/hw/misc/aspeed_hace.c
index c50e228cdf..33e13974fe 100644
--- a/hw/misc/aspeed_hace.c
+++ b/hw/misc/aspeed_hace.c
@@ -267,26 +267,57 @@ static void hash_execute_non_acc_mode(AspeedHACEState *s, int algo,
     hash_write_digest_and_unmap_iov(s, iov, iov_idx, digest_buf, digest_len);
 }
 
-static void do_hash_operation(AspeedHACEState *s, int algo, bool sg_mode,
-                              bool acc_mode)
+static void hash_execute_acc_mode(AspeedHACEState *s, int algo,
+                                  struct iovec *iov, int iov_idx,
+                                  bool final_request)
 {
     g_autofree uint8_t *digest_buf = NULL;
-    struct iovec iov[ASPEED_HACE_MAX_SG];
-    bool acc_final_request = false;
     Error *local_err = NULL;
     size_t digest_len = 0;
-    int iov_idx = -1;
 
-    if (acc_mode && s->hash_ctx == NULL) {
+    if (s->hash_ctx == NULL) {
         s->hash_ctx = qcrypto_hash_new(algo, &local_err);
         if (s->hash_ctx == NULL) {
-            qemu_log_mask(LOG_GUEST_ERROR, "qcrypto hash failed : %s",
-                          error_get_pretty(local_err));
+            qemu_log_mask(LOG_GUEST_ERROR, "%s: qcrypto hash new failed : %s",
+                          __func__, error_get_pretty(local_err));
             error_free(local_err);
             return;
         }
     }
 
+    if (qcrypto_hash_updatev(s->hash_ctx, iov, iov_idx, &local_err) < 0) {
+        qemu_log_mask(LOG_GUEST_ERROR, "%s: qcrypto hash updatev failed : %s",
+                      __func__, error_get_pretty(local_err));
+        error_free(local_err);
+        return;
+    }
+
+    if (final_request) {
+        if (qcrypto_hash_finalize_bytes(s->hash_ctx, &digest_buf,
+                                        &digest_len, &local_err)) {
+            qemu_log_mask(LOG_GUEST_ERROR,
+                          "%s: qcrypto hash finalize bytes failed : %s",
+                          __func__, error_get_pretty(local_err));
+            error_free(local_err);
+            local_err = NULL;
+        }
+
+        qcrypto_hash_free(s->hash_ctx);
+
+        s->hash_ctx = NULL;
+        s->total_req_len = 0;
+    }
+
+    hash_write_digest_and_unmap_iov(s, iov, iov_idx, digest_buf, digest_len);
+}
+
+static void do_hash_operation(AspeedHACEState *s, int algo, bool sg_mode,
+                              bool acc_mode)
+{
+    struct iovec iov[ASPEED_HACE_MAX_SG];
+    bool acc_final_request = false;
+    int iov_idx = -1;
+
     /* Prepares the iov for hashing operations based on the selected mode */
     if (sg_mode) {
         iov_idx = hash_prepare_sg_iov(s, iov, acc_mode, &acc_final_request);
@@ -300,32 +331,9 @@ static void do_hash_operation(AspeedHACEState *s, int algo, bool sg_mode,
          return;
     }
 
+    /* Executes the hash operation */
     if (acc_mode) {
-        if (qcrypto_hash_updatev(s->hash_ctx, iov, iov_idx, &local_err) < 0) {
-            qemu_log_mask(LOG_GUEST_ERROR, "qcrypto hash update failed : %s",
-                          error_get_pretty(local_err));
-            error_free(local_err);
-            return;
-        }
-
-        if (acc_final_request) {
-            if (qcrypto_hash_finalize_bytes(s->hash_ctx, &digest_buf,
-                                            &digest_len, &local_err)) {
-                qemu_log_mask(LOG_GUEST_ERROR,
-                              "qcrypto hash finalize failed : %s",
-                              error_get_pretty(local_err));
-                error_free(local_err);
-                local_err = NULL;
-            }
-
-            qcrypto_hash_free(s->hash_ctx);
-
-            s->hash_ctx = NULL;
-            s->total_req_len = 0;
-        }
-
-        hash_write_digest_and_unmap_iov(s, iov, iov_idx, digest_buf,
-                                        digest_len);
+        hash_execute_acc_mode(s, algo, iov, iov_idx, acc_final_request);
     } else {
         hash_execute_non_acc_mode(s, algo, iov, iov_idx);
     }
-- 
2.43.0



  parent reply	other threads:[~2025-05-15  8:13 UTC|newest]

Thread overview: 37+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-05-15  8:09 [PATCH v3 00/28] Fix incorrect hash results on AST2700 Jamin Lin via
2025-05-15  8:09 ` [PATCH v3 01/28] hw/misc/aspeed_hace: Remove unused code for better readability Jamin Lin via
2025-05-15  8:09 ` [PATCH v3 02/28] hw/misc/aspeed_hace: Improve readability and consistency in variable naming Jamin Lin via
2025-05-15  8:09 ` [PATCH v3 03/28] hw/misc/aspeed_hace: Ensure HASH_IRQ is always set to prevent firmware hang Jamin Lin via
2025-05-15  8:09 ` [PATCH v3 04/28] hw/misc/aspeed_hace: Extract direct mode hash buffer setup into helper function Jamin Lin via
2025-05-15  8:09 ` [PATCH v3 05/28] hw/misc/aspeed_hace: Extract SG-mode " Jamin Lin via
2025-05-15  8:09 ` [PATCH v3 06/28] hw/misc/aspeed_hace: Extract digest write and iov unmap " Jamin Lin via
2025-05-15  8:09 ` [PATCH v3 07/28] hw/misc/aspeed_hace: Extract non-accumulation hash execution " Jamin Lin via
2025-05-15  8:09 ` Jamin Lin via [this message]
2025-05-15  8:09 ` [PATCH v3 09/28] hw/misc/aspeed_hace: Introduce 64-bit hash source address " Jamin Lin via
2025-05-15  8:09 ` [PATCH v3 10/28] hw/misc/aspeed_hace: Rename R_HASH_DEST to R_HASH_DIGEST and introduce 64-bit hash digest address helper Jamin Lin via
2025-05-15  8:09 ` [PATCH v3 11/28] hw/misc/aspeed_hace: Support accumulative mode for direct access mode Jamin Lin via
2025-05-15  8:09 ` [PATCH v3 12/28] hw/misc/aspeed_hace: Move register size to instance class and dynamically allocate regs Jamin Lin via
2025-05-15  8:09 ` [PATCH v3 13/28] hw/misc/aspeed_hace: Add support for source, digest, key buffer 64 bit addresses Jamin Lin via
2025-05-15  8:09 ` [PATCH v3 14/28] hw/misc/aspeed_hace: Support DMA 64 bits dram address Jamin Lin via
2025-05-15  8:09 ` [PATCH v3 15/28] hw/misc/aspeed_hace: Add trace-events for better debugging Jamin Lin via
2025-05-15  8:09 ` [PATCH v3 16/28] hw/misc/aspeed_hace: Support to dump plaintext and digest " Jamin Lin via
2025-05-15  8:09 ` [PATCH v3 17/28] tests/qtest: Reorder aspeed test list Jamin Lin via
2025-05-15  8:09 ` [PATCH v3 18/28] test/qtest: Introduce a new aspeed-hace-utils.c to place common testcases Jamin Lin via
2025-05-15  8:09 ` [PATCH v3 19/28] test/qtest/hace: Specify explicit array sizes for test vectors and hash results Jamin Lin via
2025-05-15  8:09 ` [PATCH v3 20/28] test/qtest/hace: Adjust test address range for AST1030 due to SRAM limitations Jamin Lin via
2025-05-15  8:09 ` [PATCH v3 21/28] test/qtest/hace: Add SHA-384 test cases for ASPEED HACE model Jamin Lin via
2025-05-15  8:09 ` [PATCH v3 22/28] test/qtest/hace: Add SHA-384 tests for AST2600 Jamin Lin via
2025-05-15  8:09 ` [PATCH v3 23/28] test/qtest/hace: Add tests for AST1030 Jamin Lin via
2025-05-15  8:09 ` [PATCH v3 24/28] test/qtest/hace: Update source data and digest data type to 64-bit Jamin Lin via
2025-05-15  8:09 ` [PATCH v3 25/28] test/qtest/hace: Support 64-bit source and digest addresses for AST2700 Jamin Lin via
2025-05-15  8:09 ` [PATCH v3 26/28] test/qtest/hace: Support to test upper 32 bits of digest and source addresses Jamin Lin via
2025-05-15  8:09 ` [PATCH v3 27/28] test/qtest/hace: Support to validate 64-bit hmac key buffer addresses Jamin Lin via
2025-05-15  8:10 ` [PATCH v3 28/28] test/qtest/hace: Add tests for AST2700 Jamin Lin via
2025-05-20 14:58 ` [PATCH v3 00/28] Fix incorrect hash results on AST2700 Fabiano Rosas
2025-05-23  7:17 ` Cédric Le Goater
2025-05-23  8:10 ` Cédric Le Goater
2025-05-29  7:29 ` Michael Tokarev
2025-05-29  7:38   ` Cédric Le Goater
2025-05-29  7:40     ` Jamin Lin
2025-05-29  7:45       ` Michael Tokarev
2025-05-29 12:17         ` Cédric Le Goater

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