From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6EAEEC3DA6D for ; Tue, 20 May 2025 11:09:35 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1uHKnf-0008GQ-Cs; Tue, 20 May 2025 07:06:23 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1uHKnZ-0007sQ-5E for qemu-devel@nongnu.org; Tue, 20 May 2025 07:06:17 -0400 Received: from us-smtp-delivery-124.mimecast.com ([170.10.133.124]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1uHKnX-0003AR-GI for qemu-devel@nongnu.org; Tue, 20 May 2025 07:06:16 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1747739174; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=L/ldiH4Ix3h0scGsDf0SMs7uYHu1Qxq4H72fOj8bd+g=; b=cWdryemq5uNXDkxIQwyVC1Hyue9p5AKacu4JMuQjCpFldDC30HRnGA70E2UxBYw+Ml1XsP fj8tB9duVACYTmJfveN9RNZqMBeVNPMKXrdLVRrzMwhWH5uK4lMKtXdhZwTEhoFnw0B5EX v34Q2aeyFwGKYNRGZ4c3PNH0DxwvynA= Received: from mail-ej1-f72.google.com (mail-ej1-f72.google.com [209.85.218.72]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-246-KNY7uK4RNEqi-lUtFmMY6Q-1; Tue, 20 May 2025 07:06:13 -0400 X-MC-Unique: KNY7uK4RNEqi-lUtFmMY6Q-1 X-Mimecast-MFC-AGG-ID: KNY7uK4RNEqi-lUtFmMY6Q_1747739172 Received: by mail-ej1-f72.google.com with SMTP id a640c23a62f3a-ad56222a1easo207997566b.1 for ; Tue, 20 May 2025 04:06:13 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1747739170; x=1748343970; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=L/ldiH4Ix3h0scGsDf0SMs7uYHu1Qxq4H72fOj8bd+g=; b=JIX7QipKPc8Q4H5RmvNyjDunsf9Cp8y7I4njWXCWJu1o9jjoALCF26aNMjSRC9JmF2 jg1byOGGepWFsnbwSGp2HfATSo8FzklNt//tanOMIaesLV0JZUQV/gMAUiHGkfW95tWb jmpIlY9NmYM76nnZkfM5G1x8FpHhJgcT1wmcFmXiFtHDOV2l1qt1jwArmNH+lHxKDx8w Hpl8M+S65Qmmql609CPlv3o3UxAtEvLZYXlZ2LNvStiW069NpV5FL5CGK+QTqmYCxWEx OFYi326cdwsDegW1OD9P3l2XTuu25Csp8jgtMqf7As4diakOw7q7P/vSUzqp5oEsjsoW si7g== X-Gm-Message-State: AOJu0Yw5VnfVzA8oXD4uSNvW0exwcGlzd9J5miC1sDyPzR5DbcO4/yFd d/WxkUYfaqwN5c7z/AO81eieG+07sN9+x3G9tLy08vCTwX32Zt1PE1bWZasCNOJWTDSCO23LEhi KdiV2YV1gQxZjxZK/tOKWxsifJkccDsV1JyTqL1fKRH2MjkYtZQpOLeBCzkyGHk9G6pwKGBKNdN LJQNGM56Zjq0Bb4/BffXOYH/Pr1bvi9R33tgi/JefF X-Gm-Gg: ASbGncsnZIurwKeIutNNlX6o/+Gvqb04t6TeP3W31qnVuHZcr3mggea5umCJcJFkIzs xk1KIkukhgmNusadCzKMsG/t+XJFKnKlbSLovrj+q9jVuq4ARqDa5T4oy1CheH+WDgVqNA4pGIy q95jb6kVV44qxgAu3gmIRsdW6hFf51ynRIKSMTI1aeN77ttkapL1oCNSGpFC8KyoJdChp7jqpLH 7EPWH7FAUG0pI71NVFPM9ik+ISaY0A4Xzy+E78zvC0iGl9oE5F+e3+JXyO1kn3qgIWxAAcBg24n 1ay1oECGqcekjg== X-Received: by 2002:a17:907:72c3:b0:ad2:50ef:492e with SMTP id a640c23a62f3a-ad52d516e6dmr1549045566b.32.1747739170224; Tue, 20 May 2025 04:06:10 -0700 (PDT) X-Google-Smtp-Source: AGHT+IHe2A2TpgzusI7mi0e703MG8AWPuYSrtqchHZP33f/3QPsf0MTzpBjUi1KtyWAtpXcUVW0S2g== X-Received: by 2002:a17:907:72c3:b0:ad2:50ef:492e with SMTP id a640c23a62f3a-ad52d516e6dmr1549042366b.32.1747739169801; Tue, 20 May 2025 04:06:09 -0700 (PDT) Received: from [192.168.122.1] ([151.95.46.79]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-6004d502719sm7066215a12.26.2025.05.20.04.06.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 20 May 2025 04:06:09 -0700 (PDT) From: Paolo Bonzini To: qemu-devel@nongnu.org Cc: Alistair Francis Subject: [PULL 17/35] target/riscv: merge riscv_cpu_class_init with the class_base function Date: Tue, 20 May 2025 13:05:12 +0200 Message-ID: <20250520110530.366202-18-pbonzini@redhat.com> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250520110530.366202-1-pbonzini@redhat.com> References: <20250520110530.366202-1-pbonzini@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=170.10.133.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -25 X-Spam_score: -2.6 X-Spam_bar: -- X-Spam_report: (-2.6 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.487, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Since all TYPE_RISCV_CPU subclasses support a class_data of type RISCVCPUDef, process it even before calling the .class_init function for the subclasses. Reviewed-by: Alistair Francis Signed-off-by: Paolo Bonzini --- target/riscv/cpu.c | 21 ++++++++++----------- 1 file changed, 10 insertions(+), 11 deletions(-) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 22e3a2211ed..334791eebdf 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -3080,15 +3080,18 @@ static void riscv_cpu_class_base_init(ObjectClass *c, const void *data) } else { mcc->def = g_new0(RISCVCPUDef, 1); } -} -static void riscv_cpu_class_init(ObjectClass *c, const void *data) -{ - RISCVCPUClass *mcc = RISCV_CPU_CLASS(c); - const RISCVCPUDef *def = data; + if (data) { + const RISCVCPUDef *def = data; + if (def->misa_mxl_max) { + assert(def->misa_mxl_max <= MXL_RV128); + mcc->def->misa_mxl_max = def->misa_mxl_max; + } + } - mcc->def->misa_mxl_max = def->misa_mxl_max; - riscv_cpu_validate_misa_mxl(mcc); + if (!object_class_is_abstract(c)) { + riscv_cpu_validate_misa_mxl(mcc); + } } static void riscv_isa_string_ext(RISCVCPU *cpu, char **isa_str, @@ -3188,7 +3191,6 @@ void riscv_isa_write_fdt(RISCVCPU *cpu, void *fdt, char *nodename) .name = (type_name), \ .parent = TYPE_RISCV_DYNAMIC_CPU, \ .instance_init = (initfn), \ - .class_init = riscv_cpu_class_init, \ .class_data = &(const RISCVCPUDef) { \ .misa_mxl_max = (misa_mxl_max_), \ }, \ @@ -3199,7 +3201,6 @@ void riscv_isa_write_fdt(RISCVCPU *cpu, void *fdt, char *nodename) .name = (type_name), \ .parent = TYPE_RISCV_VENDOR_CPU, \ .instance_init = (initfn), \ - .class_init = riscv_cpu_class_init, \ .class_data = &(const RISCVCPUDef) { \ .misa_mxl_max = (misa_mxl_max_), \ }, \ @@ -3210,7 +3211,6 @@ void riscv_isa_write_fdt(RISCVCPU *cpu, void *fdt, char *nodename) .name = (type_name), \ .parent = TYPE_RISCV_BARE_CPU, \ .instance_init = (initfn), \ - .class_init = riscv_cpu_class_init, \ .class_data = &(const RISCVCPUDef) { \ .misa_mxl_max = (misa_mxl_max_), \ }, \ @@ -3221,7 +3221,6 @@ void riscv_isa_write_fdt(RISCVCPU *cpu, void *fdt, char *nodename) .name = (type_name), \ .parent = TYPE_RISCV_BARE_CPU, \ .instance_init = (initfn), \ - .class_init = riscv_cpu_class_init, \ .class_data = &(const RISCVCPUDef) { \ .misa_mxl_max = (misa_mxl_max_), \ }, \ -- 2.49.0